1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/sound/fsl,micfil.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: NXP MICFIL Digital Audio Interface (MICFIL) 8 9maintainers: 10 - Shengjiu Wang <[email protected]> 11 12description: | 13 The MICFIL digital interface provides a 16-bit or 24-bit audio signal 14 from a PDM microphone bitstream in a configurable output sampling rate. 15 16properties: 17 compatible: 18 oneOf: 19 - items: 20 - enum: 21 - fsl,imx95-micfil 22 - const: fsl,imx93-micfil 23 24 - enum: 25 - fsl,imx8mm-micfil 26 - fsl,imx8mp-micfil 27 - fsl,imx93-micfil 28 - fsl,imx943-micfil 29 30 reg: 31 maxItems: 1 32 33 interrupts: 34 items: 35 - description: Digital Microphone interface interrupt 36 - description: Digital Microphone interface error interrupt 37 - description: voice activity detector event interrupt 38 - description: voice activity detector error interrupt 39 40 dmas: 41 items: 42 - description: DMA controller phandle and request line for RX 43 44 dma-names: 45 items: 46 - const: rx 47 48 clocks: 49 items: 50 - description: The ipg clock for register access 51 - description: internal micfil clock 52 - description: PLL clock source for 8kHz series 53 - description: PLL clock source for 11kHz series 54 - description: External clock 3 55 minItems: 2 56 57 clock-names: 58 items: 59 - const: ipg_clk 60 - const: ipg_clk_app 61 - const: pll8k 62 - const: pll11k 63 - const: clkext3 64 minItems: 2 65 66 "#sound-dai-cells": 67 const: 0 68 69required: 70 - compatible 71 - reg 72 - interrupts 73 - dmas 74 - dma-names 75 - clocks 76 - clock-names 77 78additionalProperties: false 79 80examples: 81 - | 82 #include <dt-bindings/interrupt-controller/arm-gic.h> 83 #include <dt-bindings/clock/imx8mm-clock.h> 84 micfil: audio-controller@30080000 { 85 compatible = "fsl,imx8mm-micfil"; 86 reg = <0x30080000 0x10000>; 87 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 88 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 89 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 90 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; 91 clocks = <&clk IMX8MM_CLK_PDM_IPG>, 92 <&clk IMX8MM_CLK_PDM_ROOT>; 93 clock-names = "ipg_clk", "ipg_clk_app"; 94 dmas = <&sdma2 24 25 0>; 95 dma-names = "rx"; 96 }; 97