1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/soc/amlogic/amlogic,meson-gx-hhi-sysctrl.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Amlogic Meson System Control registers 8 9maintainers: 10 - Neil Armstrong <[email protected]> 11 12properties: 13 compatible: 14 items: 15 - enum: 16 - amlogic,meson-hhi-sysctrl 17 - amlogic,meson-gx-hhi-sysctrl 18 - amlogic,meson-gx-ao-sysctrl 19 - amlogic,meson-axg-hhi-sysctrl 20 - amlogic,meson-axg-ao-sysctrl 21 - const: simple-mfd 22 - const: syscon 23 24 reg: 25 maxItems: 1 26 27 clock-controller: 28 type: object 29 30 power-controller: 31 $ref: /schemas/power/amlogic,meson-ee-pwrc.yaml 32 33 pinctrl: 34 type: object 35 36 phy: 37 type: object 38 39allOf: 40 - if: 41 properties: 42 compatible: 43 enum: 44 - amlogic,meson-hhi-sysctrl 45 then: 46 properties: 47 clock-controller: 48 $ref: /schemas/clock/amlogic,meson8-clkc.yaml# 49 50 pinctrl: false 51 phy: false 52 53 - if: 54 properties: 55 compatible: 56 enum: 57 - amlogic,meson-gx-hhi-sysctrl 58 - amlogic,meson-axg-hhi-sysctrl 59 then: 60 properties: 61 clock-controller: 62 $ref: /schemas/clock/amlogic,gxbb-clkc.yaml# 63 64 required: 65 - power-controller 66 67 - if: 68 properties: 69 compatible: 70 enum: 71 - amlogic,meson-gx-ao-sysctrl 72 - amlogic,meson-axg-ao-sysctrl 73 then: 74 properties: 75 clock-controller: 76 $ref: /schemas/clock/amlogic,gxbb-aoclkc.yaml# 77 78 power-controller: false 79 phy: false 80 81 - if: 82 properties: 83 compatible: 84 enum: 85 - amlogic,meson-gx-hhi-sysctrl 86 then: 87 properties: 88 phy: false 89 90 - if: 91 properties: 92 compatible: 93 enum: 94 - amlogic,meson-axg-hhi-sysctrl 95 then: 96 properties: 97 phy: 98 oneOf: 99 - $ref: /schemas/phy/amlogic,g12a-mipi-dphy-analog.yaml 100 - $ref: /schemas/phy/amlogic,meson-axg-mipi-pcie-analog.yaml 101 102required: 103 - compatible 104 - reg 105 - clock-controller 106 107additionalProperties: false 108 109examples: 110 - | 111 bus@c883c000 { 112 compatible = "simple-bus"; 113 reg = <0xc883c000 0x2000>; 114 #address-cells = <1>; 115 #size-cells = <1>; 116 ranges = <0x0 0xc883c000 0x2000>; 117 118 sysctrl: system-controller@0 { 119 compatible = "amlogic,meson-gx-hhi-sysctrl", "simple-mfd", "syscon"; 120 reg = <0 0x400>; 121 122 clock-controller { 123 compatible = "amlogic,gxbb-clkc"; 124 #clock-cells = <1>; 125 clocks = <&xtal>; 126 clock-names = "xtal"; 127 }; 128 129 power-controller { 130 compatible = "amlogic,meson-gxbb-pwrc"; 131 #power-domain-cells = <1>; 132 amlogic,ao-sysctrl = <&sysctrl_AO>; 133 134 resets = <&reset_viu>, 135 <&reset_venc>, 136 <&reset_vcbus>, 137 <&reset_bt656>, 138 <&reset_dvin>, 139 <&reset_rdma>, 140 <&reset_venci>, 141 <&reset_vencp>, 142 <&reset_vdac>, 143 <&reset_vdi6>, 144 <&reset_vencl>, 145 <&reset_vid_lock>; 146 reset-names = "viu", "venc", "vcbus", "bt656", "dvin", 147 "rdma", "venci", "vencp", "vdac", "vdi6", 148 "vencl", "vid_lock"; 149 clocks = <&clk_vpu>, <&clk_vapb>; 150 clock-names = "vpu", "vapb"; 151 }; 152 }; 153 }; 154 155 bus@c8100000 { 156 compatible = "simple-bus"; 157 reg = <0xc8100000 0x100000>; 158 #address-cells = <1>; 159 #size-cells = <1>; 160 ranges = <0x0 0xc8100000 0x100000>; 161 162 sysctrl_AO: system-controller@0 { 163 compatible = "amlogic,meson-gx-ao-sysctrl", "simple-mfd", "syscon"; 164 reg = <0 0x100>; 165 166 clock-controller { 167 compatible = "amlogic,meson-gxbb-aoclkc", "amlogic,meson-gx-aoclkc"; 168 #clock-cells = <1>; 169 #reset-cells = <1>; 170 clocks = <&xtal>, <&clk81>; 171 clock-names = "xtal", "mpeg-clk"; 172 }; 173 }; 174 }; 175 176 - | 177 system-controller@ff63c000 { 178 compatible = "amlogic,meson-axg-hhi-sysctrl", "simple-mfd", "syscon"; 179 reg = <0xff63c000 0x400>; 180 181 clock-controller { 182 compatible = "amlogic,axg-clkc"; 183 #clock-cells = <1>; 184 clocks = <&xtal>; 185 clock-names = "xtal"; 186 }; 187 188 power-controller { 189 compatible = "amlogic,meson-axg-pwrc"; 190 #power-domain-cells = <1>; 191 amlogic,ao-sysctrl = <&sysctrl_AO>; 192 193 resets = <&reset_viu>, 194 <&reset_venc>, 195 <&reset_vcbus>, 196 <&reset_vencl>, 197 <&reset_vid_lock>; 198 reset-names = "viu", "venc", "vcbus", "vencl", "vid_lock"; 199 clocks = <&clk_vpu>, <&clk_vapb>; 200 clock-names = "vpu", "vapb"; 201 }; 202 203 phy { 204 compatible = "amlogic,axg-mipi-pcie-analog-phy"; 205 #phy-cells = <0>; 206 }; 207 }; 208