1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/wireless/qcom,ath10k.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Technologies ath10k wireless devices
8
9maintainers:
10  - Jeff Johnson <[email protected]>
11
12description:
13  Qualcomm Technologies, Inc. IEEE 802.11ac devices.
14
15properties:
16  compatible:
17    enum:
18      - qcom,ath10k # SDIO-based devices
19      - qcom,ipq4019-wifi
20      - qcom,wcn3990-wifi # SNoC-based devices
21
22  reg:
23    maxItems: 1
24
25  reg-names:
26    items:
27      - const: membase
28
29  interrupts:
30    minItems: 12
31    maxItems: 17
32
33  interrupt-names:
34    minItems: 12
35    maxItems: 17
36
37  memory-region:
38    maxItems: 1
39    description:
40      Reference to the MSA memory region used by the Wi-Fi firmware
41      running on the Q6 core.
42
43  iommus:
44    minItems: 1
45    maxItems: 2
46
47  clocks:
48    minItems: 1
49    maxItems: 3
50
51  clock-names:
52    minItems: 1
53    maxItems: 3
54
55  resets:
56    maxItems: 6
57
58  reset-names:
59    items:
60      - const: wifi_cpu_init
61      - const: wifi_radio_srif
62      - const: wifi_radio_warm
63      - const: wifi_radio_cold
64      - const: wifi_core_warm
65      - const: wifi_core_cold
66
67  ext-fem-name:
68    $ref: /schemas/types.yaml#/definitions/string
69    description: Name of external front end module used.
70    enum:
71      - microsemi-lx5586
72      - sky85703-11
73      - sky85803
74
75  firmware-name:
76    maxItems: 1
77    description:
78      If present, a board or platform specific string used to lookup firmware
79      files for the device.
80
81  wifi-firmware:
82    type: object
83    additionalProperties: false
84    description: |
85      The ath10k Wi-Fi node can contain one optional firmware subnode.
86      Firmware subnode is needed when the platform does not have Trustzone.
87    properties:
88      iommus:
89        maxItems: 1
90    required:
91      - iommus
92
93  ieee80211-freq-limit: true
94
95  qcom,ath10k-calibration-data:
96    $ref: /schemas/types.yaml#/definitions/uint8-array
97    description:
98      Calibration data + board-specific data as a byte array. The length
99      can vary between hardware versions.
100
101  qcom,ath10k-calibration-variant:
102    $ref: /schemas/types.yaml#/definitions/string
103    description:
104      Unique variant identifier of the calibration data in board-2.bin
105      for designs with colliding bus and device specific ids
106
107  qcom,ath10k-pre-calibration-data:
108    $ref: /schemas/types.yaml#/definitions/uint8-array
109    description:
110      Pre-calibration data as a byte array. The length can vary between
111      hardware versions.
112
113  qcom,coexist-support:
114    $ref: /schemas/types.yaml#/definitions/uint8
115    enum: [0, 1]
116    description:
117      Indicate coex support by the hardware.
118
119  qcom,coexist-gpio-pin:
120    $ref: /schemas/types.yaml#/definitions/uint32
121    description:
122      COEX GPIO number provided to the Wi-Fi firmware.
123
124  qcom,msa-fixed-perm:
125    type: boolean
126    description:
127      Whether to skip executing an SCM call that reassigns the memory
128      region ownership.
129
130  qcom,no-msa-ready-indicator:
131    type: boolean
132    description:
133      Don't wait for MSA_READY indicator to complete init.
134
135  qcom,smem-states:
136    $ref: /schemas/types.yaml#/definitions/phandle-array
137    description: State bits used by the AP to signal the WLAN Q6.
138    items:
139      - description: Signal bits used to enable/disable low power mode
140                     on WCN in the case of WoW (Wake on Wireless).
141
142  qcom,smem-state-names:
143    description: The names of the state bits used for SMP2P output.
144    items:
145      - const: wlan-smp2p-out
146
147  qcom,snoc-host-cap-8bit-quirk:
148    type: boolean
149    description:
150      Quirk specifying that the firmware expects the 8bit version
151      of the host capability QMI request
152
153  qcom,xo-cal-data:
154    $ref: /schemas/types.yaml#/definitions/uint32
155    description:
156      XO cal offset to be configured in XO trim register.
157
158  vdd-0.8-cx-mx-supply:
159    description: Main logic power rail
160
161  vdd-1.8-xo-supply:
162    description: Crystal oscillator supply
163
164  vdd-1.3-rfa-supply:
165    description: RFA supply
166
167  vdd-3.3-ch0-supply:
168    description: Primary Wi-Fi antenna supply
169
170  vdd-3.3-ch1-supply:
171    description: Secondary Wi-Fi antenna supply
172
173required:
174  - compatible
175  - reg
176
177additionalProperties: false
178
179allOf:
180  - $ref: ieee80211.yaml#
181  - if:
182      properties:
183        compatible:
184          contains:
185            enum:
186              - qcom,ipq4019-wifi
187    then:
188      properties:
189        interrupts:
190          minItems: 17
191          maxItems: 17
192
193        interrupt-names:
194          items:
195            - const: msi0
196            - const: msi1
197            - const: msi2
198            - const: msi3
199            - const: msi4
200            - const: msi5
201            - const: msi6
202            - const: msi7
203            - const: msi8
204            - const: msi9
205            - const: msi10
206            - const: msi11
207            - const: msi12
208            - const: msi13
209            - const: msi14
210            - const: msi15
211            - const: legacy
212
213        clocks:
214          items:
215            - description: Wi-Fi command clock
216            - description: Wi-Fi reference clock
217            - description: Wi-Fi RTC clock
218
219        clock-names:
220          items:
221            - const: wifi_wcss_cmd
222            - const: wifi_wcss_ref
223            - const: wifi_wcss_rtc
224
225      required:
226        - clocks
227        - clock-names
228        - interrupts
229        - interrupt-names
230        - resets
231        - reset-names
232
233  - if:
234      properties:
235        compatible:
236          contains:
237            enum:
238              - qcom,wcn3990-wifi
239
240    then:
241      properties:
242        clocks:
243          minItems: 1
244          items:
245            - description: XO reference clock
246            - description: Qualcomm Debug Subsystem clock
247
248        clock-names:
249          minItems: 1
250          items:
251            - const: cxo_ref_clk_pin
252            - const: qdss
253
254        interrupts:
255          items:
256            - description: CE0
257            - description: CE1
258            - description: CE2
259            - description: CE3
260            - description: CE4
261            - description: CE5
262            - description: CE6
263            - description: CE7
264            - description: CE8
265            - description: CE9
266            - description: CE10
267            - description: CE11
268
269        interrupt-names: false
270
271      required:
272        - interrupts
273
274examples:
275  # SNoC
276  - |
277    #include <dt-bindings/clock/qcom,rpmcc.h>
278    #include <dt-bindings/interrupt-controller/arm-gic.h>
279
280    wifi@18800000 {
281      compatible = "qcom,wcn3990-wifi";
282      reg = <0x18800000 0x800000>;
283      reg-names = "membase";
284      memory-region = <&wlan_msa_mem>;
285      clocks = <&rpmcc RPM_SMD_RF_CLK2_PIN>;
286      clock-names = "cxo_ref_clk_pin";
287      interrupts = <GIC_SPI 413 IRQ_TYPE_LEVEL_HIGH>,
288                   <GIC_SPI 414 IRQ_TYPE_LEVEL_HIGH>,
289                   <GIC_SPI 415 IRQ_TYPE_LEVEL_HIGH>,
290                   <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
291                   <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
292                   <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
293                   <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
294                   <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
295                   <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
296                   <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
297                   <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
298                   <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>;
299      iommus = <&anoc2_smmu 0x1900>,
300               <&anoc2_smmu 0x1901>;
301      qcom,snoc-host-cap-8bit-quirk;
302      vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
303      vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
304      vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
305      vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
306      vdd-3.3-ch1-supply = <&vreg_l23a_3p3>;
307
308      wifi-firmware {
309        iommus = <&apps_smmu 0x1c02 0x1>;
310      };
311    };
312
313  # AHB
314  - |
315    #include <dt-bindings/clock/qcom,gcc-ipq4019.h>
316
317    wifi@a000000 {
318        compatible = "qcom,ipq4019-wifi";
319        reg = <0xa000000 0x200000>;
320        resets = <&gcc WIFI0_CPU_INIT_RESET>,
321                 <&gcc WIFI0_RADIO_SRIF_RESET>,
322                 <&gcc WIFI0_RADIO_WARM_RESET>,
323                 <&gcc WIFI0_RADIO_COLD_RESET>,
324                 <&gcc WIFI0_CORE_WARM_RESET>,
325                 <&gcc WIFI0_CORE_COLD_RESET>;
326        reset-names = "wifi_cpu_init",
327                      "wifi_radio_srif",
328                      "wifi_radio_warm",
329                      "wifi_radio_cold",
330                      "wifi_core_warm",
331                      "wifi_core_cold";
332        clocks = <&gcc GCC_WCSS2G_CLK>,
333                 <&gcc GCC_WCSS2G_REF_CLK>,
334                 <&gcc GCC_WCSS2G_RTC_CLK>;
335        clock-names = "wifi_wcss_cmd",
336                      "wifi_wcss_ref",
337                      "wifi_wcss_rtc";
338        interrupts = <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>,
339                     <GIC_SPI 33 IRQ_TYPE_EDGE_RISING>,
340                     <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>,
341                     <GIC_SPI 35 IRQ_TYPE_EDGE_RISING>,
342                     <GIC_SPI 36 IRQ_TYPE_EDGE_RISING>,
343                     <GIC_SPI 37 IRQ_TYPE_EDGE_RISING>,
344                     <GIC_SPI 38 IRQ_TYPE_EDGE_RISING>,
345                     <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>,
346                     <GIC_SPI 40 IRQ_TYPE_EDGE_RISING>,
347                     <GIC_SPI 41 IRQ_TYPE_EDGE_RISING>,
348                     <GIC_SPI 42 IRQ_TYPE_EDGE_RISING>,
349                     <GIC_SPI 43 IRQ_TYPE_EDGE_RISING>,
350                     <GIC_SPI 44 IRQ_TYPE_EDGE_RISING>,
351                     <GIC_SPI 45 IRQ_TYPE_EDGE_RISING>,
352                     <GIC_SPI 46 IRQ_TYPE_EDGE_RISING>,
353                     <GIC_SPI 47 IRQ_TYPE_EDGE_RISING>,
354                     <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
355        interrupt-names =  "msi0",
356                           "msi1",
357                           "msi2",
358                           "msi3",
359                           "msi4",
360                           "msi5",
361                           "msi6",
362                           "msi7",
363                           "msi8",
364                           "msi9",
365                           "msi10",
366                           "msi11",
367                           "msi12",
368                           "msi13",
369                           "msi14",
370                           "msi15",
371                           "legacy";
372        ieee80211-freq-limit = <5470000 5875000>;
373      };
374