1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/media/qcom,msm8916-camss.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm CAMSS ISP
8
9maintainers:
10  - Robert Foss <[email protected]>
11  - Todor Tomov <[email protected]>
12
13description: |
14  The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms
15
16properties:
17  compatible:
18    const: qcom,msm8916-camss
19
20  clocks:
21    minItems: 19
22    maxItems: 19
23
24  clock-names:
25    items:
26      - const: top_ahb
27      - const: ispif_ahb
28      - const: csiphy0_timer
29      - const: csiphy1_timer
30      - const: csi0_ahb
31      - const: csi0
32      - const: csi0_phy
33      - const: csi0_pix
34      - const: csi0_rdi
35      - const: csi1_ahb
36      - const: csi1
37      - const: csi1_phy
38      - const: csi1_pix
39      - const: csi1_rdi
40      - const: ahb
41      - const: vfe0
42      - const: csi_vfe0
43      - const: vfe_ahb
44      - const: vfe_axi
45
46  interrupts:
47    minItems: 6
48    maxItems: 6
49
50  interrupt-names:
51    items:
52      - const: csiphy0
53      - const: csiphy1
54      - const: csid0
55      - const: csid1
56      - const: ispif
57      - const: vfe0
58
59  iommus:
60    maxItems: 1
61
62  power-domains:
63    items:
64      - description: VFE GDSC - Video Front End, Global Distributed Switch Controller.
65
66  ports:
67    $ref: /schemas/graph.yaml#/properties/ports
68
69    description:
70      CSI input ports.
71
72    properties:
73      port@0:
74        $ref: /schemas/graph.yaml#/$defs/port-base
75        unevaluatedProperties: false
76        description:
77          Input port for receiving CSI data.
78
79        properties:
80          endpoint:
81            $ref: video-interfaces.yaml#
82            unevaluatedProperties: false
83
84            properties:
85              data-lanes:
86                description:
87                  An array of physical data lanes indexes.
88                  Position of an entry determines the logical
89                  lane number, while the value of an entry
90                  indicates physical lane index. Lane swapping
91                  is supported. Physical lane indexes;
92                  0, 2, 3, 4.
93                minItems: 1
94                maxItems: 4
95
96            required:
97              - data-lanes
98
99      port@1:
100        $ref: /schemas/graph.yaml#/$defs/port-base
101        unevaluatedProperties: false
102        description:
103          Input port for receiving CSI data.
104
105        properties:
106          endpoint:
107            $ref: video-interfaces.yaml#
108            unevaluatedProperties: false
109
110            properties:
111              data-lanes:
112                minItems: 1
113                maxItems: 4
114
115            required:
116              - data-lanes
117
118  reg:
119    minItems: 9
120    maxItems: 9
121
122  reg-names:
123    items:
124      - const: csiphy0
125      - const: csiphy0_clk_mux
126      - const: csiphy1
127      - const: csiphy1_clk_mux
128      - const: csid0
129      - const: csid1
130      - const: ispif
131      - const: csi_clk_mux
132      - const: vfe0
133
134  vdda-supply:
135    description:
136      Definition of the regulator used as analog power supply.
137
138required:
139  - clock-names
140  - clocks
141  - compatible
142  - interrupt-names
143  - interrupts
144  - iommus
145  - power-domains
146  - reg
147  - reg-names
148  - vdda-supply
149
150additionalProperties: false
151
152examples:
153  - |
154    #include <dt-bindings/interrupt-controller/arm-gic.h>
155    #include <dt-bindings/clock/qcom,gcc-msm8916.h>
156
157    camss: camss@1b0ac00 {
158      compatible = "qcom,msm8916-camss";
159
160      clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>,
161        <&gcc GCC_CAMSS_ISPIF_AHB_CLK>,
162        <&gcc GCC_CAMSS_CSI0PHYTIMER_CLK>,
163        <&gcc GCC_CAMSS_CSI1PHYTIMER_CLK>,
164        <&gcc GCC_CAMSS_CSI0_AHB_CLK>,
165        <&gcc GCC_CAMSS_CSI0_CLK>,
166        <&gcc GCC_CAMSS_CSI0PHY_CLK>,
167        <&gcc GCC_CAMSS_CSI0PIX_CLK>,
168        <&gcc GCC_CAMSS_CSI0RDI_CLK>,
169        <&gcc GCC_CAMSS_CSI1_AHB_CLK>,
170        <&gcc GCC_CAMSS_CSI1_CLK>,
171        <&gcc GCC_CAMSS_CSI1PHY_CLK>,
172        <&gcc GCC_CAMSS_CSI1PIX_CLK>,
173        <&gcc GCC_CAMSS_CSI1RDI_CLK>,
174        <&gcc GCC_CAMSS_AHB_CLK>,
175        <&gcc GCC_CAMSS_VFE0_CLK>,
176        <&gcc GCC_CAMSS_CSI_VFE0_CLK>,
177        <&gcc GCC_CAMSS_VFE_AHB_CLK>,
178        <&gcc GCC_CAMSS_VFE_AXI_CLK>;
179
180      clock-names = "top_ahb",
181        "ispif_ahb",
182        "csiphy0_timer",
183        "csiphy1_timer",
184        "csi0_ahb",
185        "csi0",
186        "csi0_phy",
187        "csi0_pix",
188        "csi0_rdi",
189        "csi1_ahb",
190        "csi1",
191        "csi1_phy",
192        "csi1_pix",
193        "csi1_rdi",
194        "ahb",
195        "vfe0",
196        "csi_vfe0",
197        "vfe_ahb",
198        "vfe_axi";
199
200      interrupts = <GIC_SPI 78 IRQ_TYPE_EDGE_RISING>,
201        <GIC_SPI 79 IRQ_TYPE_EDGE_RISING>,
202        <GIC_SPI 51 IRQ_TYPE_EDGE_RISING>,
203        <GIC_SPI 52 IRQ_TYPE_EDGE_RISING>,
204        <GIC_SPI 55 IRQ_TYPE_EDGE_RISING>,
205        <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>;
206
207      interrupt-names = "csiphy0",
208        "csiphy1",
209        "csid0",
210        "csid1",
211        "ispif",
212        "vfe0";
213
214      iommus = <&apps_iommu 3>;
215
216      power-domains = <&gcc VFE_GDSC>;
217
218      reg = <0x01b0ac00 0x200>,
219        <0x01b00030 0x4>,
220        <0x01b0b000 0x200>,
221        <0x01b00038 0x4>,
222        <0x01b08000 0x100>,
223        <0x01b08400 0x100>,
224        <0x01b0a000 0x500>,
225        <0x01b00020 0x10>,
226        <0x01b10000 0x1000>;
227
228      reg-names = "csiphy0",
229        "csiphy0_clk_mux",
230        "csiphy1",
231        "csiphy1_clk_mux",
232        "csid0",
233        "csid1",
234        "ispif",
235        "csi_clk_mux",
236        "vfe0";
237
238      vdda-supply = <&reg_2v8>;
239
240      ports {
241        #address-cells = <1>;
242        #size-cells = <0>;
243      };
244
245    };
246