1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/media/nxp,imx8mq-vpu.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Hantro G1/G2 VPU codecs implemented on i.MX8M SoCs
8
9maintainers:
10  - Philipp Zabel <[email protected]>
11
12description:
13  Hantro G1/G2 video decode accelerators present on i.MX8MQ SoCs.
14
15properties:
16  compatible:
17    oneOf:
18      - const: nxp,imx8mq-vpu
19        deprecated: true
20      - const: nxp,imx8mq-vpu-g1
21      - const: nxp,imx8mq-vpu-g2
22      - const: nxp,imx8mm-vpu-g1
23
24  reg:
25    maxItems: 1
26
27  interrupts:
28    maxItems: 1
29
30  clocks:
31    maxItems: 1
32
33  power-domains:
34    maxItems: 1
35
36required:
37  - compatible
38  - reg
39  - interrupts
40  - clocks
41
42additionalProperties: false
43
44examples:
45  - |
46    #include <dt-bindings/clock/imx8mq-clock.h>
47    #include <dt-bindings/power/imx8mq-power.h>
48    #include <dt-bindings/interrupt-controller/arm-gic.h>
49
50    video-codec@38300000 {
51        compatible = "nxp,imx8mq-vpu-g1";
52        reg = <0x38300000 0x10000>;
53        interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
54        clocks = <&clk IMX8MQ_CLK_VPU_G1_ROOT>;
55        power-domains = <&vpu_blk_ctrl IMX8MQ_VPUBLK_PD_G1>;
56    };
57  - |
58    #include <dt-bindings/clock/imx8mq-clock.h>
59    #include <dt-bindings/power/imx8mq-power.h>
60    #include <dt-bindings/interrupt-controller/arm-gic.h>
61
62    video-codec@38300000 {
63        compatible = "nxp,imx8mq-vpu-g2";
64        reg = <0x38310000 0x10000>;
65        interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
66        clocks = <&clk IMX8MQ_CLK_VPU_G2_ROOT>;
67        power-domains = <&vpu_blk_ctrl IMX8MQ_VPUBLK_PD_G2>;
68    };
69