1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/i2c/i2c-exynos5.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Samsung's High Speed I2C controller
8
9maintainers:
10  - Krzysztof Kozlowski <[email protected]>
11
12description: |
13  The Samsung's High Speed I2C controller is used to interface with I2C devices
14  at various speeds ranging from 100kHz to 3.4MHz.
15
16  In case the HSI2C controller is encapsulated within USI block (it's the case
17  e.g. for Exynos850 and Exynos Auto V9 SoCs), it might be also necessary to
18  define USI node in device tree file, choosing "i2c" configuration. Please see
19  Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml for details.
20
21properties:
22  compatible:
23    oneOf:
24      - enum:
25          - samsung,exynos5250-hsi2c    # Exynos5250 and Exynos5420
26          - samsung,exynos5260-hsi2c    # Exynos5260
27          - samsung,exynos7-hsi2c       # Exynos7
28          - samsung,exynos8895-hsi2c
29          - samsung,exynosautov9-hsi2c
30      - items:
31          - enum:
32              - samsung,exynos5433-hsi2c
33              - tesla,fsd-hsi2c
34          - const: samsung,exynos7-hsi2c
35      - items:
36          - enum:
37              - google,gs101-hsi2c
38              - samsung,exynos850-hsi2c
39          - const: samsung,exynosautov9-hsi2c
40      - const: samsung,exynos5-hsi2c    # Exynos5250 and Exynos5420
41        deprecated: true
42
43  reg:
44    maxItems: 1
45
46  interrupts:
47    maxItems: 1
48
49  clock-frequency:
50    default: 100000
51    description:
52      Desired operating frequency in Hz of the bus.
53
54      If not specified, the bus operates in fast-speed mode at 100kHz.
55
56      If specified, the bus operates in high-speed mode only if the
57      clock-frequency is >= 1MHz.
58
59  clocks:
60    minItems: 1
61    items:
62      - description: I2C operating clock
63      - description: Bus clock (APB)
64
65  clock-names:
66    minItems: 1
67    items:
68      - const: hsi2c
69      - const: hsi2c_pclk
70
71required:
72  - compatible
73  - reg
74  - interrupts
75  - clocks
76
77allOf:
78  - $ref: /schemas/i2c/i2c-controller.yaml#
79  - if:
80      properties:
81        compatible:
82          contains:
83            enum:
84              - samsung,exynosautov9-hsi2c
85
86    then:
87      properties:
88        clocks:
89          minItems: 2
90
91        clock-names:
92          minItems: 2
93
94      required:
95        - clock-names
96
97    else:
98      properties:
99        clocks:
100          maxItems: 1
101
102unevaluatedProperties: false
103
104examples:
105  - |
106    #include <dt-bindings/clock/exynos5420.h>
107    #include <dt-bindings/interrupt-controller/arm-gic.h>
108    #include <dt-bindings/interrupt-controller/irq.h>
109
110    hsi2c_8: i2c@12e00000 {
111        compatible = "samsung,exynos5250-hsi2c";
112        reg = <0x12e00000 0x1000>;
113        interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
114        #address-cells = <1>;
115        #size-cells = <0>;
116        clock-frequency = <100000>;
117        clocks = <&clock CLK_USI4>;
118        clock-names = "hsi2c";
119
120        pmic@66 {
121            /* compatible = "samsung,s2mps11-pmic"; */
122            reg = <0x66>;
123        };
124    };
125
126  - |
127    #include <dt-bindings/clock/exynos850.h>
128    #include <dt-bindings/interrupt-controller/arm-gic.h>
129
130    hsi2c_2: i2c@138c0000 {
131        compatible = "samsung,exynosautov9-hsi2c";
132        reg = <0x138c0000 0xc0>;
133        interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;
134        #address-cells = <1>;
135        #size-cells = <0>;
136        clocks = <&cmu_peri CLK_GOUT_HSI2C2_IPCLK>,
137                 <&cmu_peri CLK_GOUT_HSI2C2_PCLK>;
138        clock-names = "hsi2c", "hsi2c_pclk";
139
140        pmic@66 {
141            /* compatible = "samsung,s2mps11-pmic"; */
142            reg = <0x66>;
143        };
144    };
145