1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/gpio/fsl,qoriq-gpio.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Freescale MPC512x/MPC8xxx/QorIQ/Layerscape GPIO controller 8 9maintainers: 10 - Frank Li <[email protected]> 11 12properties: 13 compatible: 14 oneOf: 15 - enum: 16 - fsl,mpc5121-gpio 17 - fsl,mpc5125-gpio 18 - fsl,mpc8314-gpio 19 - fsl,mpc8349-gpio 20 - fsl,mpc8572-gpio 21 - fsl,mpc8610-gpio 22 - fsl,pq3-gpio 23 - items: 24 - enum: 25 - fsl,ls1021a-gpio 26 - fsl,ls1028a-gpio 27 - fsl,ls1043a-gpio 28 - fsl,ls1046a-gpio 29 - fsl,ls1088a-gpio 30 - fsl,ls2080a-gpio 31 - const: fsl,qoriq-gpio 32 33 reg: 34 maxItems: 1 35 36 interrupts: 37 maxItems: 1 38 39 "#gpio-cells": 40 const: 2 41 42 gpio-controller: true 43 44 interrupt-controller: true 45 46 "#interrupt-cells": 47 const: 2 48 49 gpio-line-names: 50 minItems: 1 51 maxItems: 32 52 53 little-endian: 54 $ref: /schemas/types.yaml#/definitions/flag 55 description: 56 GPIO registers are used as little endian. If not 57 present registers are used as big endian by default. 58 59required: 60 - compatible 61 - reg 62 - interrupts 63 - "#gpio-cells" 64 65additionalProperties: false 66 67examples: 68 - | 69 gpio@1100 { 70 compatible = "fsl,mpc5125-gpio"; 71 reg = <0x1100 0x080>; 72 interrupts = <78 0x8>; 73 gpio-controller; 74 #gpio-cells = <2>; 75 }; 76 77 - | 78 #include <dt-bindings/interrupt-controller/arm-gic.h> 79 gpio@2300000 { 80 compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio"; 81 reg = <0x2300000 0x10000>; 82 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 83 little-endian; 84 gpio-controller; 85 #gpio-cells = <2>; 86 interrupt-controller; 87 #interrupt-cells = <2>; 88 }; 89