1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/gpio/fairchild,74hc595.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Generic 8-bit shift register
8
9description: |
10  NOTE: These chips nominally don't have a chip select pin. They do however
11  have a rising-edge triggered latch clock (or storage register clock) pin,
12  which behaves like an active-low chip select.
13
14  After the bits are shifted into the shift register, CS# is driven high, which
15  the 74HC595 sees as a rising edge on the latch clock that results in a
16  transfer of the bits from the shift register to the storage register and thus
17  to the output pins.
18                      _   _       _   _
19  shift clock    ____| |_| |_..._| |_| |_________
20
21  latch clock                           * trigger
22                 ___                     ________
23  chip select#      |___________________|
24
25
26maintainers:
27  - Maxime Ripard <[email protected]>
28
29properties:
30  compatible:
31    enum:
32      - fairchild,74hc595
33      - nxp,74lvc594
34
35  reg:
36    maxItems: 1
37
38  gpio-controller: true
39
40  '#gpio-cells':
41    description:
42      The second cell is only used to specify the GPIO polarity.
43    const: 2
44
45  registers-number:
46    $ref: /schemas/types.yaml#/definitions/uint32
47    description: Number of daisy-chained shift registers
48
49  enable-gpios:
50    description: GPIO connected to the OE (Output Enable) pin.
51    maxItems: 1
52
53patternProperties:
54  "^(hog-[0-9]+|.+-hog(-[0-9]+)?)$":
55    type: object
56    required:
57      - gpio-hog
58
59required:
60  - compatible
61  - reg
62  - gpio-controller
63  - '#gpio-cells'
64  - registers-number
65
66allOf:
67  - $ref: /schemas/spi/spi-peripheral-props.yaml#
68
69unevaluatedProperties: false
70
71examples:
72  - |
73    spi {
74            #address-cells = <1>;
75            #size-cells = <0>;
76
77            gpio5: gpio5@0 {
78                    compatible = "fairchild,74hc595";
79                    reg = <0>;
80                    gpio-controller;
81                    #gpio-cells = <2>;
82                    registers-number = <4>;
83                    spi-max-frequency = <100000>;
84            };
85    };
86