1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/atmel,at91sam9x5-sckc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Atmel Slow Clock Controller (SCKC)
8
9maintainers:
10  - Claudiu Beznea <[email protected]>
11
12properties:
13  compatible:
14    oneOf:
15      - enum:
16          - atmel,at91sam9x5-sckc
17          - atmel,sama5d3-sckc
18          - atmel,sama5d4-sckc
19          - microchip,sam9x60-sckc
20      - items:
21          - enum:
22              - microchip,sam9x7-sckc
23              - microchip,sama7d65-sckc
24              - microchip,sama7g5-sckc
25          - const: microchip,sam9x60-sckc
26
27  reg:
28    maxItems: 1
29
30  clocks:
31    maxItems: 1
32
33  "#clock-cells":
34    enum: [0, 1]
35
36  atmel,osc-bypass:
37    type: boolean
38    description: set when a clock signal is directly provided on XIN
39
40required:
41  - compatible
42  - reg
43  - clocks
44  - "#clock-cells"
45
46allOf:
47  - if:
48      properties:
49        compatible:
50          contains:
51            enum:
52              - microchip,sam9x60-sckc
53    then:
54      properties:
55        "#clock-cells":
56          const: 1
57    else:
58      properties:
59        "#clock-cells":
60          const: 0
61
62additionalProperties: false
63
64examples:
65  - |
66    clk32k: clock-controller@fffffe50 {
67        compatible = "microchip,sam9x60-sckc";
68        reg = <0xfffffe50 0x4>;
69        clocks = <&slow_xtal>;
70        #clock-cells = <1>;
71    };
72
73...
74