1 /** 2 ****************************************************************************** 3 * File Name : app_conf.h 4 * Description : Application configuration file for STM32WPAN Middleware. 5 * 6 ****************************************************************************** 7 * @attention 8 * 9 * <h2><center>© Copyright (c) 2019 STMicroelectronics. 10 * All rights reserved.</center></h2> 11 * 12 * This software component is licensed by ST under Ultimate Liberty license 13 * SLA0044, the "License"; You may not use this file except in compliance with 14 * the License. You may obtain a copy of the License at: 15 * www.st.com/SLA0044 16 * 17 ****************************************************************************** 18 */ 19 20 /* Define to prevent recursive inclusion -------------------------------------*/ 21 #ifndef APP_CONF_H 22 #define APP_CONF_H 23 24 #include "hw.h" 25 #include "hw_conf.h" 26 #include "hw_if.h" 27 28 /****************************************************************************** 29 * BLE Stack 30 ******************************************************************************/ 31 /** 32 * Maximum number of simultaneous connections that the device will support. 33 * Valid values are from 1 to 8 34 */ 35 #define CFG_BLE_NUM_LINK 8 36 37 /** 38 * Maximum number of Services that can be stored in the GATT database. 39 * Note that the GAP and GATT services are automatically added so this parameter should be 2 plus the number of user services 40 */ 41 #define CFG_BLE_NUM_GATT_SERVICES 8 42 43 /** 44 * Maximum number of Attributes 45 * (i.e. the number of characteristic + the number of characteristic values + the number of descriptors, excluding the services) 46 * that can be stored in the GATT database. 47 * Note that certain characteristics and relative descriptors are added automatically during device initialization 48 * so this parameters should be 9 plus the number of user Attributes 49 */ 50 #define CFG_BLE_NUM_GATT_ATTRIBUTES 68 51 52 /** 53 * Maximum supported ATT_MTU size 54 */ 55 #define CFG_BLE_MAX_ATT_MTU (156) 56 57 /** 58 * Size of the storage area for Attribute values 59 * This value depends on the number of attributes used by application. In particular the sum of the following quantities (in octets) should be made for each attribute: 60 * - attribute value length 61 * - 5, if UUID is 16 bit; 19, if UUID is 128 bit 62 * - 2, if server configuration descriptor is used 63 * - 2*DTM_NUM_LINK, if client configuration descriptor is used 64 * - 2, if extended properties is used 65 * The total amount of memory needed is the sum of the above quantities for each attribute. 66 */ 67 #define CFG_BLE_ATT_VALUE_ARRAY_SIZE (1344) 68 69 /** 70 * Prepare Write List size in terms of number of packet with ATT_MTU=23 bytes 71 */ 72 #define CFG_BLE_PREPARE_WRITE_LIST_SIZE ( 0x3A ) 73 74 /** 75 * Number of allocated memory blocks 76 */ 77 #define CFG_BLE_MBLOCK_COUNT ( 0x79 ) 78 79 /** 80 * Enable or disable the Extended Packet length feature. Valid values are 0 or 1. 81 */ 82 #define CFG_BLE_DATA_LENGTH_EXTENSION 1 83 84 /** 85 * Sleep clock accuracy in Slave mode (ppm value) 86 */ 87 #define CFG_BLE_SLAVE_SCA 500 88 89 /** 90 * Sleep clock accuracy in Master mode 91 * 0 : 251 ppm to 500 ppm 92 * 1 : 151 ppm to 250 ppm 93 * 2 : 101 ppm to 150 ppm 94 * 3 : 76 ppm to 100 ppm 95 * 4 : 51 ppm to 75 ppm 96 * 5 : 31 ppm to 50 ppm 97 * 6 : 21 ppm to 30 ppm 98 * 7 : 0 ppm to 20 ppm 99 */ 100 #define CFG_BLE_MASTER_SCA 0 101 102 /** 103 * Source for the 32 kHz slow speed clock 104 * 1 : internal RO 105 * 0 : external crystal ( no calibration ) 106 */ 107 #define CFG_BLE_LSE_SOURCE 0 108 109 /** 110 * Start up time of the high speed (16 or 32 MHz) crystal oscillator in units of 625/256 us (~2.44 us) 111 */ 112 #define CFG_BLE_HSE_STARTUP_TIME 0x148 113 114 /** 115 * Maximum duration of the connection event when the device is in Slave mode in units of 625/256 us (~2.44 us) 116 */ 117 #define CFG_BLE_MAX_CONN_EVENT_LENGTH ( 0xFFFFFFFF ) 118 119 /** 120 * Viterbi Mode 121 * 1 : enabled 122 * 0 : disabled 123 */ 124 #define CFG_BLE_VITERBI_MODE 1 125 126 /** 127 * LL Only Mode 128 * 1 : LL Only 129 * 0 : LL + Host 130 */ 131 #define CFG_BLE_LL_ONLY 1 132 133 /****************************************************************************** 134 * Transport Layer 135 ******************************************************************************/ 136 /** 137 * Queue length of BLE Event 138 * This parameter defines the number of asynchronous events that can be stored in the HCI layer before 139 * being reported to the application. When a command is sent to the BLE core coprocessor, the HCI layer 140 * is waiting for the event with the Num_HCI_Command_Packets set to 1. The receive queue shall be large 141 * enough to store all asynchronous events received in between. 142 * When CFG_TLBLE_MOST_EVENT_PAYLOAD_SIZE is set to 27, this allow to store three 255 bytes long asynchronous events 143 * between the HCI command and its event. 144 * This parameter depends on the value given to CFG_TLBLE_MOST_EVENT_PAYLOAD_SIZE. When the queue size is to small, 145 * the system may hang if the queue is full with asynchronous events and the HCI layer is still waiting 146 * for a CC/CS event, In that case, the notification TL_BLE_HCI_ToNot() is called to indicate 147 * to the application a HCI command did not receive its command event within 30s (Default HCI Timeout). 148 */ 149 #define CFG_TLBLE_EVT_QUEUE_LENGTH 5 150 151 /** 152 * This parameter should be set to fit most events received by the HCI layer. It defines the buffer size of each element 153 * allocated in the queue of received events and can be used to optimize the amount of RAM allocated by the Memory Manager. 154 * It should not exceed 255 which is the maximum HCI packet payload size (a greater value is a lost of memory as it will 155 * never be used) 156 * It shall be at least 4 to receive the command status event in one frame. 157 * The default value is set to 27 to allow receiving an event of MTU size in a single buffer. This value maybe reduced 158 * further depending on the application. 159 * 160 */ 161 #define CFG_TLBLE_MOST_EVENT_PAYLOAD_SIZE 255 /**< Set to 255 with the memory manager and the mailbox */ 162 163 #define TL_BLE_EVENT_FRAME_SIZE ( TL_EVT_HDR_SIZE + CFG_TLBLE_MOST_EVENT_PAYLOAD_SIZE ) 164 165 /****************************************************************************** 166 * UART interfaces 167 ******************************************************************************/ 168 169 /** 170 * Select UART interfaces 171 */ 172 #define CFG_DEBUG_TRACE_UART hw_uart1 173 #define CFG_CONSOLE_MENU 174 /****************************************************************************** 175 * USB interface 176 ******************************************************************************/ 177 178 /** 179 * Enable/Disable USB interface 180 */ 181 #define CFG_USB_INTERFACE_ENABLE 0 182 183 /****************************************************************************** 184 * Low Power 185 ******************************************************************************/ 186 /** 187 * When set to 1, the low power mode is enable 188 * When set to 0, the device stays in RUN mode 189 */ 190 #define CFG_LPM_SUPPORTED 0 191 192 /****************************************************************************** 193 * Timer Server 194 ******************************************************************************/ 195 /** 196 * CFG_RTC_WUCKSEL_DIVIDER: This sets the RTCCLK divider to the wakeup timer. 197 * The higher is the value, the better is the power consumption and the accuracy of the timerserver 198 * The lower is the value, the finest is the granularity 199 * 200 * CFG_RTC_ASYNCH_PRESCALER: This sets the asynchronous prescaler of the RTC. It should as high as possible ( to ouput 201 * clock as low as possible) but the output clock should be equal or higher frequency compare to the clock feeding 202 * the wakeup timer. A lower clock speed would impact the accuracy of the timer server. 203 * 204 * CFG_RTC_SYNCH_PRESCALER: This sets the synchronous prescaler of the RTC. 205 * When the 1Hz calendar clock is required, it shall be sets according to other settings 206 * When the 1Hz calendar clock is not needed, CFG_RTC_SYNCH_PRESCALER should be set to 0x7FFF (MAX VALUE) 207 * 208 * CFG_RTCCLK_DIVIDER_CONF: 209 * Shall be set to either 0,2,4,8,16 210 * When set to either 2,4,8,16, the 1Hhz calendar is supported 211 * When set to 0, the user sets its own configuration 212 * 213 * The following settings are computed with LSI as input to the RTC 214 */ 215 #define CFG_RTCCLK_DIVIDER_CONF 0 216 217 #if (CFG_RTCCLK_DIVIDER_CONF == 0) 218 /** 219 * Custom configuration 220 * It does not support 1Hz calendar 221 * It divides the RTC CLK by 16 222 */ 223 #define CFG_RTCCLK_DIV (16) 224 #define CFG_RTC_WUCKSEL_DIVIDER (0) 225 #define CFG_RTC_ASYNCH_PRESCALER (CFG_RTCCLK_DIV - 1) 226 #define CFG_RTC_SYNCH_PRESCALER (0x7FFF) 227 228 #else 229 230 #if (CFG_RTCCLK_DIVIDER_CONF == 2) 231 /** 232 * It divides the RTC CLK by 2 233 */ 234 #define CFG_RTC_WUCKSEL_DIVIDER (3) 235 #endif 236 237 #if (CFG_RTCCLK_DIVIDER_CONF == 4) 238 /** 239 * It divides the RTC CLK by 4 240 */ 241 #define CFG_RTC_WUCKSEL_DIVIDER (2) 242 #endif 243 244 #if (CFG_RTCCLK_DIVIDER_CONF == 8) 245 /** 246 * It divides the RTC CLK by 8 247 */ 248 #define CFG_RTC_WUCKSEL_DIVIDER (1) 249 #endif 250 251 #if (CFG_RTCCLK_DIVIDER_CONF == 16) 252 /** 253 * It divides the RTC CLK by 16 254 */ 255 #define CFG_RTC_WUCKSEL_DIVIDER (0) 256 #endif 257 258 #define CFG_RTCCLK_DIV CFG_RTCCLK_DIVIDER_CONF 259 #define CFG_RTC_ASYNCH_PRESCALER (CFG_RTCCLK_DIV - 1) 260 #define CFG_RTC_SYNCH_PRESCALER (DIVR( LSE_VALUE, (CFG_RTC_ASYNCH_PRESCALER+1) ) - 1 ) 261 262 #endif 263 264 /** tick timer value in us */ 265 #define CFG_TS_TICK_VAL DIVR( (CFG_RTCCLK_DIV * 1000000), LSE_VALUE ) 266 267 /****************************************************************************** 268 * Debug 269 ******************************************************************************/ 270 /** 271 * When set, this resets some hw resources to set the device in the same state than the power up 272 * The FW resets only register that may prevent the FW to run properly 273 * 274 * This shall be set to 0 in a final product 275 * 276 */ 277 #define CFG_HW_RESET_BY_FW 1 278 279 /** 280 * keep debugger enabled while in any low power mode when set to 1 281 * should be set to 0 in production 282 */ 283 #define CFG_DEBUGGER_SUPPORTED 0 284 285 /** 286 * When set to 1, the traces are enabled in the BLE services 287 */ 288 #define CFG_DEBUG_BLE_TRACE 0 289 290 /** 291 * Enable or Disable traces in application 292 */ 293 #define CFG_DEBUG_APP_TRACE 0 294 295 #if (CFG_DEBUG_APP_TRACE != 0) 296 #define APP_DBG_MSG PRINT_MESG_DBG 297 #else 298 #define APP_DBG_MSG PRINT_NO_MESG 299 #endif 300 301 #if ( (CFG_DEBUG_BLE_TRACE != 0) || (CFG_DEBUG_APP_TRACE != 0) ) 302 #define CFG_DEBUG_TRACE 1 303 #endif 304 305 #if (CFG_DEBUG_TRACE != 0) 306 #undef CFG_LPM_SUPPORTED 307 #undef CFG_DEBUGGER_SUPPORTED 308 #define CFG_LPM_SUPPORTED 0 309 #define CFG_DEBUGGER_SUPPORTED 1 310 #endif 311 312 /** 313 * When CFG_DEBUG_TRACE_FULL is set to 1, the trace are output with the API name, the file name and the line number 314 * When CFG_DEBUG_TRACE_LIGHT is set to 1, only the debug message is output 315 * 316 * When both are set to 0, no trace are output 317 * When both are set to 1, CFG_DEBUG_TRACE_FULL is selected 318 */ 319 #define CFG_DEBUG_TRACE_LIGHT 1 320 #define CFG_DEBUG_TRACE_FULL 0 321 322 #if (( CFG_DEBUG_TRACE != 0 ) && ( CFG_DEBUG_TRACE_LIGHT == 0 ) && (CFG_DEBUG_TRACE_FULL == 0)) 323 #undef CFG_DEBUG_TRACE_FULL 324 #undef CFG_DEBUG_TRACE_LIGHT 325 #define CFG_DEBUG_TRACE_FULL 0 326 #define CFG_DEBUG_TRACE_LIGHT 1 327 #endif 328 329 #if ( CFG_DEBUG_TRACE == 0 ) 330 #undef CFG_DEBUG_TRACE_FULL 331 #undef CFG_DEBUG_TRACE_LIGHT 332 #define CFG_DEBUG_TRACE_FULL 0 333 #define CFG_DEBUG_TRACE_LIGHT 0 334 #endif 335 336 /** 337 * When not set, the traces is looping on sending the trace over UART 338 */ 339 #define DBG_TRACE_USE_CIRCULAR_QUEUE 1 340 341 /** 342 * max buffer Size to queue data traces and max data trace allowed. 343 * Only Used if DBG_TRACE_USE_CIRCULAR_QUEUE is defined 344 */ 345 #define DBG_TRACE_MSG_QUEUE_SIZE 4096 346 #define MAX_DBG_TRACE_MSG_SIZE 1024 347 348 /****************************************************************************** 349 * OTP manager 350 ******************************************************************************/ 351 #define CFG_OTP_BASE_ADDRESS OTP_AREA_BASE 352 353 #define CFG_OTP_END_ADRESS OTP_AREA_END_ADDR 354 355 #endif /*APP_CONF_H */ 356 357 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/