1 /**
2 ******************************************************************************
3 * @file stm32wbxx_ll_exti.h
4 * @author MCD Application Team
5 * @brief Header file of EXTI LL module.
6 ******************************************************************************
7 * @attention
8 *
9 * <h2><center>© Copyright (c) 2019 STMicroelectronics.
10 * All rights reserved.</center></h2>
11 *
12 * This software component is licensed by ST under BSD 3-Clause license,
13 * the "License"; You may not use this file except in compliance with the
14 * License. You may obtain a copy of the License at:
15 * opensource.org/licenses/BSD-3-Clause
16 *
17 ******************************************************************************
18 */
19
20 /* Define to prevent recursive inclusion -------------------------------------*/
21 #ifndef STM32WBxx_LL_EXTI_H
22 #define STM32WBxx_LL_EXTI_H
23
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27
28 /* Includes ------------------------------------------------------------------*/
29 #include "stm32wbxx.h"
30
31 /** @addtogroup STM32WBxx_LL_Driver
32 * @{
33 */
34
35 #if defined (EXTI)
36
37 /** @defgroup EXTI_LL EXTI
38 * @{
39 */
40
41 /* Private types -------------------------------------------------------------*/
42 /* Private variables ---------------------------------------------------------*/
43 /* Private constants ---------------------------------------------------------*/
44 /* Private Macros ------------------------------------------------------------*/
45 #if defined(USE_FULL_LL_DRIVER)
46 /** @defgroup EXTI_LL_Private_Macros EXTI Private Macros
47 * @{
48 */
49 /**
50 * @}
51 */
52 #endif /*USE_FULL_LL_DRIVER*/
53 /* Exported types ------------------------------------------------------------*/
54 #if defined(USE_FULL_LL_DRIVER)
55 /** @defgroup EXTI_LL_ES_INIT EXTI Exported Init structure
56 * @{
57 */
58 typedef struct
59 {
60
61 uint32_t Line_0_31; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 0 to 31
62 This parameter can be any combination of @ref EXTI_LL_EC_LINE */
63
64 uint32_t Line_32_63; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 32 to 63
65 This parameter can be any combination of @ref EXTI_LL_EC_LINE */
66
67 FunctionalState LineCommand; /*!< Specifies the new state of the selected EXTI lines.
68 This parameter can be set either to ENABLE or DISABLE */
69
70 uint8_t Mode; /*!< Specifies the mode for the EXTI lines.
71 This parameter can be a value of @ref EXTI_LL_EC_MODE. */
72
73 uint8_t Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines.
74 This parameter can be a value of @ref EXTI_LL_EC_TRIGGER. */
75 } LL_EXTI_InitTypeDef;
76
77 /**
78 * @}
79 */
80 #endif /*USE_FULL_LL_DRIVER*/
81
82 /* Exported constants --------------------------------------------------------*/
83 /** @defgroup EXTI_LL_Exported_Constants EXTI Exported Constants
84 * @{
85 */
86
87 /** @defgroup EXTI_LL_EC_LINE LINE
88 * @{
89 */
90 #define LL_EXTI_LINE_0 EXTI_IMR1_IM0 /*!< Extended line 0 */
91 #define LL_EXTI_LINE_1 EXTI_IMR1_IM1 /*!< Extended line 1 */
92 #define LL_EXTI_LINE_2 EXTI_IMR1_IM2 /*!< Extended line 2 */
93 #define LL_EXTI_LINE_3 EXTI_IMR1_IM3 /*!< Extended line 3 */
94 #define LL_EXTI_LINE_4 EXTI_IMR1_IM4 /*!< Extended line 4 */
95 #define LL_EXTI_LINE_5 EXTI_IMR1_IM5 /*!< Extended line 5 */
96 #define LL_EXTI_LINE_6 EXTI_IMR1_IM6 /*!< Extended line 6 */
97 #define LL_EXTI_LINE_7 EXTI_IMR1_IM7 /*!< Extended line 7 */
98 #define LL_EXTI_LINE_8 EXTI_IMR1_IM8 /*!< Extended line 8 */
99 #define LL_EXTI_LINE_9 EXTI_IMR1_IM9 /*!< Extended line 9 */
100 #define LL_EXTI_LINE_10 EXTI_IMR1_IM10 /*!< Extended line 10 */
101 #define LL_EXTI_LINE_11 EXTI_IMR1_IM11 /*!< Extended line 11 */
102 #define LL_EXTI_LINE_12 EXTI_IMR1_IM12 /*!< Extended line 12 */
103 #define LL_EXTI_LINE_13 EXTI_IMR1_IM13 /*!< Extended line 13 */
104 #define LL_EXTI_LINE_14 EXTI_IMR1_IM14 /*!< Extended line 14 */
105 #define LL_EXTI_LINE_15 EXTI_IMR1_IM15 /*!< Extended line 15 */
106 #define LL_EXTI_LINE_16 EXTI_IMR1_IM16 /*!< Extended line 16 */
107 #define LL_EXTI_LINE_17 EXTI_IMR1_IM17 /*!< Extended line 17 */
108 #define LL_EXTI_LINE_18 EXTI_IMR1_IM18 /*!< Extended line 18 */
109 #define LL_EXTI_LINE_19 EXTI_IMR1_IM19 /*!< Extended line 19 */
110 #define LL_EXTI_LINE_20 EXTI_IMR1_IM20 /*!< Extended line 20 */
111 #define LL_EXTI_LINE_21 EXTI_IMR1_IM21 /*!< Extended line 21 */
112 #define LL_EXTI_LINE_22 EXTI_IMR1_IM22 /*!< Extended line 22 */
113 #define LL_EXTI_LINE_23 EXTI_IMR1_IM23 /*!< Extended line 23 */
114 #define LL_EXTI_LINE_24 EXTI_IMR1_IM24 /*!< Extended line 24 */
115 #define LL_EXTI_LINE_25 EXTI_IMR1_IM25 /*!< Extended line 25 */
116 #define LL_EXTI_LINE_28 EXTI_IMR1_IM28 /*!< Extended line 28 */
117 #define LL_EXTI_LINE_29 EXTI_IMR1_IM29 /*!< Extended line 29 */
118 #define LL_EXTI_LINE_30 EXTI_IMR1_IM30 /*!< Extended line 30 */
119 #define LL_EXTI_LINE_31 EXTI_IMR1_IM31 /*!< Extended line 31 */
120 #define LL_EXTI_LINE_ALL_0_31 (LL_EXTI_LINE_0 | LL_EXTI_LINE_1 | LL_EXTI_LINE_2 | \
121 LL_EXTI_LINE_3 | LL_EXTI_LINE_4 | LL_EXTI_LINE_5 | \
122 LL_EXTI_LINE_6 | LL_EXTI_LINE_7 | LL_EXTI_LINE_8 | \
123 LL_EXTI_LINE_9 | LL_EXTI_LINE_10 | LL_EXTI_LINE_11 | \
124 LL_EXTI_LINE_12 | LL_EXTI_LINE_13 | LL_EXTI_LINE_14 | \
125 LL_EXTI_LINE_15 | LL_EXTI_LINE_16 | LL_EXTI_LINE_17 | \
126 LL_EXTI_LINE_18 | LL_EXTI_LINE_19 | LL_EXTI_LINE_20 | \
127 LL_EXTI_LINE_21 | LL_EXTI_LINE_22 | LL_EXTI_LINE_23 | \
128 LL_EXTI_LINE_24 | LL_EXTI_LINE_25 | LL_EXTI_LINE_28 | \
129 LL_EXTI_LINE_29 | LL_EXTI_LINE_30 | LL_EXTI_LINE_31) /*!< All Extended line not reserved*/
130
131 #define LL_EXTI_LINE_33 EXTI_IMR2_IM33 /*!< Extended line 33 */
132 #define LL_EXTI_LINE_36 EXTI_IMR2_IM36 /*!< Extended line 36 */
133 #define LL_EXTI_LINE_37 EXTI_IMR2_IM37 /*!< Extended line 37 */
134 #define LL_EXTI_LINE_38 EXTI_IMR2_IM38 /*!< Extended line 38 */
135 #define LL_EXTI_LINE_39 EXTI_IMR2_IM39 /*!< Extended line 39 */
136 #define LL_EXTI_LINE_40 EXTI_IMR2_IM40 /*!< Extended line 40 */
137 #define LL_EXTI_LINE_41 EXTI_IMR2_IM41 /*!< Extended line 41 */
138 #define LL_EXTI_LINE_42 EXTI_IMR2_IM42 /*!< Extended line 42 */
139 #if defined (STM32WB55xx)
140 #define LL_EXTI_LINE_43 EXTI_IMR2_IM43 /*!< Extended line 43 */
141 #endif
142 #define LL_EXTI_LINE_44 EXTI_IMR2_IM44 /*!< Extended line 44 */
143 #define LL_EXTI_LINE_45 EXTI_IMR2_IM45 /*!< Extended line 45 */
144 #define LL_EXTI_LINE_46 EXTI_IMR2_IM46 /*!< Extended line 46 */
145 #define LL_EXTI_LINE_48 EXTI_IMR2_IM48 /*!< Extended line 48 */
146 #if defined (STM32WB55xx)
147 #define LL_EXTI_LINE_ALL_32_63 (LL_EXTI_LINE_33 | LL_EXTI_LINE_36 | LL_EXTI_LINE_37 | \
148 LL_EXTI_LINE_38 | LL_EXTI_LINE_39 | LL_EXTI_LINE_40 | \
149 LL_EXTI_LINE_41 | LL_EXTI_LINE_42 | LL_EXTI_LINE_43 | \
150 LL_EXTI_LINE_44 | LL_EXTI_LINE_45 | LL_EXTI_LINE_46 | \
151 LL_EXTI_LINE_48) /*!< All Extended line not reserved*/
152 #else
153 #define LL_EXTI_LINE_ALL_32_63 (LL_EXTI_LINE_33 | LL_EXTI_LINE_36 | LL_EXTI_LINE_37 | \
154 LL_EXTI_LINE_38 | LL_EXTI_LINE_39 | LL_EXTI_LINE_40 | \
155 LL_EXTI_LINE_41 | LL_EXTI_LINE_42 | LL_EXTI_LINE_44 | \
156 LL_EXTI_LINE_45 | LL_EXTI_LINE_46 | LL_EXTI_LINE_48) /*!< All Extended line not reserved*/
157 #endif
158
159
160 #define LL_EXTI_LINE_ALL (0xFFFFFFFFU) /*!< All Extended line */
161
162 #if defined(USE_FULL_LL_DRIVER)
163 #define LL_EXTI_LINE_NONE (0x00000000U) /*!< None Extended line */
164 #endif /*USE_FULL_LL_DRIVER*/
165
166 /**
167 * @}
168 */
169 #if defined(USE_FULL_LL_DRIVER)
170
171 /** @defgroup EXTI_LL_EC_MODE Mode
172 * @{
173 */
174 #define LL_EXTI_MODE_IT ((uint8_t)0x00U) /*!< Interrupt Mode */
175 #define LL_EXTI_MODE_EVENT ((uint8_t)0x01U) /*!< Event Mode */
176 #define LL_EXTI_MODE_IT_EVENT ((uint8_t)0x02U) /*!< Interrupt & Event Mode */
177 /**
178 * @}
179 */
180
181 /** @defgroup EXTI_LL_EC_TRIGGER Edge Trigger
182 * @{
183 */
184 #define LL_EXTI_TRIGGER_NONE ((uint8_t)0x00U) /*!< No Trigger Mode */
185 #define LL_EXTI_TRIGGER_RISING ((uint8_t)0x01U) /*!< Trigger Rising Mode */
186 #define LL_EXTI_TRIGGER_FALLING ((uint8_t)0x02U) /*!< Trigger Falling Mode */
187 #define LL_EXTI_TRIGGER_RISING_FALLING ((uint8_t)0x03U) /*!< Trigger Rising & Falling Mode */
188
189 /**
190 * @}
191 */
192
193
194 #endif /*USE_FULL_LL_DRIVER*/
195
196
197 /**
198 * @}
199 */
200
201 /* Exported macro ------------------------------------------------------------*/
202 /** @defgroup EXTI_LL_Exported_Macros EXTI Exported Macros
203 * @{
204 */
205
206 /** @defgroup EXTI_LL_EM_WRITE_READ Common Write and read registers Macros
207 * @{
208 */
209
210 /**
211 * @brief Write a value in EXTI register
212 * @param __REG__ Register to be written
213 * @param __VALUE__ Value to be written in the register
214 * @retval None
215 */
216 #define LL_EXTI_WriteReg(__REG__, __VALUE__) WRITE_REG(EXTI->__REG__, (__VALUE__))
217
218 /**
219 * @brief Read a value in EXTI register
220 * @param __REG__ Register to be read
221 * @retval Register value
222 */
223 #define LL_EXTI_ReadReg(__REG__) READ_REG(EXTI->__REG__)
224 /**
225 * @}
226 */
227
228
229 /**
230 * @}
231 */
232
233
234
235 /* Exported functions --------------------------------------------------------*/
236 /** @defgroup EXTI_LL_Exported_Functions EXTI Exported Functions
237 * @{
238 */
239 /** @defgroup EXTI_LL_EF_IT_Management IT_Management
240 * @{
241 */
242
243 /**
244 * @brief Enable ExtiLine Interrupt request for Lines in range 0 to 31
245 * @rmtoll IMR1 IMx LL_EXTI_EnableIT_0_31
246 * @param ExtiLine This parameter can be one of the following values:
247 * @arg @ref LL_EXTI_LINE_0
248 * @arg @ref LL_EXTI_LINE_1
249 * @arg @ref LL_EXTI_LINE_2
250 * @arg @ref LL_EXTI_LINE_3
251 * @arg @ref LL_EXTI_LINE_4
252 * @arg @ref LL_EXTI_LINE_5
253 * @arg @ref LL_EXTI_LINE_6
254 * @arg @ref LL_EXTI_LINE_7
255 * @arg @ref LL_EXTI_LINE_8
256 * @arg @ref LL_EXTI_LINE_9
257 * @arg @ref LL_EXTI_LINE_10
258 * @arg @ref LL_EXTI_LINE_11
259 * @arg @ref LL_EXTI_LINE_12
260 * @arg @ref LL_EXTI_LINE_13
261 * @arg @ref LL_EXTI_LINE_14
262 * @arg @ref LL_EXTI_LINE_15
263 * @arg @ref LL_EXTI_LINE_16
264 * @arg @ref LL_EXTI_LINE_17
265 * @arg @ref LL_EXTI_LINE_18
266 * @arg @ref LL_EXTI_LINE_19
267 * @arg @ref LL_EXTI_LINE_20
268 * @arg @ref LL_EXTI_LINE_21
269 * @arg @ref LL_EXTI_LINE_22
270 * @arg @ref LL_EXTI_LINE_23
271 * @arg @ref LL_EXTI_LINE_24
272 * @arg @ref LL_EXTI_LINE_25
273 * @arg @ref LL_EXTI_LINE_28
274 * @arg @ref LL_EXTI_LINE_29
275 * @arg @ref LL_EXTI_LINE_30
276 * @arg @ref LL_EXTI_LINE_31
277 * @arg @ref LL_EXTI_LINE_ALL_0_31
278 * @retval None
279 */
LL_EXTI_EnableIT_0_31(uint32_t ExtiLine)280 __STATIC_INLINE void LL_EXTI_EnableIT_0_31(uint32_t ExtiLine)
281 {
282 SET_BIT(EXTI->IMR1, ExtiLine);
283 }
284
285 /**
286 * @brief Enable ExtiLine Interrupt request for Lines in range 0 to 31 for cpu2
287 * @rmtoll C2IMR1 IMx LL_C2_EXTI_EnableIT_0_31
288 * @param ExtiLine This parameter can be one of the following values:
289 * @arg @ref LL_EXTI_LINE_0
290 * @arg @ref LL_EXTI_LINE_1
291 * @arg @ref LL_EXTI_LINE_2
292 * @arg @ref LL_EXTI_LINE_3
293 * @arg @ref LL_EXTI_LINE_4
294 * @arg @ref LL_EXTI_LINE_5
295 * @arg @ref LL_EXTI_LINE_6
296 * @arg @ref LL_EXTI_LINE_7
297 * @arg @ref LL_EXTI_LINE_8
298 * @arg @ref LL_EXTI_LINE_9
299 * @arg @ref LL_EXTI_LINE_10
300 * @arg @ref LL_EXTI_LINE_11
301 * @arg @ref LL_EXTI_LINE_12
302 * @arg @ref LL_EXTI_LINE_13
303 * @arg @ref LL_EXTI_LINE_14
304 * @arg @ref LL_EXTI_LINE_15
305 * @arg @ref LL_EXTI_LINE_16
306 * @arg @ref LL_EXTI_LINE_17
307 * @arg @ref LL_EXTI_LINE_18
308 * @arg @ref LL_EXTI_LINE_19
309 * @arg @ref LL_EXTI_LINE_20
310 * @arg @ref LL_EXTI_LINE_21
311 * @arg @ref LL_EXTI_LINE_22
312 * @arg @ref LL_EXTI_LINE_23
313 * @arg @ref LL_EXTI_LINE_24
314 * @arg @ref LL_EXTI_LINE_25
315 * @arg @ref LL_EXTI_LINE_28
316 * @arg @ref LL_EXTI_LINE_29
317 * @arg @ref LL_EXTI_LINE_30
318 * @arg @ref LL_EXTI_LINE_31
319 * @arg @ref LL_EXTI_LINE_ALL_0_31
320 * @retval None
321 */
LL_C2_EXTI_EnableIT_0_31(uint32_t ExtiLine)322 __STATIC_INLINE void LL_C2_EXTI_EnableIT_0_31(uint32_t ExtiLine)
323 {
324 SET_BIT(EXTI->C2IMR1, ExtiLine);
325 }
326
327 /**
328 * @brief Enable ExtiLine Interrupt request for Lines in range 32 to 63
329 * @rmtoll IMR2 IMx LL_EXTI_EnableIT_32_63
330 * @param ExtiLine This parameter can be one of the following values:
331 * @arg @ref LL_EXTI_LINE_33
332 * @arg @ref LL_EXTI_LINE_36
333 * @arg @ref LL_EXTI_LINE_37
334 * @arg @ref LL_EXTI_LINE_38
335 * @arg @ref LL_EXTI_LINE_39
336 * @arg @ref LL_EXTI_LINE_40
337 * @arg @ref LL_EXTI_LINE_41
338 * @arg @ref LL_EXTI_LINE_42
339 * @arg @ref LL_EXTI_LINE_43 (*)
340 * @arg @ref LL_EXTI_LINE_44
341 * @arg @ref LL_EXTI_LINE_45
342 * @arg @ref LL_EXTI_LINE_46
343 * @arg @ref LL_EXTI_LINE_48
344 * @arg @ref LL_EXTI_LINE_ALL_32_63
345 * (*) value not defined in all devices
346 * @retval None
347 */
LL_EXTI_EnableIT_32_63(uint32_t ExtiLine)348 __STATIC_INLINE void LL_EXTI_EnableIT_32_63(uint32_t ExtiLine)
349 {
350 SET_BIT(EXTI->IMR2, ExtiLine);
351 }
352
353 /**
354 * @brief Enable ExtiLine Interrupt request for Lines in range 32 to 63 for cpu2
355 * @rmtoll C2IMR2 IMx LL_C2_EXTI_EnableIT_32_63
356 * @param ExtiLine This parameter can be one of the following values:
357 * @arg @ref LL_EXTI_LINE_33
358 * @arg @ref LL_EXTI_LINE_36
359 * @arg @ref LL_EXTI_LINE_37
360 * @arg @ref LL_EXTI_LINE_38
361 * @arg @ref LL_EXTI_LINE_39
362 * @arg @ref LL_EXTI_LINE_40
363 * @arg @ref LL_EXTI_LINE_41
364 * @arg @ref LL_EXTI_LINE_42
365 * @arg @ref LL_EXTI_LINE_43 (*)
366 * @arg @ref LL_EXTI_LINE_44
367 * @arg @ref LL_EXTI_LINE_45
368 * @arg @ref LL_EXTI_LINE_46
369 * @arg @ref LL_EXTI_LINE_48
370 * @arg @ref LL_EXTI_LINE_ALL_32_63
371 * (*) value not defined in all devices
372 * @retval None
373 */
LL_C2_EXTI_EnableIT_32_63(uint32_t ExtiLine)374 __STATIC_INLINE void LL_C2_EXTI_EnableIT_32_63(uint32_t ExtiLine)
375 {
376 SET_BIT(EXTI->C2IMR2, ExtiLine);
377 }
378
379 /**
380 * @brief Disable ExtiLine Interrupt request for Lines in range 0 to 31
381 * @rmtoll IMR1 IMx LL_EXTI_DisableIT_0_31
382 * @param ExtiLine This parameter can be one of the following values:
383 * @arg @ref LL_EXTI_LINE_0
384 * @arg @ref LL_EXTI_LINE_1
385 * @arg @ref LL_EXTI_LINE_2
386 * @arg @ref LL_EXTI_LINE_3
387 * @arg @ref LL_EXTI_LINE_4
388 * @arg @ref LL_EXTI_LINE_5
389 * @arg @ref LL_EXTI_LINE_6
390 * @arg @ref LL_EXTI_LINE_7
391 * @arg @ref LL_EXTI_LINE_8
392 * @arg @ref LL_EXTI_LINE_9
393 * @arg @ref LL_EXTI_LINE_10
394 * @arg @ref LL_EXTI_LINE_11
395 * @arg @ref LL_EXTI_LINE_12
396 * @arg @ref LL_EXTI_LINE_13
397 * @arg @ref LL_EXTI_LINE_14
398 * @arg @ref LL_EXTI_LINE_15
399 * @arg @ref LL_EXTI_LINE_16
400 * @arg @ref LL_EXTI_LINE_17
401 * @arg @ref LL_EXTI_LINE_18
402 * @arg @ref LL_EXTI_LINE_19
403 * @arg @ref LL_EXTI_LINE_20
404 * @arg @ref LL_EXTI_LINE_21
405 * @arg @ref LL_EXTI_LINE_22
406 * @arg @ref LL_EXTI_LINE_23
407 * @arg @ref LL_EXTI_LINE_24
408 * @arg @ref LL_EXTI_LINE_25
409 * @arg @ref LL_EXTI_LINE_28
410 * @arg @ref LL_EXTI_LINE_29
411 * @arg @ref LL_EXTI_LINE_30
412 * @arg @ref LL_EXTI_LINE_31
413 * @arg @ref LL_EXTI_LINE_ALL_0_31
414 * @retval None
415 */
LL_EXTI_DisableIT_0_31(uint32_t ExtiLine)416 __STATIC_INLINE void LL_EXTI_DisableIT_0_31(uint32_t ExtiLine)
417 {
418 CLEAR_BIT(EXTI->IMR1, ExtiLine);
419 }
420
421 /**
422 * @brief Disable ExtiLine Interrupt request for Lines in range 0 to 31 for cpu2
423 * @rmtoll C2IMR1 IMx LL_C2_EXTI_DisableIT_0_31
424 * @param ExtiLine This parameter can be one of the following values:
425 * @arg @ref LL_EXTI_LINE_0
426 * @arg @ref LL_EXTI_LINE_1
427 * @arg @ref LL_EXTI_LINE_2
428 * @arg @ref LL_EXTI_LINE_3
429 * @arg @ref LL_EXTI_LINE_4
430 * @arg @ref LL_EXTI_LINE_5
431 * @arg @ref LL_EXTI_LINE_6
432 * @arg @ref LL_EXTI_LINE_7
433 * @arg @ref LL_EXTI_LINE_8
434 * @arg @ref LL_EXTI_LINE_9
435 * @arg @ref LL_EXTI_LINE_10
436 * @arg @ref LL_EXTI_LINE_11
437 * @arg @ref LL_EXTI_LINE_12
438 * @arg @ref LL_EXTI_LINE_13
439 * @arg @ref LL_EXTI_LINE_14
440 * @arg @ref LL_EXTI_LINE_15
441 * @arg @ref LL_EXTI_LINE_16
442 * @arg @ref LL_EXTI_LINE_17
443 * @arg @ref LL_EXTI_LINE_18
444 * @arg @ref LL_EXTI_LINE_19
445 * @arg @ref LL_EXTI_LINE_20
446 * @arg @ref LL_EXTI_LINE_21
447 * @arg @ref LL_EXTI_LINE_22
448 * @arg @ref LL_EXTI_LINE_23
449 * @arg @ref LL_EXTI_LINE_24
450 * @arg @ref LL_EXTI_LINE_25
451 * @arg @ref LL_EXTI_LINE_28
452 * @arg @ref LL_EXTI_LINE_29
453 * @arg @ref LL_EXTI_LINE_30
454 * @arg @ref LL_EXTI_LINE_31
455 * @arg @ref LL_EXTI_LINE_ALL_0_31
456 * @retval None
457 */
LL_C2_EXTI_DisableIT_0_31(uint32_t ExtiLine)458 __STATIC_INLINE void LL_C2_EXTI_DisableIT_0_31(uint32_t ExtiLine)
459 {
460 CLEAR_BIT(EXTI->C2IMR1, ExtiLine);
461 }
462
463 /**
464 * @brief Disable ExtiLine Interrupt request for Lines in range 32 to 63
465 * @rmtoll IMR2 IMx LL_EXTI_DisableIT_32_63
466 * @param ExtiLine This parameter can be one of the following values:
467 * @arg @ref LL_EXTI_LINE_33
468 * @arg @ref LL_EXTI_LINE_36
469 * @arg @ref LL_EXTI_LINE_37
470 * @arg @ref LL_EXTI_LINE_38
471 * @arg @ref LL_EXTI_LINE_39
472 * @arg @ref LL_EXTI_LINE_40
473 * @arg @ref LL_EXTI_LINE_41
474 * @arg @ref LL_EXTI_LINE_42
475 * @arg @ref LL_EXTI_LINE_43 (*)
476 * @arg @ref LL_EXTI_LINE_44
477 * @arg @ref LL_EXTI_LINE_45
478 * @arg @ref LL_EXTI_LINE_46
479 * @arg @ref LL_EXTI_LINE_48
480 * @arg @ref LL_EXTI_LINE_ALL_32_63
481 * (*) value not defined in all devices
482 * @retval None
483 */
LL_EXTI_DisableIT_32_63(uint32_t ExtiLine)484 __STATIC_INLINE void LL_EXTI_DisableIT_32_63(uint32_t ExtiLine)
485 {
486 CLEAR_BIT(EXTI->IMR2, ExtiLine);
487 }
488
489 /**
490 * @brief Disable ExtiLine Interrupt request for Lines in range 32 to 63 for cpu2
491 * @rmtoll C2IMR2 IMx LL_C2_EXTI_DisableIT_32_63
492 * @param ExtiLine This parameter can be one of the following values:
493 * @arg @ref LL_EXTI_LINE_33
494 * @arg @ref LL_EXTI_LINE_36
495 * @arg @ref LL_EXTI_LINE_37
496 * @arg @ref LL_EXTI_LINE_38
497 * @arg @ref LL_EXTI_LINE_39
498 * @arg @ref LL_EXTI_LINE_40
499 * @arg @ref LL_EXTI_LINE_41
500 * @arg @ref LL_EXTI_LINE_42
501 * @arg @ref LL_EXTI_LINE_43 (*)
502 * @arg @ref LL_EXTI_LINE_44
503 * @arg @ref LL_EXTI_LINE_45
504 * @arg @ref LL_EXTI_LINE_46
505 * @arg @ref LL_EXTI_LINE_48
506 * @arg @ref LL_EXTI_LINE_ALL_32_63
507 * (*) value not defined in all devices
508 * @retval None
509 */
LL_C2_EXTI_DisableIT_32_63(uint32_t ExtiLine)510 __STATIC_INLINE void LL_C2_EXTI_DisableIT_32_63(uint32_t ExtiLine)
511 {
512 CLEAR_BIT(EXTI->C2IMR2, ExtiLine);
513 }
514
515 /**
516 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 0 to 31
517 * @rmtoll IMR1 IMx LL_EXTI_IsEnabledIT_0_31
518 * @param ExtiLine This parameter can be one of the following values:
519 * @arg @ref LL_EXTI_LINE_0
520 * @arg @ref LL_EXTI_LINE_1
521 * @arg @ref LL_EXTI_LINE_2
522 * @arg @ref LL_EXTI_LINE_3
523 * @arg @ref LL_EXTI_LINE_4
524 * @arg @ref LL_EXTI_LINE_5
525 * @arg @ref LL_EXTI_LINE_6
526 * @arg @ref LL_EXTI_LINE_7
527 * @arg @ref LL_EXTI_LINE_8
528 * @arg @ref LL_EXTI_LINE_9
529 * @arg @ref LL_EXTI_LINE_10
530 * @arg @ref LL_EXTI_LINE_11
531 * @arg @ref LL_EXTI_LINE_12
532 * @arg @ref LL_EXTI_LINE_13
533 * @arg @ref LL_EXTI_LINE_14
534 * @arg @ref LL_EXTI_LINE_15
535 * @arg @ref LL_EXTI_LINE_16
536 * @arg @ref LL_EXTI_LINE_17
537 * @arg @ref LL_EXTI_LINE_18
538 * @arg @ref LL_EXTI_LINE_19
539 * @arg @ref LL_EXTI_LINE_20
540 * @arg @ref LL_EXTI_LINE_21
541 * @arg @ref LL_EXTI_LINE_22
542 * @arg @ref LL_EXTI_LINE_23
543 * @arg @ref LL_EXTI_LINE_24
544 * @arg @ref LL_EXTI_LINE_25
545 * @arg @ref LL_EXTI_LINE_28
546 * @arg @ref LL_EXTI_LINE_29
547 * @arg @ref LL_EXTI_LINE_30
548 * @arg @ref LL_EXTI_LINE_31
549 * @arg @ref LL_EXTI_LINE_ALL_0_31
550 * @retval State of bit (1 or 0).
551 */
LL_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine)552 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine)
553 {
554 return ((READ_BIT(EXTI->IMR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
555 }
556
557 /**
558 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 0 to 31 for cpu2
559 * @rmtoll C2IMR1 IMx LL_C2_EXTI_IsEnabledIT_0_31
560 * @param ExtiLine This parameter can be one of the following values:
561 * @arg @ref LL_EXTI_LINE_0
562 * @arg @ref LL_EXTI_LINE_1
563 * @arg @ref LL_EXTI_LINE_2
564 * @arg @ref LL_EXTI_LINE_3
565 * @arg @ref LL_EXTI_LINE_4
566 * @arg @ref LL_EXTI_LINE_5
567 * @arg @ref LL_EXTI_LINE_6
568 * @arg @ref LL_EXTI_LINE_7
569 * @arg @ref LL_EXTI_LINE_8
570 * @arg @ref LL_EXTI_LINE_9
571 * @arg @ref LL_EXTI_LINE_10
572 * @arg @ref LL_EXTI_LINE_11
573 * @arg @ref LL_EXTI_LINE_12
574 * @arg @ref LL_EXTI_LINE_13
575 * @arg @ref LL_EXTI_LINE_14
576 * @arg @ref LL_EXTI_LINE_15
577 * @arg @ref LL_EXTI_LINE_16
578 * @arg @ref LL_EXTI_LINE_17
579 * @arg @ref LL_EXTI_LINE_18
580 * @arg @ref LL_EXTI_LINE_19
581 * @arg @ref LL_EXTI_LINE_20
582 * @arg @ref LL_EXTI_LINE_21
583 * @arg @ref LL_EXTI_LINE_22
584 * @arg @ref LL_EXTI_LINE_23
585 * @arg @ref LL_EXTI_LINE_24
586 * @arg @ref LL_EXTI_LINE_25
587 * @arg @ref LL_EXTI_LINE_28
588 * @arg @ref LL_EXTI_LINE_29
589 * @arg @ref LL_EXTI_LINE_30
590 * @arg @ref LL_EXTI_LINE_31
591 * @arg @ref LL_EXTI_LINE_ALL_0_31
592 * @retval State of bit (1 or 0).
593 */
LL_C2_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine)594 __STATIC_INLINE uint32_t LL_C2_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine)
595 {
596 return ((READ_BIT(EXTI->C2IMR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
597 }
598
599 /**
600 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 32 to 63
601 * @rmtoll IMR2 IMx LL_EXTI_IsEnabledIT_32_63
602 * @param ExtiLine This parameter can be one of the following values:
603 * @arg @ref LL_EXTI_LINE_33
604 * @arg @ref LL_EXTI_LINE_36
605 * @arg @ref LL_EXTI_LINE_37
606 * @arg @ref LL_EXTI_LINE_38
607 * @arg @ref LL_EXTI_LINE_39
608 * @arg @ref LL_EXTI_LINE_40
609 * @arg @ref LL_EXTI_LINE_41
610 * @arg @ref LL_EXTI_LINE_42
611 * @arg @ref LL_EXTI_LINE_43 (*)
612 * @arg @ref LL_EXTI_LINE_44
613 * @arg @ref LL_EXTI_LINE_45
614 * @arg @ref LL_EXTI_LINE_46
615 * @arg @ref LL_EXTI_LINE_48
616 * @arg @ref LL_EXTI_LINE_ALL_32_63
617 * (*) value not defined in all devices
618 * @retval State of bit (1 or 0).
619 */
LL_EXTI_IsEnabledIT_32_63(uint32_t ExtiLine)620 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_32_63(uint32_t ExtiLine)
621 {
622 return ((READ_BIT(EXTI->IMR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
623 }
624
625 /**
626 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 32 to 63 for cpu2
627 * @rmtoll C2IMR2 IMx LL_C2_EXTI_IsEnabledIT_32_63
628 * @param ExtiLine This parameter can be one of the following values:
629 * @arg @ref LL_EXTI_LINE_33
630 * @arg @ref LL_EXTI_LINE_36
631 * @arg @ref LL_EXTI_LINE_37
632 * @arg @ref LL_EXTI_LINE_38
633 * @arg @ref LL_EXTI_LINE_39
634 * @arg @ref LL_EXTI_LINE_40
635 * @arg @ref LL_EXTI_LINE_41
636 * @arg @ref LL_EXTI_LINE_42
637 * @arg @ref LL_EXTI_LINE_43 (*)
638 * @arg @ref LL_EXTI_LINE_44
639 * @arg @ref LL_EXTI_LINE_45
640 * @arg @ref LL_EXTI_LINE_46
641 * @arg @ref LL_EXTI_LINE_48
642 * @arg @ref LL_EXTI_LINE_ALL_32_63
643 * (*) value not defined in all devices
644 * @retval State of bit (1 or 0).
645 */
LL_C2_EXTI_IsEnabledIT_32_63(uint32_t ExtiLine)646 __STATIC_INLINE uint32_t LL_C2_EXTI_IsEnabledIT_32_63(uint32_t ExtiLine)
647 {
648 return ((READ_BIT(EXTI->C2IMR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
649 }
650
651 /**
652 * @}
653 */
654
655 /** @defgroup EXTI_LL_EF_Event_Management Event_Management
656 * @{
657 */
658
659 /**
660 * @brief Enable ExtiLine Event request for Lines in range 0 to 31
661 * @rmtoll EMR1 EMx LL_EXTI_EnableEvent_0_31
662 * @param ExtiLine This parameter can be one of the following values:
663 * @arg @ref LL_EXTI_LINE_0
664 * @arg @ref LL_EXTI_LINE_1
665 * @arg @ref LL_EXTI_LINE_2
666 * @arg @ref LL_EXTI_LINE_3
667 * @arg @ref LL_EXTI_LINE_4
668 * @arg @ref LL_EXTI_LINE_5
669 * @arg @ref LL_EXTI_LINE_6
670 * @arg @ref LL_EXTI_LINE_7
671 * @arg @ref LL_EXTI_LINE_8
672 * @arg @ref LL_EXTI_LINE_9
673 * @arg @ref LL_EXTI_LINE_10
674 * @arg @ref LL_EXTI_LINE_11
675 * @arg @ref LL_EXTI_LINE_12
676 * @arg @ref LL_EXTI_LINE_13
677 * @arg @ref LL_EXTI_LINE_14
678 * @arg @ref LL_EXTI_LINE_15
679 * @arg @ref LL_EXTI_LINE_17
680 * @arg @ref LL_EXTI_LINE_18
681 * @arg @ref LL_EXTI_LINE_19
682 * @arg @ref LL_EXTI_LINE_20
683 * @arg @ref LL_EXTI_LINE_21
684 * @arg @ref LL_EXTI_LINE_ALL_0_31
685 * @retval None
686 */
LL_EXTI_EnableEvent_0_31(uint32_t ExtiLine)687 __STATIC_INLINE void LL_EXTI_EnableEvent_0_31(uint32_t ExtiLine)
688 {
689 SET_BIT(EXTI->EMR1, ExtiLine);
690 }
691
692 /**
693 * @brief Enable ExtiLine Event request for Lines in range 0 to 31 for cpu2
694 * @rmtoll C2EMR1 EMx LL_C2_EXTI_EnableEvent_0_31
695 * @param ExtiLine This parameter can be one of the following values:
696 * @arg @ref LL_EXTI_LINE_0
697 * @arg @ref LL_EXTI_LINE_1
698 * @arg @ref LL_EXTI_LINE_2
699 * @arg @ref LL_EXTI_LINE_3
700 * @arg @ref LL_EXTI_LINE_4
701 * @arg @ref LL_EXTI_LINE_5
702 * @arg @ref LL_EXTI_LINE_6
703 * @arg @ref LL_EXTI_LINE_7
704 * @arg @ref LL_EXTI_LINE_8
705 * @arg @ref LL_EXTI_LINE_9
706 * @arg @ref LL_EXTI_LINE_10
707 * @arg @ref LL_EXTI_LINE_11
708 * @arg @ref LL_EXTI_LINE_12
709 * @arg @ref LL_EXTI_LINE_13
710 * @arg @ref LL_EXTI_LINE_14
711 * @arg @ref LL_EXTI_LINE_15
712 * @arg @ref LL_EXTI_LINE_17
713 * @arg @ref LL_EXTI_LINE_18
714 * @arg @ref LL_EXTI_LINE_19
715 * @arg @ref LL_EXTI_LINE_20
716 * @arg @ref LL_EXTI_LINE_21
717 * @arg @ref LL_EXTI_LINE_ALL_0_31
718 * @retval None
719 */
LL_C2_EXTI_EnableEvent_0_31(uint32_t ExtiLine)720 __STATIC_INLINE void LL_C2_EXTI_EnableEvent_0_31(uint32_t ExtiLine)
721 {
722 SET_BIT(EXTI->C2EMR1, ExtiLine);
723 }
724
725 /**
726 * @brief Enable ExtiLine Event request for Lines in range 32 to 63
727 * @rmtoll EMR2 EMx LL_EXTI_EnableEvent_32_63
728 * @param ExtiLine This parameter can be a combination of the following values:
729 * @arg @ref LL_EXTI_LINE_40
730 * @arg @ref LL_EXTI_LINE_41
731 * @arg @ref LL_EXTI_LINE_ALL_32_63
732 * @retval None
733 */
LL_EXTI_EnableEvent_32_63(uint32_t ExtiLine)734 __STATIC_INLINE void LL_EXTI_EnableEvent_32_63(uint32_t ExtiLine)
735 {
736 SET_BIT(EXTI->EMR2, ExtiLine);
737 }
738
739 /**
740 * @brief Enable ExtiLine Event request for Lines in range 32 to 63 for cpu2
741 * @rmtoll C2EMR2 EMx LL_C2_EXTI_EnableEvent_32_63
742 * @param ExtiLine This parameter can be a combination of the following values:
743 * @arg @ref LL_EXTI_LINE_40
744 * @arg @ref LL_EXTI_LINE_41
745 * @arg @ref LL_EXTI_LINE_ALL_32_63
746 * @retval None
747 */
LL_C2_EXTI_EnableEvent_32_63(uint32_t ExtiLine)748 __STATIC_INLINE void LL_C2_EXTI_EnableEvent_32_63(uint32_t ExtiLine)
749 {
750 SET_BIT(EXTI->C2EMR2, ExtiLine);
751 }
752
753 /**
754 * @brief Disable ExtiLine Event request for Lines in range 0 to 31
755 * @rmtoll EMR1 EMx LL_EXTI_DisableEvent_0_31
756 * @param ExtiLine This parameter can be one of the following values:
757 * @arg @ref LL_EXTI_LINE_0
758 * @arg @ref LL_EXTI_LINE_1
759 * @arg @ref LL_EXTI_LINE_2
760 * @arg @ref LL_EXTI_LINE_3
761 * @arg @ref LL_EXTI_LINE_4
762 * @arg @ref LL_EXTI_LINE_5
763 * @arg @ref LL_EXTI_LINE_6
764 * @arg @ref LL_EXTI_LINE_7
765 * @arg @ref LL_EXTI_LINE_8
766 * @arg @ref LL_EXTI_LINE_9
767 * @arg @ref LL_EXTI_LINE_10
768 * @arg @ref LL_EXTI_LINE_11
769 * @arg @ref LL_EXTI_LINE_12
770 * @arg @ref LL_EXTI_LINE_13
771 * @arg @ref LL_EXTI_LINE_14
772 * @arg @ref LL_EXTI_LINE_15
773 * @arg @ref LL_EXTI_LINE_17
774 * @arg @ref LL_EXTI_LINE_18
775 * @arg @ref LL_EXTI_LINE_19
776 * @arg @ref LL_EXTI_LINE_20
777 * @arg @ref LL_EXTI_LINE_21
778 * @arg @ref LL_EXTI_LINE_ALL_0_31
779 * @retval None
780 */
LL_EXTI_DisableEvent_0_31(uint32_t ExtiLine)781 __STATIC_INLINE void LL_EXTI_DisableEvent_0_31(uint32_t ExtiLine)
782 {
783 CLEAR_BIT(EXTI->EMR1, ExtiLine);
784 }
785
786 /**
787 * @brief Disable ExtiLine Event request for Lines in range 0 to 31 for cpu2
788 * @rmtoll C2EMR1 EMx LL_C2_EXTI_DisableEvent_0_31
789 * @param ExtiLine This parameter can be one of the following values:
790 * @arg @ref LL_EXTI_LINE_0
791 * @arg @ref LL_EXTI_LINE_1
792 * @arg @ref LL_EXTI_LINE_2
793 * @arg @ref LL_EXTI_LINE_3
794 * @arg @ref LL_EXTI_LINE_4
795 * @arg @ref LL_EXTI_LINE_5
796 * @arg @ref LL_EXTI_LINE_6
797 * @arg @ref LL_EXTI_LINE_7
798 * @arg @ref LL_EXTI_LINE_8
799 * @arg @ref LL_EXTI_LINE_9
800 * @arg @ref LL_EXTI_LINE_10
801 * @arg @ref LL_EXTI_LINE_11
802 * @arg @ref LL_EXTI_LINE_12
803 * @arg @ref LL_EXTI_LINE_13
804 * @arg @ref LL_EXTI_LINE_14
805 * @arg @ref LL_EXTI_LINE_15
806 * @arg @ref LL_EXTI_LINE_17
807 * @arg @ref LL_EXTI_LINE_18
808 * @arg @ref LL_EXTI_LINE_19
809 * @arg @ref LL_EXTI_LINE_20
810 * @arg @ref LL_EXTI_LINE_21
811 * @arg @ref LL_EXTI_LINE_ALL_0_31
812 * @retval None
813 */
LL_C2_EXTI_DisableEvent_0_31(uint32_t ExtiLine)814 __STATIC_INLINE void LL_C2_EXTI_DisableEvent_0_31(uint32_t ExtiLine)
815 {
816 CLEAR_BIT(EXTI->C2EMR1, ExtiLine);
817 }
818
819 /**
820 * @brief Disable ExtiLine Event request for Lines in range 32 to 63
821 * @rmtoll EMR2 EMx LL_EXTI_DisableEvent_32_63
822 * @param ExtiLine This parameter can be a combination of the following values:
823 * @arg @ref LL_EXTI_LINE_40
824 * @arg @ref LL_EXTI_LINE_41
825 * @arg @ref LL_EXTI_LINE_ALL_32_63
826 * @retval None
827 */
LL_EXTI_DisableEvent_32_63(uint32_t ExtiLine)828 __STATIC_INLINE void LL_EXTI_DisableEvent_32_63(uint32_t ExtiLine)
829 {
830 CLEAR_BIT(EXTI->EMR2, ExtiLine);
831 }
832
833 /**
834 * @brief Disable ExtiLine Event request for Lines in range 32 to 63 for cpu2
835 * @rmtoll C2EMR2 EMx LL_C2_EXTI_DisableEvent_32_63
836 * @param ExtiLine This parameter can be a combination of the following values:
837 * @arg @ref LL_EXTI_LINE_40
838 * @arg @ref LL_EXTI_LINE_41
839 * @arg @ref LL_EXTI_LINE_ALL_32_63
840 * @retval None
841 */
LL_C2_EXTI_DisableEvent_32_63(uint32_t ExtiLine)842 __STATIC_INLINE void LL_C2_EXTI_DisableEvent_32_63(uint32_t ExtiLine)
843 {
844 CLEAR_BIT(EXTI->C2EMR2, ExtiLine);
845 }
846
847 /**
848 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 0 to 31
849 * @rmtoll EMR1 EMx LL_EXTI_IsEnabledEvent_0_31
850 * @param ExtiLine This parameter can be one of the following values:
851 * @arg @ref LL_EXTI_LINE_0
852 * @arg @ref LL_EXTI_LINE_1
853 * @arg @ref LL_EXTI_LINE_2
854 * @arg @ref LL_EXTI_LINE_3
855 * @arg @ref LL_EXTI_LINE_4
856 * @arg @ref LL_EXTI_LINE_5
857 * @arg @ref LL_EXTI_LINE_6
858 * @arg @ref LL_EXTI_LINE_7
859 * @arg @ref LL_EXTI_LINE_8
860 * @arg @ref LL_EXTI_LINE_9
861 * @arg @ref LL_EXTI_LINE_10
862 * @arg @ref LL_EXTI_LINE_11
863 * @arg @ref LL_EXTI_LINE_12
864 * @arg @ref LL_EXTI_LINE_13
865 * @arg @ref LL_EXTI_LINE_14
866 * @arg @ref LL_EXTI_LINE_15
867 * @arg @ref LL_EXTI_LINE_17
868 * @arg @ref LL_EXTI_LINE_18
869 * @arg @ref LL_EXTI_LINE_19
870 * @arg @ref LL_EXTI_LINE_20
871 * @arg @ref LL_EXTI_LINE_21
872 * @arg @ref LL_EXTI_LINE_ALL_0_31
873 * @note Please check each device line mapping for EXTI Line availability
874 * @retval State of bit (1 or 0).
875 */
LL_EXTI_IsEnabledEvent_0_31(uint32_t ExtiLine)876 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_0_31(uint32_t ExtiLine)
877 {
878 return ((READ_BIT(EXTI->EMR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
879 }
880
881 /**
882 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 0 to 31 for cpu2
883 * @rmtoll C2EMR1 EMx LL_C2_EXTI_IsEnabledEvent_0_31
884 * @param ExtiLine This parameter can be one of the following values:
885 * @arg @ref LL_EXTI_LINE_0
886 * @arg @ref LL_EXTI_LINE_1
887 * @arg @ref LL_EXTI_LINE_2
888 * @arg @ref LL_EXTI_LINE_3
889 * @arg @ref LL_EXTI_LINE_4
890 * @arg @ref LL_EXTI_LINE_5
891 * @arg @ref LL_EXTI_LINE_6
892 * @arg @ref LL_EXTI_LINE_7
893 * @arg @ref LL_EXTI_LINE_8
894 * @arg @ref LL_EXTI_LINE_9
895 * @arg @ref LL_EXTI_LINE_10
896 * @arg @ref LL_EXTI_LINE_11
897 * @arg @ref LL_EXTI_LINE_12
898 * @arg @ref LL_EXTI_LINE_13
899 * @arg @ref LL_EXTI_LINE_14
900 * @arg @ref LL_EXTI_LINE_15
901 * @arg @ref LL_EXTI_LINE_17
902 * @arg @ref LL_EXTI_LINE_18
903 * @arg @ref LL_EXTI_LINE_19
904 * @arg @ref LL_EXTI_LINE_20
905 * @arg @ref LL_EXTI_LINE_21
906 * @arg @ref LL_EXTI_LINE_ALL_0_31
907 * @note Please check each device line mapping for EXTI Line availability
908 * @retval State of bit (1 or 0).
909 */
LL_C2_EXTI_IsEnabledEvent_0_31(uint32_t ExtiLine)910 __STATIC_INLINE uint32_t LL_C2_EXTI_IsEnabledEvent_0_31(uint32_t ExtiLine)
911 {
912 return ((READ_BIT(EXTI->C2EMR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
913 }
914
915 /**
916 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 32 to 63
917 * @rmtoll EMR2 EMx LL_EXTI_IsEnabledEvent_32_63
918 * @param ExtiLine This parameter can be a combination of the following values:
919 * @arg @ref LL_EXTI_LINE_40
920 * @arg @ref LL_EXTI_LINE_41
921 * @arg @ref LL_EXTI_LINE_ALL_32_63
922 * @retval State of bit (1 or 0).
923 */
LL_EXTI_IsEnabledEvent_32_63(uint32_t ExtiLine)924 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_32_63(uint32_t ExtiLine)
925 {
926 return ((READ_BIT(EXTI->EMR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
927 }
928
929 /**
930 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 32 to 63 for cpu2
931 * @rmtoll EMR2 EMx LL_C2_EXTI_IsEnabledEvent_32_63
932 * @param ExtiLine This parameter can be a combination of the following values:
933 * @arg @ref LL_EXTI_LINE_40
934 * @arg @ref LL_EXTI_LINE_41
935 * @arg @ref LL_EXTI_LINE_ALL_32_63
936 * @retval State of bit (1 or 0).
937 */
LL_C2_EXTI_IsEnabledEvent_32_63(uint32_t ExtiLine)938 __STATIC_INLINE uint32_t LL_C2_EXTI_IsEnabledEvent_32_63(uint32_t ExtiLine)
939 {
940 return ((READ_BIT(EXTI->C2EMR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
941 }
942
943 /**
944 * @}
945 */
946
947 /** @defgroup EXTI_LL_EF_Rising_Trigger_Management Rising_Trigger_Management
948 * @{
949 */
950
951 /**
952 * @brief Enable ExtiLine Rising Edge Trigger for Lines in range 0 to 31
953 * @note The configurable wakeup lines are edge-triggered. No glitch must be
954 * generated on these lines. If a rising edge on a configurable interrupt
955 * line occurs during a write operation in the EXTI_RTSR register, the
956 * pending bit is not set.
957 * Rising and falling edge triggers can be set for
958 * the same interrupt line. In this case, both generate a trigger
959 * condition.
960 * @rmtoll RTSR1 RTx LL_EXTI_EnableRisingTrig_0_31
961 * @param ExtiLine This parameter can be a combination of the following values:
962 * @arg @ref LL_EXTI_LINE_0
963 * @arg @ref LL_EXTI_LINE_1
964 * @arg @ref LL_EXTI_LINE_2
965 * @arg @ref LL_EXTI_LINE_3
966 * @arg @ref LL_EXTI_LINE_4
967 * @arg @ref LL_EXTI_LINE_5
968 * @arg @ref LL_EXTI_LINE_6
969 * @arg @ref LL_EXTI_LINE_7
970 * @arg @ref LL_EXTI_LINE_8
971 * @arg @ref LL_EXTI_LINE_9
972 * @arg @ref LL_EXTI_LINE_10
973 * @arg @ref LL_EXTI_LINE_11
974 * @arg @ref LL_EXTI_LINE_12
975 * @arg @ref LL_EXTI_LINE_13
976 * @arg @ref LL_EXTI_LINE_14
977 * @arg @ref LL_EXTI_LINE_15
978 * @arg @ref LL_EXTI_LINE_16
979 * @arg @ref LL_EXTI_LINE_17
980 * @arg @ref LL_EXTI_LINE_18
981 * @arg @ref LL_EXTI_LINE_19
982 * @arg @ref LL_EXTI_LINE_20
983 * @arg @ref LL_EXTI_LINE_21
984 * @arg @ref LL_EXTI_LINE_31
985 * @retval None
986 */
LL_EXTI_EnableRisingTrig_0_31(uint32_t ExtiLine)987 __STATIC_INLINE void LL_EXTI_EnableRisingTrig_0_31(uint32_t ExtiLine)
988 {
989 SET_BIT(EXTI->RTSR1, ExtiLine);
990
991 }
992
993 /**
994 * @brief Enable ExtiLine Rising Edge Trigger for Lines in range 32 to 63
995 * @note The configurable wakeup lines are edge-triggered. No glitch must be
996 * generated on these lines. If a rising edge on a configurable interrupt
997 * line occurs during a write operation in the EXTI_RTSR register, the
998 * pending bit is not set.Rising and falling edge triggers can be set for
999 * the same interrupt line. In this case, both generate a trigger
1000 * condition.
1001 * @rmtoll RTSR2 RTx LL_EXTI_EnableRisingTrig_32_63
1002 * @param ExtiLine This parameter can be a combination of the following values:
1003 * @arg @ref LL_EXTI_LINE_33
1004 * @arg @ref LL_EXTI_LINE_40
1005 * @arg @ref LL_EXTI_LINE_41
1006 * @retval None
1007 */
LL_EXTI_EnableRisingTrig_32_63(uint32_t ExtiLine)1008 __STATIC_INLINE void LL_EXTI_EnableRisingTrig_32_63(uint32_t ExtiLine)
1009 {
1010 SET_BIT(EXTI->RTSR2, ExtiLine);
1011 }
1012
1013 /**
1014 * @brief Disable ExtiLine Rising Edge Trigger for Lines in range 0 to 31
1015 * @note The configurable wakeup lines are edge-triggered. No glitch must be
1016 * generated on these lines. If a rising edge on a configurable interrupt
1017 * line occurs during a write operation in the EXTI_RTSR register, the
1018 * pending bit is not set.
1019 * Rising and falling edge triggers can be set for
1020 * the same interrupt line. In this case, both generate a trigger
1021 * condition.
1022 * @rmtoll RTSR1 RTx LL_EXTI_DisableRisingTrig_0_31
1023 * @param ExtiLine This parameter can be a combination of the following values:
1024 * @arg @ref LL_EXTI_LINE_0
1025 * @arg @ref LL_EXTI_LINE_1
1026 * @arg @ref LL_EXTI_LINE_2
1027 * @arg @ref LL_EXTI_LINE_3
1028 * @arg @ref LL_EXTI_LINE_4
1029 * @arg @ref LL_EXTI_LINE_5
1030 * @arg @ref LL_EXTI_LINE_6
1031 * @arg @ref LL_EXTI_LINE_7
1032 * @arg @ref LL_EXTI_LINE_8
1033 * @arg @ref LL_EXTI_LINE_9
1034 * @arg @ref LL_EXTI_LINE_10
1035 * @arg @ref LL_EXTI_LINE_11
1036 * @arg @ref LL_EXTI_LINE_12
1037 * @arg @ref LL_EXTI_LINE_13
1038 * @arg @ref LL_EXTI_LINE_14
1039 * @arg @ref LL_EXTI_LINE_15
1040 * @arg @ref LL_EXTI_LINE_16
1041 * @arg @ref LL_EXTI_LINE_17
1042 * @arg @ref LL_EXTI_LINE_18
1043 * @arg @ref LL_EXTI_LINE_19
1044 * @arg @ref LL_EXTI_LINE_20
1045 * @arg @ref LL_EXTI_LINE_21
1046 * @arg @ref LL_EXTI_LINE_31
1047 * @retval None
1048 */
LL_EXTI_DisableRisingTrig_0_31(uint32_t ExtiLine)1049 __STATIC_INLINE void LL_EXTI_DisableRisingTrig_0_31(uint32_t ExtiLine)
1050 {
1051 CLEAR_BIT(EXTI->RTSR1, ExtiLine);
1052
1053 }
1054
1055 /**
1056 * @brief Disable ExtiLine Rising Edge Trigger for Lines in range 32 to 63
1057 * @note The configurable wakeup lines are edge-triggered. No glitch must be
1058 * generated on these lines. If a rising edge on a configurable interrupt
1059 * line occurs during a write operation in the EXTI_RTSR register, the
1060 * pending bit is not set.
1061 * Rising and falling edge triggers can be set for
1062 * the same interrupt line. In this case, both generate a trigger
1063 * condition.
1064 * @rmtoll RTSR2 RTx LL_EXTI_DisableRisingTrig_32_63
1065 * @param ExtiLine This parameter can be a combination of the following values:
1066 * @arg @ref LL_EXTI_LINE_33
1067 * @arg @ref LL_EXTI_LINE_40
1068 * @arg @ref LL_EXTI_LINE_41
1069 * @retval None
1070 */
LL_EXTI_DisableRisingTrig_32_63(uint32_t ExtiLine)1071 __STATIC_INLINE void LL_EXTI_DisableRisingTrig_32_63(uint32_t ExtiLine)
1072 {
1073 CLEAR_BIT(EXTI->RTSR2, ExtiLine);
1074 }
1075
1076 /**
1077 * @brief Check if rising edge trigger is enabled for Lines in range 0 to 31
1078 * @rmtoll RTSR1 RTx LL_EXTI_IsEnabledRisingTrig_0_31
1079 * @param ExtiLine This parameter can be a combination of the following values:
1080 * @arg @ref LL_EXTI_LINE_0
1081 * @arg @ref LL_EXTI_LINE_1
1082 * @arg @ref LL_EXTI_LINE_2
1083 * @arg @ref LL_EXTI_LINE_3
1084 * @arg @ref LL_EXTI_LINE_4
1085 * @arg @ref LL_EXTI_LINE_5
1086 * @arg @ref LL_EXTI_LINE_6
1087 * @arg @ref LL_EXTI_LINE_7
1088 * @arg @ref LL_EXTI_LINE_8
1089 * @arg @ref LL_EXTI_LINE_9
1090 * @arg @ref LL_EXTI_LINE_10
1091 * @arg @ref LL_EXTI_LINE_11
1092 * @arg @ref LL_EXTI_LINE_12
1093 * @arg @ref LL_EXTI_LINE_13
1094 * @arg @ref LL_EXTI_LINE_14
1095 * @arg @ref LL_EXTI_LINE_15
1096 * @arg @ref LL_EXTI_LINE_16
1097 * @arg @ref LL_EXTI_LINE_17
1098 * @arg @ref LL_EXTI_LINE_18
1099 * @arg @ref LL_EXTI_LINE_19
1100 * @arg @ref LL_EXTI_LINE_20
1101 * @arg @ref LL_EXTI_LINE_21
1102 * @arg @ref LL_EXTI_LINE_31
1103 * @retval State of bit (1 or 0).
1104 */
LL_EXTI_IsEnabledRisingTrig_0_31(uint32_t ExtiLine)1105 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_0_31(uint32_t ExtiLine)
1106 {
1107 return ((READ_BIT(EXTI->RTSR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1108 }
1109
1110 /**
1111 * @brief Check if rising edge trigger is enabled for Lines in range 32 to 63
1112 * @rmtoll RTSR2 RTx LL_EXTI_IsEnabledRisingTrig_32_63
1113 * @param ExtiLine This parameter can be a combination of the following values:
1114 * @arg @ref LL_EXTI_LINE_33
1115 * @arg @ref LL_EXTI_LINE_40
1116 * @arg @ref LL_EXTI_LINE_41
1117 * @retval State of bit (1 or 0).
1118 */
LL_EXTI_IsEnabledRisingTrig_32_63(uint32_t ExtiLine)1119 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_32_63(uint32_t ExtiLine)
1120 {
1121 return ((READ_BIT(EXTI->RTSR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1122 }
1123
1124 /**
1125 * @}
1126 */
1127
1128 /** @defgroup EXTI_LL_EF_Falling_Trigger_Management Falling_Trigger_Management
1129 * @{
1130 */
1131
1132 /**
1133 * @brief Enable ExtiLine Falling Edge Trigger for Lines in range 0 to 31
1134 * @note The configurable wakeup lines are edge-triggered. No glitch must be
1135 * generated on these lines. If a falling edge on a configurable interrupt
1136 * line occurs during a write operation in the EXTI_FTSR register, the
1137 * pending bit is not set.
1138 * Rising and falling edge triggers can be set for
1139 * the same interrupt line. In this case, both generate a trigger
1140 * condition.
1141 * @rmtoll FTSR1 FTx LL_EXTI_EnableFallingTrig_0_31
1142 * @param ExtiLine This parameter can be a combination of the following values:
1143 * @arg @ref LL_EXTI_LINE_0
1144 * @arg @ref LL_EXTI_LINE_1
1145 * @arg @ref LL_EXTI_LINE_2
1146 * @arg @ref LL_EXTI_LINE_3
1147 * @arg @ref LL_EXTI_LINE_4
1148 * @arg @ref LL_EXTI_LINE_5
1149 * @arg @ref LL_EXTI_LINE_6
1150 * @arg @ref LL_EXTI_LINE_7
1151 * @arg @ref LL_EXTI_LINE_8
1152 * @arg @ref LL_EXTI_LINE_9
1153 * @arg @ref LL_EXTI_LINE_10
1154 * @arg @ref LL_EXTI_LINE_11
1155 * @arg @ref LL_EXTI_LINE_12
1156 * @arg @ref LL_EXTI_LINE_13
1157 * @arg @ref LL_EXTI_LINE_14
1158 * @arg @ref LL_EXTI_LINE_15
1159 * @arg @ref LL_EXTI_LINE_16
1160 * @arg @ref LL_EXTI_LINE_17
1161 * @arg @ref LL_EXTI_LINE_18
1162 * @arg @ref LL_EXTI_LINE_19
1163 * @arg @ref LL_EXTI_LINE_20
1164 * @arg @ref LL_EXTI_LINE_21
1165 * @arg @ref LL_EXTI_LINE_31
1166 * @note Please check each device line mapping for EXTI Line availability
1167 * @retval None
1168 */
LL_EXTI_EnableFallingTrig_0_31(uint32_t ExtiLine)1169 __STATIC_INLINE void LL_EXTI_EnableFallingTrig_0_31(uint32_t ExtiLine)
1170 {
1171 SET_BIT(EXTI->FTSR1, ExtiLine);
1172 }
1173
1174 /**
1175 * @brief Enable ExtiLine Falling Edge Trigger for Lines in range 32 to 63
1176 * @note The configurable wakeup lines are edge-triggered. No glitch must be
1177 * generated on these lines. If a Falling edge on a configurable interrupt
1178 * line occurs during a write operation in the EXTI_FTSR register, the
1179 * pending bit is not set.
1180 * Rising and falling edge triggers can be set for
1181 * the same interrupt line. In this case, both generate a trigger
1182 * condition.
1183 * @rmtoll FTSR2 FTx LL_EXTI_EnableFallingTrig_32_63
1184 * @param ExtiLine This parameter can be a combination of the following values:
1185 * @arg @ref LL_EXTI_LINE_33
1186 * @arg @ref LL_EXTI_LINE_40
1187 * @arg @ref LL_EXTI_LINE_41
1188 * @retval None
1189 */
LL_EXTI_EnableFallingTrig_32_63(uint32_t ExtiLine)1190 __STATIC_INLINE void LL_EXTI_EnableFallingTrig_32_63(uint32_t ExtiLine)
1191 {
1192 SET_BIT(EXTI->FTSR2, ExtiLine);
1193 }
1194
1195 /**
1196 * @brief Disable ExtiLine Falling Edge Trigger for Lines in range 0 to 31
1197 * @note The configurable wakeup lines are edge-triggered. No glitch must be
1198 * generated on these lines. If a Falling edge on a configurable interrupt
1199 * line occurs during a write operation in the EXTI_FTSR register, the
1200 * pending bit is not set.
1201 * Rising and falling edge triggers can be set for the same interrupt line.
1202 * In this case, both generate a trigger condition.
1203 * @rmtoll FTSR1 FTx LL_EXTI_DisableFallingTrig_0_31
1204 * @param ExtiLine This parameter can be a combination of the following values:
1205 * @arg @ref LL_EXTI_LINE_0
1206 * @arg @ref LL_EXTI_LINE_1
1207 * @arg @ref LL_EXTI_LINE_2
1208 * @arg @ref LL_EXTI_LINE_3
1209 * @arg @ref LL_EXTI_LINE_4
1210 * @arg @ref LL_EXTI_LINE_5
1211 * @arg @ref LL_EXTI_LINE_6
1212 * @arg @ref LL_EXTI_LINE_7
1213 * @arg @ref LL_EXTI_LINE_8
1214 * @arg @ref LL_EXTI_LINE_9
1215 * @arg @ref LL_EXTI_LINE_10
1216 * @arg @ref LL_EXTI_LINE_11
1217 * @arg @ref LL_EXTI_LINE_12
1218 * @arg @ref LL_EXTI_LINE_13
1219 * @arg @ref LL_EXTI_LINE_14
1220 * @arg @ref LL_EXTI_LINE_15
1221 * @arg @ref LL_EXTI_LINE_16
1222 * @arg @ref LL_EXTI_LINE_17
1223 * @arg @ref LL_EXTI_LINE_18
1224 * @arg @ref LL_EXTI_LINE_19
1225 * @arg @ref LL_EXTI_LINE_20
1226 * @arg @ref LL_EXTI_LINE_21
1227 * @arg @ref LL_EXTI_LINE_31
1228 * @note Please check each device line mapping for EXTI Line availability
1229 * @retval None
1230 */
LL_EXTI_DisableFallingTrig_0_31(uint32_t ExtiLine)1231 __STATIC_INLINE void LL_EXTI_DisableFallingTrig_0_31(uint32_t ExtiLine)
1232 {
1233 CLEAR_BIT(EXTI->FTSR1, ExtiLine);
1234 }
1235
1236 /**
1237 * @brief Disable ExtiLine Falling Edge Trigger for Lines in range 32 to 63
1238 * @note The configurable wakeup lines are edge-triggered. No glitch must be
1239 * generated on these lines. If a Falling edge on a configurable interrupt
1240 * line occurs during a write operation in the EXTI_FTSR register, the
1241 * pending bit is not set.
1242 * Rising and falling edge triggers can be set for the same interrupt line.
1243 * In this case, both generate a trigger condition.
1244 * @rmtoll FTSR2 FTx LL_EXTI_DisableFallingTrig_32_63
1245 * @param ExtiLine This parameter can be a combination of the following values:
1246 * @arg @ref LL_EXTI_LINE_33
1247 * @arg @ref LL_EXTI_LINE_40
1248 * @arg @ref LL_EXTI_LINE_41
1249 * @retval None
1250 */
LL_EXTI_DisableFallingTrig_32_63(uint32_t ExtiLine)1251 __STATIC_INLINE void LL_EXTI_DisableFallingTrig_32_63(uint32_t ExtiLine)
1252 {
1253 CLEAR_BIT(EXTI->FTSR2, ExtiLine);
1254 }
1255
1256 /**
1257 * @brief Check if falling edge trigger is enabled for Lines in range 0 to 31
1258 * @rmtoll FTSR1 FTx LL_EXTI_IsEnabledFallingTrig_0_31
1259 * @param ExtiLine This parameter can be a combination of the following values:
1260 * @arg @ref LL_EXTI_LINE_0
1261 * @arg @ref LL_EXTI_LINE_1
1262 * @arg @ref LL_EXTI_LINE_2
1263 * @arg @ref LL_EXTI_LINE_3
1264 * @arg @ref LL_EXTI_LINE_4
1265 * @arg @ref LL_EXTI_LINE_5
1266 * @arg @ref LL_EXTI_LINE_6
1267 * @arg @ref LL_EXTI_LINE_7
1268 * @arg @ref LL_EXTI_LINE_8
1269 * @arg @ref LL_EXTI_LINE_9
1270 * @arg @ref LL_EXTI_LINE_10
1271 * @arg @ref LL_EXTI_LINE_11
1272 * @arg @ref LL_EXTI_LINE_12
1273 * @arg @ref LL_EXTI_LINE_13
1274 * @arg @ref LL_EXTI_LINE_14
1275 * @arg @ref LL_EXTI_LINE_15
1276 * @arg @ref LL_EXTI_LINE_16
1277 * @arg @ref LL_EXTI_LINE_17
1278 * @arg @ref LL_EXTI_LINE_18
1279 * @arg @ref LL_EXTI_LINE_19
1280 * @arg @ref LL_EXTI_LINE_20
1281 * @arg @ref LL_EXTI_LINE_21
1282 * @arg @ref LL_EXTI_LINE_31
1283 * @note Please check each device line mapping for EXTI Line availability
1284 * @retval State of bit (1 or 0).
1285 */
LL_EXTI_IsEnabledFallingTrig_0_31(uint32_t ExtiLine)1286 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_0_31(uint32_t ExtiLine)
1287 {
1288 return ((READ_BIT(EXTI->FTSR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1289 }
1290
1291 /**
1292 * @brief Check if falling edge trigger is enabled for Lines in range 32 to 63
1293 * @rmtoll FTSR2 FTx LL_EXTI_IsEnabledFallingTrig_32_63
1294 * @param ExtiLine This parameter can be a combination of the following values:
1295 * @arg @ref LL_EXTI_LINE_33
1296 * @arg @ref LL_EXTI_LINE_40
1297 * @arg @ref LL_EXTI_LINE_41
1298 * @retval State of bit (1 or 0).
1299 */
LL_EXTI_IsEnabledFallingTrig_32_63(uint32_t ExtiLine)1300 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_32_63(uint32_t ExtiLine)
1301 {
1302 return ((READ_BIT(EXTI->FTSR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1303 }
1304
1305 /**
1306 * @}
1307 */
1308
1309 /** @defgroup EXTI_LL_EF_Software_Interrupt_Management Software_Interrupt_Management
1310 * @{
1311 */
1312
1313 /**
1314 * @brief Generate a software Interrupt Event for Lines in range 0 to 31
1315 * @note If the interrupt is enabled on this line in the EXTI_IMR1, writing a 1 to
1316 * this bit when it is at '0' sets the corresponding pending bit in EXTI_PR1
1317 * resulting in an interrupt request generation.
1318 * This bit is cleared by clearing the corresponding bit in the EXTI_PR1
1319 * register (by writing a 1 into the bit)
1320 * @rmtoll SWIER1 SWIx LL_EXTI_GenerateSWI_0_31
1321 * @param ExtiLine This parameter can be a combination of the following values:
1322 * @arg @ref LL_EXTI_LINE_0
1323 * @arg @ref LL_EXTI_LINE_1
1324 * @arg @ref LL_EXTI_LINE_2
1325 * @arg @ref LL_EXTI_LINE_3
1326 * @arg @ref LL_EXTI_LINE_4
1327 * @arg @ref LL_EXTI_LINE_5
1328 * @arg @ref LL_EXTI_LINE_6
1329 * @arg @ref LL_EXTI_LINE_7
1330 * @arg @ref LL_EXTI_LINE_8
1331 * @arg @ref LL_EXTI_LINE_9
1332 * @arg @ref LL_EXTI_LINE_10
1333 * @arg @ref LL_EXTI_LINE_11
1334 * @arg @ref LL_EXTI_LINE_12
1335 * @arg @ref LL_EXTI_LINE_13
1336 * @arg @ref LL_EXTI_LINE_14
1337 * @arg @ref LL_EXTI_LINE_15
1338 * @arg @ref LL_EXTI_LINE_16
1339 * @arg @ref LL_EXTI_LINE_17
1340 * @arg @ref LL_EXTI_LINE_18
1341 * @arg @ref LL_EXTI_LINE_19
1342 * @arg @ref LL_EXTI_LINE_20
1343 * @arg @ref LL_EXTI_LINE_21
1344 * @arg @ref LL_EXTI_LINE_31
1345 * @note Please check each device line mapping for EXTI Line availability
1346 * @retval None
1347 */
LL_EXTI_GenerateSWI_0_31(uint32_t ExtiLine)1348 __STATIC_INLINE void LL_EXTI_GenerateSWI_0_31(uint32_t ExtiLine)
1349 {
1350 SET_BIT(EXTI->SWIER1, ExtiLine);
1351 }
1352
1353 /**
1354 * @brief Generate a software Interrupt Event for Lines in range 32 to 63
1355 * @note If the interrupt is enabled on this line inthe EXTI_IMR2, writing a 1 to
1356 * this bit when it is at '0' sets the corresponding pending bit in EXTI_PR2
1357 * resulting in an interrupt request generation.
1358 * This bit is cleared by clearing the corresponding bit in the EXTI_PR2
1359 * register (by writing a 1 into the bit)
1360 * @rmtoll SWIER2 SWIx LL_EXTI_GenerateSWI_32_63
1361 * @param ExtiLine This parameter can be a combination of the following values:
1362 * @arg @ref LL_EXTI_LINE_33
1363 * @arg @ref LL_EXTI_LINE_40
1364 * @arg @ref LL_EXTI_LINE_41
1365 * @retval None
1366 */
LL_EXTI_GenerateSWI_32_63(uint32_t ExtiLine)1367 __STATIC_INLINE void LL_EXTI_GenerateSWI_32_63(uint32_t ExtiLine)
1368 {
1369 SET_BIT(EXTI->SWIER2, ExtiLine);
1370 }
1371
1372 /**
1373 * @}
1374 */
1375
1376 /** @defgroup EXTI_LL_EF_Flag_Management Flag_Management
1377 * @{
1378 */
1379
1380 /**
1381 * @brief Check if the ExtLine Flag is set or not for Lines in range 0 to 31
1382 * @note This bit is set when the selected edge event arrives on the interrupt
1383 * line. This bit is cleared by writing a 1 to the bit.
1384 * @rmtoll PR1 PIFx LL_EXTI_IsActiveFlag_0_31
1385 * @param ExtiLine This parameter can be a combination of the following values:
1386 * @arg @ref LL_EXTI_LINE_0
1387 * @arg @ref LL_EXTI_LINE_1
1388 * @arg @ref LL_EXTI_LINE_2
1389 * @arg @ref LL_EXTI_LINE_3
1390 * @arg @ref LL_EXTI_LINE_4
1391 * @arg @ref LL_EXTI_LINE_5
1392 * @arg @ref LL_EXTI_LINE_6
1393 * @arg @ref LL_EXTI_LINE_7
1394 * @arg @ref LL_EXTI_LINE_8
1395 * @arg @ref LL_EXTI_LINE_9
1396 * @arg @ref LL_EXTI_LINE_10
1397 * @arg @ref LL_EXTI_LINE_11
1398 * @arg @ref LL_EXTI_LINE_12
1399 * @arg @ref LL_EXTI_LINE_13
1400 * @arg @ref LL_EXTI_LINE_14
1401 * @arg @ref LL_EXTI_LINE_15
1402 * @arg @ref LL_EXTI_LINE_16
1403 * @arg @ref LL_EXTI_LINE_17
1404 * @arg @ref LL_EXTI_LINE_18
1405 * @arg @ref LL_EXTI_LINE_19
1406 * @arg @ref LL_EXTI_LINE_20
1407 * @arg @ref LL_EXTI_LINE_21
1408 * @arg @ref LL_EXTI_LINE_31
1409 * @retval State of bit (1 or 0).
1410 */
LL_EXTI_IsActiveFlag_0_31(uint32_t ExtiLine)1411 __STATIC_INLINE uint32_t LL_EXTI_IsActiveFlag_0_31(uint32_t ExtiLine)
1412 {
1413 return ((READ_BIT(EXTI->PR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1414 }
1415
1416 /**
1417 * @brief Check if the ExtLine Flag is set or not for Lines in range 32 to 63
1418 * @note This bit is set when the selected edge event arrives on the interrupt
1419 * line. This bit is cleared by writing a 1 to the bit.
1420 * @rmtoll PR2 PIFx LL_EXTI_IsActiveFlag_32_63
1421 * @param ExtiLine This parameter can be a combination of the following values:
1422 * @arg @ref LL_EXTI_LINE_33
1423 * @arg @ref LL_EXTI_LINE_40
1424 * @arg @ref LL_EXTI_LINE_41
1425 * @retval State of bit (1 or 0).
1426 */
LL_EXTI_IsActiveFlag_32_63(uint32_t ExtiLine)1427 __STATIC_INLINE uint32_t LL_EXTI_IsActiveFlag_32_63(uint32_t ExtiLine)
1428 {
1429 return ((READ_BIT(EXTI->PR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1430 }
1431
1432 /**
1433 * @brief Read ExtLine Combination Flag for Lines in range 0 to 31
1434 * @note This bit is set when the selected edge event arrives on the interrupt
1435 * line. This bit is cleared by writing a 1 to the bit.
1436 * @rmtoll PR1 PIFx LL_EXTI_ReadFlag_0_31
1437 * @param ExtiLine This parameter can be a combination of the following values:
1438 * @arg @ref LL_EXTI_LINE_0
1439 * @arg @ref LL_EXTI_LINE_1
1440 * @arg @ref LL_EXTI_LINE_2
1441 * @arg @ref LL_EXTI_LINE_3
1442 * @arg @ref LL_EXTI_LINE_4
1443 * @arg @ref LL_EXTI_LINE_5
1444 * @arg @ref LL_EXTI_LINE_6
1445 * @arg @ref LL_EXTI_LINE_7
1446 * @arg @ref LL_EXTI_LINE_8
1447 * @arg @ref LL_EXTI_LINE_9
1448 * @arg @ref LL_EXTI_LINE_10
1449 * @arg @ref LL_EXTI_LINE_11
1450 * @arg @ref LL_EXTI_LINE_12
1451 * @arg @ref LL_EXTI_LINE_13
1452 * @arg @ref LL_EXTI_LINE_14
1453 * @arg @ref LL_EXTI_LINE_15
1454 * @arg @ref LL_EXTI_LINE_16
1455 * @arg @ref LL_EXTI_LINE_17
1456 * @arg @ref LL_EXTI_LINE_18
1457 * @arg @ref LL_EXTI_LINE_19
1458 * @arg @ref LL_EXTI_LINE_20
1459 * @arg @ref LL_EXTI_LINE_21
1460 * @arg @ref LL_EXTI_LINE_31
1461 * @retval @note This bit is set when the selected edge event arrives on the interrupt
1462 */
LL_EXTI_ReadFlag_0_31(uint32_t ExtiLine)1463 __STATIC_INLINE uint32_t LL_EXTI_ReadFlag_0_31(uint32_t ExtiLine)
1464 {
1465 return (uint32_t)(READ_BIT(EXTI->PR1, ExtiLine));
1466 }
1467
1468 /**
1469 * @brief Read ExtLine Combination Flag for Lines in range 32 to 63
1470 * @note This bit is set when the selected edge event arrives on the interrupt
1471 * line. This bit is cleared by writing a 1 to the bit.
1472 * @rmtoll PR2 PIFx LL_EXTI_ReadFlag_32_63
1473 * @param ExtiLine This parameter can be a combination of the following values:
1474 * @arg @ref LL_EXTI_LINE_33
1475 * @arg @ref LL_EXTI_LINE_40
1476 * @arg @ref LL_EXTI_LINE_41
1477 * @retval @note This bit is set when the selected edge event arrives on the interrupt
1478 */
LL_EXTI_ReadFlag_32_63(uint32_t ExtiLine)1479 __STATIC_INLINE uint32_t LL_EXTI_ReadFlag_32_63(uint32_t ExtiLine)
1480 {
1481 return (uint32_t)(READ_BIT(EXTI->PR2, ExtiLine));
1482 }
1483
1484 /**
1485 * @brief Clear ExtLine Flags for Lines in range 0 to 31
1486 * @note This bit is set when the selected edge event arrives on the interrupt
1487 * line. This bit is cleared by writing a 1 to the bit.
1488 * @rmtoll PR1 PIFx LL_EXTI_ClearFlag_0_31
1489 * @param ExtiLine This parameter can be a combination of the following values:
1490 * @arg @ref LL_EXTI_LINE_0
1491 * @arg @ref LL_EXTI_LINE_1
1492 * @arg @ref LL_EXTI_LINE_2
1493 * @arg @ref LL_EXTI_LINE_3
1494 * @arg @ref LL_EXTI_LINE_4
1495 * @arg @ref LL_EXTI_LINE_5
1496 * @arg @ref LL_EXTI_LINE_6
1497 * @arg @ref LL_EXTI_LINE_7
1498 * @arg @ref LL_EXTI_LINE_8
1499 * @arg @ref LL_EXTI_LINE_9
1500 * @arg @ref LL_EXTI_LINE_10
1501 * @arg @ref LL_EXTI_LINE_11
1502 * @arg @ref LL_EXTI_LINE_12
1503 * @arg @ref LL_EXTI_LINE_13
1504 * @arg @ref LL_EXTI_LINE_14
1505 * @arg @ref LL_EXTI_LINE_15
1506 * @arg @ref LL_EXTI_LINE_16
1507 * @arg @ref LL_EXTI_LINE_17
1508 * @arg @ref LL_EXTI_LINE_18
1509 * @arg @ref LL_EXTI_LINE_19
1510 * @arg @ref LL_EXTI_LINE_20
1511 * @arg @ref LL_EXTI_LINE_21
1512 * @arg @ref LL_EXTI_LINE_31
1513 * @retval None
1514 */
LL_EXTI_ClearFlag_0_31(uint32_t ExtiLine)1515 __STATIC_INLINE void LL_EXTI_ClearFlag_0_31(uint32_t ExtiLine)
1516 {
1517 WRITE_REG(EXTI->PR1, ExtiLine);
1518 }
1519
1520 /**
1521 * @brief Clear ExtLine Flags for Lines in range 32 to 63
1522 * @note This bit is set when the selected edge event arrives on the interrupt
1523 * line. This bit is cleared by writing a 1 to the bit.
1524 * @rmtoll PR2 PIFx LL_EXTI_ClearFlag_32_63
1525 * @param ExtiLine This parameter can be a combination of the following values:
1526 * @arg @ref LL_EXTI_LINE_33
1527 * @arg @ref LL_EXTI_LINE_40
1528 * @arg @ref LL_EXTI_LINE_41
1529 * @retval None
1530 */
LL_EXTI_ClearFlag_32_63(uint32_t ExtiLine)1531 __STATIC_INLINE void LL_EXTI_ClearFlag_32_63(uint32_t ExtiLine)
1532 {
1533 WRITE_REG(EXTI->PR2, ExtiLine);
1534 }
1535
1536 /**
1537 * @}
1538 */
1539
1540 #if defined(USE_FULL_LL_DRIVER)
1541 /** @defgroup EXTI_LL_EF_Init Initialization and de-initialization functions
1542 * @{
1543 */
1544
1545 ErrorStatus LL_EXTI_Init(LL_EXTI_InitTypeDef *EXTI_InitStruct);
1546 ErrorStatus LL_EXTI_DeInit(void);
1547 void LL_EXTI_StructInit(LL_EXTI_InitTypeDef *EXTI_InitStruct);
1548
1549
1550 /**
1551 * @}
1552 */
1553 #endif /* USE_FULL_LL_DRIVER */
1554
1555 /**
1556 * @}
1557 */
1558
1559 /**
1560 * @}
1561 */
1562
1563 #endif /* EXTI */
1564
1565 /**
1566 * @}
1567 */
1568
1569 #ifdef __cplusplus
1570 }
1571 #endif
1572
1573 #endif /* STM32WBxx_LL_EXTI_H */
1574
1575 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
1576