1 /** 2 ****************************************************************************** 3 * @file stm32wbxx_hal_pwr.h 4 * @author MCD Application Team 5 * @brief Header file of PWR HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * <h2><center>© Copyright (c) 2019 STMicroelectronics. 10 * All rights reserved.</center></h2> 11 * 12 * This software component is licensed by ST under BSD 3-Clause license, 13 * the "License"; You may not use this file except in compliance with the 14 * License. You may obtain a copy of the License at: 15 * opensource.org/licenses/BSD-3-Clause 16 * 17 ****************************************************************************** 18 */ 19 20 /* Define to prevent recursive inclusion -------------------------------------*/ 21 #ifndef STM32WBxx_HAL_PWR_H 22 #define STM32WBxx_HAL_PWR_H 23 24 #ifdef __cplusplus 25 extern "C" { 26 #endif 27 28 /* Includes ------------------------------------------------------------------*/ 29 #include "stm32wbxx_hal_def.h" 30 31 /* Include low level driver */ 32 #include "stm32wbxx_ll_pwr.h" 33 #include "stm32wbxx_ll_exti.h" 34 35 /** @addtogroup STM32WBxx_HAL_Driver 36 * @{ 37 */ 38 39 /** @defgroup PWR PWR 40 * @brief PWR HAL module driver 41 * @{ 42 */ 43 44 /* Exported types ------------------------------------------------------------*/ 45 /** @defgroup PWR_Exported_Types PWR Exported Types 46 * @{ 47 */ 48 49 /** 50 * @brief PWR PVD configuration structure definition 51 */ 52 typedef struct 53 { 54 uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level. 55 This parameter can be a value of @ref PWR_PVD_detection_level. */ 56 57 uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins. 58 This parameter can be a value of @ref PWR_PVD_Mode. */ 59 }PWR_PVDTypeDef; 60 61 /** 62 * @} 63 */ 64 65 /* Exported constants --------------------------------------------------------*/ 66 /** @defgroup PWR_Exported_Constants PWR Exported Constants 67 * @{ 68 */ 69 70 /** @defgroup PWR_PVD_detection_level Power Voltage Detector Level selection 71 * @note Refer datasheet for selection voltage value 72 * @{ 73 */ 74 #define PWR_PVDLEVEL_0 (0x00000000U) /*!< PVD threshold around 2.0 V */ 75 #define PWR_PVDLEVEL_1 ( PWR_CR2_PLS_0) /*!< PVD threshold around 2.2 V */ 76 #define PWR_PVDLEVEL_2 ( PWR_CR2_PLS_1 ) /*!< PVD threshold around 2.4 V */ 77 #define PWR_PVDLEVEL_3 ( PWR_CR2_PLS_1 | PWR_CR2_PLS_0) /*!< PVD threshold around 2.5 V */ 78 #define PWR_PVDLEVEL_4 (PWR_CR2_PLS_2 ) /*!< PVD threshold around 2.6 V */ 79 #define PWR_PVDLEVEL_5 (PWR_CR2_PLS_2 | PWR_CR2_PLS_0) /*!< PVD threshold around 2.8 V */ 80 #define PWR_PVDLEVEL_6 (PWR_CR2_PLS_2 | PWR_CR2_PLS_1 ) /*!< PVD threshold around 2.9 V */ 81 #define PWR_PVDLEVEL_7 (PWR_CR2_PLS_2 | PWR_CR2_PLS_1 | PWR_CR2_PLS_0) /*!< External input analog voltage (compared internally to VREFINT) */ 82 /** 83 * @} 84 */ 85 86 /** @defgroup PWR_PVD_Mode PWR PVD interrupt and event mode 87 * @{ 88 */ 89 /* Note: On STM32WB serie, power PVD event is not available on AIEC lines */ 90 /* (only interruption is available through AIEC line 16). */ 91 #define PWR_PVD_MODE_NORMAL (0x00000000U) /*!< Basic mode is used */ 92 93 #define PWR_PVD_MODE_IT_RISING (PVD_MODE_IT | PVD_RISING_EDGE) /*!< External Interrupt Mode with Rising edge trigger detection */ 94 #define PWR_PVD_MODE_IT_FALLING (PVD_MODE_IT | PVD_FALLING_EDGE) /*!< External Interrupt Mode with Falling edge trigger detection */ 95 #define PWR_PVD_MODE_IT_RISING_FALLING (PVD_MODE_IT | PVD_RISING_FALLING_EDGE) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */ 96 /** 97 * @} 98 */ 99 100 /* Note: On STM32WB serie, power PVD event is not available on AIEC lines */ 101 /* (only interruption is available through AIEC line 16). */ 102 103 /** @defgroup PWR_Low_Power_Mode_Selection PWR Low Power Mode Selection 104 * @{ 105 */ 106 #define PWR_LOWPOWERMODE_STOP0 (0x00000000u) /*!< Stop 0: stop mode with main regulator */ 107 #define PWR_LOWPOWERMODE_STOP1 (PWR_CR1_LPMS_0) /*!< Stop 1: stop mode with low power regulator */ 108 #define PWR_LOWPOWERMODE_STOP2 (PWR_CR1_LPMS_1) /*!< Stop 2: stop mode with low power regulator and VDD12I interruptible digital core domain supply OFF (less peripherals activated than low power mode stop 1 to reduce power consumption)*/ 109 #define PWR_LOWPOWERMODE_STANDBY (PWR_CR1_LPMS_0 | PWR_CR1_LPMS_1) /*!< Standby mode */ 110 #define PWR_LOWPOWERMODE_SHUTDOWN (PWR_CR1_LPMS_2) /*!< Shutdown mode */ 111 /** 112 * @} 113 */ 114 115 /** @defgroup PWR_Regulator_state_in_SLEEP_STOP_mode PWR regulator mode 116 * @{ 117 */ 118 #define PWR_MAINREGULATOR_ON (0x00000000U) /*!< Regulator in main mode */ 119 #define PWR_LOWPOWERREGULATOR_ON (PWR_CR1_LPR) /*!< Regulator in low-power mode */ 120 /** 121 * @} 122 */ 123 124 /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry 125 * @{ 126 */ 127 #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01) /*!< Wait For Interruption instruction to enter Sleep mode */ 128 #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02) /*!< Wait For Event instruction to enter Sleep mode */ 129 /** 130 * @} 131 */ 132 133 /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry 134 * @{ 135 */ 136 #define PWR_STOPENTRY_WFI ((uint8_t)0x01) /*!< Wait For Interruption instruction to enter Stop mode */ 137 #define PWR_STOPENTRY_WFE ((uint8_t)0x02) /*!< Wait For Event instruction to enter Stop mode */ 138 /** 139 * @} 140 */ 141 142 /** 143 * @} 144 */ 145 146 /* Private define ------------------------------------------------------------*/ 147 /** @defgroup PWR_Private_Defines PWR Private Defines 148 * @{ 149 */ 150 151 /** @defgroup PWR_PVD_EXTI_LINE PWR PVD external interrupt line 152 * @{ 153 */ 154 #define PWR_EXTI_LINE_PVD (LL_EXTI_LINE_16) /*!< External interrupt line 16 Connected to the PWR PVD */ 155 /** 156 * @} 157 */ 158 159 /** @defgroup PWR_PVD_Mode_Mask PWR PVD Mode Mask 160 * @{ 161 */ 162 /* Note: On STM32WB serie, power PVD event is not available on AIEC lines */ 163 /* (only interruption is available through AIEC line 16). */ 164 #define PVD_MODE_IT (0x00010000U) /*!< Mask for interruption yielded by PVD threshold crossing */ 165 #define PVD_RISING_EDGE (0x00000001U) /*!< Mask for rising edge set as PVD trigger */ 166 #define PVD_FALLING_EDGE (0x00000002U) /*!< Mask for falling edge set as PVD trigger */ 167 #define PVD_RISING_FALLING_EDGE (0x00000003U) /*!< Mask for rising and falling edges set as PVD trigger */ 168 /** 169 * @} 170 */ 171 172 /** 173 * @} 174 */ 175 176 /* Exported macros -----------------------------------------------------------*/ 177 /** @defgroup PWR_Exported_Macros PWR Exported Macros 178 * @{ 179 */ 180 /** @brief Check whether or not a specific PWR flag is set. 181 * @param __FLAG__ specifies the flag to check. 182 * This parameter can be one of the following values: 183 * 184 * /--------------------------------SR1-------------------------------/ 185 * @arg @ref PWR_FLAG_WUF1 Wake Up Flag 1. Indicates that a wakeup event 186 * was received from the WKUP pin 1. 187 * @arg @ref PWR_FLAG_WUF2 Wake Up Flag 2. Indicates that a wakeup event 188 * was received from the WKUP pin 2. 189 * @arg @ref PWR_FLAG_WUF3 Wake Up Flag 3. Indicates that a wakeup event 190 * was received from the WKUP pin 3. 191 * @arg @ref PWR_FLAG_WUF4 Wake Up Flag 4. Indicates that a wakeup event 192 * was received from the WKUP pin 4. 193 * @arg @ref PWR_FLAG_WUF5 Wake Up Flag 5. Indicates that a wakeup event 194 * was received from the WKUP pin 5. 195 * 196 * @arg @ref PWR_FLAG_BHWF BLE_Host WakeUp Flag 197 * @arg @ref PWR_FLAG_FRCBYPI SMPS Forced in Bypass Interrupt Flag 198 * @arg @ref PWR_FLAG_RFPHASEI Radio Phase Interrupt Flag 199 * @arg @ref PWR_FLAG_BLEACTI BLE Activity Interrupt Flag 200 * @arg @ref PWR_FLAG_802ACTI 802.15.4 Activity Interrupt Flag 201 * @arg @ref PWR_FLAG_HOLDC2I CPU2 on-Hold Interrupt Flag 202 * @arg @ref PWR_FLAG_WUFI Wake-Up Flag Internal. Set when a wakeup is detected on 203 * the internal wakeup line. 204 * 205 * @arg @ref PWR_FLAG_SMPSRDYF SMPS Ready Flag 206 * @arg @ref PWR_FLAG_SMPSBYPF SMPS Bypass Flag 207 * 208 * /--------------------------------SR2-------------------------------/ 209 * @arg @ref PWR_FLAG_REGLPS Low Power Regulator Started. Indicates whether or not the 210 * low-power regulator is ready. 211 * @arg @ref PWR_FLAG_REGLPF Low Power Regulator Flag. Indicates whether the 212 * regulator is ready in main mode or is in low-power mode. 213 * 214 * @arg @ref PWR_FLAG_VOSF Voltage Scaling Flag. Indicates whether the regulator is ready 215 * in the selected voltage range or is still changing to the required voltage level. 216 * @arg @ref PWR_FLAG_PVDO Power Voltage Detector Output. Indicates whether VDD voltage is 217 * below or above the selected PVD threshold. 218 * 219 * @arg @ref PWR_FLAG_PVMO1 Peripheral Voltage Monitoring Output 1. Indicates whether VDDUSB voltage is 220 * is below or above PVM1 threshold (applicable when USB feature is supported). 221 * @arg @ref PWR_FLAG_PVMO3 Peripheral Voltage Monitoring Output 3. Indicates whether VDDA voltage is 222 * is below or above PVM3 threshold. 223 * 224 * /----------------------------EXTSCR--------------------------/ 225 * @arg @ref PWR_FLAG_STOP System Stop Flag for CPU1. 226 * @arg @ref PWR_FLAG_SB System Standby Flag for CPU1. 227 * 228 * @arg @ref PWR_FLAG_C2STOP System Stop Flag for CPU2. 229 * @arg @ref PWR_FLAG_C2SB System Standby Flag for CPU2. 230 * 231 * @arg @ref PWR_FLAG_CRITICAL_RF_PHASE Critical radio system phase flag. 232 * 233 * @arg @ref PWR_FLAG_C1DEEPSLEEP CPU1 DeepSleep Flag. 234 * @arg @ref PWR_FLAG_C2DEEPSLEEP CPU2 DeepSleep Flag. 235 * 236 * @retval The new state of __FLAG__ (TRUE or FALSE). 237 */ 238 #define __HAL_PWR_GET_FLAG(__FLAG__) ( ((((uint8_t)(__FLAG__)) >> 5U) == 1U) ?\ 239 (PWR->SR1 & (1U << ((__FLAG__) & 31U))) :\ 240 ((((((uint8_t)(__FLAG__)) >> 5U) == 2U)) ?\ 241 (PWR->SR2 & (1U << ((__FLAG__) & 31U))) :\ 242 (PWR->EXTSCR & (1U << ((__FLAG__) & 31U))) ) ) 243 244 245 /** @brief Clear a specific PWR flag. 246 * @note Clearing of flags {PWR_FLAG_STOP, PWR_FLAG_SB} 247 * and flags {PWR_FLAG_C2STOP, PWR_FLAG_C2SB} are grouped: 248 * clearing of one flag also clears the other one. 249 * @param __FLAG__ specifies the flag to clear. 250 * This parameter can be one of the following values: 251 * 252 * /--------------------------------SCR (SRR)------------------------------/ 253 * @arg @ref PWR_FLAG_WUF1 Wake Up Flag 1. Indicates that a wakeup event 254 * was received from the WKUP pin 1. 255 * @arg @ref PWR_FLAG_WUF2 Wake Up Flag 2. Indicates that a wakeup event 256 * was received from the WKUP pin 2. 257 * @arg @ref PWR_FLAG_WUF3 Wake Up Flag 3. Indicates that a wakeup event 258 * was received from the WKUP pin 3. 259 * @arg @ref PWR_FLAG_WUF4 Wake Up Flag 4. Indicates that a wakeup event 260 * was received from the WKUP pin 4. 261 * @arg @ref PWR_FLAG_WUF5 Wake Up Flag 5. Indicates that a wakeup event 262 * was received from the WKUP pin 5. 263 * @arg @ref PWR_FLAG_WU Encompasses all five Wake Up Flags. 264 * 265 * @arg @ref PWR_FLAG_BHWF Clear BLE_Host Wakeup Flag. 266 * @arg @ref PWR_FLAG_FRCBYPI Clear SMPS Forced in Bypass Interrupt Flag. 267 * @arg @ref PWR_FLAG_RFPHASEI RF Phase Interrupt Clear. 268 * @arg @ref PWR_FLAG_BLEACTI BLE Activity Interrupt Clear. 269 * @arg @ref PWR_FLAG_802ACTI 802.15.4. Activity Interrupt Clear. 270 * @arg @ref PWR_FLAG_HOLDC2I CPU2 on-Hold Interrupt Clear. 271 * 272 * /----------------------------EXTSCR--------------------------/ 273 * @arg @ref PWR_FLAG_STOP System Stop Flag for CPU1. 274 * @arg @ref PWR_FLAG_SB System Standby Flag for CPU1. 275 * 276 * @arg @ref PWR_FLAG_C2STOP System Stop Flag for CPU2. 277 * @arg @ref PWR_FLAG_C2SB System Standby Flag for CPU2. 278 * 279 * @arg @ref PWR_FLAG_CRITICAL_RF_PHASE RF phase Flag. 280 * 281 * @retval None 282 */ 283 #define __HAL_PWR_CLEAR_FLAG(__FLAG__) ( ((((uint8_t)(__FLAG__)) >> 5U) == 1U) ?\ 284 ( (((uint8_t)(__FLAG__)) == PWR_FLAG_WU) ?\ 285 (PWR->SCR = (__FLAG__)) : (PWR->SCR = (1U << ((__FLAG__) & 31U))) ) :\ 286 ( (((uint8_t)(__FLAG__)) == PWR_FLAG_CRITICAL_RF_PHASE) ?\ 287 SET_BIT (PWR->EXTSCR, PWR_EXTSCR_CCRPF) : ( ((((uint8_t)((__FLAG__)) & 31U) <= PWR_EXTSCR_C1STOPF_Pos) ?\ 288 SET_BIT (PWR->EXTSCR, PWR_EXTSCR_C1CSSF): SET_BIT (PWR->EXTSCR, PWR_EXTSCR_C2CSSF)) ) )) 289 290 /** 291 * @brief Enable the PVD Extended Interrupt C1 Line. 292 * @retval None 293 */ 294 #define __HAL_PWR_PVD_EXTI_ENABLE_IT() LL_EXTI_EnableIT_0_31(PWR_EXTI_LINE_PVD) 295 296 /** 297 * @brief Enable the PVD Extended Interrupt C2 Line. 298 * @retval None 299 */ 300 #define __HAL_PWR_PVD_EXTIC2_ENABLE_IT() LL_C2_EXTI_EnableIT_0_31(PWR_EXTI_LINE_PVD) 301 302 303 /** 304 * @brief Disable the PVD Extended Interrupt C1 Line. 305 * @retval None 306 */ 307 #define __HAL_PWR_PVD_EXTI_DISABLE_IT() LL_EXTI_DisableIT_0_31(PWR_EXTI_LINE_PVD) 308 309 /** 310 * @brief Disable the PVD Extended Interrupt C2 Line. 311 * @retval None 312 */ 313 #define __HAL_PWR_PVD_EXTIC2_DISABLE_IT() LL_C2_EXTI_DisableIT_0_31(PWR_EXTI_LINE_PVD) 314 315 /* Note: On STM32WB serie, power PVD event is not available on AIEC lines */ 316 /* (only interruption is available through AIEC line 16). */ 317 318 /** 319 * @brief Enable the PVD Extended Interrupt Rising Trigger. 320 * @note PVD flag polarity is inverted compared to EXTI line, therefore 321 * EXTI rising and falling logic edges are inverted versus PVD voltage edges. 322 * @retval None 323 */ 324 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() LL_EXTI_EnableRisingTrig_0_31(PWR_EXTI_LINE_PVD) 325 326 /** 327 * @brief Disable the PVD Extended Interrupt Rising Trigger. 328 * @note PVD flag polarity is inverted compared to EXTI line, therefore 329 * EXTI rising and falling logic edges are inverted versus PVD voltage edges. 330 * @retval None 331 */ 332 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() LL_EXTI_DisableFallingTrig_0_31(PWR_EXTI_LINE_PVD) 333 334 /** 335 * @brief Enable the PVD Extended Interrupt Falling Trigger. 336 * @note PVD flag polarity is inverted compared to EXTI line, therefore 337 * EXTI rising and falling logic edges are inverted versus PVD voltage edges. 338 * @retval None 339 */ 340 #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() LL_EXTI_EnableFallingTrig_0_31(PWR_EXTI_LINE_PVD) 341 342 343 /** 344 * @brief Disable the PVD Extended Interrupt Falling Trigger. 345 * @note PVD flag polarity is inverted compared to EXTI line, therefore 346 * EXTI rising and falling logic edges are inverted versus PVD voltage edges. 347 * @retval None 348 */ 349 #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() LL_EXTI_DisableRisingTrig_0_31(PWR_EXTI_LINE_PVD) 350 351 352 /** 353 * @brief Enable the PVD Extended Interrupt Rising & Falling Trigger. 354 * @retval None 355 */ 356 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() \ 357 do { \ 358 __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE(); \ 359 __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); \ 360 } while(0) 361 362 /** 363 * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger. 364 * @retval None 365 */ 366 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() \ 367 do { \ 368 __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE(); \ 369 __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); \ 370 } while(0) 371 372 /** 373 * @brief Generate a Software interrupt on selected EXTI line. 374 * @retval None 375 */ 376 #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() LL_EXTI_GenerateSWI_0_31(PWR_EXTI_LINE_PVD) 377 378 /** 379 * @brief Check whether or not the PVD EXTI interrupt flag is set. 380 * @retval EXTI PVD Line Status. 381 */ 382 #define __HAL_PWR_PVD_EXTI_GET_FLAG() LL_EXTI_ReadFlag_0_31(PWR_EXTI_LINE_PVD) 383 384 /** 385 * @brief Clear the PVD EXTI interrupt flag. 386 * @retval None 387 */ 388 #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() LL_EXTI_ClearFlag_0_31(PWR_EXTI_LINE_PVD) 389 390 /** 391 * @} 392 */ 393 394 395 /* Private macros --------------------------------------------------------*/ 396 /** @defgroup PWR_Private_Macros PWR Private Macros 397 * @{ 398 */ 399 400 #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \ 401 ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \ 402 ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \ 403 ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7)) 404 405 #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_NORMAL) ||\ 406 ((MODE) == PWR_PVD_MODE_IT_RISING) ||\ 407 ((MODE) == PWR_PVD_MODE_IT_FALLING) ||\ 408 ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING)) 409 410 411 412 #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \ 413 ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON)) 414 415 416 #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || \ 417 ((ENTRY) == PWR_SLEEPENTRY_WFE)) 418 419 #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || \ 420 ((ENTRY) == PWR_STOPENTRY_WFE)) 421 /** 422 * @} 423 */ 424 425 /* Include PWR HAL Extended module */ 426 #include "stm32wbxx_hal_pwr_ex.h" 427 428 /* Exported functions --------------------------------------------------------*/ 429 /** @defgroup PWR_Exported_Functions PWR Exported Functions 430 * @{ 431 */ 432 433 /** @defgroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions 434 * @{ 435 */ 436 437 /* Initialization and de-initialization functions *******************************/ 438 void HAL_PWR_DeInit(void); 439 440 void HAL_PWR_EnableBkUpAccess(void); 441 void HAL_PWR_DisableBkUpAccess(void); 442 /** 443 * @} 444 */ 445 446 /** @defgroup PWR_Exported_Functions_Group2 Peripheral Control functions 447 * @{ 448 */ 449 /* Peripheral Control functions ************************************************/ 450 HAL_StatusTypeDef HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD); 451 void HAL_PWR_EnablePVD(void); 452 void HAL_PWR_DisablePVD(void); 453 454 /* WakeUp pins configuration functions ****************************************/ 455 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinPolarity); 456 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx); 457 458 /* Low Power modes configuration functions ************************************/ 459 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry); 460 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry); 461 void HAL_PWR_EnterSTANDBYMode(void); 462 463 void HAL_PWR_PVDCallback(void); 464 void HAL_PWR_EnableSleepOnExit(void); 465 void HAL_PWR_DisableSleepOnExit(void); 466 467 void HAL_PWR_EnableSEVOnPend(void); 468 void HAL_PWR_DisableSEVOnPend(void); 469 470 471 /** 472 * @} 473 */ 474 475 /** 476 * @} 477 */ 478 479 /** 480 * @} 481 */ 482 483 /** 484 * @} 485 */ 486 487 /** 488 * @} 489 */ 490 491 #ifdef __cplusplus 492 } 493 #endif 494 495 496 #endif /* STM32WBxx_HAL_PWR_H */ 497 498 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 499