xref: /btstack/port/stm32-wb55xx-nucleo-freertos/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_ipcc.h (revision 0561b2d8d5dba972c7daa57d5e677f7a1327edfd)
1 /**
2   ******************************************************************************
3   * @file    stm32wbxx_hal_ipcc.h
4   * @author  MCD Application Team
5   * @brief   Header file of Mailbox HAL module.
6   ******************************************************************************
7   * @attention
8   *
9   * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
10   * All rights reserved.</center></h2>
11   *
12   * This software component is licensed by ST under BSD 3-Clause license,
13   * the "License"; You may not use this file except in compliance with the
14   * License. You may obtain a copy of the License at:
15   *                        opensource.org/licenses/BSD-3-Clause
16   *
17   ******************************************************************************
18   */
19 
20 /* Define to prevent recursive inclusion -------------------------------------*/
21 #ifndef STM32WBxx_HAL_IPCC_H
22 #define STM32WBxx_HAL_IPCC_H
23 
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27 
28 /* Includes ------------------------------------------------------------------*/
29 #include "stm32wbxx_hal_def.h"
30 
31 
32 /** @addtogroup STM32WBxx_HAL_Driver
33   * @{
34   */
35 
36 /** @defgroup IPCC IPCC
37   * @brief IPCC HAL module driver
38   * @{
39   */
40 
41 /* Exported constants --------------------------------------------------------*/
42 
43 /** @defgroup IPCC_Exported_Constants IPCC Exported Constants
44   * @{
45   */
46 
47 /** @defgroup IPCC_Channel IPCC Channel
48   * @{
49   */
50 #define IPCC_CHANNEL_1 0x00000000U
51 #define IPCC_CHANNEL_2 0x00000001U
52 #define IPCC_CHANNEL_3 0x00000002U
53 #define IPCC_CHANNEL_4 0x00000003U
54 #define IPCC_CHANNEL_5 0x00000004U
55 #define IPCC_CHANNEL_6 0x00000005U
56 /**
57   * @}
58   */
59 
60 /**
61   * @}
62   */
63 
64 /* Exported types ------------------------------------------------------------*/
65 /** @defgroup IPCC_Exported_Types IPCC Exported Types
66   * @{
67   */
68 
69 /**
70   * @brief HAL IPCC State structures definition
71   */
72 typedef enum
73 {
74   HAL_IPCC_STATE_RESET             = 0x00U,  /*!< IPCC not yet initialized or disabled  */
75   HAL_IPCC_STATE_READY             = 0x01U,  /*!< IPCC initialized and ready for use    */
76   HAL_IPCC_STATE_BUSY              = 0x02U   /*!< IPCC internal processing is ongoing   */
77 } HAL_IPCC_StateTypeDef;
78 
79 /**
80   * @brief  IPCC channel direction structure definition
81   */
82 typedef enum
83 {
84   IPCC_CHANNEL_DIR_TX  = 0x00U,  /*!< Channel direction Tx is used by an MCU to transmit */
85   IPCC_CHANNEL_DIR_RX  = 0x01U   /*!< Channel direction Rx is used by an MCU to receive */
86 } IPCC_CHANNELDirTypeDef;
87 
88 /**
89   * @brief  IPCC channel status structure definition
90   */
91 typedef enum
92 {
93   IPCC_CHANNEL_STATUS_FREE       = 0x00U,  /*!< Means that a new msg can be posted on that channel */
94   IPCC_CHANNEL_STATUS_OCCUPIED   = 0x01U   /*!< An MCU has posted a msg the other MCU hasn't retrieved */
95 } IPCC_CHANNELStatusTypeDef;
96 
97 /**
98   * @brief  IPCC handle structure definition
99   */
100 typedef struct __IPCC_HandleTypeDef
101 {
102   IPCC_TypeDef                   *Instance;     /*!< IPCC registers base address */
103   void (* ChannelCallbackRx[IPCC_CHANNEL_NUMBER])(struct __IPCC_HandleTypeDef *hipcc, uint32_t ChannelIndex, IPCC_CHANNELDirTypeDef ChannelDir);                            /*!< Rx Callback registration table */
104   void (* ChannelCallbackTx[IPCC_CHANNEL_NUMBER])(struct __IPCC_HandleTypeDef *hipcc, uint32_t ChannelIndex, IPCC_CHANNELDirTypeDef ChannelDir);                            /*!< Tx Callback registration table */
105   uint32_t                       callbackRequest; /*!< Store information about callback notification by channel */
106   __IO HAL_IPCC_StateTypeDef      State;         /*!< IPCC State: initialized or not */
107 } IPCC_HandleTypeDef;
108 
109 /**
110   * @brief  IPCC callback typedef
111   */
112 typedef void ChannelCb(IPCC_HandleTypeDef *hipcc, uint32_t ChannelIndex, IPCC_CHANNELDirTypeDef ChannelDir);
113 
114 /**
115   * @}
116   */
117 
118 /* Exported macros -----------------------------------------------------------*/
119 /** @defgroup IPCC_Exported_Macros IPCC Exported Macros
120   * @{
121   */
122 
123 /**
124   * @brief  Enable the specified interrupt.
125   * @param  __HANDLE__ specifies the IPCC Handle
126   * @param  __CHDIRECTION__ specifies the channels Direction
127   *          This parameter can be one of the following values:
128   *            @arg @ref IPCC_CHANNEL_DIR_TX Transmit channel free interrupt enable
129   *            @arg @ref IPCC_CHANNEL_DIR_RX Receive channel occupied interrupt enable
130   */
131 #define __HAL_IPCC_ENABLE_IT(__HANDLE__, __CHDIRECTION__) \
132             (((__CHDIRECTION__) == IPCC_CHANNEL_DIR_RX) ? \
133                 ((__HANDLE__)->Instance->C1CR |= IPCC_C1CR_RXOIE) : \
134                 ((__HANDLE__)->Instance->C1CR |= IPCC_C1CR_TXFIE))
135 
136 /**
137   * @brief  Disable the specified interrupt.
138   * @param  __HANDLE__ specifies the IPCC Handle
139   * @param  __CHDIRECTION__ specifies the channels Direction
140   *          This parameter can be one of the following values:
141   *            @arg @ref IPCC_CHANNEL_DIR_TX Transmit channel free interrupt enable
142   *            @arg @ref IPCC_CHANNEL_DIR_RX Receive channel occupied interrupt enable
143   */
144 #define __HAL_IPCC_DISABLE_IT(__HANDLE__, __CHDIRECTION__) \
145             (((__CHDIRECTION__) == IPCC_CHANNEL_DIR_RX) ? \
146                 ((__HANDLE__)->Instance->C1CR &= ~IPCC_C1CR_RXOIE) : \
147                 ((__HANDLE__)->Instance->C1CR &= ~IPCC_C1CR_TXFIE))
148 
149 /**
150   * @brief  Mask the specified interrupt.
151   * @param  __HANDLE__ specifies the IPCC Handle
152   * @param  __CHDIRECTION__ specifies the channels Direction
153   *          This parameter can be one of the following values:
154   *            @arg @ref IPCC_CHANNEL_DIR_TX Transmit channel free interrupt enable
155   *            @arg @ref IPCC_CHANNEL_DIR_RX Receive channel occupied interrupt enable
156   * @param  __CHINDEX__ specifies the channels number:
157   *         This parameter can be one of the following values:
158   *            @arg IPCC_CHANNEL_1: IPCC Channel 1
159   *            @arg IPCC_CHANNEL_2: IPCC Channel 2
160   *            @arg IPCC_CHANNEL_3: IPCC Channel 3
161   *            @arg IPCC_CHANNEL_4: IPCC Channel 4
162   *            @arg IPCC_CHANNEL_5: IPCC Channel 5
163   *            @arg IPCC_CHANNEL_6: IPCC Channel 6
164   */
165 #define __HAL_IPCC_MASK_CHANNEL_IT(__HANDLE__, __CHDIRECTION__, __CHINDEX__) \
166             (((__CHDIRECTION__) == IPCC_CHANNEL_DIR_RX) ? \
167                 ((__HANDLE__)->Instance->C1MR |= (IPCC_C1MR_CH1OM_Msk << (__CHINDEX__))) : \
168                 ((__HANDLE__)->Instance->C1MR |= (IPCC_C1MR_CH1FM_Msk << (__CHINDEX__))))
169 
170 /**
171   * @brief  Unmask the specified interrupt.
172   * @param  __HANDLE__ specifies the IPCC Handle
173   * @param  __CHDIRECTION__ specifies the channels Direction
174   *          This parameter can be one of the following values:
175   *            @arg @ref IPCC_CHANNEL_DIR_TX Transmit channel free interrupt enable
176   *            @arg @ref IPCC_CHANNEL_DIR_RX Receive channel occupied interrupt enable
177   * @param  __CHINDEX__ specifies the channels number:
178   *         This parameter can be one of the following values:
179   *            @arg IPCC_CHANNEL_1: IPCC Channel 1
180   *            @arg IPCC_CHANNEL_2: IPCC Channel 2
181   *            @arg IPCC_CHANNEL_3: IPCC Channel 3
182   *            @arg IPCC_CHANNEL_4: IPCC Channel 4
183   *            @arg IPCC_CHANNEL_5: IPCC Channel 5
184   *            @arg IPCC_CHANNEL_6: IPCC Channel 6
185   */
186 #define __HAL_IPCC_UNMASK_CHANNEL_IT(__HANDLE__, __CHDIRECTION__, __CHINDEX__) \
187             (((__CHDIRECTION__) == IPCC_CHANNEL_DIR_RX) ? \
188                 ((__HANDLE__)->Instance->C1MR &= ~(IPCC_C1MR_CH1OM_Msk << (__CHINDEX__))) : \
189                 ((__HANDLE__)->Instance->C1MR &= ~(IPCC_C1MR_CH1FM_Msk << (__CHINDEX__))))
190 
191 /**
192   * @}
193   */
194 
195 /* Exported functions --------------------------------------------------------*/
196 /** @defgroup IPCC_Exported_Functions IPCC Exported Functions
197   * @{
198   */
199 
200 /* Initialization and de-initialization functions *******************************/
201 /** @defgroup IPCC_Exported_Functions_Group1 Initialization and deinitialization functions
202  *  @{
203  */
204 HAL_StatusTypeDef HAL_IPCC_Init(IPCC_HandleTypeDef *hipcc);
205 HAL_StatusTypeDef HAL_IPCC_DeInit(IPCC_HandleTypeDef *hipcc);
206 void HAL_IPCC_MspInit(IPCC_HandleTypeDef *hipcc);
207 void HAL_IPCC_MspDeInit(IPCC_HandleTypeDef *hipcc);
208 /**
209   * @}
210   */
211 
212 /** @defgroup IPCC_Exported_Functions_Group2 Communication functions
213  *  @{
214  */
215 /* IO operation functions  *****************************************************/
216 HAL_StatusTypeDef HAL_IPCC_ActivateNotification(IPCC_HandleTypeDef *hipcc, uint32_t ChannelIndex, IPCC_CHANNELDirTypeDef ChannelDir, ChannelCb cb);
217 HAL_StatusTypeDef HAL_IPCC_DeActivateNotification(IPCC_HandleTypeDef *hipcc, uint32_t ChannelIndex, IPCC_CHANNELDirTypeDef ChannelDir);
218 IPCC_CHANNELStatusTypeDef HAL_IPCC_GetChannelStatus(IPCC_HandleTypeDef const *const hipcc, uint32_t ChannelIndex, IPCC_CHANNELDirTypeDef ChannelDir);
219 HAL_StatusTypeDef HAL_IPCC_NotifyCPU(IPCC_HandleTypeDef const *const hipcc, uint32_t ChannelIndex, IPCC_CHANNELDirTypeDef ChannelDir);
220 /**
221   * @}
222   */
223 
224 /** @defgroup IPCC_Exported_Functions_Group3 Peripheral State and Error functions
225  *  @{
226  */
227 /* Peripheral State and Error functions ****************************************/
228 HAL_IPCC_StateTypeDef HAL_IPCC_GetState(IPCC_HandleTypeDef const *const hipcc);
229 /**
230   * @}
231   */
232 
233 /** @defgroup IPCC_IRQ_Handler_and_Callbacks Peripheral IRQ Handler and Callbacks
234  *  @{
235  */
236 /* IRQHandler and Callbacks used in non blocking modes  ************************/
237 void HAL_IPCC_TX_IRQHandler(IPCC_HandleTypeDef   *const hipcc);
238 void HAL_IPCC_RX_IRQHandler(IPCC_HandleTypeDef *const hipcc);
239 void HAL_IPCC_TxCallback(IPCC_HandleTypeDef *hipcc, uint32_t ChannelIndex, IPCC_CHANNELDirTypeDef ChannelDir);
240 void HAL_IPCC_RxCallback(IPCC_HandleTypeDef *hipcc, uint32_t ChannelIndex, IPCC_CHANNELDirTypeDef ChannelDir);
241 /**
242   * @}
243   */
244 
245 /**
246   * @}
247   */
248 
249 /**
250   * @}
251   */
252 
253 /**
254   * @}
255   */
256 
257 #ifdef __cplusplus
258 }
259 #endif
260 
261 #endif /* STM32WBxx_HAL_IPCC_H */
262 
263 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
264