1 /**
2 ******************************************************************************
3 * @file stm32l4xx_hal_lptim.c
4 * @author MCD Application Team
5 * @brief LPTIM HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of the Low Power Timer (LPTIM) peripheral:
8 * + Initialization and de-initialization functions.
9 * + Start/Stop operation functions in polling mode.
10 * + Start/Stop operation functions in interrupt mode.
11 * + Reading operation functions.
12 * + Peripheral State functions.
13 *
14 @verbatim
15 ==============================================================================
16 ##### How to use this driver #####
17 ==============================================================================
18 [..]
19 The LPTIM HAL driver can be used as follows:
20
21 (#)Initialize the LPTIM low level resources by implementing the
22 HAL_LPTIM_MspInit():
23 (++) Enable the LPTIM interface clock using __HAL_RCC_LPTIMx_CLK_ENABLE().
24 (++) In case of using interrupts (e.g. HAL_LPTIM_PWM_Start_IT()):
25 (+++) Configure the LPTIM interrupt priority using HAL_NVIC_SetPriority().
26 (+++) Enable the LPTIM IRQ handler using HAL_NVIC_EnableIRQ().
27 (+++) In LPTIM IRQ handler, call HAL_LPTIM_IRQHandler().
28
29 (#)Initialize the LPTIM HAL using HAL_LPTIM_Init(). This function
30 configures mainly:
31 (++) The instance: LPTIM1 or LPTIM2.
32 (++) Clock: the counter clock.
33 (+++) Source : it can be either the ULPTIM input (IN1) or one of
34 the internal clock; (APB, LSE, LSI or MSI).
35 (+++) Prescaler: select the clock divider.
36 (++) UltraLowPowerClock : To be used only if the ULPTIM is selected
37 as counter clock source.
38 (+++) Polarity: polarity of the active edge for the counter unit
39 if the ULPTIM input is selected.
40 (+++) SampleTime: clock sampling time to configure the clock glitch
41 filter.
42 (++) Trigger: How the counter start.
43 (+++) Source: trigger can be software or one of the hardware triggers.
44 (+++) ActiveEdge : only for hardware trigger.
45 (+++) SampleTime : trigger sampling time to configure the trigger
46 glitch filter.
47 (++) OutputPolarity : 2 opposite polarities are possible.
48 (++) UpdateMode: specifies whether the update of the autoreload and
49 the compare values is done immediately or after the end of current
50 period.
51 (++) Input1Source: Source selected for input1 (GPIO or comparator output).
52 (++) Input2Source: Source selected for input2 (GPIO or comparator output).
53 Input2 is used only for encoder feature so is used only for LPTIM1 instance.
54
55 (#)Six modes are available:
56
57 (++) PWM Mode: To generate a PWM signal with specified period and pulse,
58 call HAL_LPTIM_PWM_Start() or HAL_LPTIM_PWM_Start_IT() for interruption
59 mode.
60
61 (++) One Pulse Mode: To generate pulse with specified width in response
62 to a stimulus, call HAL_LPTIM_OnePulse_Start() or
63 HAL_LPTIM_OnePulse_Start_IT() for interruption mode.
64
65 (++) Set once Mode: In this mode, the output changes the level (from
66 low level to high level if the output polarity is configured high, else
67 the opposite) when a compare match occurs. To start this mode, call
68 HAL_LPTIM_SetOnce_Start() or HAL_LPTIM_SetOnce_Start_IT() for
69 interruption mode.
70
71 (++) Encoder Mode: To use the encoder interface call
72 HAL_LPTIM_Encoder_Start() or HAL_LPTIM_Encoder_Start_IT() for
73 interruption mode. Only available for LPTIM1 instance.
74
75 (++) Time out Mode: an active edge on one selected trigger input rests
76 the counter. The first trigger event will start the timer, any
77 successive trigger event will reset the counter and the timer will
78 restart. To start this mode call HAL_LPTIM_TimeOut_Start_IT() or
79 HAL_LPTIM_TimeOut_Start_IT() for interruption mode.
80
81 (++) Counter Mode: counter can be used to count external events on
82 the LPTIM Input1 or it can be used to count internal clock cycles.
83 To start this mode, call HAL_LPTIM_Counter_Start() or
84 HAL_LPTIM_Counter_Start_IT() for interruption mode.
85
86
87 (#) User can stop any process by calling the corresponding API:
88 HAL_LPTIM_Xxx_Stop() or HAL_LPTIM_Xxx_Stop_IT() if the process is
89 already started in interruption mode.
90
91 (#) De-initialize the LPTIM peripheral using HAL_LPTIM_DeInit().
92
93 *** Callback registration ***
94 =============================================
95 [..]
96 The compilation define USE_HAL_LPTIM_REGISTER_CALLBACKS when set to 1
97 allows the user to configure dynamically the driver callbacks.
98 [..]
99 Use Function @ref HAL_LPTIM_RegisterCallback() to register a callback.
100 @ref HAL_LPTIM_RegisterCallback() takes as parameters the HAL peripheral handle,
101 the Callback ID and a pointer to the user callback function.
102 [..]
103 Use function @ref HAL_LPTIM_UnRegisterCallback() to reset a callback to the
104 default weak function.
105 @ref HAL_LPTIM_UnRegisterCallback takes as parameters the HAL peripheral handle,
106 and the Callback ID.
107 [..]
108 These functions allow to register/unregister following callbacks:
109
110 (+) MspInitCallback : LPTIM Base Msp Init Callback.
111 (+) MspDeInitCallback : LPTIM Base Msp DeInit Callback.
112 (+) CompareMatchCallback : Compare match Callback.
113 (+) AutoReloadMatchCallback : Auto-reload match Callback.
114 (+) TriggerCallback : External trigger event detection Callback.
115 (+) CompareWriteCallback : Compare register write complete Callback.
116 (+) AutoReloadWriteCallback : Auto-reload register write complete Callback.
117 (+) DirectionUpCallback : Up-counting direction change Callback.
118 (+) DirectionDownCallback : Down-counting direction change Callback.
119
120 [..]
121 By default, after the Init and when the state is HAL_LPTIM_STATE_RESET
122 all interrupt callbacks are set to the corresponding weak functions:
123 examples @ref HAL_LPTIM_TriggerCallback(), @ref HAL_LPTIM_CompareMatchCallback().
124
125 [..]
126 Exception done for MspInit and MspDeInit functions that are reset to the legacy weak
127 functionalities in the Init/DeInit only when these callbacks are null
128 (not registered beforehand). If not, MspInit or MspDeInit are not null, the Init/DeInit
129 keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
130
131 [..]
132 Callbacks can be registered/unregistered in HAL_LPTIM_STATE_READY state only.
133 Exception done MspInit/MspDeInit that can be registered/unregistered
134 in HAL_LPTIM_STATE_READY or HAL_LPTIM_STATE_RESET state,
135 thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
136 In that case first register the MspInit/MspDeInit user callbacks
137 using @ref HAL_LPTIM_RegisterCallback() before calling DeInit or Init function.
138
139 [..]
140 When The compilation define USE_HAL_LPTIM_REGISTER_CALLBACKS is set to 0 or
141 not defined, the callback registration feature is not available and all callbacks
142 are set to the corresponding weak functions.
143
144 @endverbatim
145 ******************************************************************************
146 * @attention
147 *
148 * <h2><center>© Copyright (c) 2017 STMicroelectronics.
149 * All rights reserved.</center></h2>
150 *
151 * This software component is licensed by ST under BSD 3-Clause license,
152 * the "License"; You may not use this file except in compliance with the
153 * License. You may obtain a copy of the License at:
154 * opensource.org/licenses/BSD-3-Clause
155 *
156 ******************************************************************************
157 */
158
159 /* Includes ------------------------------------------------------------------*/
160 #include "stm32l4xx_hal.h"
161
162 /** @addtogroup STM32L4xx_HAL_Driver
163 * @{
164 */
165
166 /** @defgroup LPTIM LPTIM
167 * @brief LPTIM HAL module driver.
168 * @{
169 */
170
171 #ifdef HAL_LPTIM_MODULE_ENABLED
172
173 #if defined (LPTIM1) || defined (LPTIM2)
174
175 /* Private typedef -----------------------------------------------------------*/
176 /* Private define ------------------------------------------------------------*/
177 /** @addtogroup LPTIM_Private_Constants
178 * @{
179 */
180 #define TIMEOUT 1000UL /* Timeout is 1s */
181 /**
182 * @}
183 */
184
185 /* Private macro -------------------------------------------------------------*/
186 /** @addtogroup LPTIM_Private_Macros
187 * @{
188 */
189 #if defined(LPTIM2)
190 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT(__INSTANCE__) \
191 (((__INSTANCE__) == LPTIM1) ? __HAL_LPTIM_LPTIM1_EXTI_ENABLE_IT() : __HAL_LPTIM_LPTIM2_EXTI_ENABLE_IT())
192
193 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT(__INSTANCE__) \
194 (((__INSTANCE__) == LPTIM1) ? __HAL_LPTIM_LPTIM1_EXTI_DISABLE_IT() : __HAL_LPTIM_LPTIM2_EXTI_DISABLE_IT())
195 #else
196 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT(__INSTANCE__) __HAL_LPTIM_LPTIM1_EXTI_ENABLE_IT()
197
198 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT(__INSTANCE__) __HAL_LPTIM_LPTIM1_EXTI_DISABLE_IT()
199 #endif /* LPTIM2 */
200 /**
201 * @}
202 */
203
204 /* Private variables ---------------------------------------------------------*/
205 /* Private function prototypes -----------------------------------------------*/
206 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
207 static void LPTIM_ResetCallback(LPTIM_HandleTypeDef *lptim);
208 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
209 static HAL_StatusTypeDef LPTIM_WaitForFlag(LPTIM_HandleTypeDef *hlptim, uint32_t flag);
210
211 /* Exported functions --------------------------------------------------------*/
212
213 /** @defgroup LPTIM_Exported_Functions LPTIM Exported Functions
214 * @{
215 */
216
217 /** @defgroup LPTIM_Exported_Functions_Group1 Initialization/de-initialization functions
218 * @brief Initialization and Configuration functions.
219 *
220 @verbatim
221 ==============================================================================
222 ##### Initialization and de-initialization functions #####
223 ==============================================================================
224 [..] This section provides functions allowing to:
225 (+) Initialize the LPTIM according to the specified parameters in the
226 LPTIM_InitTypeDef and initialize the associated handle.
227 (+) DeInitialize the LPTIM peripheral.
228 (+) Initialize the LPTIM MSP.
229 (+) DeInitialize the LPTIM MSP.
230
231 @endverbatim
232 * @{
233 */
234
235 /**
236 * @brief Initialize the LPTIM according to the specified parameters in the
237 * LPTIM_InitTypeDef and initialize the associated handle.
238 * @param hlptim LPTIM handle
239 * @retval HAL status
240 */
HAL_LPTIM_Init(LPTIM_HandleTypeDef * hlptim)241 HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim)
242 {
243 uint32_t tmpcfgr;
244
245 /* Check the LPTIM handle allocation */
246 if (hlptim == NULL)
247 {
248 return HAL_ERROR;
249 }
250
251 /* Check the parameters */
252 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
253
254 assert_param(IS_LPTIM_CLOCK_SOURCE(hlptim->Init.Clock.Source));
255 assert_param(IS_LPTIM_CLOCK_PRESCALER(hlptim->Init.Clock.Prescaler));
256 if (hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM)
257 {
258 assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
259 }
260 assert_param(IS_LPTIM_TRG_SOURCE(hlptim->Init.Trigger.Source));
261 if (hlptim->Init.Trigger.Source != LPTIM_TRIGSOURCE_SOFTWARE)
262 {
263 assert_param(IS_LPTIM_EXT_TRG_POLARITY(hlptim->Init.Trigger.ActiveEdge));
264 }
265 if (hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC)
266 {
267 assert_param(IS_LPTIM_TRIG_SAMPLE_TIME(hlptim->Init.Trigger.SampleTime));
268 assert_param(IS_LPTIM_CLOCK_SAMPLE_TIME(hlptim->Init.UltraLowPowerClock.SampleTime));
269 }
270 assert_param(IS_LPTIM_OUTPUT_POLARITY(hlptim->Init.OutputPolarity));
271 assert_param(IS_LPTIM_UPDATE_MODE(hlptim->Init.UpdateMode));
272 assert_param(IS_LPTIM_COUNTER_SOURCE(hlptim->Init.CounterSource));
273 #if defined(LPTIM_RCR_REP)
274 assert_param(IS_LPTIM_REPETITION(hlptim->Init.RepetitionCounter));
275 #endif
276
277 if (hlptim->State == HAL_LPTIM_STATE_RESET)
278 {
279 /* Allocate lock resource and initialize it */
280 hlptim->Lock = HAL_UNLOCKED;
281
282 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
283 /* Reset interrupt callbacks to legacy weak callbacks */
284 LPTIM_ResetCallback(hlptim);
285
286 if (hlptim->MspInitCallback == NULL)
287 {
288 hlptim->MspInitCallback = HAL_LPTIM_MspInit;
289 }
290
291 /* Init the low level hardware : GPIO, CLOCK, NVIC */
292 hlptim->MspInitCallback(hlptim);
293 #else
294 /* Init the low level hardware : GPIO, CLOCK, NVIC */
295 HAL_LPTIM_MspInit(hlptim);
296 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
297 }
298
299 /* Change the LPTIM state */
300 hlptim->State = HAL_LPTIM_STATE_BUSY;
301 #if defined(LPTIM_RCR_REP)
302
303 /* Enable the Peripheral */
304 __HAL_LPTIM_ENABLE(hlptim);
305
306 /* Clear flag */
307 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_REPOK);
308
309 /* Set the repetition counter */
310 __HAL_LPTIM_REPETITIONCOUNTER_SET(hlptim, hlptim->Init.RepetitionCounter);
311
312 /* Wait for the completion of the write operation to the LPTIM_RCR register */
313 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_REPOK) == HAL_TIMEOUT)
314 {
315 return HAL_TIMEOUT;
316 }
317
318 /* Disable the Peripheral */
319 __HAL_LPTIM_DISABLE(hlptim);
320
321 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
322 {
323 return HAL_TIMEOUT;
324 }
325
326 #endif
327
328 /* Get the LPTIMx CFGR value */
329 tmpcfgr = hlptim->Instance->CFGR;
330
331 if (hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM)
332 {
333 tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKPOL));
334 }
335 if (hlptim->Init.Trigger.Source != LPTIM_TRIGSOURCE_SOFTWARE)
336 {
337 tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_TRIGSEL));
338 }
339 if (hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC)
340 {
341 tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_TRGFLT | LPTIM_CFGR_CKFLT));
342 }
343
344 /* Clear CKSEL, CKPOL, PRESC, TRIGEN, TRGFLT, WAVPOL, PRELOAD & COUNTMODE bits */
345 tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKSEL | LPTIM_CFGR_CKPOL | LPTIM_CFGR_TRIGEN | LPTIM_CFGR_PRELOAD |
346 LPTIM_CFGR_WAVPOL | LPTIM_CFGR_PRESC | LPTIM_CFGR_COUNTMODE));
347
348 /* Set initialization parameters */
349 tmpcfgr |= (hlptim->Init.Clock.Source |
350 hlptim->Init.Clock.Prescaler |
351 hlptim->Init.OutputPolarity |
352 hlptim->Init.UpdateMode |
353 hlptim->Init.CounterSource);
354
355 /* Glitch filters for internal triggers and external inputs are configured
356 * only if an internal clock source is provided to the LPTIM
357 */
358 if (hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC)
359 {
360 tmpcfgr |= (hlptim->Init.Trigger.SampleTime |
361 hlptim->Init.UltraLowPowerClock.SampleTime);
362 }
363
364 /* Configure the active edge or edges used by the counter only if LPTIM is
365 * clocked by an external clock source
366 */
367 if (hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM)
368 {
369 tmpcfgr |= (hlptim->Init.UltraLowPowerClock.Polarity);
370 }
371
372 if (hlptim->Init.Trigger.Source != LPTIM_TRIGSOURCE_SOFTWARE)
373 {
374 /* Enable External trigger and set the trigger source */
375 tmpcfgr |= (hlptim->Init.Trigger.Source |
376 hlptim->Init.Trigger.ActiveEdge);
377 }
378
379 /* Write to LPTIMx CFGR */
380 hlptim->Instance->CFGR = tmpcfgr;
381
382 /* Configure LPTIM input sources */
383 if (hlptim->Instance == LPTIM1)
384 {
385 /* Check LPTIM Input1 and Input2 sources */
386 assert_param(IS_LPTIM_INPUT1_SOURCE(hlptim->Instance, hlptim->Init.Input1Source));
387 assert_param(IS_LPTIM_INPUT2_SOURCE(hlptim->Instance, hlptim->Init.Input2Source));
388
389 /* Configure LPTIM Input1 and Input2 sources */
390 hlptim->Instance->OR = (hlptim->Init.Input1Source | hlptim->Init.Input2Source);
391 }
392 else
393 {
394 /* Check LPTIM2 Input1 source */
395 assert_param(IS_LPTIM_INPUT1_SOURCE(hlptim->Instance, hlptim->Init.Input1Source));
396
397 /* Configure LPTIM2 Input1 source */
398 hlptim->Instance->OR = hlptim->Init.Input1Source;
399 }
400
401 /* Change the LPTIM state */
402 hlptim->State = HAL_LPTIM_STATE_READY;
403
404 /* Return function status */
405 return HAL_OK;
406 }
407
408 /**
409 * @brief DeInitialize the LPTIM peripheral.
410 * @param hlptim LPTIM handle
411 * @retval HAL status
412 */
HAL_LPTIM_DeInit(LPTIM_HandleTypeDef * hlptim)413 HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim)
414 {
415 /* Check the LPTIM handle allocation */
416 if (hlptim == NULL)
417 {
418 return HAL_ERROR;
419 }
420
421 /* Change the LPTIM state */
422 hlptim->State = HAL_LPTIM_STATE_BUSY;
423
424 /* Disable the LPTIM Peripheral Clock */
425 __HAL_LPTIM_DISABLE(hlptim);
426
427 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
428 {
429 return HAL_TIMEOUT;
430 }
431
432 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
433 if (hlptim->MspDeInitCallback == NULL)
434 {
435 hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit;
436 }
437
438 /* DeInit the low level hardware: CLOCK, NVIC.*/
439 hlptim->MspDeInitCallback(hlptim);
440 #else
441 /* DeInit the low level hardware: CLOCK, NVIC.*/
442 HAL_LPTIM_MspDeInit(hlptim);
443 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
444
445 /* Change the LPTIM state */
446 hlptim->State = HAL_LPTIM_STATE_RESET;
447
448 /* Release Lock */
449 __HAL_UNLOCK(hlptim);
450
451 /* Return function status */
452 return HAL_OK;
453 }
454
455 /**
456 * @brief Initialize the LPTIM MSP.
457 * @param hlptim LPTIM handle
458 * @retval None
459 */
HAL_LPTIM_MspInit(LPTIM_HandleTypeDef * hlptim)460 __weak void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim)
461 {
462 /* Prevent unused argument(s) compilation warning */
463 UNUSED(hlptim);
464
465 /* NOTE : This function should not be modified, when the callback is needed,
466 the HAL_LPTIM_MspInit could be implemented in the user file
467 */
468 }
469
470 /**
471 * @brief DeInitialize LPTIM MSP.
472 * @param hlptim LPTIM handle
473 * @retval None
474 */
HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef * hlptim)475 __weak void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim)
476 {
477 /* Prevent unused argument(s) compilation warning */
478 UNUSED(hlptim);
479
480 /* NOTE : This function should not be modified, when the callback is needed,
481 the HAL_LPTIM_MspDeInit could be implemented in the user file
482 */
483 }
484
485 /**
486 * @}
487 */
488
489 /** @defgroup LPTIM_Exported_Functions_Group2 LPTIM Start-Stop operation functions
490 * @brief Start-Stop operation functions.
491 *
492 @verbatim
493 ==============================================================================
494 ##### LPTIM Start Stop operation functions #####
495 ==============================================================================
496 [..] This section provides functions allowing to:
497 (+) Start the PWM mode.
498 (+) Stop the PWM mode.
499 (+) Start the One pulse mode.
500 (+) Stop the One pulse mode.
501 (+) Start the Set once mode.
502 (+) Stop the Set once mode.
503 (+) Start the Encoder mode.
504 (+) Stop the Encoder mode.
505 (+) Start the Timeout mode.
506 (+) Stop the Timeout mode.
507 (+) Start the Counter mode.
508 (+) Stop the Counter mode.
509
510
511 @endverbatim
512 * @{
513 */
514
515 /**
516 * @brief Start the LPTIM PWM generation.
517 * @param hlptim LPTIM handle
518 * @param Period Specifies the Autoreload value.
519 * This parameter must be a value between 0x0000 and 0xFFFF.
520 * @param Pulse Specifies the compare value.
521 * This parameter must be a value between 0x0000 and 0xFFFF.
522 * @retval HAL status
523 */
HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)524 HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
525 {
526 /* Check the parameters */
527 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
528 assert_param(IS_LPTIM_PERIOD(Period));
529 assert_param(IS_LPTIM_PULSE(Pulse));
530
531 /* Set the LPTIM state */
532 hlptim->State = HAL_LPTIM_STATE_BUSY;
533
534 /* Reset WAVE bit to set PWM mode */
535 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
536
537 /* Enable the Peripheral */
538 __HAL_LPTIM_ENABLE(hlptim);
539
540 /* Clear flag */
541 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
542
543 /* Load the period value in the autoreload register */
544 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
545
546 /* Wait for the completion of the write operation to the LPTIM_ARR register */
547 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
548 {
549 return HAL_TIMEOUT;
550 }
551
552 /* Clear flag */
553 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
554
555 /* Load the pulse value in the compare register */
556 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
557
558 /* Wait for the completion of the write operation to the LPTIM_CMP register */
559 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
560 {
561 return HAL_TIMEOUT;
562 }
563
564 /* Start timer in continuous mode */
565 __HAL_LPTIM_START_CONTINUOUS(hlptim);
566
567 /* Change the TIM state*/
568 hlptim->State = HAL_LPTIM_STATE_READY;
569
570 /* Return function status */
571 return HAL_OK;
572 }
573
574 /**
575 * @brief Stop the LPTIM PWM generation.
576 * @param hlptim LPTIM handle
577 * @retval HAL status
578 */
HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef * hlptim)579 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim)
580 {
581 /* Check the parameters */
582 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
583
584 /* Set the LPTIM state */
585 hlptim->State = HAL_LPTIM_STATE_BUSY;
586
587 /* Disable the Peripheral */
588 __HAL_LPTIM_DISABLE(hlptim);
589
590 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
591 {
592 return HAL_TIMEOUT;
593 }
594
595 /* Change the TIM state*/
596 hlptim->State = HAL_LPTIM_STATE_READY;
597
598 /* Return function status */
599 return HAL_OK;
600 }
601
602 /**
603 * @brief Start the LPTIM PWM generation in interrupt mode.
604 * @param hlptim LPTIM handle
605 * @param Period Specifies the Autoreload value.
606 * This parameter must be a value between 0x0000 and 0xFFFF
607 * @param Pulse Specifies the compare value.
608 * This parameter must be a value between 0x0000 and 0xFFFF
609 * @retval HAL status
610 */
HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)611 HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
612 {
613 /* Check the parameters */
614 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
615 assert_param(IS_LPTIM_PERIOD(Period));
616 assert_param(IS_LPTIM_PULSE(Pulse));
617
618 /* Set the LPTIM state */
619 hlptim->State = HAL_LPTIM_STATE_BUSY;
620
621 /* Reset WAVE bit to set PWM mode */
622 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
623
624 /* Enable the Peripheral */
625 __HAL_LPTIM_ENABLE(hlptim);
626
627 /* Clear flag */
628 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
629
630 /* Load the period value in the autoreload register */
631 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
632
633 /* Wait for the completion of the write operation to the LPTIM_ARR register */
634 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
635 {
636 return HAL_TIMEOUT;
637 }
638
639 /* Clear flag */
640 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
641
642 /* Load the pulse value in the compare register */
643 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
644
645 /* Wait for the completion of the write operation to the LPTIM_CMP register */
646 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
647 {
648 return HAL_TIMEOUT;
649 }
650
651 /* Disable the Peripheral */
652 __HAL_LPTIM_DISABLE(hlptim);
653
654 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
655 {
656 return HAL_TIMEOUT;
657 }
658
659 /* Enable Autoreload write complete interrupt */
660 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
661
662 /* Enable Compare write complete interrupt */
663 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
664
665 /* Enable Autoreload match interrupt */
666 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
667
668 /* Enable Compare match interrupt */
669 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
670
671 /* If external trigger source is used, then enable external trigger interrupt */
672 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
673 {
674 /* Enable external trigger interrupt */
675 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
676 }
677 #if defined(LPTIM_RCR_REP)
678
679 /* Enable Rep Update Ok interrupt */
680 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_REPOK);
681
682 /* Enable Update Event interrupt */
683 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_UPDATE);
684 #endif
685
686 /* Enable the Peripheral */
687 __HAL_LPTIM_ENABLE(hlptim);
688
689 /* Start timer in continuous mode */
690 __HAL_LPTIM_START_CONTINUOUS(hlptim);
691
692 /* Change the TIM state*/
693 hlptim->State = HAL_LPTIM_STATE_READY;
694
695 /* Return function status */
696 return HAL_OK;
697 }
698
699 /**
700 * @brief Stop the LPTIM PWM generation in interrupt mode.
701 * @param hlptim LPTIM handle
702 * @retval HAL status
703 */
HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef * hlptim)704 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim)
705 {
706 /* Check the parameters */
707 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
708
709 /* Set the LPTIM state */
710 hlptim->State = HAL_LPTIM_STATE_BUSY;
711
712 /* Disable the Peripheral */
713 __HAL_LPTIM_DISABLE(hlptim);
714
715 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
716 {
717 return HAL_TIMEOUT;
718 }
719
720 /* Disable Autoreload write complete interrupt */
721 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
722
723 /* Disable Compare write complete interrupt */
724 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
725
726 /* Disable Autoreload match interrupt */
727 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
728
729 /* Disable Compare match interrupt */
730 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
731
732 /* If external trigger source is used, then disable external trigger interrupt */
733 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
734 {
735 /* Disable external trigger interrupt */
736 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
737 }
738 #if defined(LPTIM_RCR_REP)
739
740 /* Enable Rep Update Ok interrupt */
741 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_REPOK);
742
743 /* Enable Update Event interrupt */
744 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_UPDATE);
745 #endif
746
747 /* Change the TIM state*/
748 hlptim->State = HAL_LPTIM_STATE_READY;
749
750 /* Return function status */
751 return HAL_OK;
752 }
753
754 /**
755 * @brief Start the LPTIM One pulse generation.
756 * @param hlptim LPTIM handle
757 * @param Period Specifies the Autoreload value.
758 * This parameter must be a value between 0x0000 and 0xFFFF.
759 * @param Pulse Specifies the compare value.
760 * This parameter must be a value between 0x0000 and 0xFFFF.
761 * @retval HAL status
762 */
HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)763 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
764 {
765 /* Check the parameters */
766 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
767 assert_param(IS_LPTIM_PERIOD(Period));
768 assert_param(IS_LPTIM_PULSE(Pulse));
769
770 /* Set the LPTIM state */
771 hlptim->State = HAL_LPTIM_STATE_BUSY;
772
773 /* Reset WAVE bit to set one pulse mode */
774 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
775
776 /* Enable the Peripheral */
777 __HAL_LPTIM_ENABLE(hlptim);
778
779 /* Clear flag */
780 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
781
782 /* Load the period value in the autoreload register */
783 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
784
785 /* Wait for the completion of the write operation to the LPTIM_ARR register */
786 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
787 {
788 return HAL_TIMEOUT;
789 }
790
791 /* Clear flag */
792 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
793
794 /* Load the pulse value in the compare register */
795 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
796
797 /* Wait for the completion of the write operation to the LPTIM_CMP register */
798 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
799 {
800 return HAL_TIMEOUT;
801 }
802
803 /* Start timer in single (one shot) mode */
804 __HAL_LPTIM_START_SINGLE(hlptim);
805
806 /* Change the TIM state*/
807 hlptim->State = HAL_LPTIM_STATE_READY;
808
809 /* Return function status */
810 return HAL_OK;
811 }
812
813 /**
814 * @brief Stop the LPTIM One pulse generation.
815 * @param hlptim LPTIM handle
816 * @retval HAL status
817 */
HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef * hlptim)818 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef *hlptim)
819 {
820 /* Check the parameters */
821 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
822
823 /* Set the LPTIM state */
824 hlptim->State = HAL_LPTIM_STATE_BUSY;
825
826 /* Disable the Peripheral */
827 __HAL_LPTIM_DISABLE(hlptim);
828
829 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
830 {
831 return HAL_TIMEOUT;
832 }
833
834 /* Change the TIM state*/
835 hlptim->State = HAL_LPTIM_STATE_READY;
836
837 /* Return function status */
838 return HAL_OK;
839 }
840
841 /**
842 * @brief Start the LPTIM One pulse generation in interrupt mode.
843 * @param hlptim LPTIM handle
844 * @param Period Specifies the Autoreload value.
845 * This parameter must be a value between 0x0000 and 0xFFFF.
846 * @param Pulse Specifies the compare value.
847 * This parameter must be a value between 0x0000 and 0xFFFF.
848 * @retval HAL status
849 */
HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)850 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
851 {
852 /* Check the parameters */
853 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
854 assert_param(IS_LPTIM_PERIOD(Period));
855 assert_param(IS_LPTIM_PULSE(Pulse));
856
857 /* Set the LPTIM state */
858 hlptim->State = HAL_LPTIM_STATE_BUSY;
859
860 /* Reset WAVE bit to set one pulse mode */
861 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
862
863 /* Enable the Peripheral */
864 __HAL_LPTIM_ENABLE(hlptim);
865
866 /* Clear flag */
867 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
868
869 /* Load the period value in the autoreload register */
870 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
871
872 /* Wait for the completion of the write operation to the LPTIM_ARR register */
873 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
874 {
875 return HAL_TIMEOUT;
876 }
877
878 /* Clear flag */
879 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
880
881 /* Load the pulse value in the compare register */
882 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
883
884 /* Wait for the completion of the write operation to the LPTIM_CMP register */
885 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
886 {
887 return HAL_TIMEOUT;
888 }
889
890 /* Disable the Peripheral */
891 __HAL_LPTIM_DISABLE(hlptim);
892
893 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
894 {
895 return HAL_TIMEOUT;
896 }
897
898 /* Enable Autoreload write complete interrupt */
899 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
900
901 /* Enable Compare write complete interrupt */
902 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
903
904 /* Enable Autoreload match interrupt */
905 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
906
907 /* Enable Compare match interrupt */
908 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
909
910 /* If external trigger source is used, then enable external trigger interrupt */
911 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
912 {
913 /* Enable external trigger interrupt */
914 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
915 }
916 #if defined(LPTIM_RCR_REP)
917
918 /* Enable Rep Update Ok interrupt */
919 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_REPOK);
920
921 /* Enable Update Event interrupt */
922 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_UPDATE);
923 #endif
924
925 /* Enable the Peripheral */
926 __HAL_LPTIM_ENABLE(hlptim);
927
928 /* Start timer in single (one shot) mode */
929 __HAL_LPTIM_START_SINGLE(hlptim);
930
931 /* Change the TIM state*/
932 hlptim->State = HAL_LPTIM_STATE_READY;
933
934 /* Return function status */
935 return HAL_OK;
936 }
937
938 /**
939 * @brief Stop the LPTIM One pulse generation in interrupt mode.
940 * @param hlptim LPTIM handle
941 * @retval HAL status
942 */
HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef * hlptim)943 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef *hlptim)
944 {
945 /* Check the parameters */
946 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
947
948 /* Set the LPTIM state */
949 hlptim->State = HAL_LPTIM_STATE_BUSY;
950
951 /* Disable the Peripheral */
952 __HAL_LPTIM_DISABLE(hlptim);
953
954 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
955 {
956 return HAL_TIMEOUT;
957 }
958
959 /* Disable Autoreload write complete interrupt */
960 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
961
962 /* Disable Compare write complete interrupt */
963 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
964
965 /* Disable Autoreload match interrupt */
966 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
967
968 /* Disable Compare match interrupt */
969 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
970
971 /* If external trigger source is used, then disable external trigger interrupt */
972 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
973 {
974 /* Disable external trigger interrupt */
975 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
976 }
977 #if defined(LPTIM_RCR_REP)
978
979 /* Enable Rep Update Ok interrupt */
980 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_REPOK);
981
982 /* Enable Update Event interrupt */
983 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_UPDATE);
984 #endif
985
986 /* Change the TIM state*/
987 hlptim->State = HAL_LPTIM_STATE_READY;
988
989 /* Return function status */
990 return HAL_OK;
991 }
992
993 /**
994 * @brief Start the LPTIM in Set once mode.
995 * @param hlptim LPTIM handle
996 * @param Period Specifies the Autoreload value.
997 * This parameter must be a value between 0x0000 and 0xFFFF.
998 * @param Pulse Specifies the compare value.
999 * This parameter must be a value between 0x0000 and 0xFFFF.
1000 * @retval HAL status
1001 */
HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)1002 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
1003 {
1004 /* Check the parameters */
1005 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1006 assert_param(IS_LPTIM_PERIOD(Period));
1007 assert_param(IS_LPTIM_PULSE(Pulse));
1008
1009 /* Set the LPTIM state */
1010 hlptim->State = HAL_LPTIM_STATE_BUSY;
1011
1012 /* Set WAVE bit to enable the set once mode */
1013 hlptim->Instance->CFGR |= LPTIM_CFGR_WAVE;
1014
1015 /* Enable the Peripheral */
1016 __HAL_LPTIM_ENABLE(hlptim);
1017
1018 /* Clear flag */
1019 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1020
1021 /* Load the period value in the autoreload register */
1022 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1023
1024 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1025 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1026 {
1027 return HAL_TIMEOUT;
1028 }
1029
1030 /* Clear flag */
1031 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1032
1033 /* Load the pulse value in the compare register */
1034 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
1035
1036 /* Wait for the completion of the write operation to the LPTIM_CMP register */
1037 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
1038 {
1039 return HAL_TIMEOUT;
1040 }
1041
1042 /* Start timer in single (one shot) mode */
1043 __HAL_LPTIM_START_SINGLE(hlptim);
1044
1045 /* Change the TIM state*/
1046 hlptim->State = HAL_LPTIM_STATE_READY;
1047
1048 /* Return function status */
1049 return HAL_OK;
1050 }
1051
1052 /**
1053 * @brief Stop the LPTIM Set once mode.
1054 * @param hlptim LPTIM handle
1055 * @retval HAL status
1056 */
HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef * hlptim)1057 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim)
1058 {
1059 /* Check the parameters */
1060 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1061
1062 /* Set the LPTIM state */
1063 hlptim->State = HAL_LPTIM_STATE_BUSY;
1064
1065 /* Disable the Peripheral */
1066 __HAL_LPTIM_DISABLE(hlptim);
1067
1068 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1069 {
1070 return HAL_TIMEOUT;
1071 }
1072
1073 /* Change the TIM state*/
1074 hlptim->State = HAL_LPTIM_STATE_READY;
1075
1076 /* Return function status */
1077 return HAL_OK;
1078 }
1079
1080 /**
1081 * @brief Start the LPTIM Set once mode in interrupt mode.
1082 * @param hlptim LPTIM handle
1083 * @param Period Specifies the Autoreload value.
1084 * This parameter must be a value between 0x0000 and 0xFFFF.
1085 * @param Pulse Specifies the compare value.
1086 * This parameter must be a value between 0x0000 and 0xFFFF.
1087 * @retval HAL status
1088 */
HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)1089 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
1090 {
1091 /* Check the parameters */
1092 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1093 assert_param(IS_LPTIM_PERIOD(Period));
1094 assert_param(IS_LPTIM_PULSE(Pulse));
1095
1096 /* Set the LPTIM state */
1097 hlptim->State = HAL_LPTIM_STATE_BUSY;
1098
1099 /* Set WAVE bit to enable the set once mode */
1100 hlptim->Instance->CFGR |= LPTIM_CFGR_WAVE;
1101
1102 /* Enable the Peripheral */
1103 __HAL_LPTIM_ENABLE(hlptim);
1104
1105 /* Clear flag */
1106 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1107
1108 /* Load the period value in the autoreload register */
1109 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1110
1111 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1112 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1113 {
1114 return HAL_TIMEOUT;
1115 }
1116
1117 /* Clear flag */
1118 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1119
1120 /* Load the pulse value in the compare register */
1121 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
1122
1123 /* Wait for the completion of the write operation to the LPTIM_CMP register */
1124 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
1125 {
1126 return HAL_TIMEOUT;
1127 }
1128
1129 /* Disable the Peripheral */
1130 __HAL_LPTIM_DISABLE(hlptim);
1131
1132 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1133 {
1134 return HAL_TIMEOUT;
1135 }
1136
1137 /* Enable Autoreload write complete interrupt */
1138 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
1139
1140 /* Enable Compare write complete interrupt */
1141 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
1142
1143 /* Enable Autoreload match interrupt */
1144 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
1145
1146 /* Enable Compare match interrupt */
1147 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
1148
1149 /* If external trigger source is used, then enable external trigger interrupt */
1150 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
1151 {
1152 /* Enable external trigger interrupt */
1153 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
1154 }
1155
1156 /* Enable the Peripheral */
1157 __HAL_LPTIM_ENABLE(hlptim);
1158
1159 /* Start timer in single (one shot) mode */
1160 __HAL_LPTIM_START_SINGLE(hlptim);
1161
1162 /* Change the TIM state*/
1163 hlptim->State = HAL_LPTIM_STATE_READY;
1164
1165 /* Return function status */
1166 return HAL_OK;
1167 }
1168
1169 /**
1170 * @brief Stop the LPTIM Set once mode in interrupt mode.
1171 * @param hlptim LPTIM handle
1172 * @retval HAL status
1173 */
HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef * hlptim)1174 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1175 {
1176 /* Check the parameters */
1177 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1178
1179 /* Set the LPTIM state */
1180 hlptim->State = HAL_LPTIM_STATE_BUSY;
1181
1182 /* Disable the Peripheral */
1183 __HAL_LPTIM_DISABLE(hlptim);
1184
1185 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1186 {
1187 return HAL_TIMEOUT;
1188 }
1189
1190 /* Disable Autoreload write complete interrupt */
1191 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
1192
1193 /* Disable Compare write complete interrupt */
1194 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
1195
1196 /* Disable Autoreload match interrupt */
1197 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
1198
1199 /* Disable Compare match interrupt */
1200 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
1201
1202 /* If external trigger source is used, then disable external trigger interrupt */
1203 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
1204 {
1205 /* Disable external trigger interrupt */
1206 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
1207 }
1208
1209 /* Change the TIM state*/
1210 hlptim->State = HAL_LPTIM_STATE_READY;
1211
1212 /* Return function status */
1213 return HAL_OK;
1214 }
1215
1216 /**
1217 * @brief Start the Encoder interface.
1218 * @param hlptim LPTIM handle
1219 * @param Period Specifies the Autoreload value.
1220 * This parameter must be a value between 0x0000 and 0xFFFF.
1221 * @retval HAL status
1222 */
HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period)1223 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1224 {
1225 uint32_t tmpcfgr;
1226
1227 /* Check the parameters */
1228 assert_param(IS_LPTIM_ENCODER_INTERFACE_INSTANCE(hlptim->Instance));
1229 assert_param(IS_LPTIM_PERIOD(Period));
1230 assert_param(hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC);
1231 assert_param(hlptim->Init.Clock.Prescaler == LPTIM_PRESCALER_DIV1);
1232 assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
1233
1234 /* Set the LPTIM state */
1235 hlptim->State = HAL_LPTIM_STATE_BUSY;
1236
1237 /* Get the LPTIMx CFGR value */
1238 tmpcfgr = hlptim->Instance->CFGR;
1239
1240 /* Clear CKPOL bits */
1241 tmpcfgr &= (uint32_t)(~LPTIM_CFGR_CKPOL);
1242
1243 /* Set Input polarity */
1244 tmpcfgr |= hlptim->Init.UltraLowPowerClock.Polarity;
1245
1246 /* Write to LPTIMx CFGR */
1247 hlptim->Instance->CFGR = tmpcfgr;
1248
1249 /* Set ENC bit to enable the encoder interface */
1250 hlptim->Instance->CFGR |= LPTIM_CFGR_ENC;
1251
1252 /* Enable the Peripheral */
1253 __HAL_LPTIM_ENABLE(hlptim);
1254
1255 /* Clear flag */
1256 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1257
1258 /* Load the period value in the autoreload register */
1259 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1260
1261 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1262 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1263 {
1264 return HAL_TIMEOUT;
1265 }
1266
1267 /* Start timer in continuous mode */
1268 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1269
1270 /* Change the TIM state*/
1271 hlptim->State = HAL_LPTIM_STATE_READY;
1272
1273 /* Return function status */
1274 return HAL_OK;
1275 }
1276
1277 /**
1278 * @brief Stop the Encoder interface.
1279 * @param hlptim LPTIM handle
1280 * @retval HAL status
1281 */
HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef * hlptim)1282 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef *hlptim)
1283 {
1284 /* Check the parameters */
1285 assert_param(IS_LPTIM_ENCODER_INTERFACE_INSTANCE(hlptim->Instance));
1286
1287 /* Set the LPTIM state */
1288 hlptim->State = HAL_LPTIM_STATE_BUSY;
1289
1290 /* Disable the Peripheral */
1291 __HAL_LPTIM_DISABLE(hlptim);
1292
1293 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1294 {
1295 return HAL_TIMEOUT;
1296 }
1297
1298 /* Reset ENC bit to disable the encoder interface */
1299 hlptim->Instance->CFGR &= ~LPTIM_CFGR_ENC;
1300
1301 /* Change the TIM state*/
1302 hlptim->State = HAL_LPTIM_STATE_READY;
1303
1304 /* Return function status */
1305 return HAL_OK;
1306 }
1307
1308 /**
1309 * @brief Start the Encoder interface in interrupt mode.
1310 * @param hlptim LPTIM handle
1311 * @param Period Specifies the Autoreload value.
1312 * This parameter must be a value between 0x0000 and 0xFFFF.
1313 * @retval HAL status
1314 */
HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period)1315 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1316 {
1317 uint32_t tmpcfgr;
1318
1319 /* Check the parameters */
1320 assert_param(IS_LPTIM_ENCODER_INTERFACE_INSTANCE(hlptim->Instance));
1321 assert_param(IS_LPTIM_PERIOD(Period));
1322 assert_param(hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC);
1323 assert_param(hlptim->Init.Clock.Prescaler == LPTIM_PRESCALER_DIV1);
1324 assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
1325
1326 /* Set the LPTIM state */
1327 hlptim->State = HAL_LPTIM_STATE_BUSY;
1328
1329 /* Configure edge sensitivity for encoder mode */
1330 /* Get the LPTIMx CFGR value */
1331 tmpcfgr = hlptim->Instance->CFGR;
1332
1333 /* Clear CKPOL bits */
1334 tmpcfgr &= (uint32_t)(~LPTIM_CFGR_CKPOL);
1335
1336 /* Set Input polarity */
1337 tmpcfgr |= hlptim->Init.UltraLowPowerClock.Polarity;
1338
1339 /* Write to LPTIMx CFGR */
1340 hlptim->Instance->CFGR = tmpcfgr;
1341
1342 /* Set ENC bit to enable the encoder interface */
1343 hlptim->Instance->CFGR |= LPTIM_CFGR_ENC;
1344
1345 /* Enable the Peripheral */
1346 __HAL_LPTIM_ENABLE(hlptim);
1347
1348 /* Clear flag */
1349 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1350
1351 /* Load the period value in the autoreload register */
1352 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1353
1354 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1355 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1356 {
1357 return HAL_TIMEOUT;
1358 }
1359
1360 /* Disable the Peripheral */
1361 __HAL_LPTIM_DISABLE(hlptim);
1362
1363 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1364 {
1365 return HAL_TIMEOUT;
1366 }
1367
1368 /* Enable "switch to down direction" interrupt */
1369 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_DOWN);
1370
1371 /* Enable "switch to up direction" interrupt */
1372 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_UP);
1373
1374 /* Enable the Peripheral */
1375 __HAL_LPTIM_ENABLE(hlptim);
1376
1377 /* Start timer in continuous mode */
1378 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1379
1380 /* Change the TIM state*/
1381 hlptim->State = HAL_LPTIM_STATE_READY;
1382
1383 /* Return function status */
1384 return HAL_OK;
1385 }
1386
1387 /**
1388 * @brief Stop the Encoder interface in interrupt mode.
1389 * @param hlptim LPTIM handle
1390 * @retval HAL status
1391 */
HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef * hlptim)1392 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1393 {
1394 /* Check the parameters */
1395 assert_param(IS_LPTIM_ENCODER_INTERFACE_INSTANCE(hlptim->Instance));
1396
1397 /* Set the LPTIM state */
1398 hlptim->State = HAL_LPTIM_STATE_BUSY;
1399
1400 /* Disable the Peripheral */
1401 __HAL_LPTIM_DISABLE(hlptim);
1402
1403 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1404 {
1405 return HAL_TIMEOUT;
1406 }
1407
1408 /* Reset ENC bit to disable the encoder interface */
1409 hlptim->Instance->CFGR &= ~LPTIM_CFGR_ENC;
1410
1411 /* Disable "switch to down direction" interrupt */
1412 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_DOWN);
1413
1414 /* Disable "switch to up direction" interrupt */
1415 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_UP);
1416
1417 /* Change the TIM state*/
1418 hlptim->State = HAL_LPTIM_STATE_READY;
1419
1420 /* Return function status */
1421 return HAL_OK;
1422 }
1423
1424 /**
1425 * @brief Start the Timeout function.
1426 * @note The first trigger event will start the timer, any successive
1427 * trigger event will reset the counter and the timer restarts.
1428 * @param hlptim LPTIM handle
1429 * @param Period Specifies the Autoreload value.
1430 * This parameter must be a value between 0x0000 and 0xFFFF.
1431 * @param Timeout Specifies the TimeOut value to reset the counter.
1432 * This parameter must be a value between 0x0000 and 0xFFFF.
1433 * @retval HAL status
1434 */
HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Timeout)1435 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout)
1436 {
1437 /* Check the parameters */
1438 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1439 assert_param(IS_LPTIM_PERIOD(Period));
1440 assert_param(IS_LPTIM_PULSE(Timeout));
1441
1442 /* Set the LPTIM state */
1443 hlptim->State = HAL_LPTIM_STATE_BUSY;
1444
1445 /* Set TIMOUT bit to enable the timeout function */
1446 hlptim->Instance->CFGR |= LPTIM_CFGR_TIMOUT;
1447
1448 /* Enable the Peripheral */
1449 __HAL_LPTIM_ENABLE(hlptim);
1450
1451 /* Clear flag */
1452 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1453
1454 /* Load the period value in the autoreload register */
1455 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1456
1457 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1458 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1459 {
1460 return HAL_TIMEOUT;
1461 }
1462
1463 /* Clear flag */
1464 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1465
1466 /* Load the Timeout value in the compare register */
1467 __HAL_LPTIM_COMPARE_SET(hlptim, Timeout);
1468
1469 /* Wait for the completion of the write operation to the LPTIM_CMP register */
1470 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
1471 {
1472 return HAL_TIMEOUT;
1473 }
1474
1475 /* Start timer in continuous mode */
1476 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1477
1478 /* Change the TIM state*/
1479 hlptim->State = HAL_LPTIM_STATE_READY;
1480
1481 /* Return function status */
1482 return HAL_OK;
1483 }
1484
1485 /**
1486 * @brief Stop the Timeout function.
1487 * @param hlptim LPTIM handle
1488 * @retval HAL status
1489 */
HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef * hlptim)1490 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef *hlptim)
1491 {
1492 /* Check the parameters */
1493 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1494
1495 /* Set the LPTIM state */
1496 hlptim->State = HAL_LPTIM_STATE_BUSY;
1497
1498 /* Disable the Peripheral */
1499 __HAL_LPTIM_DISABLE(hlptim);
1500
1501 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1502 {
1503 return HAL_TIMEOUT;
1504 }
1505
1506 /* Reset TIMOUT bit to enable the timeout function */
1507 hlptim->Instance->CFGR &= ~LPTIM_CFGR_TIMOUT;
1508
1509 /* Change the TIM state*/
1510 hlptim->State = HAL_LPTIM_STATE_READY;
1511
1512 /* Return function status */
1513 return HAL_OK;
1514 }
1515
1516 /**
1517 * @brief Start the Timeout function in interrupt mode.
1518 * @note The first trigger event will start the timer, any successive
1519 * trigger event will reset the counter and the timer restarts.
1520 * @param hlptim LPTIM handle
1521 * @param Period Specifies the Autoreload value.
1522 * This parameter must be a value between 0x0000 and 0xFFFF.
1523 * @param Timeout Specifies the TimeOut value to reset the counter.
1524 * This parameter must be a value between 0x0000 and 0xFFFF.
1525 * @retval HAL status
1526 */
HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Timeout)1527 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout)
1528 {
1529 /* Check the parameters */
1530 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1531 assert_param(IS_LPTIM_PERIOD(Period));
1532 assert_param(IS_LPTIM_PULSE(Timeout));
1533
1534 /* Set the LPTIM state */
1535 hlptim->State = HAL_LPTIM_STATE_BUSY;
1536
1537 /* Enable EXTI Line interrupt on the LPTIM Wake-up Timer */
1538 __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT(hlptim->Instance);
1539
1540 /* Set TIMOUT bit to enable the timeout function */
1541 hlptim->Instance->CFGR |= LPTIM_CFGR_TIMOUT;
1542
1543 /* Enable the Peripheral */
1544 __HAL_LPTIM_ENABLE(hlptim);
1545
1546 /* Clear flag */
1547 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1548
1549 /* Load the period value in the autoreload register */
1550 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1551
1552 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1553 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1554 {
1555 return HAL_TIMEOUT;
1556 }
1557
1558 /* Clear flag */
1559 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1560
1561 /* Load the Timeout value in the compare register */
1562 __HAL_LPTIM_COMPARE_SET(hlptim, Timeout);
1563
1564 /* Wait for the completion of the write operation to the LPTIM_CMP register */
1565 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
1566 {
1567 return HAL_TIMEOUT;
1568 }
1569
1570 /* Disable the Peripheral */
1571 __HAL_LPTIM_DISABLE(hlptim);
1572
1573 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1574 {
1575 return HAL_TIMEOUT;
1576 }
1577
1578 /* Enable Compare match interrupt */
1579 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
1580
1581 /* Enable the Peripheral */
1582 __HAL_LPTIM_ENABLE(hlptim);
1583
1584 /* Start timer in continuous mode */
1585 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1586
1587 /* Change the TIM state*/
1588 hlptim->State = HAL_LPTIM_STATE_READY;
1589
1590 /* Return function status */
1591 return HAL_OK;
1592 }
1593
1594 /**
1595 * @brief Stop the Timeout function in interrupt mode.
1596 * @param hlptim LPTIM handle
1597 * @retval HAL status
1598 */
HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef * hlptim)1599 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1600 {
1601 /* Check the parameters */
1602 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1603
1604 /* Set the LPTIM state */
1605 hlptim->State = HAL_LPTIM_STATE_BUSY;
1606
1607 /* Disable EXTI Line interrupt on the LPTIM Wake-up Timer */
1608 __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT(hlptim->Instance);
1609
1610 /* Disable the Peripheral */
1611 __HAL_LPTIM_DISABLE(hlptim);
1612
1613 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1614 {
1615 return HAL_TIMEOUT;
1616 }
1617
1618 /* Reset TIMOUT bit to enable the timeout function */
1619 hlptim->Instance->CFGR &= ~LPTIM_CFGR_TIMOUT;
1620
1621 /* Disable Compare match interrupt */
1622 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
1623
1624 /* Change the TIM state*/
1625 hlptim->State = HAL_LPTIM_STATE_READY;
1626
1627 /* Return function status */
1628 return HAL_OK;
1629 }
1630
1631 /**
1632 * @brief Start the Counter mode.
1633 * @param hlptim LPTIM handle
1634 * @param Period Specifies the Autoreload value.
1635 * This parameter must be a value between 0x0000 and 0xFFFF.
1636 * @retval HAL status
1637 */
HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period)1638 HAL_StatusTypeDef HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1639 {
1640 /* Check the parameters */
1641 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1642 assert_param(IS_LPTIM_PERIOD(Period));
1643
1644 /* Set the LPTIM state */
1645 hlptim->State = HAL_LPTIM_STATE_BUSY;
1646
1647 /* If clock source is not ULPTIM clock and counter source is external, then it must not be prescaled */
1648 if ((hlptim->Init.Clock.Source != LPTIM_CLOCKSOURCE_ULPTIM) && (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
1649 {
1650 /* Check if clock is prescaled */
1651 assert_param(IS_LPTIM_CLOCK_PRESCALERDIV1(hlptim->Init.Clock.Prescaler));
1652 /* Set clock prescaler to 0 */
1653 hlptim->Instance->CFGR &= ~LPTIM_CFGR_PRESC;
1654 }
1655
1656 /* Enable the Peripheral */
1657 __HAL_LPTIM_ENABLE(hlptim);
1658
1659 /* Clear flag */
1660 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1661
1662 /* Load the period value in the autoreload register */
1663 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1664
1665 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1666 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1667 {
1668 return HAL_TIMEOUT;
1669 }
1670
1671 /* Start timer in continuous mode */
1672 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1673
1674 /* Change the TIM state*/
1675 hlptim->State = HAL_LPTIM_STATE_READY;
1676
1677 /* Return function status */
1678 return HAL_OK;
1679 }
1680
1681 /**
1682 * @brief Stop the Counter mode.
1683 * @param hlptim LPTIM handle
1684 * @retval HAL status
1685 */
HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef * hlptim)1686 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef *hlptim)
1687 {
1688 /* Check the parameters */
1689 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1690
1691 /* Set the LPTIM state */
1692 hlptim->State = HAL_LPTIM_STATE_BUSY;
1693
1694 /* Disable the Peripheral */
1695 __HAL_LPTIM_DISABLE(hlptim);
1696
1697 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1698 {
1699 return HAL_TIMEOUT;
1700 }
1701
1702 /* Change the TIM state*/
1703 hlptim->State = HAL_LPTIM_STATE_READY;
1704
1705 /* Return function status */
1706 return HAL_OK;
1707 }
1708
1709 /**
1710 * @brief Start the Counter mode in interrupt mode.
1711 * @param hlptim LPTIM handle
1712 * @param Period Specifies the Autoreload value.
1713 * This parameter must be a value between 0x0000 and 0xFFFF.
1714 * @retval HAL status
1715 */
HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period)1716 HAL_StatusTypeDef HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1717 {
1718 /* Check the parameters */
1719 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1720 assert_param(IS_LPTIM_PERIOD(Period));
1721
1722 /* Set the LPTIM state */
1723 hlptim->State = HAL_LPTIM_STATE_BUSY;
1724
1725 /* Enable EXTI Line interrupt on the LPTIM Wake-up Timer */
1726 __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT(hlptim->Instance);
1727
1728 /* If clock source is not ULPTIM clock and counter source is external, then it must not be prescaled */
1729 if ((hlptim->Init.Clock.Source != LPTIM_CLOCKSOURCE_ULPTIM) && (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
1730 {
1731 /* Check if clock is prescaled */
1732 assert_param(IS_LPTIM_CLOCK_PRESCALERDIV1(hlptim->Init.Clock.Prescaler));
1733 /* Set clock prescaler to 0 */
1734 hlptim->Instance->CFGR &= ~LPTIM_CFGR_PRESC;
1735 }
1736
1737 /* Enable the Peripheral */
1738 __HAL_LPTIM_ENABLE(hlptim);
1739
1740 /* Clear flag */
1741 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1742
1743 /* Load the period value in the autoreload register */
1744 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1745
1746 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1747 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1748 {
1749 return HAL_TIMEOUT;
1750 }
1751
1752 /* Disable the Peripheral */
1753 __HAL_LPTIM_DISABLE(hlptim);
1754
1755 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1756 {
1757 return HAL_TIMEOUT;
1758 }
1759
1760 /* Enable Autoreload write complete interrupt */
1761 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
1762
1763 /* Enable Autoreload match interrupt */
1764 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
1765
1766 #if defined(LPTIM_RCR_REP)
1767 /* Enable Rep Update Ok interrupt */
1768 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_REPOK);
1769
1770 /* Enable Update Event interrupt */
1771 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_UPDATE);
1772
1773 #endif
1774 /* Enable the Peripheral */
1775 __HAL_LPTIM_ENABLE(hlptim);
1776
1777 /* Start timer in continuous mode */
1778 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1779
1780 /* Change the TIM state*/
1781 hlptim->State = HAL_LPTIM_STATE_READY;
1782
1783 /* Return function status */
1784 return HAL_OK;
1785 }
1786
1787 /**
1788 * @brief Stop the Counter mode in interrupt mode.
1789 * @param hlptim LPTIM handle
1790 * @retval HAL status
1791 */
HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef * hlptim)1792 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1793 {
1794 /* Check the parameters */
1795 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1796
1797 /* Set the LPTIM state */
1798 hlptim->State = HAL_LPTIM_STATE_BUSY;
1799
1800 /* Disable EXTI Line interrupt on the LPTIM Wake-up Timer */
1801 __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT(hlptim->Instance);
1802
1803 /* Disable the Peripheral */
1804 __HAL_LPTIM_DISABLE(hlptim);
1805
1806 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1807 {
1808 return HAL_TIMEOUT;
1809 }
1810
1811 /* Disable Autoreload write complete interrupt */
1812 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
1813
1814 /* Disable Autoreload match interrupt */
1815 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
1816 #if defined(LPTIM_RCR_REP)
1817
1818 /* Disable Rep Update Ok interrupt */
1819 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_REPOK);
1820
1821 /* Disable Update Event interrupt */
1822 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_UPDATE);
1823 #endif
1824 /* Change the TIM state*/
1825 hlptim->State = HAL_LPTIM_STATE_READY;
1826
1827 /* Return function status */
1828 return HAL_OK;
1829 }
1830
1831 /**
1832 * @}
1833 */
1834
1835 /** @defgroup LPTIM_Exported_Functions_Group3 LPTIM Read operation functions
1836 * @brief Read operation functions.
1837 *
1838 @verbatim
1839 ==============================================================================
1840 ##### LPTIM Read operation functions #####
1841 ==============================================================================
1842 [..] This section provides LPTIM Reading functions.
1843 (+) Read the counter value.
1844 (+) Read the period (Auto-reload) value.
1845 (+) Read the pulse (Compare)value.
1846 @endverbatim
1847 * @{
1848 */
1849
1850 /**
1851 * @brief Return the current counter value.
1852 * @param hlptim LPTIM handle
1853 * @retval Counter value.
1854 */
HAL_LPTIM_ReadCounter(LPTIM_HandleTypeDef * hlptim)1855 uint32_t HAL_LPTIM_ReadCounter(LPTIM_HandleTypeDef *hlptim)
1856 {
1857 /* Check the parameters */
1858 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1859
1860 return (hlptim->Instance->CNT);
1861 }
1862
1863 /**
1864 * @brief Return the current Autoreload (Period) value.
1865 * @param hlptim LPTIM handle
1866 * @retval Autoreload value.
1867 */
HAL_LPTIM_ReadAutoReload(LPTIM_HandleTypeDef * hlptim)1868 uint32_t HAL_LPTIM_ReadAutoReload(LPTIM_HandleTypeDef *hlptim)
1869 {
1870 /* Check the parameters */
1871 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1872
1873 return (hlptim->Instance->ARR);
1874 }
1875
1876 /**
1877 * @brief Return the current Compare (Pulse) value.
1878 * @param hlptim LPTIM handle
1879 * @retval Compare value.
1880 */
HAL_LPTIM_ReadCompare(LPTIM_HandleTypeDef * hlptim)1881 uint32_t HAL_LPTIM_ReadCompare(LPTIM_HandleTypeDef *hlptim)
1882 {
1883 /* Check the parameters */
1884 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1885
1886 return (hlptim->Instance->CMP);
1887 }
1888
1889 /**
1890 * @}
1891 */
1892
1893 /** @defgroup LPTIM_Exported_Functions_Group4 LPTIM IRQ handler and callbacks
1894 * @brief LPTIM IRQ handler.
1895 *
1896 @verbatim
1897 ==============================================================================
1898 ##### LPTIM IRQ handler and callbacks #####
1899 ==============================================================================
1900 [..] This section provides LPTIM IRQ handler and callback functions called within
1901 the IRQ handler:
1902 (+) LPTIM interrupt request handler
1903 (+) Compare match Callback
1904 (+) Auto-reload match Callback
1905 (+) External trigger event detection Callback
1906 (+) Compare register write complete Callback
1907 (+) Auto-reload register write complete Callback
1908 (+) Up-counting direction change Callback
1909 (+) Down-counting direction change Callback
1910
1911 @endverbatim
1912 * @{
1913 */
1914
1915 /**
1916 * @brief Handle LPTIM interrupt request.
1917 * @param hlptim LPTIM handle
1918 * @retval None
1919 */
HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef * hlptim)1920 void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim)
1921 {
1922 /* Compare match interrupt */
1923 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_CMPM) != RESET)
1924 {
1925 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_CMPM) != RESET)
1926 {
1927 /* Clear Compare match flag */
1928 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPM);
1929
1930 /* Compare match Callback */
1931 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1932 hlptim->CompareMatchCallback(hlptim);
1933 #else
1934 HAL_LPTIM_CompareMatchCallback(hlptim);
1935 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1936 }
1937 }
1938
1939 /* Autoreload match interrupt */
1940 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_ARRM) != RESET)
1941 {
1942 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_ARRM) != RESET)
1943 {
1944 /* Clear Autoreload match flag */
1945 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARRM);
1946
1947 /* Autoreload match Callback */
1948 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1949 hlptim->AutoReloadMatchCallback(hlptim);
1950 #else
1951 HAL_LPTIM_AutoReloadMatchCallback(hlptim);
1952 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1953 }
1954 }
1955
1956 /* Trigger detected interrupt */
1957 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_EXTTRIG) != RESET)
1958 {
1959 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_EXTTRIG) != RESET)
1960 {
1961 /* Clear Trigger detected flag */
1962 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_EXTTRIG);
1963
1964 /* Trigger detected callback */
1965 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1966 hlptim->TriggerCallback(hlptim);
1967 #else
1968 HAL_LPTIM_TriggerCallback(hlptim);
1969 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1970 }
1971 }
1972
1973 /* Compare write interrupt */
1974 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_CMPOK) != RESET)
1975 {
1976 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_CMPOK) != RESET)
1977 {
1978 /* Clear Compare write flag */
1979 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1980
1981 /* Compare write Callback */
1982 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1983 hlptim->CompareWriteCallback(hlptim);
1984 #else
1985 HAL_LPTIM_CompareWriteCallback(hlptim);
1986 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1987 }
1988 }
1989
1990 /* Autoreload write interrupt */
1991 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_ARROK) != RESET)
1992 {
1993 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_ARROK) != RESET)
1994 {
1995 /* Clear Autoreload write flag */
1996 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1997
1998 /* Autoreload write Callback */
1999 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
2000 hlptim->AutoReloadWriteCallback(hlptim);
2001 #else
2002 HAL_LPTIM_AutoReloadWriteCallback(hlptim);
2003 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
2004 }
2005 }
2006
2007 /* Direction counter changed from Down to Up interrupt */
2008 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_UP) != RESET)
2009 {
2010 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_UP) != RESET)
2011 {
2012 /* Clear Direction counter changed from Down to Up flag */
2013 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_UP);
2014
2015 /* Direction counter changed from Down to Up Callback */
2016 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
2017 hlptim->DirectionUpCallback(hlptim);
2018 #else
2019 HAL_LPTIM_DirectionUpCallback(hlptim);
2020 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
2021 }
2022 }
2023
2024 /* Direction counter changed from Up to Down interrupt */
2025 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_DOWN) != RESET)
2026 {
2027 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_DOWN) != RESET)
2028 {
2029 /* Clear Direction counter changed from Up to Down flag */
2030 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_DOWN);
2031
2032 /* Direction counter changed from Up to Down Callback */
2033 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
2034 hlptim->DirectionDownCallback(hlptim);
2035 #else
2036 HAL_LPTIM_DirectionDownCallback(hlptim);
2037 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
2038 }
2039 }
2040 #if defined(LPTIM_RCR_REP)
2041
2042 /* Repetition counter underflowed (or contains zero) and the LPTIM counter
2043 overflowed */
2044 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_UPDATE) != RESET)
2045 {
2046 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_UPDATE) != RESET)
2047 {
2048 /* Clear update event flag */
2049 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_UPDATE);
2050
2051 /* Update event Callback */
2052 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
2053 hlptim->UpdateEventCallback(hlptim);
2054 #else
2055 HAL_LPTIM_UpdateEventCallback(hlptim);
2056 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
2057 }
2058 }
2059
2060 /* Successful APB bus write to repetition counter register */
2061 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_REPOK) != RESET)
2062 {
2063 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_REPOK) != RESET)
2064 {
2065 /* Clear successful APB bus write to repetition counter flag */
2066 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_REPOK);
2067
2068 /* Successful APB bus write to repetition counter Callback */
2069 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
2070 hlptim->RepCounterWriteCallback(hlptim);
2071 #else
2072 HAL_LPTIM_RepCounterWriteCallback(hlptim);
2073 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
2074 }
2075 }
2076 #endif
2077 }
2078
2079 /**
2080 * @brief Compare match callback in non-blocking mode.
2081 * @param hlptim LPTIM handle
2082 * @retval None
2083 */
HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef * hlptim)2084 __weak void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim)
2085 {
2086 /* Prevent unused argument(s) compilation warning */
2087 UNUSED(hlptim);
2088
2089 /* NOTE : This function should not be modified, when the callback is needed,
2090 the HAL_LPTIM_CompareMatchCallback could be implemented in the user file
2091 */
2092 }
2093
2094 /**
2095 * @brief Autoreload match callback in non-blocking mode.
2096 * @param hlptim LPTIM handle
2097 * @retval None
2098 */
HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef * hlptim)2099 __weak void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim)
2100 {
2101 /* Prevent unused argument(s) compilation warning */
2102 UNUSED(hlptim);
2103
2104 /* NOTE : This function should not be modified, when the callback is needed,
2105 the HAL_LPTIM_AutoReloadMatchCallback could be implemented in the user file
2106 */
2107 }
2108
2109 /**
2110 * @brief Trigger detected callback in non-blocking mode.
2111 * @param hlptim LPTIM handle
2112 * @retval None
2113 */
HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef * hlptim)2114 __weak void HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef *hlptim)
2115 {
2116 /* Prevent unused argument(s) compilation warning */
2117 UNUSED(hlptim);
2118
2119 /* NOTE : This function should not be modified, when the callback is needed,
2120 the HAL_LPTIM_TriggerCallback could be implemented in the user file
2121 */
2122 }
2123
2124 /**
2125 * @brief Compare write callback in non-blocking mode.
2126 * @param hlptim LPTIM handle
2127 * @retval None
2128 */
HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef * hlptim)2129 __weak void HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef *hlptim)
2130 {
2131 /* Prevent unused argument(s) compilation warning */
2132 UNUSED(hlptim);
2133
2134 /* NOTE : This function should not be modified, when the callback is needed,
2135 the HAL_LPTIM_CompareWriteCallback could be implemented in the user file
2136 */
2137 }
2138
2139 /**
2140 * @brief Autoreload write callback in non-blocking mode.
2141 * @param hlptim LPTIM handle
2142 * @retval None
2143 */
HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef * hlptim)2144 __weak void HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef *hlptim)
2145 {
2146 /* Prevent unused argument(s) compilation warning */
2147 UNUSED(hlptim);
2148
2149 /* NOTE : This function should not be modified, when the callback is needed,
2150 the HAL_LPTIM_AutoReloadWriteCallback could be implemented in the user file
2151 */
2152 }
2153
2154 /**
2155 * @brief Direction counter changed from Down to Up callback in non-blocking mode.
2156 * @param hlptim LPTIM handle
2157 * @retval None
2158 */
HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef * hlptim)2159 __weak void HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef *hlptim)
2160 {
2161 /* Prevent unused argument(s) compilation warning */
2162 UNUSED(hlptim);
2163
2164 /* NOTE : This function should not be modified, when the callback is needed,
2165 the HAL_LPTIM_DirectionUpCallback could be implemented in the user file
2166 */
2167 }
2168
2169 /**
2170 * @brief Direction counter changed from Up to Down callback in non-blocking mode.
2171 * @param hlptim LPTIM handle
2172 * @retval None
2173 */
HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef * hlptim)2174 __weak void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim)
2175 {
2176 /* Prevent unused argument(s) compilation warning */
2177 UNUSED(hlptim);
2178
2179 /* NOTE : This function should not be modified, when the callback is needed,
2180 the HAL_LPTIM_DirectionDownCallback could be implemented in the user file
2181 */
2182 }
2183 #if defined(LPTIM_RCR_REP)
2184
2185 /**
2186 * @brief Repetition counter underflowed (or contains zero) and LPTIM counter overflowed callback in non-blocking mode.
2187 * @param hlptim LPTIM handle
2188 * @retval None
2189 */
HAL_LPTIM_UpdateEventCallback(LPTIM_HandleTypeDef * hlptim)2190 __weak void HAL_LPTIM_UpdateEventCallback(LPTIM_HandleTypeDef *hlptim)
2191 {
2192 /* Prevent unused argument(s) compilation warning */
2193 UNUSED(hlptim);
2194
2195 /* NOTE : This function should not be modified, when the callback is needed,
2196 the HAL_LPTIM_UpdateEventCallback could be implemented in the user file
2197 */
2198 }
2199
2200 /**
2201 * @brief Successful APB bus write to repetition counter register callback in non-blocking mode.
2202 * @param hlptim LPTIM handle
2203 * @retval None
2204 */
HAL_LPTIM_RepCounterWriteCallback(LPTIM_HandleTypeDef * hlptim)2205 __weak void HAL_LPTIM_RepCounterWriteCallback(LPTIM_HandleTypeDef *hlptim)
2206 {
2207 /* Prevent unused argument(s) compilation warning */
2208 UNUSED(hlptim);
2209
2210 /* NOTE : This function should not be modified, when the callback is needed,
2211 the HAL_LPTIM_RepCounterWriteCallback could be implemented in the user file
2212 */
2213 }
2214 #endif
2215
2216 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
2217 /**
2218 * @brief Register a User LPTIM callback to be used instead of the weak predefined callback
2219 * @param hlptim LPTIM handle
2220 * @param CallbackID ID of the callback to be registered
2221 * This parameter can be one of the following values:
2222 * @arg @ref HAL_LPTIM_MSPINIT_CB_ID LPTIM Base Msp Init Callback ID
2223 * @arg @ref HAL_LPTIM_MSPDEINIT_CB_ID LPTIM Base Msp DeInit Callback ID
2224 * @arg @ref HAL_LPTIM_COMPARE_MATCH_CB_ID Compare match Callback ID
2225 * @arg @ref HAL_LPTIM_AUTORELOAD_MATCH_CB_ID Auto-reload match Callback ID
2226 * @arg @ref HAL_LPTIM_TRIGGER_CB_ID External trigger event detection Callback ID
2227 * @arg @ref HAL_LPTIM_COMPARE_WRITE_CB_ID Compare register write complete Callback ID
2228 * @arg @ref HAL_LPTIM_AUTORELOAD_WRITE_CB_ID Auto-reload register write complete Callback ID
2229 * @arg @ref HAL_LPTIM_DIRECTION_UP_CB_ID Up-counting direction change Callback ID
2230 * @arg @ref HAL_LPTIM_DIRECTION_DOWN_CB_ID Down-counting direction change Callback ID
2231 * @arg @ref HAL_LPTIM_UPDATE_EVENT_CB_ID Update event detection Callback ID (when available)
2232 * @arg @ref HAL_LPTIM_REP_COUNTER_WRITE_CB_ID Repetition counter register write complete Callback ID (when available)
2233 * @param pCallback pointer to the callback function
2234 * @retval status
2235 */
HAL_LPTIM_RegisterCallback(LPTIM_HandleTypeDef * hlptim,HAL_LPTIM_CallbackIDTypeDef CallbackID,pLPTIM_CallbackTypeDef pCallback)2236 HAL_StatusTypeDef HAL_LPTIM_RegisterCallback(LPTIM_HandleTypeDef *hlptim,
2237 HAL_LPTIM_CallbackIDTypeDef CallbackID,
2238 pLPTIM_CallbackTypeDef pCallback)
2239 {
2240 HAL_StatusTypeDef status = HAL_OK;
2241
2242 if (pCallback == NULL)
2243 {
2244 return HAL_ERROR;
2245 }
2246
2247 /* Process locked */
2248 __HAL_LOCK(hlptim);
2249
2250 if (hlptim->State == HAL_LPTIM_STATE_READY)
2251 {
2252 switch (CallbackID)
2253 {
2254 case HAL_LPTIM_MSPINIT_CB_ID :
2255 hlptim->MspInitCallback = pCallback;
2256 break;
2257
2258 case HAL_LPTIM_MSPDEINIT_CB_ID :
2259 hlptim->MspDeInitCallback = pCallback;
2260 break;
2261
2262 case HAL_LPTIM_COMPARE_MATCH_CB_ID :
2263 hlptim->CompareMatchCallback = pCallback;
2264 break;
2265
2266 case HAL_LPTIM_AUTORELOAD_MATCH_CB_ID :
2267 hlptim->AutoReloadMatchCallback = pCallback;
2268 break;
2269
2270 case HAL_LPTIM_TRIGGER_CB_ID :
2271 hlptim->TriggerCallback = pCallback;
2272 break;
2273
2274 case HAL_LPTIM_COMPARE_WRITE_CB_ID :
2275 hlptim->CompareWriteCallback = pCallback;
2276 break;
2277
2278 case HAL_LPTIM_AUTORELOAD_WRITE_CB_ID :
2279 hlptim->AutoReloadWriteCallback = pCallback;
2280 break;
2281
2282 case HAL_LPTIM_DIRECTION_UP_CB_ID :
2283 hlptim->DirectionUpCallback = pCallback;
2284 break;
2285
2286 case HAL_LPTIM_DIRECTION_DOWN_CB_ID :
2287 hlptim->DirectionDownCallback = pCallback;
2288 break;
2289 #if defined(LPTIM_RCR_REP)
2290
2291 case HAL_LPTIM_UPDATE_EVENT_CB_ID :
2292 hlptim->UpdateEventCallback = pCallback;
2293 break;
2294
2295 case HAL_LPTIM_REP_COUNTER_WRITE_CB_ID :
2296 hlptim->RepCounterWriteCallback = pCallback;
2297 break;
2298 #endif
2299
2300 default :
2301 /* Return error status */
2302 status = HAL_ERROR;
2303 break;
2304 }
2305 }
2306 else if (hlptim->State == HAL_LPTIM_STATE_RESET)
2307 {
2308 switch (CallbackID)
2309 {
2310 case HAL_LPTIM_MSPINIT_CB_ID :
2311 hlptim->MspInitCallback = pCallback;
2312 break;
2313
2314 case HAL_LPTIM_MSPDEINIT_CB_ID :
2315 hlptim->MspDeInitCallback = pCallback;
2316 break;
2317
2318 default :
2319 /* Return error status */
2320 status = HAL_ERROR;
2321 break;
2322 }
2323 }
2324 else
2325 {
2326 /* Return error status */
2327 status = HAL_ERROR;
2328 }
2329
2330 /* Release Lock */
2331 __HAL_UNLOCK(hlptim);
2332
2333 return status;
2334 }
2335
2336 /**
2337 * @brief Unregister a LPTIM callback
2338 * LLPTIM callback is redirected to the weak predefined callback
2339 * @param hlptim LPTIM handle
2340 * @param CallbackID ID of the callback to be unregistered
2341 * This parameter can be one of the following values:
2342 * @arg @ref HAL_LPTIM_MSPINIT_CB_ID LPTIM Base Msp Init Callback ID
2343 * @arg @ref HAL_LPTIM_MSPDEINIT_CB_ID LPTIM Base Msp DeInit Callback ID
2344 * @arg @ref HAL_LPTIM_COMPARE_MATCH_CB_ID Compare match Callback ID
2345 * @arg @ref HAL_LPTIM_AUTORELOAD_MATCH_CB_ID Auto-reload match Callback ID
2346 * @arg @ref HAL_LPTIM_TRIGGER_CB_ID External trigger event detection Callback ID
2347 * @arg @ref HAL_LPTIM_COMPARE_WRITE_CB_ID Compare register write complete Callback ID
2348 * @arg @ref HAL_LPTIM_AUTORELOAD_WRITE_CB_ID Auto-reload register write complete Callback ID
2349 * @arg @ref HAL_LPTIM_DIRECTION_UP_CB_ID Up-counting direction change Callback ID
2350 * @arg @ref HAL_LPTIM_DIRECTION_DOWN_CB_ID Down-counting direction change Callback ID
2351 * @arg @ref HAL_LPTIM_UPDATE_EVENT_CB_ID Update event detection Callback ID (when available)
2352 * @arg @ref HAL_LPTIM_REP_COUNTER_WRITE_CB_ID Repetition counter register write complete Callback ID (when available)
2353 * @retval status
2354 */
HAL_LPTIM_UnRegisterCallback(LPTIM_HandleTypeDef * hlptim,HAL_LPTIM_CallbackIDTypeDef CallbackID)2355 HAL_StatusTypeDef HAL_LPTIM_UnRegisterCallback(LPTIM_HandleTypeDef *hlptim,
2356 HAL_LPTIM_CallbackIDTypeDef CallbackID)
2357 {
2358 HAL_StatusTypeDef status = HAL_OK;
2359
2360 /* Process locked */
2361 __HAL_LOCK(hlptim);
2362
2363 if (hlptim->State == HAL_LPTIM_STATE_READY)
2364 {
2365 switch (CallbackID)
2366 {
2367 case HAL_LPTIM_MSPINIT_CB_ID :
2368 hlptim->MspInitCallback = HAL_LPTIM_MspInit; /* Legacy weak MspInit Callback */
2369 break;
2370
2371 case HAL_LPTIM_MSPDEINIT_CB_ID :
2372 hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit; /* Legacy weak Msp DeInit Callback */
2373 break;
2374
2375 case HAL_LPTIM_COMPARE_MATCH_CB_ID :
2376 hlptim->CompareMatchCallback = HAL_LPTIM_CompareMatchCallback; /* Legacy weak Compare match Callback */
2377 break;
2378
2379 case HAL_LPTIM_AUTORELOAD_MATCH_CB_ID :
2380 hlptim->AutoReloadMatchCallback = HAL_LPTIM_AutoReloadMatchCallback; /* Legacy weak Auto-reload match Callback */
2381 break;
2382
2383 case HAL_LPTIM_TRIGGER_CB_ID :
2384 hlptim->TriggerCallback = HAL_LPTIM_TriggerCallback; /* Legacy weak External trigger event detection Callback */
2385 break;
2386
2387 case HAL_LPTIM_COMPARE_WRITE_CB_ID :
2388 hlptim->CompareWriteCallback = HAL_LPTIM_CompareWriteCallback; /* Legacy weak Compare register write complete Callback */
2389 break;
2390
2391 case HAL_LPTIM_AUTORELOAD_WRITE_CB_ID :
2392 hlptim->AutoReloadWriteCallback = HAL_LPTIM_AutoReloadWriteCallback; /* Legacy weak Auto-reload register write complete Callback */
2393 break;
2394
2395 case HAL_LPTIM_DIRECTION_UP_CB_ID :
2396 hlptim->DirectionUpCallback = HAL_LPTIM_DirectionUpCallback; /* Legacy weak Up-counting direction change Callback */
2397 break;
2398
2399 case HAL_LPTIM_DIRECTION_DOWN_CB_ID :
2400 hlptim->DirectionDownCallback = HAL_LPTIM_DirectionDownCallback; /* Legacy weak Down-counting direction change Callback */
2401 break;
2402 #if defined(LPTIM_RCR_REP)
2403
2404 case HAL_LPTIM_UPDATE_EVENT_CB_ID :
2405 hlptim->UpdateEventCallback = HAL_LPTIM_UpdateEventCallback; /* Legacy weak Update event detection Callback */
2406 break;
2407
2408 case HAL_LPTIM_REP_COUNTER_WRITE_CB_ID :
2409 hlptim->RepCounterWriteCallback = HAL_LPTIM_RepCounterWriteCallback; /* Legacy weak Repetition counter register write complete Callback */
2410 break;
2411 #endif
2412
2413 default :
2414 /* Return error status */
2415 status = HAL_ERROR;
2416 break;
2417 }
2418 }
2419 else if (hlptim->State == HAL_LPTIM_STATE_RESET)
2420 {
2421 switch (CallbackID)
2422 {
2423 case HAL_LPTIM_MSPINIT_CB_ID :
2424 hlptim->MspInitCallback = HAL_LPTIM_MspInit; /* Legacy weak MspInit Callback */
2425 break;
2426
2427 case HAL_LPTIM_MSPDEINIT_CB_ID :
2428 hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit; /* Legacy weak Msp DeInit Callback */
2429 break;
2430
2431 default :
2432 /* Return error status */
2433 status = HAL_ERROR;
2434 break;
2435 }
2436 }
2437 else
2438 {
2439 /* Return error status */
2440 status = HAL_ERROR;
2441 }
2442
2443 /* Release Lock */
2444 __HAL_UNLOCK(hlptim);
2445
2446 return status;
2447 }
2448 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
2449
2450 /**
2451 * @}
2452 */
2453
2454 /** @defgroup LPTIM_Group5 Peripheral State functions
2455 * @brief Peripheral State functions.
2456 *
2457 @verbatim
2458 ==============================================================================
2459 ##### Peripheral State functions #####
2460 ==============================================================================
2461 [..]
2462 This subsection permits to get in run-time the status of the peripheral.
2463
2464 @endverbatim
2465 * @{
2466 */
2467
2468 /**
2469 * @brief Return the LPTIM handle state.
2470 * @param hlptim LPTIM handle
2471 * @retval HAL state
2472 */
HAL_LPTIM_GetState(LPTIM_HandleTypeDef * hlptim)2473 HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(LPTIM_HandleTypeDef *hlptim)
2474 {
2475 /* Return LPTIM handle state */
2476 return hlptim->State;
2477 }
2478
2479 /**
2480 * @}
2481 */
2482
2483
2484 /**
2485 * @}
2486 */
2487
2488 /* Private functions ---------------------------------------------------------*/
2489
2490 /** @defgroup LPTIM_Private_Functions LPTIM Private Functions
2491 * @{
2492 */
2493 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
2494 /**
2495 * @brief Reset interrupt callbacks to the legacy weak callbacks.
2496 * @param lptim pointer to a LPTIM_HandleTypeDef structure that contains
2497 * the configuration information for LPTIM module.
2498 * @retval None
2499 */
LPTIM_ResetCallback(LPTIM_HandleTypeDef * lptim)2500 static void LPTIM_ResetCallback(LPTIM_HandleTypeDef *lptim)
2501 {
2502 /* Reset the LPTIM callback to the legacy weak callbacks */
2503 lptim->CompareMatchCallback = HAL_LPTIM_CompareMatchCallback; /* Compare match Callback */
2504 lptim->AutoReloadMatchCallback = HAL_LPTIM_AutoReloadMatchCallback; /* Auto-reload match Callback */
2505 lptim->TriggerCallback = HAL_LPTIM_TriggerCallback; /* External trigger event detection Callback */
2506 lptim->CompareWriteCallback = HAL_LPTIM_CompareWriteCallback; /* Compare register write complete Callback */
2507 lptim->AutoReloadWriteCallback = HAL_LPTIM_AutoReloadWriteCallback; /* Auto-reload register write complete Callback */
2508 lptim->DirectionUpCallback = HAL_LPTIM_DirectionUpCallback; /* Up-counting direction change Callback */
2509 lptim->DirectionDownCallback = HAL_LPTIM_DirectionDownCallback; /* Down-counting direction change Callback */
2510 #if defined(LPTIM_RCR_REP)
2511 lptim->UpdateEventCallback = HAL_LPTIM_UpdateEventCallback; /* Update event detection Callback */
2512 lptim->RepCounterWriteCallback = HAL_LPTIM_RepCounterWriteCallback; /* Repetition counter register write complete Callback */
2513 #endif
2514 }
2515 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
2516
2517 /**
2518 * @brief LPTimer Wait for flag set
2519 * @param hlptim pointer to a LPTIM_HandleTypeDef structure that contains
2520 * the configuration information for LPTIM module.
2521 * @param flag The lptim flag
2522 * @retval HAL status
2523 */
LPTIM_WaitForFlag(LPTIM_HandleTypeDef * hlptim,uint32_t flag)2524 static HAL_StatusTypeDef LPTIM_WaitForFlag(LPTIM_HandleTypeDef *hlptim, uint32_t flag)
2525 {
2526 HAL_StatusTypeDef result = HAL_OK;
2527 uint32_t count = TIMEOUT * (SystemCoreClock / 20UL / 1000UL);
2528 do
2529 {
2530 count--;
2531 if (count == 0UL)
2532 {
2533 result = HAL_TIMEOUT;
2534 }
2535 }
2536 while ((!(__HAL_LPTIM_GET_FLAG((hlptim), (flag)))) && (count != 0UL));
2537
2538 return result;
2539 }
2540
2541 /**
2542 * @brief Disable LPTIM HW instance.
2543 * @param hlptim pointer to a LPTIM_HandleTypeDef structure that contains
2544 * the configuration information for LPTIM module.
2545 * @note The following sequence is required to solve LPTIM disable HW limitation.
2546 * Please check Errata Sheet ES0335 for more details under "MCU may remain
2547 * stuck in LPTIM interrupt when entering Stop mode" section.
2548 * @retval None
2549 */
LPTIM_Disable(LPTIM_HandleTypeDef * hlptim)2550 void LPTIM_Disable(LPTIM_HandleTypeDef *hlptim)
2551 {
2552 uint32_t tmpclksource = 0;
2553 uint32_t tmpIER;
2554 uint32_t tmpCFGR;
2555 uint32_t tmpCMP;
2556 uint32_t tmpARR;
2557 uint32_t tmpOR;
2558 #if defined(LPTIM_RCR_REP)
2559 uint32_t tmpRCR;
2560 #endif
2561
2562 __disable_irq();
2563
2564 /*********** Save LPTIM Config ***********/
2565 /* Save LPTIM source clock */
2566 switch ((uint32_t)hlptim->Instance)
2567 {
2568 case LPTIM1_BASE:
2569 tmpclksource = __HAL_RCC_GET_LPTIM1_SOURCE();
2570 break;
2571 #if defined(LPTIM2)
2572 case LPTIM2_BASE:
2573 tmpclksource = __HAL_RCC_GET_LPTIM2_SOURCE();
2574 break;
2575 #endif /* LPTIM2 */
2576 default:
2577 break;
2578 }
2579
2580 /* Save LPTIM configuration registers */
2581 tmpIER = hlptim->Instance->IER;
2582 tmpCFGR = hlptim->Instance->CFGR;
2583 tmpCMP = hlptim->Instance->CMP;
2584 tmpARR = hlptim->Instance->ARR;
2585 tmpOR = hlptim->Instance->OR;
2586 #if defined(LPTIM_RCR_REP)
2587 tmpRCR = hlptim->Instance->RCR;
2588 #endif
2589
2590 /*********** Reset LPTIM ***********/
2591 switch ((uint32_t)hlptim->Instance)
2592 {
2593 case LPTIM1_BASE:
2594 __HAL_RCC_LPTIM1_FORCE_RESET();
2595 __HAL_RCC_LPTIM1_RELEASE_RESET();
2596 break;
2597 #if defined(LPTIM2)
2598 case LPTIM2_BASE:
2599 __HAL_RCC_LPTIM2_FORCE_RESET();
2600 __HAL_RCC_LPTIM2_RELEASE_RESET();
2601 break;
2602 #endif /* LPTIM2 */
2603 default:
2604 break;
2605 }
2606
2607 /*********** Restore LPTIM Config ***********/
2608 #if defined(LPTIM_RCR_REP)
2609 if ((tmpCMP != 0UL) || (tmpARR != 0UL) || (tmpRCR != 0UL))
2610 #else
2611 if ((tmpCMP != 0UL) || (tmpARR != 0UL))
2612 #endif
2613 {
2614 /* Force LPTIM source kernel clock from APB */
2615 switch ((uint32_t)hlptim->Instance)
2616 {
2617 case LPTIM1_BASE:
2618 __HAL_RCC_LPTIM1_CONFIG(RCC_LPTIM1CLKSOURCE_PCLK1);
2619 break;
2620 #if defined(LPTIM2)
2621 case LPTIM2_BASE:
2622 __HAL_RCC_LPTIM2_CONFIG(RCC_LPTIM2CLKSOURCE_PCLK1);
2623 break;
2624 #endif /* LPTIM2 */
2625 default:
2626 break;
2627 }
2628
2629 if (tmpCMP != 0UL)
2630 {
2631 /* Restore CMP register (LPTIM should be enabled first) */
2632 hlptim->Instance->CR |= LPTIM_CR_ENABLE;
2633 hlptim->Instance->CMP = tmpCMP;
2634
2635 /* Wait for the completion of the write operation to the LPTIM_CMP register */
2636 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
2637 {
2638 hlptim->State = HAL_LPTIM_STATE_TIMEOUT;
2639 }
2640 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
2641 }
2642
2643 if (tmpARR != 0UL)
2644 {
2645 /* Restore ARR register (LPTIM should be enabled first) */
2646 hlptim->Instance->CR |= LPTIM_CR_ENABLE;
2647 hlptim->Instance->ARR = tmpARR;
2648
2649 /* Wait for the completion of the write operation to the LPTIM_ARR register */
2650 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
2651 {
2652 hlptim->State = HAL_LPTIM_STATE_TIMEOUT;
2653 }
2654
2655 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
2656 }
2657 #if defined(LPTIM_RCR_REP)
2658
2659 if (tmpRCR != 0UL)
2660 {
2661 /* Restore RCR register (LPTIM should be enabled first) */
2662 hlptim->Instance->CR |= LPTIM_CR_ENABLE;
2663 hlptim->Instance->RCR = tmpRCR;
2664
2665 /* Wait for the completion of the write operation to the LPTIM_RCR register */
2666 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_REPOK) == HAL_TIMEOUT)
2667 {
2668 hlptim->State = HAL_LPTIM_STATE_TIMEOUT;
2669 }
2670 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_REPOK);
2671 }
2672 #endif
2673
2674 /* Restore LPTIM source kernel clock */
2675 switch ((uint32_t)hlptim->Instance)
2676 {
2677 case LPTIM1_BASE:
2678 __HAL_RCC_LPTIM1_CONFIG(tmpclksource);
2679 break;
2680 #if defined(LPTIM2)
2681 case LPTIM2_BASE:
2682 __HAL_RCC_LPTIM2_CONFIG(tmpclksource);
2683 break;
2684 #endif /* LPTIM2 */
2685 default:
2686 break;
2687 }
2688 }
2689
2690 /* Restore configuration registers (LPTIM should be disabled first) */
2691 hlptim->Instance->CR &= ~(LPTIM_CR_ENABLE);
2692 hlptim->Instance->IER = tmpIER;
2693 hlptim->Instance->CFGR = tmpCFGR;
2694 hlptim->Instance->OR = tmpOR;
2695
2696 __enable_irq();
2697 }
2698 /**
2699 * @}
2700 */
2701 #endif /* LPTIM1 || LPTIM2 */
2702
2703 #endif /* HAL_LPTIM_MODULE_ENABLED */
2704 /**
2705 * @}
2706 */
2707
2708 /**
2709 * @}
2710 */
2711
2712 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
2713