1 /** 2 ****************************************************************************** 3 * @file stm32l4xx_hal_uart.h 4 * @author MCD Application Team 5 * @brief Header file of UART HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * <h2><center>© Copyright (c) 2017 STMicroelectronics. 10 * All rights reserved.</center></h2> 11 * 12 * This software component is licensed by ST under BSD 3-Clause license, 13 * the "License"; You may not use this file except in compliance with the 14 * License. You may obtain a copy of the License at: 15 * opensource.org/licenses/BSD-3-Clause 16 * 17 ****************************************************************************** 18 */ 19 20 /* Define to prevent recursive inclusion -------------------------------------*/ 21 #ifndef STM32L4xx_HAL_UART_H 22 #define STM32L4xx_HAL_UART_H 23 24 #ifdef __cplusplus 25 extern "C" { 26 #endif 27 28 /* Includes ------------------------------------------------------------------*/ 29 #include "stm32l4xx_hal_def.h" 30 31 /** @addtogroup STM32L4xx_HAL_Driver 32 * @{ 33 */ 34 35 /** @addtogroup UART 36 * @{ 37 */ 38 39 /* Exported types ------------------------------------------------------------*/ 40 /** @defgroup UART_Exported_Types UART Exported Types 41 * @{ 42 */ 43 44 /** 45 * @brief UART Init Structure definition 46 */ 47 typedef struct 48 { 49 uint32_t BaudRate; /*!< This member configures the UART communication baud rate. 50 The baud rate register is computed using the following formula: 51 LPUART: 52 ======= 53 Baud Rate Register = ((256 * lpuart_ker_ckpres) / ((huart->Init.BaudRate))) 54 where lpuart_ker_ck_pres is the UART input clock (divided by a prescaler if applicable) 55 UART: 56 ===== 57 - If oversampling is 16 or in LIN mode, 58 Baud Rate Register = ((uart_ker_ckpres) / ((huart->Init.BaudRate))) 59 - If oversampling is 8, 60 Baud Rate Register[15:4] = ((2 * uart_ker_ckpres) / ((huart->Init.BaudRate)))[15:4] 61 Baud Rate Register[3] = 0 62 Baud Rate Register[2:0] = (((2 * uart_ker_ckpres) / ((huart->Init.BaudRate)))[3:0]) >> 1 63 where uart_ker_ck_pres is the UART input clock (divided by a prescaler if applicable) */ 64 65 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. 66 This parameter can be a value of @ref UARTEx_Word_Length. */ 67 68 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. 69 This parameter can be a value of @ref UART_Stop_Bits. */ 70 71 uint32_t Parity; /*!< Specifies the parity mode. 72 This parameter can be a value of @ref UART_Parity 73 @note When parity is enabled, the computed parity is inserted 74 at the MSB position of the transmitted data (9th bit when 75 the word length is set to 9 data bits; 8th bit when the 76 word length is set to 8 data bits). */ 77 78 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled. 79 This parameter can be a value of @ref UART_Mode. */ 80 81 uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled 82 or disabled. 83 This parameter can be a value of @ref UART_Hardware_Flow_Control. */ 84 85 uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to f_PCLK/8). 86 This parameter can be a value of @ref UART_Over_Sampling. */ 87 88 uint32_t OneBitSampling; /*!< Specifies whether a single sample or three samples' majority vote is selected. 89 Selecting the single sample method increases the receiver tolerance to clock 90 deviations. This parameter can be a value of @ref UART_OneBit_Sampling. */ 91 92 #if defined(USART_PRESC_PRESCALER) 93 uint32_t ClockPrescaler; /*!< Specifies the prescaler value used to divide the UART clock source. 94 This parameter can be a value of @ref UART_ClockPrescaler. */ 95 #endif /* USART_PRESC_PRESCALER */ 96 97 } UART_InitTypeDef; 98 99 /** 100 * @brief UART Advanced Features initialization structure definition 101 */ 102 typedef struct 103 { 104 uint32_t AdvFeatureInit; /*!< Specifies which advanced UART features is initialized. Several 105 Advanced Features may be initialized at the same time . 106 This parameter can be a value of @ref UART_Advanced_Features_Initialization_Type. */ 107 108 uint32_t TxPinLevelInvert; /*!< Specifies whether the TX pin active level is inverted. 109 This parameter can be a value of @ref UART_Tx_Inv. */ 110 111 uint32_t RxPinLevelInvert; /*!< Specifies whether the RX pin active level is inverted. 112 This parameter can be a value of @ref UART_Rx_Inv. */ 113 114 uint32_t DataInvert; /*!< Specifies whether data are inverted (positive/direct logic 115 vs negative/inverted logic). 116 This parameter can be a value of @ref UART_Data_Inv. */ 117 118 uint32_t Swap; /*!< Specifies whether TX and RX pins are swapped. 119 This parameter can be a value of @ref UART_Rx_Tx_Swap. */ 120 121 uint32_t OverrunDisable; /*!< Specifies whether the reception overrun detection is disabled. 122 This parameter can be a value of @ref UART_Overrun_Disable. */ 123 124 uint32_t DMADisableonRxError; /*!< Specifies whether the DMA is disabled in case of reception error. 125 This parameter can be a value of @ref UART_DMA_Disable_on_Rx_Error. */ 126 127 uint32_t AutoBaudRateEnable; /*!< Specifies whether auto Baud rate detection is enabled. 128 This parameter can be a value of @ref UART_AutoBaudRate_Enable. */ 129 130 uint32_t AutoBaudRateMode; /*!< If auto Baud rate detection is enabled, specifies how the rate 131 detection is carried out. 132 This parameter can be a value of @ref UART_AutoBaud_Rate_Mode. */ 133 134 uint32_t MSBFirst; /*!< Specifies whether MSB is sent first on UART line. 135 This parameter can be a value of @ref UART_MSB_First. */ 136 } UART_AdvFeatureInitTypeDef; 137 138 /** 139 * @brief HAL UART State definition 140 * @note HAL UART State value is a combination of 2 different substates: gState and RxState (see @ref UART_State_Definition). 141 * - gState contains UART state information related to global Handle management 142 * and also information related to Tx operations. 143 * gState value coding follow below described bitmap : 144 * b7-b6 Error information 145 * 00 : No Error 146 * 01 : (Not Used) 147 * 10 : Timeout 148 * 11 : Error 149 * b5 Peripheral initialization status 150 * 0 : Reset (Peripheral not initialized) 151 * 1 : Init done (Peripheral not initialized. HAL UART Init function already called) 152 * b4-b3 (not used) 153 * xx : Should be set to 00 154 * b2 Intrinsic process state 155 * 0 : Ready 156 * 1 : Busy (Peripheral busy with some configuration or internal operations) 157 * b1 (not used) 158 * x : Should be set to 0 159 * b0 Tx state 160 * 0 : Ready (no Tx operation ongoing) 161 * 1 : Busy (Tx operation ongoing) 162 * - RxState contains information related to Rx operations. 163 * RxState value coding follow below described bitmap : 164 * b7-b6 (not used) 165 * xx : Should be set to 00 166 * b5 Peripheral initialization status 167 * 0 : Reset (Peripheral not initialized) 168 * 1 : Init done (Peripheral not initialized) 169 * b4-b2 (not used) 170 * xxx : Should be set to 000 171 * b1 Rx state 172 * 0 : Ready (no Rx operation ongoing) 173 * 1 : Busy (Rx operation ongoing) 174 * b0 (not used) 175 * x : Should be set to 0. 176 */ 177 typedef uint32_t HAL_UART_StateTypeDef; 178 179 /** 180 * @brief UART clock sources definition 181 */ 182 typedef enum 183 { 184 UART_CLOCKSOURCE_PCLK1 = 0x00U, /*!< PCLK1 clock source */ 185 UART_CLOCKSOURCE_PCLK2 = 0x01U, /*!< PCLK2 clock source */ 186 UART_CLOCKSOURCE_HSI = 0x02U, /*!< HSI clock source */ 187 UART_CLOCKSOURCE_SYSCLK = 0x04U, /*!< SYSCLK clock source */ 188 UART_CLOCKSOURCE_LSE = 0x08U, /*!< LSE clock source */ 189 UART_CLOCKSOURCE_UNDEFINED = 0x10U /*!< Undefined clock source */ 190 } UART_ClockSourceTypeDef; 191 192 /** 193 * @brief UART handle Structure definition 194 */ 195 typedef struct __UART_HandleTypeDef 196 { 197 USART_TypeDef *Instance; /*!< UART registers base address */ 198 199 UART_InitTypeDef Init; /*!< UART communication parameters */ 200 201 UART_AdvFeatureInitTypeDef AdvancedInit; /*!< UART Advanced Features initialization parameters */ 202 203 uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */ 204 205 uint16_t TxXferSize; /*!< UART Tx Transfer size */ 206 207 __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */ 208 209 uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */ 210 211 uint16_t RxXferSize; /*!< UART Rx Transfer size */ 212 213 __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */ 214 215 uint16_t Mask; /*!< UART Rx RDR register mask */ 216 217 #if defined(USART_CR1_FIFOEN) 218 uint32_t FifoMode; /*!< Specifies if the FIFO mode is being used. 219 This parameter can be a value of @ref UARTEx_FIFO_mode. */ 220 221 uint16_t NbRxDataToProcess; /*!< Number of data to process during RX ISR execution */ 222 223 uint16_t NbTxDataToProcess; /*!< Number of data to process during TX ISR execution */ 224 225 #endif /*USART_CR1_FIFOEN */ 226 void (*RxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Rx IRQ handler */ 227 228 void (*TxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Tx IRQ handler */ 229 230 DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */ 231 232 DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */ 233 234 HAL_LockTypeDef Lock; /*!< Locking object */ 235 236 __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management 237 and also related to Tx operations. 238 This parameter can be a value of @ref HAL_UART_StateTypeDef */ 239 240 __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations. 241 This parameter can be a value of @ref HAL_UART_StateTypeDef */ 242 243 __IO uint32_t ErrorCode; /*!< UART Error code */ 244 245 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 246 void (* TxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Half Complete Callback */ 247 void (* TxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Complete Callback */ 248 void (* RxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Half Complete Callback */ 249 void (* RxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Complete Callback */ 250 void (* ErrorCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Error Callback */ 251 void (* AbortCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Complete Callback */ 252 void (* AbortTransmitCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Transmit Complete Callback */ 253 void (* AbortReceiveCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Receive Complete Callback */ 254 void (* WakeupCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Wakeup Callback */ 255 #if defined(USART_CR1_FIFOEN) 256 void (* RxFifoFullCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Fifo Full Callback */ 257 void (* TxFifoEmptyCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Fifo Empty Callback */ 258 #endif /* USART_CR1_FIFOEN */ 259 260 void (* MspInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp Init callback */ 261 void (* MspDeInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp DeInit callback */ 262 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 263 264 } UART_HandleTypeDef; 265 266 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 267 /** 268 * @brief HAL UART Callback ID enumeration definition 269 */ 270 typedef enum 271 { 272 HAL_UART_TX_HALFCOMPLETE_CB_ID = 0x00U, /*!< UART Tx Half Complete Callback ID */ 273 HAL_UART_TX_COMPLETE_CB_ID = 0x01U, /*!< UART Tx Complete Callback ID */ 274 HAL_UART_RX_HALFCOMPLETE_CB_ID = 0x02U, /*!< UART Rx Half Complete Callback ID */ 275 HAL_UART_RX_COMPLETE_CB_ID = 0x03U, /*!< UART Rx Complete Callback ID */ 276 HAL_UART_ERROR_CB_ID = 0x04U, /*!< UART Error Callback ID */ 277 HAL_UART_ABORT_COMPLETE_CB_ID = 0x05U, /*!< UART Abort Complete Callback ID */ 278 HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID = 0x06U, /*!< UART Abort Transmit Complete Callback ID */ 279 HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID = 0x07U, /*!< UART Abort Receive Complete Callback ID */ 280 HAL_UART_WAKEUP_CB_ID = 0x08U, /*!< UART Wakeup Callback ID */ 281 #if defined(USART_CR1_FIFOEN) 282 HAL_UART_RX_FIFO_FULL_CB_ID = 0x09U, /*!< UART Rx Fifo Full Callback ID */ 283 HAL_UART_TX_FIFO_EMPTY_CB_ID = 0x0AU, /*!< UART Tx Fifo Empty Callback ID */ 284 #endif /* USART_CR1_FIFOEN */ 285 286 HAL_UART_MSPINIT_CB_ID = 0x0BU, /*!< UART MspInit callback ID */ 287 HAL_UART_MSPDEINIT_CB_ID = 0x0CU /*!< UART MspDeInit callback ID */ 288 289 } HAL_UART_CallbackIDTypeDef; 290 291 /** 292 * @brief HAL UART Callback pointer definition 293 */ 294 typedef void (*pUART_CallbackTypeDef)(UART_HandleTypeDef *huart); /*!< pointer to an UART callback function */ 295 296 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 297 298 /** 299 * @} 300 */ 301 302 /* Exported constants --------------------------------------------------------*/ 303 /** @defgroup UART_Exported_Constants UART Exported Constants 304 * @{ 305 */ 306 307 /** @defgroup UART_State_Definition UART State Code Definition 308 * @{ 309 */ 310 #define HAL_UART_STATE_RESET 0x00000000U /*!< Peripheral is not initialized 311 Value is allowed for gState and RxState */ 312 #define HAL_UART_STATE_READY 0x00000020U /*!< Peripheral Initialized and ready for use 313 Value is allowed for gState and RxState */ 314 #define HAL_UART_STATE_BUSY 0x00000024U /*!< an internal process is ongoing 315 Value is allowed for gState only */ 316 #define HAL_UART_STATE_BUSY_TX 0x00000021U /*!< Data Transmission process is ongoing 317 Value is allowed for gState only */ 318 #define HAL_UART_STATE_BUSY_RX 0x00000022U /*!< Data Reception process is ongoing 319 Value is allowed for RxState only */ 320 #define HAL_UART_STATE_BUSY_TX_RX 0x00000023U /*!< Data Transmission and Reception process is ongoing 321 Not to be used for neither gState nor RxState. 322 Value is result of combination (Or) between gState and RxState values */ 323 #define HAL_UART_STATE_TIMEOUT 0x000000A0U /*!< Timeout state 324 Value is allowed for gState only */ 325 #define HAL_UART_STATE_ERROR 0x000000E0U /*!< Error 326 Value is allowed for gState only */ 327 /** 328 * @} 329 */ 330 331 /** @defgroup UART_Error_Definition UART Error Definition 332 * @{ 333 */ 334 #define HAL_UART_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */ 335 #define HAL_UART_ERROR_PE ((uint32_t)0x00000001U) /*!< Parity error */ 336 #define HAL_UART_ERROR_NE ((uint32_t)0x00000002U) /*!< Noise error */ 337 #define HAL_UART_ERROR_FE ((uint32_t)0x00000004U) /*!< Frame error */ 338 #define HAL_UART_ERROR_ORE ((uint32_t)0x00000008U) /*!< Overrun error */ 339 #define HAL_UART_ERROR_DMA ((uint32_t)0x00000010U) /*!< DMA transfer error */ 340 #define HAL_UART_ERROR_RTO ((uint32_t)0x00000020U) /*!< Receiver Timeout error */ 341 342 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 343 #define HAL_UART_ERROR_INVALID_CALLBACK ((uint32_t)0x00000040U) /*!< Invalid Callback error */ 344 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 345 /** 346 * @} 347 */ 348 349 /** @defgroup UART_Stop_Bits UART Number of Stop Bits 350 * @{ 351 */ 352 #define UART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< UART frame with 0.5 stop bit */ 353 #define UART_STOPBITS_1 0x00000000U /*!< UART frame with 1 stop bit */ 354 #define UART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< UART frame with 1.5 stop bits */ 355 #define UART_STOPBITS_2 USART_CR2_STOP_1 /*!< UART frame with 2 stop bits */ 356 /** 357 * @} 358 */ 359 360 /** @defgroup UART_Parity UART Parity 361 * @{ 362 */ 363 #define UART_PARITY_NONE 0x00000000U /*!< No parity */ 364 #define UART_PARITY_EVEN USART_CR1_PCE /*!< Even parity */ 365 #define UART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Odd parity */ 366 /** 367 * @} 368 */ 369 370 /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control 371 * @{ 372 */ 373 #define UART_HWCONTROL_NONE 0x00000000U /*!< No hardware control */ 374 #define UART_HWCONTROL_RTS USART_CR3_RTSE /*!< Request To Send */ 375 #define UART_HWCONTROL_CTS USART_CR3_CTSE /*!< Clear To Send */ 376 #define UART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) /*!< Request and Clear To Send */ 377 /** 378 * @} 379 */ 380 381 /** @defgroup UART_Mode UART Transfer Mode 382 * @{ 383 */ 384 #define UART_MODE_RX USART_CR1_RE /*!< RX mode */ 385 #define UART_MODE_TX USART_CR1_TE /*!< TX mode */ 386 #define UART_MODE_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< RX and TX mode */ 387 /** 388 * @} 389 */ 390 391 /** @defgroup UART_State UART State 392 * @{ 393 */ 394 #define UART_STATE_DISABLE 0x00000000U /*!< UART disabled */ 395 #define UART_STATE_ENABLE USART_CR1_UE /*!< UART enabled */ 396 /** 397 * @} 398 */ 399 400 /** @defgroup UART_Over_Sampling UART Over Sampling 401 * @{ 402 */ 403 #define UART_OVERSAMPLING_16 0x00000000U /*!< Oversampling by 16 */ 404 #define UART_OVERSAMPLING_8 USART_CR1_OVER8 /*!< Oversampling by 8 */ 405 /** 406 * @} 407 */ 408 409 /** @defgroup UART_OneBit_Sampling UART One Bit Sampling Method 410 * @{ 411 */ 412 #define UART_ONE_BIT_SAMPLE_DISABLE 0x00000000U /*!< One-bit sampling disable */ 413 #define UART_ONE_BIT_SAMPLE_ENABLE USART_CR3_ONEBIT /*!< One-bit sampling enable */ 414 /** 415 * @} 416 */ 417 418 #if defined(USART_PRESC_PRESCALER) 419 /** @defgroup UART_ClockPrescaler UART Clock Prescaler 420 * @{ 421 */ 422 #define UART_PRESCALER_DIV1 0x00000000U /*!< fclk_pres = fclk */ 423 #define UART_PRESCALER_DIV2 0x00000001U /*!< fclk_pres = fclk/2 */ 424 #define UART_PRESCALER_DIV4 0x00000002U /*!< fclk_pres = fclk/4 */ 425 #define UART_PRESCALER_DIV6 0x00000003U /*!< fclk_pres = fclk/6 */ 426 #define UART_PRESCALER_DIV8 0x00000004U /*!< fclk_pres = fclk/8 */ 427 #define UART_PRESCALER_DIV10 0x00000005U /*!< fclk_pres = fclk/10 */ 428 #define UART_PRESCALER_DIV12 0x00000006U /*!< fclk_pres = fclk/12 */ 429 #define UART_PRESCALER_DIV16 0x00000007U /*!< fclk_pres = fclk/16 */ 430 #define UART_PRESCALER_DIV32 0x00000008U /*!< fclk_pres = fclk/32 */ 431 #define UART_PRESCALER_DIV64 0x00000009U /*!< fclk_pres = fclk/64 */ 432 #define UART_PRESCALER_DIV128 0x0000000AU /*!< fclk_pres = fclk/128 */ 433 #define UART_PRESCALER_DIV256 0x0000000BU /*!< fclk_pres = fclk/256 */ 434 /** 435 * @} 436 */ 437 438 #endif /* USART_PRESC_PRESCALER */ 439 /** @defgroup UART_AutoBaud_Rate_Mode UART Advanced Feature AutoBaud Rate Mode 440 * @{ 441 */ 442 #define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT 0x00000000U /*!< Auto Baud rate detection on start bit */ 443 #define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE USART_CR2_ABRMODE_0 /*!< Auto Baud rate detection on falling edge */ 444 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME USART_CR2_ABRMODE_1 /*!< Auto Baud rate detection on 0x7F frame detection */ 445 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME USART_CR2_ABRMODE /*!< Auto Baud rate detection on 0x55 frame detection */ 446 /** 447 * @} 448 */ 449 450 /** @defgroup UART_Receiver_Timeout UART Receiver Timeout 451 * @{ 452 */ 453 #define UART_RECEIVER_TIMEOUT_DISABLE 0x00000000U /*!< UART Receiver Timeout disable */ 454 #define UART_RECEIVER_TIMEOUT_ENABLE USART_CR2_RTOEN /*!< UART Receiver Timeout enable */ 455 /** 456 * @} 457 */ 458 459 /** @defgroup UART_LIN UART Local Interconnection Network mode 460 * @{ 461 */ 462 #define UART_LIN_DISABLE 0x00000000U /*!< Local Interconnect Network disable */ 463 #define UART_LIN_ENABLE USART_CR2_LINEN /*!< Local Interconnect Network enable */ 464 /** 465 * @} 466 */ 467 468 /** @defgroup UART_LIN_Break_Detection UART LIN Break Detection 469 * @{ 470 */ 471 #define UART_LINBREAKDETECTLENGTH_10B 0x00000000U /*!< LIN 10-bit break detection length */ 472 #define UART_LINBREAKDETECTLENGTH_11B USART_CR2_LBDL /*!< LIN 11-bit break detection length */ 473 /** 474 * @} 475 */ 476 477 /** @defgroup UART_DMA_Tx UART DMA Tx 478 * @{ 479 */ 480 #define UART_DMA_TX_DISABLE 0x00000000U /*!< UART DMA TX disabled */ 481 #define UART_DMA_TX_ENABLE USART_CR3_DMAT /*!< UART DMA TX enabled */ 482 /** 483 * @} 484 */ 485 486 /** @defgroup UART_DMA_Rx UART DMA Rx 487 * @{ 488 */ 489 #define UART_DMA_RX_DISABLE 0x00000000U /*!< UART DMA RX disabled */ 490 #define UART_DMA_RX_ENABLE USART_CR3_DMAR /*!< UART DMA RX enabled */ 491 /** 492 * @} 493 */ 494 495 /** @defgroup UART_Half_Duplex_Selection UART Half Duplex Selection 496 * @{ 497 */ 498 #define UART_HALF_DUPLEX_DISABLE 0x00000000U /*!< UART half-duplex disabled */ 499 #define UART_HALF_DUPLEX_ENABLE USART_CR3_HDSEL /*!< UART half-duplex enabled */ 500 /** 501 * @} 502 */ 503 504 /** @defgroup UART_WakeUp_Methods UART WakeUp Methods 505 * @{ 506 */ 507 #define UART_WAKEUPMETHOD_IDLELINE 0x00000000U /*!< UART wake-up on idle line */ 508 #define UART_WAKEUPMETHOD_ADDRESSMARK USART_CR1_WAKE /*!< UART wake-up on address mark */ 509 /** 510 * @} 511 */ 512 513 /** @defgroup UART_Request_Parameters UART Request Parameters 514 * @{ 515 */ 516 #define UART_AUTOBAUD_REQUEST USART_RQR_ABRRQ /*!< Auto-Baud Rate Request */ 517 #define UART_SENDBREAK_REQUEST USART_RQR_SBKRQ /*!< Send Break Request */ 518 #define UART_MUTE_MODE_REQUEST USART_RQR_MMRQ /*!< Mute Mode Request */ 519 #define UART_RXDATA_FLUSH_REQUEST USART_RQR_RXFRQ /*!< Receive Data flush Request */ 520 #define UART_TXDATA_FLUSH_REQUEST USART_RQR_TXFRQ /*!< Transmit data flush Request */ 521 /** 522 * @} 523 */ 524 525 /** @defgroup UART_Advanced_Features_Initialization_Type UART Advanced Feature Initialization Type 526 * @{ 527 */ 528 #define UART_ADVFEATURE_NO_INIT 0x00000000U /*!< No advanced feature initialization */ 529 #define UART_ADVFEATURE_TXINVERT_INIT 0x00000001U /*!< TX pin active level inversion */ 530 #define UART_ADVFEATURE_RXINVERT_INIT 0x00000002U /*!< RX pin active level inversion */ 531 #define UART_ADVFEATURE_DATAINVERT_INIT 0x00000004U /*!< Binary data inversion */ 532 #define UART_ADVFEATURE_SWAP_INIT 0x00000008U /*!< TX/RX pins swap */ 533 #define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT 0x00000010U /*!< RX overrun disable */ 534 #define UART_ADVFEATURE_DMADISABLEONERROR_INIT 0x00000020U /*!< DMA disable on Reception Error */ 535 #define UART_ADVFEATURE_AUTOBAUDRATE_INIT 0x00000040U /*!< Auto Baud rate detection initialization */ 536 #define UART_ADVFEATURE_MSBFIRST_INIT 0x00000080U /*!< Most significant bit sent/received first */ 537 /** 538 * @} 539 */ 540 541 /** @defgroup UART_Tx_Inv UART Advanced Feature TX Pin Active Level Inversion 542 * @{ 543 */ 544 #define UART_ADVFEATURE_TXINV_DISABLE 0x00000000U /*!< TX pin active level inversion disable */ 545 #define UART_ADVFEATURE_TXINV_ENABLE USART_CR2_TXINV /*!< TX pin active level inversion enable */ 546 /** 547 * @} 548 */ 549 550 /** @defgroup UART_Rx_Inv UART Advanced Feature RX Pin Active Level Inversion 551 * @{ 552 */ 553 #define UART_ADVFEATURE_RXINV_DISABLE 0x00000000U /*!< RX pin active level inversion disable */ 554 #define UART_ADVFEATURE_RXINV_ENABLE USART_CR2_RXINV /*!< RX pin active level inversion enable */ 555 /** 556 * @} 557 */ 558 559 /** @defgroup UART_Data_Inv UART Advanced Feature Binary Data Inversion 560 * @{ 561 */ 562 #define UART_ADVFEATURE_DATAINV_DISABLE 0x00000000U /*!< Binary data inversion disable */ 563 #define UART_ADVFEATURE_DATAINV_ENABLE USART_CR2_DATAINV /*!< Binary data inversion enable */ 564 /** 565 * @} 566 */ 567 568 /** @defgroup UART_Rx_Tx_Swap UART Advanced Feature RX TX Pins Swap 569 * @{ 570 */ 571 #define UART_ADVFEATURE_SWAP_DISABLE 0x00000000U /*!< TX/RX pins swap disable */ 572 #define UART_ADVFEATURE_SWAP_ENABLE USART_CR2_SWAP /*!< TX/RX pins swap enable */ 573 /** 574 * @} 575 */ 576 577 /** @defgroup UART_Overrun_Disable UART Advanced Feature Overrun Disable 578 * @{ 579 */ 580 #define UART_ADVFEATURE_OVERRUN_ENABLE 0x00000000U /*!< RX overrun enable */ 581 #define UART_ADVFEATURE_OVERRUN_DISABLE USART_CR3_OVRDIS /*!< RX overrun disable */ 582 /** 583 * @} 584 */ 585 586 /** @defgroup UART_AutoBaudRate_Enable UART Advanced Feature Auto BaudRate Enable 587 * @{ 588 */ 589 #define UART_ADVFEATURE_AUTOBAUDRATE_DISABLE 0x00000000U /*!< RX Auto Baud rate detection enable */ 590 #define UART_ADVFEATURE_AUTOBAUDRATE_ENABLE USART_CR2_ABREN /*!< RX Auto Baud rate detection disable */ 591 /** 592 * @} 593 */ 594 595 /** @defgroup UART_DMA_Disable_on_Rx_Error UART Advanced Feature DMA Disable On Rx Error 596 * @{ 597 */ 598 #define UART_ADVFEATURE_DMA_ENABLEONRXERROR 0x00000000U /*!< DMA enable on Reception Error */ 599 #define UART_ADVFEATURE_DMA_DISABLEONRXERROR USART_CR3_DDRE /*!< DMA disable on Reception Error */ 600 /** 601 * @} 602 */ 603 604 /** @defgroup UART_MSB_First UART Advanced Feature MSB First 605 * @{ 606 */ 607 #define UART_ADVFEATURE_MSBFIRST_DISABLE 0x00000000U /*!< Most significant bit sent/received first disable */ 608 #define UART_ADVFEATURE_MSBFIRST_ENABLE USART_CR2_MSBFIRST /*!< Most significant bit sent/received first enable */ 609 /** 610 * @} 611 */ 612 613 /** @defgroup UART_Stop_Mode_Enable UART Advanced Feature Stop Mode Enable 614 * @{ 615 */ 616 #define UART_ADVFEATURE_STOPMODE_DISABLE 0x00000000U /*!< UART stop mode disable */ 617 #define UART_ADVFEATURE_STOPMODE_ENABLE USART_CR1_UESM /*!< UART stop mode enable */ 618 /** 619 * @} 620 */ 621 622 /** @defgroup UART_Mute_Mode UART Advanced Feature Mute Mode Enable 623 * @{ 624 */ 625 #define UART_ADVFEATURE_MUTEMODE_DISABLE 0x00000000U /*!< UART mute mode disable */ 626 #define UART_ADVFEATURE_MUTEMODE_ENABLE USART_CR1_MME /*!< UART mute mode enable */ 627 /** 628 * @} 629 */ 630 631 /** @defgroup UART_CR2_ADDRESS_LSB_POS UART Address-matching LSB Position In CR2 Register 632 * @{ 633 */ 634 #define UART_CR2_ADDRESS_LSB_POS 24U /*!< UART address-matching LSB position in CR2 register */ 635 /** 636 * @} 637 */ 638 639 /** @defgroup UART_WakeUp_from_Stop_Selection UART WakeUp From Stop Selection 640 * @{ 641 */ 642 #define UART_WAKEUP_ON_ADDRESS 0x00000000U /*!< UART wake-up on address */ 643 #define UART_WAKEUP_ON_STARTBIT USART_CR3_WUS_1 /*!< UART wake-up on start bit */ 644 #define UART_WAKEUP_ON_READDATA_NONEMPTY USART_CR3_WUS /*!< UART wake-up on receive data register not empty or RXFIFO is not empty */ 645 /** 646 * @} 647 */ 648 649 /** @defgroup UART_DriverEnable_Polarity UART DriverEnable Polarity 650 * @{ 651 */ 652 #define UART_DE_POLARITY_HIGH 0x00000000U /*!< Driver enable signal is active high */ 653 #define UART_DE_POLARITY_LOW USART_CR3_DEP /*!< Driver enable signal is active low */ 654 /** 655 * @} 656 */ 657 658 /** @defgroup UART_CR1_DEAT_ADDRESS_LSB_POS UART Driver Enable Assertion Time LSB Position In CR1 Register 659 * @{ 660 */ 661 #define UART_CR1_DEAT_ADDRESS_LSB_POS 21U /*!< UART Driver Enable assertion time LSB position in CR1 register */ 662 /** 663 * @} 664 */ 665 666 /** @defgroup UART_CR1_DEDT_ADDRESS_LSB_POS UART Driver Enable DeAssertion Time LSB Position In CR1 Register 667 * @{ 668 */ 669 #define UART_CR1_DEDT_ADDRESS_LSB_POS 16U /*!< UART Driver Enable de-assertion time LSB position in CR1 register */ 670 /** 671 * @} 672 */ 673 674 /** @defgroup UART_Interruption_Mask UART Interruptions Flag Mask 675 * @{ 676 */ 677 #define UART_IT_MASK 0x001FU /*!< UART interruptions flags mask */ 678 /** 679 * @} 680 */ 681 682 /** @defgroup UART_TimeOut_Value UART polling-based communications time-out value 683 * @{ 684 */ 685 #define HAL_UART_TIMEOUT_VALUE 0x1FFFFFFU /*!< UART polling-based communications time-out value */ 686 /** 687 * @} 688 */ 689 690 /** @defgroup UART_Flags UART Status Flags 691 * Elements values convention: 0xXXXX 692 * - 0xXXXX : Flag mask in the ISR register 693 * @{ 694 */ 695 #if defined(USART_CR1_FIFOEN) 696 #define UART_FLAG_TXFT USART_ISR_TXFT /*!< UART TXFIFO threshold flag */ 697 #define UART_FLAG_RXFT USART_ISR_RXFT /*!< UART RXFIFO threshold flag */ 698 #define UART_FLAG_RXFF USART_ISR_RXFF /*!< UART RXFIFO Full flag */ 699 #define UART_FLAG_TXFE USART_ISR_TXFE /*!< UART TXFIFO Empty flag */ 700 #endif /* USART_CR1_FIFOEN */ 701 #define UART_FLAG_REACK USART_ISR_REACK /*!< UART receive enable acknowledge flag */ 702 #define UART_FLAG_TEACK USART_ISR_TEACK /*!< UART transmit enable acknowledge flag */ 703 #define UART_FLAG_WUF USART_ISR_WUF /*!< UART wake-up from stop mode flag */ 704 #define UART_FLAG_RWU USART_ISR_RWU /*!< UART receiver wake-up from mute mode flag */ 705 #define UART_FLAG_SBKF USART_ISR_SBKF /*!< UART send break flag */ 706 #define UART_FLAG_CMF USART_ISR_CMF /*!< UART character match flag */ 707 #define UART_FLAG_BUSY USART_ISR_BUSY /*!< UART busy flag */ 708 #define UART_FLAG_ABRF USART_ISR_ABRF /*!< UART auto Baud rate flag */ 709 #define UART_FLAG_ABRE USART_ISR_ABRE /*!< UART auto Baud rate error */ 710 #define UART_FLAG_RTOF USART_ISR_RTOF /*!< UART receiver timeout flag */ 711 #define UART_FLAG_CTS USART_ISR_CTS /*!< UART clear to send flag */ 712 #define UART_FLAG_CTSIF USART_ISR_CTSIF /*!< UART clear to send interrupt flag */ 713 #define UART_FLAG_LBDF USART_ISR_LBDF /*!< UART LIN break detection flag */ 714 #if defined(USART_CR1_FIFOEN) 715 #define UART_FLAG_TXE USART_ISR_TXE_TXFNF /*!< UART transmit data register empty */ 716 #define UART_FLAG_TXFNF USART_ISR_TXE_TXFNF /*!< UART TXFIFO not full */ 717 #else 718 #define UART_FLAG_TXE USART_ISR_TXE /*!< UART transmit data register empty */ 719 #endif /* USART_CR1_FIFOEN */ 720 #define UART_FLAG_TC USART_ISR_TC /*!< UART transmission complete */ 721 #if defined(USART_CR1_FIFOEN) 722 #define UART_FLAG_RXNE USART_ISR_RXNE_RXFNE /*!< UART read data register not empty */ 723 #define UART_FLAG_RXFNE USART_ISR_RXNE_RXFNE /*!< UART RXFIFO not empty */ 724 #else 725 #define UART_FLAG_RXNE USART_ISR_RXNE /*!< UART read data register not empty */ 726 #endif /* USART_CR1_FIFOEN */ 727 #define UART_FLAG_IDLE USART_ISR_IDLE /*!< UART idle flag */ 728 #define UART_FLAG_ORE USART_ISR_ORE /*!< UART overrun error */ 729 #define UART_FLAG_NE USART_ISR_NE /*!< UART noise error */ 730 #define UART_FLAG_FE USART_ISR_FE /*!< UART frame error */ 731 #define UART_FLAG_PE USART_ISR_PE /*!< UART parity error */ 732 /** 733 * @} 734 */ 735 736 /** @defgroup UART_Interrupt_definition UART Interrupts Definition 737 * Elements values convention: 000ZZZZZ0XXYYYYYb 738 * - YYYYY : Interrupt source position in the XX register (5bits) 739 * - XX : Interrupt source register (2bits) 740 * - 01: CR1 register 741 * - 10: CR2 register 742 * - 11: CR3 register 743 * - ZZZZZ : Flag position in the ISR register(5bits) 744 * Elements values convention: 000000000XXYYYYYb 745 * - YYYYY : Interrupt source position in the XX register (5bits) 746 * - XX : Interrupt source register (2bits) 747 * - 01: CR1 register 748 * - 10: CR2 register 749 * - 11: CR3 register 750 * Elements values convention: 0000ZZZZ00000000b 751 * - ZZZZ : Flag position in the ISR register(4bits) 752 * @{ 753 */ 754 #define UART_IT_PE 0x0028U /*!< UART parity error interruption */ 755 #define UART_IT_TXE 0x0727U /*!< UART transmit data register empty interruption */ 756 #if defined(USART_CR1_FIFOEN) 757 #define UART_IT_TXFNF 0x0727U /*!< UART TX FIFO not full interruption */ 758 #endif /* USART_CR1_FIFOEN */ 759 #define UART_IT_TC 0x0626U /*!< UART transmission complete interruption */ 760 #define UART_IT_RXNE 0x0525U /*!< UART read data register not empty interruption */ 761 #if defined(USART_CR1_FIFOEN) 762 #define UART_IT_RXFNE 0x0525U /*!< UART RXFIFO not empty interruption */ 763 #endif /* USART_CR1_FIFOEN */ 764 #define UART_IT_IDLE 0x0424U /*!< UART idle interruption */ 765 #define UART_IT_LBD 0x0846U /*!< UART LIN break detection interruption */ 766 #define UART_IT_CTS 0x096AU /*!< UART CTS interruption */ 767 #define UART_IT_CM 0x112EU /*!< UART character match interruption */ 768 #define UART_IT_WUF 0x1476U /*!< UART wake-up from stop mode interruption */ 769 #if defined(USART_CR1_FIFOEN) 770 #define UART_IT_RXFF 0x183FU /*!< UART RXFIFO full interruption */ 771 #define UART_IT_TXFE 0x173EU /*!< UART TXFIFO empty interruption */ 772 #define UART_IT_RXFT 0x1A7CU /*!< UART RXFIFO threshold reached interruption */ 773 #define UART_IT_TXFT 0x1B77U /*!< UART TXFIFO threshold reached interruption */ 774 #endif /* USART_CR1_FIFOEN */ 775 #define UART_IT_RTO 0x0B3AU /*!< UART receiver timeout interruption */ 776 777 #define UART_IT_ERR 0x0060U /*!< UART error interruption */ 778 779 #define UART_IT_ORE 0x0300U /*!< UART overrun error interruption */ 780 #define UART_IT_NE 0x0200U /*!< UART noise error interruption */ 781 #define UART_IT_FE 0x0100U /*!< UART frame error interruption */ 782 /** 783 * @} 784 */ 785 786 /** @defgroup UART_IT_CLEAR_Flags UART Interruption Clear Flags 787 * @{ 788 */ 789 #define UART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */ 790 #define UART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */ 791 #define UART_CLEAR_NEF USART_ICR_NECF /*!< Noise Error detected Clear Flag */ 792 #define UART_CLEAR_OREF USART_ICR_ORECF /*!< Overrun Error Clear Flag */ 793 #define UART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */ 794 #if defined(USART_CR1_FIFOEN) 795 #define UART_CLEAR_TXFECF USART_ICR_TXFECF /*!< TXFIFO empty clear flag */ 796 #endif /* USART_CR1_FIFOEN */ 797 #define UART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */ 798 #define UART_CLEAR_LBDF USART_ICR_LBDCF /*!< LIN Break Detection Clear Flag */ 799 #define UART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */ 800 #define UART_CLEAR_CMF USART_ICR_CMCF /*!< Character Match Clear Flag */ 801 #define UART_CLEAR_WUF USART_ICR_WUCF /*!< Wake Up from stop mode Clear Flag */ 802 #define UART_CLEAR_RTOF USART_ICR_RTOCF /*!< UART receiver timeout clear flag */ 803 /** 804 * @} 805 */ 806 807 808 /** 809 * @} 810 */ 811 812 /* Exported macros -----------------------------------------------------------*/ 813 /** @defgroup UART_Exported_Macros UART Exported Macros 814 * @{ 815 */ 816 817 /** @brief Reset UART handle states. 818 * @param __HANDLE__ UART handle. 819 * @retval None 820 */ 821 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 822 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ 823 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ 824 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ 825 (__HANDLE__)->MspInitCallback = NULL; \ 826 (__HANDLE__)->MspDeInitCallback = NULL; \ 827 } while(0U) 828 #else 829 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ 830 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ 831 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ 832 } while(0U) 833 #endif /*USE_HAL_UART_REGISTER_CALLBACKS */ 834 835 /** @brief Flush the UART Data registers. 836 * @param __HANDLE__ specifies the UART Handle. 837 * @retval None 838 */ 839 #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \ 840 do{ \ 841 SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \ 842 SET_BIT((__HANDLE__)->Instance->RQR, UART_TXDATA_FLUSH_REQUEST); \ 843 } while(0U) 844 845 /** @brief Clear the specified UART pending flag. 846 * @param __HANDLE__ specifies the UART Handle. 847 * @param __FLAG__ specifies the flag to check. 848 * This parameter can be any combination of the following values: 849 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag 850 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag 851 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag 852 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag 853 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag 854 * @arg @ref UART_CLEAR_TXFECF TXFIFO empty clear Flag 855 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag 856 * @arg @ref UART_CLEAR_RTOF Receiver Timeout clear flag 857 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag 858 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag 859 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag 860 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag 861 * @retval None 862 */ 863 #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) 864 865 /** @brief Clear the UART PE pending flag. 866 * @param __HANDLE__ specifies the UART Handle. 867 * @retval None 868 */ 869 #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_PEF) 870 871 /** @brief Clear the UART FE pending flag. 872 * @param __HANDLE__ specifies the UART Handle. 873 * @retval None 874 */ 875 #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_FEF) 876 877 /** @brief Clear the UART NE pending flag. 878 * @param __HANDLE__ specifies the UART Handle. 879 * @retval None 880 */ 881 #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_NEF) 882 883 /** @brief Clear the UART ORE pending flag. 884 * @param __HANDLE__ specifies the UART Handle. 885 * @retval None 886 */ 887 #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_OREF) 888 889 /** @brief Clear the UART IDLE pending flag. 890 * @param __HANDLE__ specifies the UART Handle. 891 * @retval None 892 */ 893 #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_IDLEF) 894 895 #if defined(USART_CR1_FIFOEN) 896 /** @brief Clear the UART TX FIFO empty clear flag. 897 * @param __HANDLE__ specifies the UART Handle. 898 * @retval None 899 */ 900 #define __HAL_UART_CLEAR_TXFECF(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_TXFECF) 901 #endif /* USART_CR1_FIFOEN */ 902 903 /** @brief Check whether the specified UART flag is set or not. 904 * @param __HANDLE__ specifies the UART Handle. 905 * @param __FLAG__ specifies the flag to check. 906 * This parameter can be one of the following values: 907 * @arg @ref UART_FLAG_TXFT TXFIFO threshold flag 908 * @arg @ref UART_FLAG_RXFT RXFIFO threshold flag 909 * @arg @ref UART_FLAG_RXFF RXFIFO Full flag 910 * @arg @ref UART_FLAG_TXFE TXFIFO Empty flag 911 * @arg @ref UART_FLAG_REACK Receive enable acknowledge flag 912 * @arg @ref UART_FLAG_TEACK Transmit enable acknowledge flag 913 * @arg @ref UART_FLAG_WUF Wake up from stop mode flag 914 * @arg @ref UART_FLAG_RWU Receiver wake up flag (if the UART in mute mode) 915 * @arg @ref UART_FLAG_SBKF Send Break flag 916 * @arg @ref UART_FLAG_CMF Character match flag 917 * @arg @ref UART_FLAG_BUSY Busy flag 918 * @arg @ref UART_FLAG_ABRF Auto Baud rate detection flag 919 * @arg @ref UART_FLAG_ABRE Auto Baud rate detection error flag 920 * @arg @ref UART_FLAG_CTS CTS Change flag 921 * @arg @ref UART_FLAG_LBDF LIN Break detection flag 922 * @arg @ref UART_FLAG_TXE Transmit data register empty flag 923 * @arg @ref UART_FLAG_TXFNF UART TXFIFO not full flag 924 * @arg @ref UART_FLAG_TC Transmission Complete flag 925 * @arg @ref UART_FLAG_RXNE Receive data register not empty flag 926 * @arg @ref UART_FLAG_RXFNE UART RXFIFO not empty flag 927 * @arg @ref UART_FLAG_RTOF Receiver Timeout flag 928 * @arg @ref UART_FLAG_IDLE Idle Line detection flag 929 * @arg @ref UART_FLAG_ORE Overrun Error flag 930 * @arg @ref UART_FLAG_NE Noise Error flag 931 * @arg @ref UART_FLAG_FE Framing Error flag 932 * @arg @ref UART_FLAG_PE Parity Error flag 933 * @retval The new state of __FLAG__ (TRUE or FALSE). 934 */ 935 #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__)) 936 937 /** @brief Enable the specified UART interrupt. 938 * @param __HANDLE__ specifies the UART Handle. 939 * @param __INTERRUPT__ specifies the UART interrupt source to enable. 940 * This parameter can be one of the following values: 941 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 942 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 943 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 944 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 945 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 946 * @arg @ref UART_IT_CM Character match interrupt 947 * @arg @ref UART_IT_CTS CTS change interrupt 948 * @arg @ref UART_IT_LBD LIN Break detection interrupt 949 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 950 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 951 * @arg @ref UART_IT_TC Transmission complete interrupt 952 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 953 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 954 * @arg @ref UART_IT_RTO Receive Timeout interrupt 955 * @arg @ref UART_IT_IDLE Idle line detection interrupt 956 * @arg @ref UART_IT_PE Parity Error interrupt 957 * @arg @ref UART_IT_ERR Error interrupt (frame error, noise error, overrun error) 958 * @retval None 959 */ 960 #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \ 961 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \ 962 ((__HANDLE__)->Instance->CR3 |= (1U << ((__INTERRUPT__) & UART_IT_MASK)))) 963 964 965 /** @brief Disable the specified UART interrupt. 966 * @param __HANDLE__ specifies the UART Handle. 967 * @param __INTERRUPT__ specifies the UART interrupt source to disable. 968 * This parameter can be one of the following values: 969 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 970 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 971 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 972 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 973 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 974 * @arg @ref UART_IT_CM Character match interrupt 975 * @arg @ref UART_IT_CTS CTS change interrupt 976 * @arg @ref UART_IT_LBD LIN Break detection interrupt 977 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 978 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 979 * @arg @ref UART_IT_TC Transmission complete interrupt 980 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 981 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 982 * @arg @ref UART_IT_RTO Receive Timeout interrupt 983 * @arg @ref UART_IT_IDLE Idle line detection interrupt 984 * @arg @ref UART_IT_PE Parity Error interrupt 985 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 986 * @retval None 987 */ 988 #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \ 989 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \ 990 ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK)))) 991 992 /** @brief Check whether the specified UART interrupt has occurred or not. 993 * @param __HANDLE__ specifies the UART Handle. 994 * @param __INTERRUPT__ specifies the UART interrupt to check. 995 * This parameter can be one of the following values: 996 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 997 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 998 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 999 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 1000 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 1001 * @arg @ref UART_IT_CM Character match interrupt 1002 * @arg @ref UART_IT_CTS CTS change interrupt 1003 * @arg @ref UART_IT_LBD LIN Break detection interrupt 1004 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 1005 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 1006 * @arg @ref UART_IT_TC Transmission complete interrupt 1007 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 1008 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 1009 * @arg @ref UART_IT_RTO Receive Timeout interrupt 1010 * @arg @ref UART_IT_IDLE Idle line detection interrupt 1011 * @arg @ref UART_IT_PE Parity Error interrupt 1012 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 1013 * @retval The new state of __INTERRUPT__ (SET or RESET). 1014 */ 1015 #define __HAL_UART_GET_IT(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISR\ 1016 & (1U << ((__INTERRUPT__)>> 8U))) != RESET) ? SET : RESET) 1017 1018 /** @brief Check whether the specified UART interrupt source is enabled or not. 1019 * @param __HANDLE__ specifies the UART Handle. 1020 * @param __INTERRUPT__ specifies the UART interrupt source to check. 1021 * This parameter can be one of the following values: 1022 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 1023 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 1024 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 1025 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 1026 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 1027 * @arg @ref UART_IT_CM Character match interrupt 1028 * @arg @ref UART_IT_CTS CTS change interrupt 1029 * @arg @ref UART_IT_LBD LIN Break detection interrupt 1030 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 1031 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 1032 * @arg @ref UART_IT_TC Transmission complete interrupt 1033 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 1034 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 1035 * @arg @ref UART_IT_RTO Receive Timeout interrupt 1036 * @arg @ref UART_IT_IDLE Idle line detection interrupt 1037 * @arg @ref UART_IT_PE Parity Error interrupt 1038 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 1039 * @retval The new state of __INTERRUPT__ (SET or RESET). 1040 */ 1041 #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U) ? (__HANDLE__)->Instance->CR1 : \ 1042 (((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U) ? (__HANDLE__)->Instance->CR2 : \ 1043 (__HANDLE__)->Instance->CR3)) & (1U << (((uint16_t)(__INTERRUPT__)) & UART_IT_MASK))) != RESET) ? SET : RESET) 1044 1045 /** @brief Clear the specified UART ISR flag, in setting the proper ICR register flag. 1046 * @param __HANDLE__ specifies the UART Handle. 1047 * @param __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set 1048 * to clear the corresponding interrupt 1049 * This parameter can be one of the following values: 1050 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag 1051 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag 1052 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag 1053 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag 1054 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag 1055 * @arg @ref UART_CLEAR_RTOF Receiver timeout clear flag 1056 * @arg @ref UART_CLEAR_TXFECF TXFIFO empty Clear Flag 1057 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag 1058 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag 1059 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag 1060 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag 1061 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag 1062 * @retval None 1063 */ 1064 #define __HAL_UART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__)) 1065 1066 /** @brief Set a specific UART request flag. 1067 * @param __HANDLE__ specifies the UART Handle. 1068 * @param __REQ__ specifies the request flag to set 1069 * This parameter can be one of the following values: 1070 * @arg @ref UART_AUTOBAUD_REQUEST Auto-Baud Rate Request 1071 * @arg @ref UART_SENDBREAK_REQUEST Send Break Request 1072 * @arg @ref UART_MUTE_MODE_REQUEST Mute Mode Request 1073 * @arg @ref UART_RXDATA_FLUSH_REQUEST Receive Data flush Request 1074 * @arg @ref UART_TXDATA_FLUSH_REQUEST Transmit data flush Request 1075 * @retval None 1076 */ 1077 #define __HAL_UART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint16_t)(__REQ__)) 1078 1079 /** @brief Enable the UART one bit sample method. 1080 * @param __HANDLE__ specifies the UART Handle. 1081 * @retval None 1082 */ 1083 #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT) 1084 1085 /** @brief Disable the UART one bit sample method. 1086 * @param __HANDLE__ specifies the UART Handle. 1087 * @retval None 1088 */ 1089 #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= ~USART_CR3_ONEBIT) 1090 1091 /** @brief Enable UART. 1092 * @param __HANDLE__ specifies the UART Handle. 1093 * @retval None 1094 */ 1095 #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) 1096 1097 /** @brief Disable UART. 1098 * @param __HANDLE__ specifies the UART Handle. 1099 * @retval None 1100 */ 1101 #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) 1102 1103 /** @brief Enable CTS flow control. 1104 * @note This macro allows to enable CTS hardware flow control for a given UART instance, 1105 * without need to call HAL_UART_Init() function. 1106 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1107 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need 1108 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1109 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1110 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__)) 1111 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1112 * @param __HANDLE__ specifies the UART Handle. 1113 * @retval None 1114 */ 1115 #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \ 1116 do{ \ 1117 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ 1118 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \ 1119 } while(0U) 1120 1121 /** @brief Disable CTS flow control. 1122 * @note This macro allows to disable CTS hardware flow control for a given UART instance, 1123 * without need to call HAL_UART_Init() function. 1124 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1125 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need 1126 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1127 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1128 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__)) 1129 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1130 * @param __HANDLE__ specifies the UART Handle. 1131 * @retval None 1132 */ 1133 #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \ 1134 do{ \ 1135 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ 1136 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \ 1137 } while(0U) 1138 1139 /** @brief Enable RTS flow control. 1140 * @note This macro allows to enable RTS hardware flow control for a given UART instance, 1141 * without need to call HAL_UART_Init() function. 1142 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1143 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need 1144 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1145 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1146 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__)) 1147 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1148 * @param __HANDLE__ specifies the UART Handle. 1149 * @retval None 1150 */ 1151 #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \ 1152 do{ \ 1153 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \ 1154 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \ 1155 } while(0U) 1156 1157 /** @brief Disable RTS flow control. 1158 * @note This macro allows to disable RTS hardware flow control for a given UART instance, 1159 * without need to call HAL_UART_Init() function. 1160 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1161 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need 1162 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1163 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1164 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__)) 1165 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1166 * @param __HANDLE__ specifies the UART Handle. 1167 * @retval None 1168 */ 1169 #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \ 1170 do{ \ 1171 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\ 1172 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \ 1173 } while(0U) 1174 /** 1175 * @} 1176 */ 1177 1178 /* Private macros --------------------------------------------------------*/ 1179 /** @defgroup UART_Private_Macros UART Private Macros 1180 * @{ 1181 */ 1182 #if defined(USART_PRESC_PRESCALER) 1183 /** @brief Get UART clok division factor from clock prescaler value. 1184 * @param __CLOCKPRESCALER__ UART prescaler value. 1185 * @retval UART clock division factor 1186 */ 1187 #define UART_GET_DIV_FACTOR(__CLOCKPRESCALER__) \ 1188 (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1) ? 1U : \ 1189 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2) ? 2U : \ 1190 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4) ? 4U : \ 1191 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6) ? 6U : \ 1192 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8) ? 8U : \ 1193 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10) ? 10U : \ 1194 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12) ? 12U : \ 1195 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16) ? 16U : \ 1196 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32) ? 32U : \ 1197 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64) ? 64U : \ 1198 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) ? 128U : \ 1199 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV256) ? 256U : 1U) 1200 1201 /** @brief BRR division operation to set BRR register with LPUART. 1202 * @param __PCLK__ LPUART clock. 1203 * @param __BAUD__ Baud rate set by the user. 1204 * @param __CLOCKPRESCALER__ UART prescaler value. 1205 * @retval Division result 1206 */ 1207 #define UART_DIV_LPUART(__PCLK__, __BAUD__, __CLOCKPRESCALER__) ((uint32_t)((((((uint64_t)(__PCLK__))/(UARTPrescTable[(__CLOCKPRESCALER__)]))*256U)\ 1208 + (uint32_t)((__BAUD__)/2U)) / (__BAUD__))) 1209 1210 /** @brief BRR division operation to set BRR register in 8-bit oversampling mode. 1211 * @param __PCLK__ UART clock. 1212 * @param __BAUD__ Baud rate set by the user. 1213 * @param __CLOCKPRESCALER__ UART prescaler value. 1214 * @retval Division result 1215 */ 1216 #define UART_DIV_SAMPLING8(__PCLK__, __BAUD__, __CLOCKPRESCALER__) (((((__PCLK__)/UARTPrescTable[(__CLOCKPRESCALER__)])*2U)\ 1217 + ((__BAUD__)/2U)) / (__BAUD__)) 1218 1219 /** @brief BRR division operation to set BRR register in 16-bit oversampling mode. 1220 * @param __PCLK__ UART clock. 1221 * @param __BAUD__ Baud rate set by the user. 1222 * @param __CLOCKPRESCALER__ UART prescaler value. 1223 * @retval Division result 1224 */ 1225 #define UART_DIV_SAMPLING16(__PCLK__, __BAUD__, __CLOCKPRESCALER__) ((((__PCLK__)/UARTPrescTable[(__CLOCKPRESCALER__)])\ 1226 + ((__BAUD__)/2U)) / (__BAUD__)) 1227 #else 1228 1229 /** @brief BRR division operation to set BRR register with LPUART. 1230 * @param __PCLK__ LPUART clock. 1231 * @param __BAUD__ Baud rate set by the user. 1232 * @retval Division result 1233 */ 1234 #define UART_DIV_LPUART(__PCLK__, __BAUD__) (((((uint64_t)(__PCLK__)*256U)) + ((__BAUD__)/2U)) / (__BAUD__)) 1235 1236 /** @brief BRR division operation to set BRR register in 8-bit oversampling mode. 1237 * @param __PCLK__ UART clock. 1238 * @param __BAUD__ Baud rate set by the user. 1239 * @retval Division result 1240 */ 1241 #define UART_DIV_SAMPLING8(__PCLK__, __BAUD__) ((((__PCLK__)*2U) + ((__BAUD__)/2U)) / (__BAUD__)) 1242 1243 /** @brief BRR division operation to set BRR register in 16-bit oversampling mode. 1244 * @param __PCLK__ UART clock. 1245 * @param __BAUD__ Baud rate set by the user. 1246 * @retval Division result 1247 */ 1248 #define UART_DIV_SAMPLING16(__PCLK__, __BAUD__) (((__PCLK__) + ((__BAUD__)/2U)) / (__BAUD__)) 1249 #endif /* USART_PRESC_PRESCALER */ 1250 1251 /** @brief Check whether or not UART instance is Low Power UART. 1252 * @param __HANDLE__ specifies the UART Handle. 1253 * @retval SET (instance is LPUART) or RESET (instance isn't LPUART) 1254 */ 1255 #define UART_INSTANCE_LOWPOWER(__HANDLE__) (IS_LPUART_INSTANCE((__HANDLE__)->Instance)) 1256 1257 /** @brief Check UART Baud rate. 1258 * @param __BAUDRATE__ Baudrate specified by the user. 1259 * The maximum Baud Rate is derived from the maximum clock on L4 1260 * divided by the smallest oversampling used on the USART (i.e. 8) 1261 * (i.e. 120 MHz on STM32L4Rx/L4Sx, 80 Mhz otherwise) 1262 * @retval SET (__BAUDRATE__ is valid) or RESET (__BAUDRATE__ is invalid) 1263 */ 1264 #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 1265 #define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 15000001U) 1266 #else 1267 #define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 10000001U) 1268 #endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ 1269 1270 /** @brief Check UART assertion time. 1271 * @param __TIME__ 5-bit value assertion time. 1272 * @retval Test result (TRUE or FALSE). 1273 */ 1274 #define IS_UART_ASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU) 1275 1276 /** @brief Check UART deassertion time. 1277 * @param __TIME__ 5-bit value deassertion time. 1278 * @retval Test result (TRUE or FALSE). 1279 */ 1280 #define IS_UART_DEASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU) 1281 1282 /** 1283 * @brief Ensure that UART frame number of stop bits is valid. 1284 * @param __STOPBITS__ UART frame number of stop bits. 1285 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) 1286 */ 1287 #define IS_UART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_0_5) || \ 1288 ((__STOPBITS__) == UART_STOPBITS_1) || \ 1289 ((__STOPBITS__) == UART_STOPBITS_1_5) || \ 1290 ((__STOPBITS__) == UART_STOPBITS_2)) 1291 1292 /** 1293 * @brief Ensure that LPUART frame number of stop bits is valid. 1294 * @param __STOPBITS__ LPUART frame number of stop bits. 1295 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) 1296 */ 1297 #define IS_LPUART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_1) || \ 1298 ((__STOPBITS__) == UART_STOPBITS_2)) 1299 1300 /** 1301 * @brief Ensure that UART frame parity is valid. 1302 * @param __PARITY__ UART frame parity. 1303 * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid) 1304 */ 1305 #define IS_UART_PARITY(__PARITY__) (((__PARITY__) == UART_PARITY_NONE) || \ 1306 ((__PARITY__) == UART_PARITY_EVEN) || \ 1307 ((__PARITY__) == UART_PARITY_ODD)) 1308 1309 /** 1310 * @brief Ensure that UART hardware flow control is valid. 1311 * @param __CONTROL__ UART hardware flow control. 1312 * @retval SET (__CONTROL__ is valid) or RESET (__CONTROL__ is invalid) 1313 */ 1314 #define IS_UART_HARDWARE_FLOW_CONTROL(__CONTROL__)\ 1315 (((__CONTROL__) == UART_HWCONTROL_NONE) || \ 1316 ((__CONTROL__) == UART_HWCONTROL_RTS) || \ 1317 ((__CONTROL__) == UART_HWCONTROL_CTS) || \ 1318 ((__CONTROL__) == UART_HWCONTROL_RTS_CTS)) 1319 1320 /** 1321 * @brief Ensure that UART communication mode is valid. 1322 * @param __MODE__ UART communication mode. 1323 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 1324 */ 1325 #define IS_UART_MODE(__MODE__) ((((__MODE__) & (~((uint32_t)(UART_MODE_TX_RX)))) == 0x00U) && ((__MODE__) != 0x00U)) 1326 1327 /** 1328 * @brief Ensure that UART state is valid. 1329 * @param __STATE__ UART state. 1330 * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid) 1331 */ 1332 #define IS_UART_STATE(__STATE__) (((__STATE__) == UART_STATE_DISABLE) || \ 1333 ((__STATE__) == UART_STATE_ENABLE)) 1334 1335 /** 1336 * @brief Ensure that UART oversampling is valid. 1337 * @param __SAMPLING__ UART oversampling. 1338 * @retval SET (__SAMPLING__ is valid) or RESET (__SAMPLING__ is invalid) 1339 */ 1340 #define IS_UART_OVERSAMPLING(__SAMPLING__) (((__SAMPLING__) == UART_OVERSAMPLING_16) || \ 1341 ((__SAMPLING__) == UART_OVERSAMPLING_8)) 1342 1343 /** 1344 * @brief Ensure that UART frame sampling is valid. 1345 * @param __ONEBIT__ UART frame sampling. 1346 * @retval SET (__ONEBIT__ is valid) or RESET (__ONEBIT__ is invalid) 1347 */ 1348 #define IS_UART_ONE_BIT_SAMPLE(__ONEBIT__) (((__ONEBIT__) == UART_ONE_BIT_SAMPLE_DISABLE) || \ 1349 ((__ONEBIT__) == UART_ONE_BIT_SAMPLE_ENABLE)) 1350 1351 /** 1352 * @brief Ensure that UART auto Baud rate detection mode is valid. 1353 * @param __MODE__ UART auto Baud rate detection mode. 1354 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 1355 */ 1356 #define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(__MODE__) (((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) || \ 1357 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE) || \ 1358 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME) || \ 1359 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME)) 1360 1361 /** 1362 * @brief Ensure that UART receiver timeout setting is valid. 1363 * @param __TIMEOUT__ UART receiver timeout setting. 1364 * @retval SET (__TIMEOUT__ is valid) or RESET (__TIMEOUT__ is invalid) 1365 */ 1366 #define IS_UART_RECEIVER_TIMEOUT(__TIMEOUT__) (((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_DISABLE) || \ 1367 ((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_ENABLE)) 1368 1369 /** @brief Check the receiver timeout value. 1370 * @note The maximum UART receiver timeout value is 0xFFFFFF. 1371 * @param __TIMEOUTVALUE__ receiver timeout value. 1372 * @retval Test result (TRUE or FALSE) 1373 */ 1374 #define IS_UART_RECEIVER_TIMEOUT_VALUE(__TIMEOUTVALUE__) ((__TIMEOUTVALUE__) <= 0xFFFFFFU) 1375 1376 /** 1377 * @brief Ensure that UART LIN state is valid. 1378 * @param __LIN__ UART LIN state. 1379 * @retval SET (__LIN__ is valid) or RESET (__LIN__ is invalid) 1380 */ 1381 #define IS_UART_LIN(__LIN__) (((__LIN__) == UART_LIN_DISABLE) || \ 1382 ((__LIN__) == UART_LIN_ENABLE)) 1383 1384 /** 1385 * @brief Ensure that UART LIN break detection length is valid. 1386 * @param __LENGTH__ UART LIN break detection length. 1387 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) 1388 */ 1389 #define IS_UART_LIN_BREAK_DETECT_LENGTH(__LENGTH__) (((__LENGTH__) == UART_LINBREAKDETECTLENGTH_10B) || \ 1390 ((__LENGTH__) == UART_LINBREAKDETECTLENGTH_11B)) 1391 1392 /** 1393 * @brief Ensure that UART DMA TX state is valid. 1394 * @param __DMATX__ UART DMA TX state. 1395 * @retval SET (__DMATX__ is valid) or RESET (__DMATX__ is invalid) 1396 */ 1397 #define IS_UART_DMA_TX(__DMATX__) (((__DMATX__) == UART_DMA_TX_DISABLE) || \ 1398 ((__DMATX__) == UART_DMA_TX_ENABLE)) 1399 1400 /** 1401 * @brief Ensure that UART DMA RX state is valid. 1402 * @param __DMARX__ UART DMA RX state. 1403 * @retval SET (__DMARX__ is valid) or RESET (__DMARX__ is invalid) 1404 */ 1405 #define IS_UART_DMA_RX(__DMARX__) (((__DMARX__) == UART_DMA_RX_DISABLE) || \ 1406 ((__DMARX__) == UART_DMA_RX_ENABLE)) 1407 1408 /** 1409 * @brief Ensure that UART half-duplex state is valid. 1410 * @param __HDSEL__ UART half-duplex state. 1411 * @retval SET (__HDSEL__ is valid) or RESET (__HDSEL__ is invalid) 1412 */ 1413 #define IS_UART_HALF_DUPLEX(__HDSEL__) (((__HDSEL__) == UART_HALF_DUPLEX_DISABLE) || \ 1414 ((__HDSEL__) == UART_HALF_DUPLEX_ENABLE)) 1415 1416 /** 1417 * @brief Ensure that UART wake-up method is valid. 1418 * @param __WAKEUP__ UART wake-up method . 1419 * @retval SET (__WAKEUP__ is valid) or RESET (__WAKEUP__ is invalid) 1420 */ 1421 #define IS_UART_WAKEUPMETHOD(__WAKEUP__) (((__WAKEUP__) == UART_WAKEUPMETHOD_IDLELINE) || \ 1422 ((__WAKEUP__) == UART_WAKEUPMETHOD_ADDRESSMARK)) 1423 1424 /** 1425 * @brief Ensure that UART request parameter is valid. 1426 * @param __PARAM__ UART request parameter. 1427 * @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid) 1428 */ 1429 #define IS_UART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == UART_AUTOBAUD_REQUEST) || \ 1430 ((__PARAM__) == UART_SENDBREAK_REQUEST) || \ 1431 ((__PARAM__) == UART_MUTE_MODE_REQUEST) || \ 1432 ((__PARAM__) == UART_RXDATA_FLUSH_REQUEST) || \ 1433 ((__PARAM__) == UART_TXDATA_FLUSH_REQUEST)) 1434 1435 /** 1436 * @brief Ensure that UART advanced features initialization is valid. 1437 * @param __INIT__ UART advanced features initialization. 1438 * @retval SET (__INIT__ is valid) or RESET (__INIT__ is invalid) 1439 */ 1440 #define IS_UART_ADVFEATURE_INIT(__INIT__) ((__INIT__) <= (UART_ADVFEATURE_NO_INIT | \ 1441 UART_ADVFEATURE_TXINVERT_INIT | \ 1442 UART_ADVFEATURE_RXINVERT_INIT | \ 1443 UART_ADVFEATURE_DATAINVERT_INIT | \ 1444 UART_ADVFEATURE_SWAP_INIT | \ 1445 UART_ADVFEATURE_RXOVERRUNDISABLE_INIT | \ 1446 UART_ADVFEATURE_DMADISABLEONERROR_INIT | \ 1447 UART_ADVFEATURE_AUTOBAUDRATE_INIT | \ 1448 UART_ADVFEATURE_MSBFIRST_INIT)) 1449 1450 /** 1451 * @brief Ensure that UART frame TX inversion setting is valid. 1452 * @param __TXINV__ UART frame TX inversion setting. 1453 * @retval SET (__TXINV__ is valid) or RESET (__TXINV__ is invalid) 1454 */ 1455 #define IS_UART_ADVFEATURE_TXINV(__TXINV__) (((__TXINV__) == UART_ADVFEATURE_TXINV_DISABLE) || \ 1456 ((__TXINV__) == UART_ADVFEATURE_TXINV_ENABLE)) 1457 1458 /** 1459 * @brief Ensure that UART frame RX inversion setting is valid. 1460 * @param __RXINV__ UART frame RX inversion setting. 1461 * @retval SET (__RXINV__ is valid) or RESET (__RXINV__ is invalid) 1462 */ 1463 #define IS_UART_ADVFEATURE_RXINV(__RXINV__) (((__RXINV__) == UART_ADVFEATURE_RXINV_DISABLE) || \ 1464 ((__RXINV__) == UART_ADVFEATURE_RXINV_ENABLE)) 1465 1466 /** 1467 * @brief Ensure that UART frame data inversion setting is valid. 1468 * @param __DATAINV__ UART frame data inversion setting. 1469 * @retval SET (__DATAINV__ is valid) or RESET (__DATAINV__ is invalid) 1470 */ 1471 #define IS_UART_ADVFEATURE_DATAINV(__DATAINV__) (((__DATAINV__) == UART_ADVFEATURE_DATAINV_DISABLE) || \ 1472 ((__DATAINV__) == UART_ADVFEATURE_DATAINV_ENABLE)) 1473 1474 /** 1475 * @brief Ensure that UART frame RX/TX pins swap setting is valid. 1476 * @param __SWAP__ UART frame RX/TX pins swap setting. 1477 * @retval SET (__SWAP__ is valid) or RESET (__SWAP__ is invalid) 1478 */ 1479 #define IS_UART_ADVFEATURE_SWAP(__SWAP__) (((__SWAP__) == UART_ADVFEATURE_SWAP_DISABLE) || \ 1480 ((__SWAP__) == UART_ADVFEATURE_SWAP_ENABLE)) 1481 1482 /** 1483 * @brief Ensure that UART frame overrun setting is valid. 1484 * @param __OVERRUN__ UART frame overrun setting. 1485 * @retval SET (__OVERRUN__ is valid) or RESET (__OVERRUN__ is invalid) 1486 */ 1487 #define IS_UART_OVERRUN(__OVERRUN__) (((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_ENABLE) || \ 1488 ((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_DISABLE)) 1489 1490 /** 1491 * @brief Ensure that UART auto Baud rate state is valid. 1492 * @param __AUTOBAUDRATE__ UART auto Baud rate state. 1493 * @retval SET (__AUTOBAUDRATE__ is valid) or RESET (__AUTOBAUDRATE__ is invalid) 1494 */ 1495 #define IS_UART_ADVFEATURE_AUTOBAUDRATE(__AUTOBAUDRATE__) (((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_DISABLE) || \ 1496 ((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)) 1497 1498 /** 1499 * @brief Ensure that UART DMA enabling or disabling on error setting is valid. 1500 * @param __DMA__ UART DMA enabling or disabling on error setting. 1501 * @retval SET (__DMA__ is valid) or RESET (__DMA__ is invalid) 1502 */ 1503 #define IS_UART_ADVFEATURE_DMAONRXERROR(__DMA__) (((__DMA__) == UART_ADVFEATURE_DMA_ENABLEONRXERROR) || \ 1504 ((__DMA__) == UART_ADVFEATURE_DMA_DISABLEONRXERROR)) 1505 1506 /** 1507 * @brief Ensure that UART frame MSB first setting is valid. 1508 * @param __MSBFIRST__ UART frame MSB first setting. 1509 * @retval SET (__MSBFIRST__ is valid) or RESET (__MSBFIRST__ is invalid) 1510 */ 1511 #define IS_UART_ADVFEATURE_MSBFIRST(__MSBFIRST__) (((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_DISABLE) || \ 1512 ((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_ENABLE)) 1513 1514 /** 1515 * @brief Ensure that UART stop mode state is valid. 1516 * @param __STOPMODE__ UART stop mode state. 1517 * @retval SET (__STOPMODE__ is valid) or RESET (__STOPMODE__ is invalid) 1518 */ 1519 #define IS_UART_ADVFEATURE_STOPMODE(__STOPMODE__) (((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_DISABLE) || \ 1520 ((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_ENABLE)) 1521 1522 /** 1523 * @brief Ensure that UART mute mode state is valid. 1524 * @param __MUTE__ UART mute mode state. 1525 * @retval SET (__MUTE__ is valid) or RESET (__MUTE__ is invalid) 1526 */ 1527 #define IS_UART_MUTE_MODE(__MUTE__) (((__MUTE__) == UART_ADVFEATURE_MUTEMODE_DISABLE) || \ 1528 ((__MUTE__) == UART_ADVFEATURE_MUTEMODE_ENABLE)) 1529 1530 /** 1531 * @brief Ensure that UART wake-up selection is valid. 1532 * @param __WAKE__ UART wake-up selection. 1533 * @retval SET (__WAKE__ is valid) or RESET (__WAKE__ is invalid) 1534 */ 1535 #define IS_UART_WAKEUP_SELECTION(__WAKE__) (((__WAKE__) == UART_WAKEUP_ON_ADDRESS) || \ 1536 ((__WAKE__) == UART_WAKEUP_ON_STARTBIT) || \ 1537 ((__WAKE__) == UART_WAKEUP_ON_READDATA_NONEMPTY)) 1538 1539 /** 1540 * @brief Ensure that UART driver enable polarity is valid. 1541 * @param __POLARITY__ UART driver enable polarity. 1542 * @retval SET (__POLARITY__ is valid) or RESET (__POLARITY__ is invalid) 1543 */ 1544 #define IS_UART_DE_POLARITY(__POLARITY__) (((__POLARITY__) == UART_DE_POLARITY_HIGH) || \ 1545 ((__POLARITY__) == UART_DE_POLARITY_LOW)) 1546 1547 #if defined(USART_PRESC_PRESCALER) 1548 /** 1549 * @brief Ensure that UART Prescaler is valid. 1550 * @param __CLOCKPRESCALER__ UART Prescaler value. 1551 * @retval SET (__CLOCKPRESCALER__ is valid) or RESET (__CLOCKPRESCALER__ is invalid) 1552 */ 1553 #define IS_UART_PRESCALER(__CLOCKPRESCALER__) (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1) || \ 1554 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2) || \ 1555 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4) || \ 1556 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6) || \ 1557 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8) || \ 1558 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10) || \ 1559 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12) || \ 1560 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16) || \ 1561 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32) || \ 1562 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64) || \ 1563 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) || \ 1564 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV256)) 1565 #endif /* USART_PRESC_PRESCALER */ 1566 1567 /** 1568 * @} 1569 */ 1570 1571 /* Include UART HAL Extended module */ 1572 #include "stm32l4xx_hal_uart_ex.h" 1573 1574 #if defined(USART_PRESC_PRESCALER) 1575 1576 /* Prescaler Table used in BRR computation macros. 1577 Declared as extern here to allow use of private UART macros, outside of HAL UART fonctions */ 1578 extern const uint16_t UARTPrescTable[12]; 1579 1580 #endif /* USART_PRESC_PRESCALER */ 1581 1582 /* Exported functions --------------------------------------------------------*/ 1583 /** @addtogroup UART_Exported_Functions UART Exported Functions 1584 * @{ 1585 */ 1586 1587 /** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions 1588 * @{ 1589 */ 1590 1591 /* Initialization and de-initialization functions ****************************/ 1592 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart); 1593 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart); 1594 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength); 1595 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod); 1596 HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart); 1597 void HAL_UART_MspInit(UART_HandleTypeDef *huart); 1598 void HAL_UART_MspDeInit(UART_HandleTypeDef *huart); 1599 1600 /* Callbacks Register/UnRegister functions ***********************************/ 1601 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 1602 HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID, 1603 pUART_CallbackTypeDef pCallback); 1604 HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID); 1605 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 1606 1607 /** 1608 * @} 1609 */ 1610 1611 /** @addtogroup UART_Exported_Functions_Group2 IO operation functions 1612 * @{ 1613 */ 1614 1615 /* IO operation functions *****************************************************/ 1616 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); 1617 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); 1618 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1619 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1620 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1621 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1622 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart); 1623 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart); 1624 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart); 1625 /* Transfer Abort functions */ 1626 HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart); 1627 HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart); 1628 HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart); 1629 HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart); 1630 HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart); 1631 HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart); 1632 1633 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart); 1634 void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart); 1635 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart); 1636 void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart); 1637 void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart); 1638 void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart); 1639 void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart); 1640 void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart); 1641 void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart); 1642 1643 /** 1644 * @} 1645 */ 1646 1647 /** @addtogroup UART_Exported_Functions_Group3 Peripheral Control functions 1648 * @{ 1649 */ 1650 1651 /* Peripheral Control functions ************************************************/ 1652 void HAL_UART_ReceiverTimeout_Config(UART_HandleTypeDef *huart, uint32_t TimeoutValue); 1653 HAL_StatusTypeDef HAL_UART_EnableReceiverTimeout(UART_HandleTypeDef *huart); 1654 HAL_StatusTypeDef HAL_UART_DisableReceiverTimeout(UART_HandleTypeDef *huart); 1655 1656 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart); 1657 HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart); 1658 HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart); 1659 void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart); 1660 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart); 1661 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart); 1662 1663 /** 1664 * @} 1665 */ 1666 1667 /** @addtogroup UART_Exported_Functions_Group4 Peripheral State and Error functions 1668 * @{ 1669 */ 1670 1671 /* Peripheral State and Errors functions **************************************************/ 1672 HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart); 1673 uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart); 1674 1675 /** 1676 * @} 1677 */ 1678 1679 /** 1680 * @} 1681 */ 1682 1683 /* Private functions -----------------------------------------------------------*/ 1684 /** @addtogroup UART_Private_Functions UART Private Functions 1685 * @{ 1686 */ 1687 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 1688 void UART_InitCallbacksToDefault(UART_HandleTypeDef *huart); 1689 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 1690 HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart); 1691 HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart); 1692 HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, 1693 uint32_t Tickstart, uint32_t Timeout); 1694 void UART_AdvFeatureConfig(UART_HandleTypeDef *huart); 1695 1696 /** 1697 * @} 1698 */ 1699 1700 /** 1701 * @} 1702 */ 1703 1704 /** 1705 * @} 1706 */ 1707 1708 #ifdef __cplusplus 1709 } 1710 #endif 1711 1712 #endif /* STM32L4xx_HAL_UART_H */ 1713 1714 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 1715