1 /**
2 ******************************************************************************
3 * @file stm32l4xx_ll_spi.c
4 * @author MCD Application Team
5 * @brief SPI LL module driver.
6 ******************************************************************************
7 * @attention
8 *
9 * <h2><center>© Copyright (c) 2017 STMicroelectronics.
10 * All rights reserved.</center></h2>
11 *
12 * This software component is licensed by ST under BSD 3-Clause license,
13 * the "License"; You may not use this file except in compliance with the
14 * License. You may obtain a copy of the License at:
15 * opensource.org/licenses/BSD-3-Clause
16 *
17 ******************************************************************************
18 */
19 #if defined(USE_FULL_LL_DRIVER)
20
21 /* Includes ------------------------------------------------------------------*/
22 #include "stm32l4xx_ll_spi.h"
23 #include "stm32l4xx_ll_bus.h"
24
25 #ifdef USE_FULL_ASSERT
26 #include "stm32_assert.h"
27 #else
28 #define assert_param(expr) ((void)0U)
29 #endif
30
31 /** @addtogroup STM32L4xx_LL_Driver
32 * @{
33 */
34
35 #if defined (SPI1) || defined (SPI2) || defined (SPI3)
36
37 /** @addtogroup SPI_LL
38 * @{
39 */
40
41 /* Private types -------------------------------------------------------------*/
42 /* Private variables ---------------------------------------------------------*/
43
44 /* Private constants ---------------------------------------------------------*/
45 /** @defgroup SPI_LL_Private_Constants SPI Private Constants
46 * @{
47 */
48 /* SPI registers Masks */
49 #define SPI_CR1_CLEAR_MASK (SPI_CR1_CPHA | SPI_CR1_CPOL | SPI_CR1_MSTR | \
50 SPI_CR1_BR | SPI_CR1_LSBFIRST | SPI_CR1_SSI | \
51 SPI_CR1_SSM | SPI_CR1_RXONLY | SPI_CR1_CRCL | \
52 SPI_CR1_CRCNEXT | SPI_CR1_CRCEN | SPI_CR1_BIDIOE | \
53 SPI_CR1_BIDIMODE)
54 /**
55 * @}
56 */
57
58 /* Private macros ------------------------------------------------------------*/
59 /** @defgroup SPI_LL_Private_Macros SPI Private Macros
60 * @{
61 */
62 #define IS_LL_SPI_TRANSFER_DIRECTION(__VALUE__) (((__VALUE__) == LL_SPI_FULL_DUPLEX) \
63 || ((__VALUE__) == LL_SPI_SIMPLEX_RX) \
64 || ((__VALUE__) == LL_SPI_HALF_DUPLEX_RX) \
65 || ((__VALUE__) == LL_SPI_HALF_DUPLEX_TX))
66
67 #define IS_LL_SPI_MODE(__VALUE__) (((__VALUE__) == LL_SPI_MODE_MASTER) \
68 || ((__VALUE__) == LL_SPI_MODE_SLAVE))
69
70 #define IS_LL_SPI_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_SPI_DATAWIDTH_4BIT) \
71 || ((__VALUE__) == LL_SPI_DATAWIDTH_5BIT) \
72 || ((__VALUE__) == LL_SPI_DATAWIDTH_6BIT) \
73 || ((__VALUE__) == LL_SPI_DATAWIDTH_7BIT) \
74 || ((__VALUE__) == LL_SPI_DATAWIDTH_8BIT) \
75 || ((__VALUE__) == LL_SPI_DATAWIDTH_9BIT) \
76 || ((__VALUE__) == LL_SPI_DATAWIDTH_10BIT) \
77 || ((__VALUE__) == LL_SPI_DATAWIDTH_11BIT) \
78 || ((__VALUE__) == LL_SPI_DATAWIDTH_12BIT) \
79 || ((__VALUE__) == LL_SPI_DATAWIDTH_13BIT) \
80 || ((__VALUE__) == LL_SPI_DATAWIDTH_14BIT) \
81 || ((__VALUE__) == LL_SPI_DATAWIDTH_15BIT) \
82 || ((__VALUE__) == LL_SPI_DATAWIDTH_16BIT))
83
84 #define IS_LL_SPI_POLARITY(__VALUE__) (((__VALUE__) == LL_SPI_POLARITY_LOW) \
85 || ((__VALUE__) == LL_SPI_POLARITY_HIGH))
86
87 #define IS_LL_SPI_PHASE(__VALUE__) (((__VALUE__) == LL_SPI_PHASE_1EDGE) \
88 || ((__VALUE__) == LL_SPI_PHASE_2EDGE))
89
90 #define IS_LL_SPI_NSS(__VALUE__) (((__VALUE__) == LL_SPI_NSS_SOFT) \
91 || ((__VALUE__) == LL_SPI_NSS_HARD_INPUT) \
92 || ((__VALUE__) == LL_SPI_NSS_HARD_OUTPUT))
93
94 #define IS_LL_SPI_BAUDRATE(__VALUE__) (((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV2) \
95 || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV4) \
96 || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV8) \
97 || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV16) \
98 || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV32) \
99 || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV64) \
100 || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV128) \
101 || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV256))
102
103 #define IS_LL_SPI_BITORDER(__VALUE__) (((__VALUE__) == LL_SPI_LSB_FIRST) \
104 || ((__VALUE__) == LL_SPI_MSB_FIRST))
105
106 #define IS_LL_SPI_CRCCALCULATION(__VALUE__) (((__VALUE__) == LL_SPI_CRCCALCULATION_ENABLE) \
107 || ((__VALUE__) == LL_SPI_CRCCALCULATION_DISABLE))
108
109 #define IS_LL_SPI_CRC_POLYNOMIAL(__VALUE__) ((__VALUE__) >= 0x1U)
110
111 /**
112 * @}
113 */
114
115 /* Private function prototypes -----------------------------------------------*/
116
117 /* Exported functions --------------------------------------------------------*/
118 /** @addtogroup SPI_LL_Exported_Functions
119 * @{
120 */
121
122 /** @addtogroup SPI_LL_EF_Init
123 * @{
124 */
125
126 /**
127 * @brief De-initialize the SPI registers to their default reset values.
128 * @param SPIx SPI Instance
129 * @retval An ErrorStatus enumeration value:
130 * - SUCCESS: SPI registers are de-initialized
131 * - ERROR: SPI registers are not de-initialized
132 */
LL_SPI_DeInit(SPI_TypeDef * SPIx)133 ErrorStatus LL_SPI_DeInit(SPI_TypeDef *SPIx)
134 {
135 ErrorStatus status = ERROR;
136
137 /* Check the parameters */
138 assert_param(IS_SPI_ALL_INSTANCE(SPIx));
139
140 #if defined(SPI1)
141 if (SPIx == SPI1)
142 {
143 /* Force reset of SPI clock */
144 LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_SPI1);
145
146 /* Release reset of SPI clock */
147 LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_SPI1);
148
149 status = SUCCESS;
150 }
151 #endif /* SPI1 */
152 #if defined(SPI2)
153 if (SPIx == SPI2)
154 {
155 /* Force reset of SPI clock */
156 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_SPI2);
157
158 /* Release reset of SPI clock */
159 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_SPI2);
160
161 status = SUCCESS;
162 }
163 #endif /* SPI2 */
164 #if defined(SPI3)
165 if (SPIx == SPI3)
166 {
167 /* Force reset of SPI clock */
168 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_SPI3);
169
170 /* Release reset of SPI clock */
171 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_SPI3);
172
173 status = SUCCESS;
174 }
175 #endif /* SPI3 */
176
177 return status;
178 }
179
180 /**
181 * @brief Initialize the SPI registers according to the specified parameters in SPI_InitStruct.
182 * @note As some bits in SPI configuration registers can only be written when the SPI is disabled (SPI_CR1_SPE bit =0),
183 * SPI peripheral should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
184 * @param SPIx SPI Instance
185 * @param SPI_InitStruct pointer to a @ref LL_SPI_InitTypeDef structure
186 * @retval An ErrorStatus enumeration value. (Return always SUCCESS)
187 */
LL_SPI_Init(SPI_TypeDef * SPIx,LL_SPI_InitTypeDef * SPI_InitStruct)188 ErrorStatus LL_SPI_Init(SPI_TypeDef *SPIx, LL_SPI_InitTypeDef *SPI_InitStruct)
189 {
190 ErrorStatus status = ERROR;
191
192 /* Check the SPI Instance SPIx*/
193 assert_param(IS_SPI_ALL_INSTANCE(SPIx));
194
195 /* Check the SPI parameters from SPI_InitStruct*/
196 assert_param(IS_LL_SPI_TRANSFER_DIRECTION(SPI_InitStruct->TransferDirection));
197 assert_param(IS_LL_SPI_MODE(SPI_InitStruct->Mode));
198 assert_param(IS_LL_SPI_DATAWIDTH(SPI_InitStruct->DataWidth));
199 assert_param(IS_LL_SPI_POLARITY(SPI_InitStruct->ClockPolarity));
200 assert_param(IS_LL_SPI_PHASE(SPI_InitStruct->ClockPhase));
201 assert_param(IS_LL_SPI_NSS(SPI_InitStruct->NSS));
202 assert_param(IS_LL_SPI_BAUDRATE(SPI_InitStruct->BaudRate));
203 assert_param(IS_LL_SPI_BITORDER(SPI_InitStruct->BitOrder));
204 assert_param(IS_LL_SPI_CRCCALCULATION(SPI_InitStruct->CRCCalculation));
205
206 if (LL_SPI_IsEnabled(SPIx) == 0x00000000U)
207 {
208 /*---------------------------- SPIx CR1 Configuration ------------------------
209 * Configure SPIx CR1 with parameters:
210 * - TransferDirection: SPI_CR1_BIDIMODE, SPI_CR1_BIDIOE and SPI_CR1_RXONLY bits
211 * - Master/Slave Mode: SPI_CR1_MSTR bit
212 * - ClockPolarity: SPI_CR1_CPOL bit
213 * - ClockPhase: SPI_CR1_CPHA bit
214 * - NSS management: SPI_CR1_SSM bit
215 * - BaudRate prescaler: SPI_CR1_BR[2:0] bits
216 * - BitOrder: SPI_CR1_LSBFIRST bit
217 * - CRCCalculation: SPI_CR1_CRCEN bit
218 */
219 MODIFY_REG(SPIx->CR1,
220 SPI_CR1_CLEAR_MASK,
221 SPI_InitStruct->TransferDirection | SPI_InitStruct->Mode |
222 SPI_InitStruct->ClockPolarity | SPI_InitStruct->ClockPhase |
223 SPI_InitStruct->NSS | SPI_InitStruct->BaudRate |
224 SPI_InitStruct->BitOrder | SPI_InitStruct->CRCCalculation);
225
226 /*---------------------------- SPIx CR2 Configuration ------------------------
227 * Configure SPIx CR2 with parameters:
228 * - DataWidth: DS[3:0] bits
229 * - NSS management: SSOE bit
230 */
231 MODIFY_REG(SPIx->CR2,
232 SPI_CR2_DS | SPI_CR2_SSOE,
233 SPI_InitStruct->DataWidth | (SPI_InitStruct->NSS >> 16U));
234
235 /*---------------------------- SPIx CRCPR Configuration ----------------------
236 * Configure SPIx CRCPR with parameters:
237 * - CRCPoly: CRCPOLY[15:0] bits
238 */
239 if (SPI_InitStruct->CRCCalculation == LL_SPI_CRCCALCULATION_ENABLE)
240 {
241 assert_param(IS_LL_SPI_CRC_POLYNOMIAL(SPI_InitStruct->CRCPoly));
242 LL_SPI_SetCRCPolynomial(SPIx, SPI_InitStruct->CRCPoly);
243 }
244 status = SUCCESS;
245 }
246
247 return status;
248 }
249
250 /**
251 * @brief Set each @ref LL_SPI_InitTypeDef field to default value.
252 * @param SPI_InitStruct pointer to a @ref LL_SPI_InitTypeDef structure
253 * whose fields will be set to default values.
254 * @retval None
255 */
LL_SPI_StructInit(LL_SPI_InitTypeDef * SPI_InitStruct)256 void LL_SPI_StructInit(LL_SPI_InitTypeDef *SPI_InitStruct)
257 {
258 /* Set SPI_InitStruct fields to default values */
259 SPI_InitStruct->TransferDirection = LL_SPI_FULL_DUPLEX;
260 SPI_InitStruct->Mode = LL_SPI_MODE_SLAVE;
261 SPI_InitStruct->DataWidth = LL_SPI_DATAWIDTH_8BIT;
262 SPI_InitStruct->ClockPolarity = LL_SPI_POLARITY_LOW;
263 SPI_InitStruct->ClockPhase = LL_SPI_PHASE_1EDGE;
264 SPI_InitStruct->NSS = LL_SPI_NSS_HARD_INPUT;
265 SPI_InitStruct->BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV2;
266 SPI_InitStruct->BitOrder = LL_SPI_MSB_FIRST;
267 SPI_InitStruct->CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
268 SPI_InitStruct->CRCPoly = 7U;
269 }
270
271 /**
272 * @}
273 */
274
275 /**
276 * @}
277 */
278
279 /**
280 * @}
281 */
282
283 #endif /* defined (SPI1) || defined (SPI2) || defined (SPI3) */
284
285 /**
286 * @}
287 */
288
289 #endif /* USE_FULL_LL_DRIVER */
290
291 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
292