1 /**
2 ******************************************************************************
3 * @file stm32l4xx_hal_uart.c
4 * @author MCD Application Team
5 * @brief UART HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of the Universal Asynchronous Receiver Transmitter Peripheral (UART).
8 * + Initialization and de-initialization functions
9 * + IO operation functions
10 * + Peripheral Control functions
11 *
12 *
13 @verbatim
14 ===============================================================================
15 ##### How to use this driver #####
16 ===============================================================================
17 [..]
18 The UART HAL driver can be used as follows:
19
20 (#) Declare a UART_HandleTypeDef handle structure (eg. UART_HandleTypeDef huart).
21 (#) Initialize the UART low level resources by implementing the HAL_UART_MspInit() API:
22 (++) Enable the USARTx interface clock.
23 (++) UART pins configuration:
24 (+++) Enable the clock for the UART GPIOs.
25 (+++) Configure these UART pins as alternate function pull-up.
26 (++) NVIC configuration if you need to use interrupt process (HAL_UART_Transmit_IT()
27 and HAL_UART_Receive_IT() APIs):
28 (+++) Configure the USARTx interrupt priority.
29 (+++) Enable the NVIC USART IRQ handle.
30 (++) UART interrupts handling:
31 -@@- The specific UART interrupts (Transmission complete interrupt,
32 RXNE interrupt, RX/TX FIFOs related interrupts and Error Interrupts)
33 are managed using the macros __HAL_UART_ENABLE_IT() and __HAL_UART_DISABLE_IT()
34 inside the transmit and receive processes.
35 (++) DMA Configuration if you need to use DMA process (HAL_UART_Transmit_DMA()
36 and HAL_UART_Receive_DMA() APIs):
37 (+++) Declare a DMA handle structure for the Tx/Rx channel.
38 (+++) Enable the DMAx interface clock.
39 (+++) Configure the declared DMA handle structure with the required Tx/Rx parameters.
40 (+++) Configure the DMA Tx/Rx channel.
41 (+++) Associate the initialized DMA handle to the UART DMA Tx/Rx handle.
42 (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx/Rx channel.
43
44 (#) Program the Baud Rate, Word Length, Stop Bit, Parity, Prescaler value , Hardware
45 flow control and Mode (Receiver/Transmitter) in the huart handle Init structure.
46
47 (#) If required, program UART advanced features (TX/RX pins swap, auto Baud rate detection,...)
48 in the huart handle AdvancedInit structure.
49
50 (#) For the UART asynchronous mode, initialize the UART registers by calling
51 the HAL_UART_Init() API.
52
53 (#) For the UART Half duplex mode, initialize the UART registers by calling
54 the HAL_HalfDuplex_Init() API.
55
56 (#) For the UART LIN (Local Interconnection Network) mode, initialize the UART registers
57 by calling the HAL_LIN_Init() API.
58
59 (#) For the UART Multiprocessor mode, initialize the UART registers
60 by calling the HAL_MultiProcessor_Init() API.
61
62 (#) For the UART RS485 Driver Enabled mode, initialize the UART registers
63 by calling the HAL_RS485Ex_Init() API.
64
65 [..]
66 (@) These API's (HAL_UART_Init(), HAL_HalfDuplex_Init(), HAL_LIN_Init(), HAL_MultiProcessor_Init(),
67 also configure the low level Hardware GPIO, CLOCK, CORTEX...etc) by
68 calling the customized HAL_UART_MspInit() API.
69
70 ##### Callback registration #####
71 ==================================
72
73 [..]
74 The compilation define USE_HAL_UART_REGISTER_CALLBACKS when set to 1
75 allows the user to configure dynamically the driver callbacks.
76
77 [..]
78 Use Function @ref HAL_UART_RegisterCallback() to register a user callback.
79 Function @ref HAL_UART_RegisterCallback() allows to register following callbacks:
80 (+) TxHalfCpltCallback : Tx Half Complete Callback.
81 (+) TxCpltCallback : Tx Complete Callback.
82 (+) RxHalfCpltCallback : Rx Half Complete Callback.
83 (+) RxCpltCallback : Rx Complete Callback.
84 (+) ErrorCallback : Error Callback.
85 (+) AbortCpltCallback : Abort Complete Callback.
86 (+) AbortTransmitCpltCallback : Abort Transmit Complete Callback.
87 (+) AbortReceiveCpltCallback : Abort Receive Complete Callback.
88 (+) WakeupCallback : Wakeup Callback.
89 (+) RxFifoFullCallback : Rx Fifo Full Callback.
90 (+) TxFifoEmptyCallback : Tx Fifo Empty Callback.
91 (+) MspInitCallback : UART MspInit.
92 (+) MspDeInitCallback : UART MspDeInit.
93 This function takes as parameters the HAL peripheral handle, the Callback ID
94 and a pointer to the user callback function.
95
96 [..]
97 Use function @ref HAL_UART_UnRegisterCallback() to reset a callback to the default
98 weak (surcharged) function.
99 @ref HAL_UART_UnRegisterCallback() takes as parameters the HAL peripheral handle,
100 and the Callback ID.
101 This function allows to reset following callbacks:
102 (+) TxHalfCpltCallback : Tx Half Complete Callback.
103 (+) TxCpltCallback : Tx Complete Callback.
104 (+) RxHalfCpltCallback : Rx Half Complete Callback.
105 (+) RxCpltCallback : Rx Complete Callback.
106 (+) ErrorCallback : Error Callback.
107 (+) AbortCpltCallback : Abort Complete Callback.
108 (+) AbortTransmitCpltCallback : Abort Transmit Complete Callback.
109 (+) AbortReceiveCpltCallback : Abort Receive Complete Callback.
110 (+) WakeupCallback : Wakeup Callback.
111 (+) RxFifoFullCallback : Rx Fifo Full Callback.
112 (+) TxFifoEmptyCallback : Tx Fifo Empty Callback.
113 (+) MspInitCallback : UART MspInit.
114 (+) MspDeInitCallback : UART MspDeInit.
115
116 [..]
117 By default, after the @ref HAL_UART_Init() and when the state is HAL_UART_STATE_RESET
118 all callbacks are set to the corresponding weak (surcharged) functions:
119 examples @ref HAL_UART_TxCpltCallback(), @ref HAL_UART_RxHalfCpltCallback().
120 Exception done for MspInit and MspDeInit functions that are respectively
121 reset to the legacy weak (surcharged) functions in the @ref HAL_UART_Init()
122 and @ref HAL_UART_DeInit() only when these callbacks are null (not registered beforehand).
123 If not, MspInit or MspDeInit are not null, the @ref HAL_UART_Init() and @ref HAL_UART_DeInit()
124 keep and use the user MspInit/MspDeInit callbacks (registered beforehand).
125
126 [..]
127 Callbacks can be registered/unregistered in HAL_UART_STATE_READY state only.
128 Exception done MspInit/MspDeInit that can be registered/unregistered
129 in HAL_UART_STATE_READY or HAL_UART_STATE_RESET state, thus registered (user)
130 MspInit/DeInit callbacks can be used during the Init/DeInit.
131 In that case first register the MspInit/MspDeInit user callbacks
132 using @ref HAL_UART_RegisterCallback() before calling @ref HAL_UART_DeInit()
133 or @ref HAL_UART_Init() function.
134
135 [..]
136 When The compilation define USE_HAL_UART_REGISTER_CALLBACKS is set to 0 or
137 not defined, the callback registration feature is not available
138 and weak (surcharged) callbacks are used.
139
140
141 @endverbatim
142 ******************************************************************************
143 * @attention
144 *
145 * <h2><center>© Copyright (c) 2017 STMicroelectronics.
146 * All rights reserved.</center></h2>
147 *
148 * This software component is licensed by ST under BSD 3-Clause license,
149 * the "License"; You may not use this file except in compliance with the
150 * License. You may obtain a copy of the License at:
151 * opensource.org/licenses/BSD-3-Clause
152 *
153 ******************************************************************************
154 */
155
156 /* Includes ------------------------------------------------------------------*/
157 #include "stm32l4xx_hal.h"
158
159 /** @addtogroup STM32L4xx_HAL_Driver
160 * @{
161 */
162
163 /** @defgroup UART UART
164 * @brief HAL UART module driver
165 * @{
166 */
167
168 #ifdef HAL_UART_MODULE_ENABLED
169
170 /* Private typedef -----------------------------------------------------------*/
171 /* Private define ------------------------------------------------------------*/
172 /** @defgroup UART_Private_Constants UART Private Constants
173 * @{
174 */
175 #if defined(USART_CR1_FIFOEN)
176 #define USART_CR1_FIELDS ((uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | \
177 USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8| \
178 USART_CR1_FIFOEN )) /*!< UART or USART CR1 fields of parameters set by UART_SetConfig API */
179 #else
180 #define USART_CR1_FIELDS ((uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | \
181 USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8 )) /*!< UART or USART CR1 fields of parameters set by UART_SetConfig API */
182 #endif /* USART_CR1_FIFOEN */
183
184 #if defined(USART_CR1_FIFOEN)
185 #define USART_CR3_FIELDS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE | USART_CR3_ONEBIT| \
186 USART_CR3_TXFTCFG | USART_CR3_RXFTCFG )) /*!< UART or USART CR3 fields of parameters set by UART_SetConfig API */
187 #else
188 #define USART_CR3_FIELDS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE | USART_CR3_ONEBIT)) /*!< UART or USART CR3 fields of parameters set by UART_SetConfig API */
189 #endif /* USART_CR1_FIFOEN */
190
191 #define LPUART_BRR_MIN 0x00000300U /* LPUART BRR minimum authorized value */
192 #define LPUART_BRR_MAX 0x000FFFFFU /* LPUART BRR maximum authorized value */
193
194 #define UART_BRR_MIN 0x10U /* UART BRR minimum authorized value */
195 #define UART_BRR_MAX 0x0000FFFFU /* UART BRR maximum authorized value */
196
197 /**
198 * @}
199 */
200
201 /* Private macros ------------------------------------------------------------*/
202 /* Private variables ---------------------------------------------------------*/
203 /* Private function prototypes -----------------------------------------------*/
204 /** @addtogroup UART_Private_Functions
205 * @{
206 */
207 static void UART_EndTxTransfer(UART_HandleTypeDef *huart);
208 static void UART_EndRxTransfer(UART_HandleTypeDef *huart);
209 static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma);
210 static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
211 static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
212 static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
213 static void UART_DMAError(DMA_HandleTypeDef *hdma);
214 static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma);
215 static void UART_DMATxAbortCallback(DMA_HandleTypeDef *hdma);
216 static void UART_DMARxAbortCallback(DMA_HandleTypeDef *hdma);
217 static void UART_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma);
218 static void UART_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma);
219 static void UART_TxISR_8BIT(UART_HandleTypeDef *huart);
220 static void UART_TxISR_16BIT(UART_HandleTypeDef *huart);
221 #if defined(USART_CR1_FIFOEN)
222 static void UART_TxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart);
223 static void UART_TxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart);
224 #endif /* USART_CR1_FIFOEN */
225 static void UART_EndTransmit_IT(UART_HandleTypeDef *huart);
226 static void UART_RxISR_8BIT(UART_HandleTypeDef *huart);
227 static void UART_RxISR_16BIT(UART_HandleTypeDef *huart);
228 #if defined(USART_CR1_FIFOEN)
229 static void UART_RxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart);
230 static void UART_RxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart);
231 #endif /* USART_CR1_FIFOEN */
232 /**
233 * @}
234 */
235
236 /* Exported functions --------------------------------------------------------*/
237
238 /** @defgroup UART_Exported_Functions UART Exported Functions
239 * @{
240 */
241
242 /** @defgroup UART_Exported_Functions_Group1 Initialization and de-initialization functions
243 * @brief Initialization and Configuration functions
244 *
245 @verbatim
246 ===============================================================================
247 ##### Initialization and Configuration functions #####
248 ===============================================================================
249 [..]
250 This subsection provides a set of functions allowing to initialize the USARTx or the UARTy
251 in asynchronous mode.
252 (+) For the asynchronous mode the parameters below can be configured:
253 (++) Baud Rate
254 (++) Word Length
255 (++) Stop Bit
256 (++) Parity: If the parity is enabled, then the MSB bit of the data written
257 in the data register is transmitted but is changed by the parity bit.
258 (++) Hardware flow control
259 (++) Receiver/transmitter modes
260 (++) Over Sampling Method
261 (++) One-Bit Sampling Method
262 (+) For the asynchronous mode, the following advanced features can be configured as well:
263 (++) TX and/or RX pin level inversion
264 (++) data logical level inversion
265 (++) RX and TX pins swap
266 (++) RX overrun detection disabling
267 (++) DMA disabling on RX error
268 (++) MSB first on communication line
269 (++) auto Baud rate detection
270 [..]
271 The HAL_UART_Init(), HAL_HalfDuplex_Init(), HAL_LIN_Init()and HAL_MultiProcessor_Init()API
272 follow respectively the UART asynchronous, UART Half duplex, UART LIN mode
273 and UART multiprocessor mode configuration procedures (details for the procedures
274 are available in reference manual).
275
276 @endverbatim
277
278 Depending on the frame length defined by the M1 and M0 bits (7-bit,
279 8-bit or 9-bit), the possible UART formats are listed in the
280 following table.
281
282 Table 1. UART frame format.
283 +-----------------------------------------------------------------------+
284 | M1 bit | M0 bit | PCE bit | UART frame |
285 |---------|---------|-----------|---------------------------------------|
286 | 0 | 0 | 0 | | SB | 8 bit data | STB | |
287 |---------|---------|-----------|---------------------------------------|
288 | 0 | 0 | 1 | | SB | 7 bit data | PB | STB | |
289 |---------|---------|-----------|---------------------------------------|
290 | 0 | 1 | 0 | | SB | 9 bit data | STB | |
291 |---------|---------|-----------|---------------------------------------|
292 | 0 | 1 | 1 | | SB | 8 bit data | PB | STB | |
293 |---------|---------|-----------|---------------------------------------|
294 | 1 | 0 | 0 | | SB | 7 bit data | STB | |
295 |---------|---------|-----------|---------------------------------------|
296 | 1 | 0 | 1 | | SB | 6 bit data | PB | STB | |
297 +-----------------------------------------------------------------------+
298
299 * @{
300 */
301
302 /**
303 * @brief Initialize the UART mode according to the specified
304 * parameters in the UART_InitTypeDef and initialize the associated handle.
305 * @param huart UART handle.
306 * @retval HAL status
307 */
HAL_UART_Init(UART_HandleTypeDef * huart)308 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
309 {
310 /* Check the UART handle allocation */
311 if (huart == NULL)
312 {
313 return HAL_ERROR;
314 }
315
316 if (huart->Init.HwFlowCtl != UART_HWCONTROL_NONE)
317 {
318 /* Check the parameters */
319 assert_param(IS_UART_HWFLOW_INSTANCE(huart->Instance));
320 }
321 else
322 {
323 /* Check the parameters */
324 assert_param((IS_UART_INSTANCE(huart->Instance)) || (IS_LPUART_INSTANCE(huart->Instance)));
325 }
326
327 if (huart->gState == HAL_UART_STATE_RESET)
328 {
329 /* Allocate lock resource and initialize it */
330 huart->Lock = HAL_UNLOCKED;
331
332 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
333 UART_InitCallbacksToDefault(huart);
334
335 if (huart->MspInitCallback == NULL)
336 {
337 huart->MspInitCallback = HAL_UART_MspInit;
338 }
339
340 /* Init the low level hardware */
341 huart->MspInitCallback(huart);
342 #else
343 /* Init the low level hardware : GPIO, CLOCK */
344 HAL_UART_MspInit(huart);
345 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
346 }
347
348 huart->gState = HAL_UART_STATE_BUSY;
349
350 __HAL_UART_DISABLE(huart);
351
352 /* Set the UART Communication parameters */
353 if (UART_SetConfig(huart) == HAL_ERROR)
354 {
355 return HAL_ERROR;
356 }
357
358 if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
359 {
360 UART_AdvFeatureConfig(huart);
361 }
362
363 /* In asynchronous mode, the following bits must be kept cleared:
364 - LINEN and CLKEN bits in the USART_CR2 register,
365 - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/
366 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
367 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
368
369 __HAL_UART_ENABLE(huart);
370
371 /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
372 return (UART_CheckIdleState(huart));
373 }
374
375 /**
376 * @brief Initialize the half-duplex mode according to the specified
377 * parameters in the UART_InitTypeDef and creates the associated handle.
378 * @param huart UART handle.
379 * @retval HAL status
380 */
HAL_HalfDuplex_Init(UART_HandleTypeDef * huart)381 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart)
382 {
383 /* Check the UART handle allocation */
384 if (huart == NULL)
385 {
386 return HAL_ERROR;
387 }
388
389 /* Check UART instance */
390 assert_param(IS_UART_HALFDUPLEX_INSTANCE(huart->Instance));
391
392 if (huart->gState == HAL_UART_STATE_RESET)
393 {
394 /* Allocate lock resource and initialize it */
395 huart->Lock = HAL_UNLOCKED;
396
397 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
398 UART_InitCallbacksToDefault(huart);
399
400 if (huart->MspInitCallback == NULL)
401 {
402 huart->MspInitCallback = HAL_UART_MspInit;
403 }
404
405 /* Init the low level hardware */
406 huart->MspInitCallback(huart);
407 #else
408 /* Init the low level hardware : GPIO, CLOCK */
409 HAL_UART_MspInit(huart);
410 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
411 }
412
413 huart->gState = HAL_UART_STATE_BUSY;
414
415 __HAL_UART_DISABLE(huart);
416
417 /* Set the UART Communication parameters */
418 if (UART_SetConfig(huart) == HAL_ERROR)
419 {
420 return HAL_ERROR;
421 }
422
423 if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
424 {
425 UART_AdvFeatureConfig(huart);
426 }
427
428 /* In half-duplex mode, the following bits must be kept cleared:
429 - LINEN and CLKEN bits in the USART_CR2 register,
430 - SCEN and IREN bits in the USART_CR3 register.*/
431 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
432 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_IREN | USART_CR3_SCEN));
433
434 /* Enable the Half-Duplex mode by setting the HDSEL bit in the CR3 register */
435 SET_BIT(huart->Instance->CR3, USART_CR3_HDSEL);
436
437 __HAL_UART_ENABLE(huart);
438
439 /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
440 return (UART_CheckIdleState(huart));
441 }
442
443
444 /**
445 * @brief Initialize the LIN mode according to the specified
446 * parameters in the UART_InitTypeDef and creates the associated handle.
447 * @param huart UART handle.
448 * @param BreakDetectLength Specifies the LIN break detection length.
449 * This parameter can be one of the following values:
450 * @arg @ref UART_LINBREAKDETECTLENGTH_10B 10-bit break detection
451 * @arg @ref UART_LINBREAKDETECTLENGTH_11B 11-bit break detection
452 * @retval HAL status
453 */
HAL_LIN_Init(UART_HandleTypeDef * huart,uint32_t BreakDetectLength)454 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength)
455 {
456 /* Check the UART handle allocation */
457 if (huart == NULL)
458 {
459 return HAL_ERROR;
460 }
461
462 /* Check the LIN UART instance */
463 assert_param(IS_UART_LIN_INSTANCE(huart->Instance));
464 /* Check the Break detection length parameter */
465 assert_param(IS_UART_LIN_BREAK_DETECT_LENGTH(BreakDetectLength));
466
467 /* LIN mode limited to 16-bit oversampling only */
468 if (huart->Init.OverSampling == UART_OVERSAMPLING_8)
469 {
470 return HAL_ERROR;
471 }
472 /* LIN mode limited to 8-bit data length */
473 if (huart->Init.WordLength != UART_WORDLENGTH_8B)
474 {
475 return HAL_ERROR;
476 }
477
478 if (huart->gState == HAL_UART_STATE_RESET)
479 {
480 /* Allocate lock resource and initialize it */
481 huart->Lock = HAL_UNLOCKED;
482
483 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
484 UART_InitCallbacksToDefault(huart);
485
486 if (huart->MspInitCallback == NULL)
487 {
488 huart->MspInitCallback = HAL_UART_MspInit;
489 }
490
491 /* Init the low level hardware */
492 huart->MspInitCallback(huart);
493 #else
494 /* Init the low level hardware : GPIO, CLOCK */
495 HAL_UART_MspInit(huart);
496 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
497 }
498
499 huart->gState = HAL_UART_STATE_BUSY;
500
501 __HAL_UART_DISABLE(huart);
502
503 /* Set the UART Communication parameters */
504 if (UART_SetConfig(huart) == HAL_ERROR)
505 {
506 return HAL_ERROR;
507 }
508
509 if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
510 {
511 UART_AdvFeatureConfig(huart);
512 }
513
514 /* In LIN mode, the following bits must be kept cleared:
515 - LINEN and CLKEN bits in the USART_CR2 register,
516 - SCEN and IREN bits in the USART_CR3 register.*/
517 CLEAR_BIT(huart->Instance->CR2, USART_CR2_CLKEN);
518 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_HDSEL | USART_CR3_IREN | USART_CR3_SCEN));
519
520 /* Enable the LIN mode by setting the LINEN bit in the CR2 register */
521 SET_BIT(huart->Instance->CR2, USART_CR2_LINEN);
522
523 /* Set the USART LIN Break detection length. */
524 MODIFY_REG(huart->Instance->CR2, USART_CR2_LBDL, BreakDetectLength);
525
526 __HAL_UART_ENABLE(huart);
527
528 /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
529 return (UART_CheckIdleState(huart));
530 }
531
532
533 /**
534 * @brief Initialize the multiprocessor mode according to the specified
535 * parameters in the UART_InitTypeDef and initialize the associated handle.
536 * @param huart UART handle.
537 * @param Address UART node address (4-, 6-, 7- or 8-bit long).
538 * @param WakeUpMethod Specifies the UART wakeup method.
539 * This parameter can be one of the following values:
540 * @arg @ref UART_WAKEUPMETHOD_IDLELINE WakeUp by an idle line detection
541 * @arg @ref UART_WAKEUPMETHOD_ADDRESSMARK WakeUp by an address mark
542 * @note If the user resorts to idle line detection wake up, the Address parameter
543 * is useless and ignored by the initialization function.
544 * @note If the user resorts to address mark wake up, the address length detection
545 * is configured by default to 4 bits only. For the UART to be able to
546 * manage 6-, 7- or 8-bit long addresses detection, the API
547 * HAL_MultiProcessorEx_AddressLength_Set() must be called after
548 * HAL_MultiProcessor_Init().
549 * @retval HAL status
550 */
HAL_MultiProcessor_Init(UART_HandleTypeDef * huart,uint8_t Address,uint32_t WakeUpMethod)551 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod)
552 {
553 /* Check the UART handle allocation */
554 if (huart == NULL)
555 {
556 return HAL_ERROR;
557 }
558
559 /* Check the wake up method parameter */
560 assert_param(IS_UART_WAKEUPMETHOD(WakeUpMethod));
561
562 if (huart->gState == HAL_UART_STATE_RESET)
563 {
564 /* Allocate lock resource and initialize it */
565 huart->Lock = HAL_UNLOCKED;
566
567 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
568 UART_InitCallbacksToDefault(huart);
569
570 if (huart->MspInitCallback == NULL)
571 {
572 huart->MspInitCallback = HAL_UART_MspInit;
573 }
574
575 /* Init the low level hardware */
576 huart->MspInitCallback(huart);
577 #else
578 /* Init the low level hardware : GPIO, CLOCK */
579 HAL_UART_MspInit(huart);
580 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
581 }
582
583 huart->gState = HAL_UART_STATE_BUSY;
584
585 __HAL_UART_DISABLE(huart);
586
587 /* Set the UART Communication parameters */
588 if (UART_SetConfig(huart) == HAL_ERROR)
589 {
590 return HAL_ERROR;
591 }
592
593 if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
594 {
595 UART_AdvFeatureConfig(huart);
596 }
597
598 /* In multiprocessor mode, the following bits must be kept cleared:
599 - LINEN and CLKEN bits in the USART_CR2 register,
600 - SCEN, HDSEL and IREN bits in the USART_CR3 register. */
601 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
602 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
603
604 if (WakeUpMethod == UART_WAKEUPMETHOD_ADDRESSMARK)
605 {
606 /* If address mark wake up method is chosen, set the USART address node */
607 MODIFY_REG(huart->Instance->CR2, USART_CR2_ADD, ((uint32_t)Address << UART_CR2_ADDRESS_LSB_POS));
608 }
609
610 /* Set the wake up method by setting the WAKE bit in the CR1 register */
611 MODIFY_REG(huart->Instance->CR1, USART_CR1_WAKE, WakeUpMethod);
612
613 __HAL_UART_ENABLE(huart);
614
615 /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
616 return (UART_CheckIdleState(huart));
617 }
618
619
620 /**
621 * @brief DeInitialize the UART peripheral.
622 * @param huart UART handle.
623 * @retval HAL status
624 */
HAL_UART_DeInit(UART_HandleTypeDef * huart)625 HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart)
626 {
627 /* Check the UART handle allocation */
628 if (huart == NULL)
629 {
630 return HAL_ERROR;
631 }
632
633 /* Check the parameters */
634 assert_param((IS_UART_INSTANCE(huart->Instance)) || (IS_LPUART_INSTANCE(huart->Instance)));
635
636 huart->gState = HAL_UART_STATE_BUSY;
637
638 __HAL_UART_DISABLE(huart);
639
640 huart->Instance->CR1 = 0x0U;
641 huart->Instance->CR2 = 0x0U;
642 huart->Instance->CR3 = 0x0U;
643
644 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
645 if (huart->MspDeInitCallback == NULL)
646 {
647 huart->MspDeInitCallback = HAL_UART_MspDeInit;
648 }
649 /* DeInit the low level hardware */
650 huart->MspDeInitCallback(huart);
651 #else
652 /* DeInit the low level hardware */
653 HAL_UART_MspDeInit(huart);
654 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
655
656 huart->ErrorCode = HAL_UART_ERROR_NONE;
657 huart->gState = HAL_UART_STATE_RESET;
658 huart->RxState = HAL_UART_STATE_RESET;
659
660 __HAL_UNLOCK(huart);
661
662 return HAL_OK;
663 }
664
665 /**
666 * @brief Initialize the UART MSP.
667 * @param huart UART handle.
668 * @retval None
669 */
HAL_UART_MspInit(UART_HandleTypeDef * huart)670 __weak void HAL_UART_MspInit(UART_HandleTypeDef *huart)
671 {
672 /* Prevent unused argument(s) compilation warning */
673 UNUSED(huart);
674
675 /* NOTE : This function should not be modified, when the callback is needed,
676 the HAL_UART_MspInit can be implemented in the user file
677 */
678 }
679
680 /**
681 * @brief DeInitialize the UART MSP.
682 * @param huart UART handle.
683 * @retval None
684 */
HAL_UART_MspDeInit(UART_HandleTypeDef * huart)685 __weak void HAL_UART_MspDeInit(UART_HandleTypeDef *huart)
686 {
687 /* Prevent unused argument(s) compilation warning */
688 UNUSED(huart);
689
690 /* NOTE : This function should not be modified, when the callback is needed,
691 the HAL_UART_MspDeInit can be implemented in the user file
692 */
693 }
694
695 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
696 /**
697 * @brief Register a User UART Callback
698 * To be used instead of the weak predefined callback
699 * @param huart uart handle
700 * @param CallbackID ID of the callback to be registered
701 * This parameter can be one of the following values:
702 * @arg @ref HAL_UART_TX_HALFCOMPLETE_CB_ID Tx Half Complete Callback ID
703 * @arg @ref HAL_UART_TX_COMPLETE_CB_ID Tx Complete Callback ID
704 * @arg @ref HAL_UART_RX_HALFCOMPLETE_CB_ID Rx Half Complete Callback ID
705 * @arg @ref HAL_UART_RX_COMPLETE_CB_ID Rx Complete Callback ID
706 * @arg @ref HAL_UART_ERROR_CB_ID Error Callback ID
707 * @arg @ref HAL_UART_ABORT_COMPLETE_CB_ID Abort Complete Callback ID
708 * @arg @ref HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID Abort Transmit Complete Callback ID
709 * @arg @ref HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID Abort Receive Complete Callback ID
710 * @arg @ref HAL_UART_WAKEUP_CB_ID Wakeup Callback ID
711 * @arg @ref HAL_UART_RX_FIFO_FULL_CB_ID Rx Fifo Full Callback ID
712 * @arg @ref HAL_UART_TX_FIFO_EMPTY_CB_ID Tx Fifo Empty Callback ID
713 * @arg @ref HAL_UART_MSPINIT_CB_ID MspInit Callback ID
714 * @arg @ref HAL_UART_MSPDEINIT_CB_ID MspDeInit Callback ID
715 * @param pCallback pointer to the Callback function
716 * @retval HAL status
717 */
HAL_UART_RegisterCallback(UART_HandleTypeDef * huart,HAL_UART_CallbackIDTypeDef CallbackID,pUART_CallbackTypeDef pCallback)718 HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID,
719 pUART_CallbackTypeDef pCallback)
720 {
721 HAL_StatusTypeDef status = HAL_OK;
722
723 if (pCallback == NULL)
724 {
725 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
726
727 return HAL_ERROR;
728 }
729
730 __HAL_LOCK(huart);
731
732 if (huart->gState == HAL_UART_STATE_READY)
733 {
734 switch (CallbackID)
735 {
736 case HAL_UART_TX_HALFCOMPLETE_CB_ID :
737 huart->TxHalfCpltCallback = pCallback;
738 break;
739
740 case HAL_UART_TX_COMPLETE_CB_ID :
741 huart->TxCpltCallback = pCallback;
742 break;
743
744 case HAL_UART_RX_HALFCOMPLETE_CB_ID :
745 huart->RxHalfCpltCallback = pCallback;
746 break;
747
748 case HAL_UART_RX_COMPLETE_CB_ID :
749 huart->RxCpltCallback = pCallback;
750 break;
751
752 case HAL_UART_ERROR_CB_ID :
753 huart->ErrorCallback = pCallback;
754 break;
755
756 case HAL_UART_ABORT_COMPLETE_CB_ID :
757 huart->AbortCpltCallback = pCallback;
758 break;
759
760 case HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID :
761 huart->AbortTransmitCpltCallback = pCallback;
762 break;
763
764 case HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID :
765 huart->AbortReceiveCpltCallback = pCallback;
766 break;
767
768 case HAL_UART_WAKEUP_CB_ID :
769 huart->WakeupCallback = pCallback;
770 break;
771
772 #if defined(USART_CR1_FIFOEN)
773 case HAL_UART_RX_FIFO_FULL_CB_ID :
774 huart->RxFifoFullCallback = pCallback;
775 break;
776
777 case HAL_UART_TX_FIFO_EMPTY_CB_ID :
778 huart->TxFifoEmptyCallback = pCallback;
779 break;
780 #endif /* USART_CR1_FIFOEN */
781
782 case HAL_UART_MSPINIT_CB_ID :
783 huart->MspInitCallback = pCallback;
784 break;
785
786 case HAL_UART_MSPDEINIT_CB_ID :
787 huart->MspDeInitCallback = pCallback;
788 break;
789
790 default :
791 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
792
793 status = HAL_ERROR;
794 break;
795 }
796 }
797 else if (huart->gState == HAL_UART_STATE_RESET)
798 {
799 switch (CallbackID)
800 {
801 case HAL_UART_MSPINIT_CB_ID :
802 huart->MspInitCallback = pCallback;
803 break;
804
805 case HAL_UART_MSPDEINIT_CB_ID :
806 huart->MspDeInitCallback = pCallback;
807 break;
808
809 default :
810 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
811
812 status = HAL_ERROR;
813 break;
814 }
815 }
816 else
817 {
818 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
819
820 status = HAL_ERROR;
821 }
822
823 __HAL_UNLOCK(huart);
824
825 return status;
826 }
827
828 /**
829 * @brief Unregister an UART Callback
830 * UART callaback is redirected to the weak predefined callback
831 * @param huart uart handle
832 * @param CallbackID ID of the callback to be unregistered
833 * This parameter can be one of the following values:
834 * @arg @ref HAL_UART_TX_HALFCOMPLETE_CB_ID Tx Half Complete Callback ID
835 * @arg @ref HAL_UART_TX_COMPLETE_CB_ID Tx Complete Callback ID
836 * @arg @ref HAL_UART_RX_HALFCOMPLETE_CB_ID Rx Half Complete Callback ID
837 * @arg @ref HAL_UART_RX_COMPLETE_CB_ID Rx Complete Callback ID
838 * @arg @ref HAL_UART_ERROR_CB_ID Error Callback ID
839 * @arg @ref HAL_UART_ABORT_COMPLETE_CB_ID Abort Complete Callback ID
840 * @arg @ref HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID Abort Transmit Complete Callback ID
841 * @arg @ref HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID Abort Receive Complete Callback ID
842 * @arg @ref HAL_UART_WAKEUP_CB_ID Wakeup Callback ID
843 * @arg @ref HAL_UART_RX_FIFO_FULL_CB_ID Rx Fifo Full Callback ID
844 * @arg @ref HAL_UART_TX_FIFO_EMPTY_CB_ID Tx Fifo Empty Callback ID
845 * @arg @ref HAL_UART_MSPINIT_CB_ID MspInit Callback ID
846 * @arg @ref HAL_UART_MSPDEINIT_CB_ID MspDeInit Callback ID
847 * @retval HAL status
848 */
HAL_UART_UnRegisterCallback(UART_HandleTypeDef * huart,HAL_UART_CallbackIDTypeDef CallbackID)849 HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID)
850 {
851 HAL_StatusTypeDef status = HAL_OK;
852
853 __HAL_LOCK(huart);
854
855 if (HAL_UART_STATE_READY == huart->gState)
856 {
857 switch (CallbackID)
858 {
859 case HAL_UART_TX_HALFCOMPLETE_CB_ID :
860 huart->TxHalfCpltCallback = HAL_UART_TxHalfCpltCallback; /* Legacy weak TxHalfCpltCallback */
861 break;
862
863 case HAL_UART_TX_COMPLETE_CB_ID :
864 huart->TxCpltCallback = HAL_UART_TxCpltCallback; /* Legacy weak TxCpltCallback */
865 break;
866
867 case HAL_UART_RX_HALFCOMPLETE_CB_ID :
868 huart->RxHalfCpltCallback = HAL_UART_RxHalfCpltCallback; /* Legacy weak RxHalfCpltCallback */
869 break;
870
871 case HAL_UART_RX_COMPLETE_CB_ID :
872 huart->RxCpltCallback = HAL_UART_RxCpltCallback; /* Legacy weak RxCpltCallback */
873 break;
874
875 case HAL_UART_ERROR_CB_ID :
876 huart->ErrorCallback = HAL_UART_ErrorCallback; /* Legacy weak ErrorCallback */
877 break;
878
879 case HAL_UART_ABORT_COMPLETE_CB_ID :
880 huart->AbortCpltCallback = HAL_UART_AbortCpltCallback; /* Legacy weak AbortCpltCallback */
881 break;
882
883 case HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID :
884 huart->AbortTransmitCpltCallback = HAL_UART_AbortTransmitCpltCallback; /* Legacy weak AbortTransmitCpltCallback */
885 break;
886
887 case HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID :
888 huart->AbortReceiveCpltCallback = HAL_UART_AbortReceiveCpltCallback; /* Legacy weak AbortReceiveCpltCallback */
889 break;
890
891 case HAL_UART_WAKEUP_CB_ID :
892 huart->WakeupCallback = HAL_UARTEx_WakeupCallback; /* Legacy weak WakeupCallback */
893 break;
894
895 #if defined(USART_CR1_FIFOEN)
896 case HAL_UART_RX_FIFO_FULL_CB_ID :
897 huart->RxFifoFullCallback = HAL_UARTEx_RxFifoFullCallback; /* Legacy weak RxFifoFullCallback */
898 break;
899
900 case HAL_UART_TX_FIFO_EMPTY_CB_ID :
901 huart->TxFifoEmptyCallback = HAL_UARTEx_TxFifoEmptyCallback; /* Legacy weak TxFifoEmptyCallback */
902 break;
903
904 #endif /* USART_CR1_FIFOEN */
905 case HAL_UART_MSPINIT_CB_ID :
906 huart->MspInitCallback = HAL_UART_MspInit; /* Legacy weak MspInitCallback */
907 break;
908
909 case HAL_UART_MSPDEINIT_CB_ID :
910 huart->MspDeInitCallback = HAL_UART_MspDeInit; /* Legacy weak MspDeInitCallback */
911 break;
912
913 default :
914 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
915
916 status = HAL_ERROR;
917 break;
918 }
919 }
920 else if (HAL_UART_STATE_RESET == huart->gState)
921 {
922 switch (CallbackID)
923 {
924 case HAL_UART_MSPINIT_CB_ID :
925 huart->MspInitCallback = HAL_UART_MspInit;
926 break;
927
928 case HAL_UART_MSPDEINIT_CB_ID :
929 huart->MspDeInitCallback = HAL_UART_MspDeInit;
930 break;
931
932 default :
933 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
934
935 status = HAL_ERROR;
936 break;
937 }
938 }
939 else
940 {
941 huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
942
943 status = HAL_ERROR;
944 }
945
946 __HAL_UNLOCK(huart);
947
948 return status;
949 }
950 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
951
952 /**
953 * @}
954 */
955
956 /** @defgroup UART_Exported_Functions_Group2 IO operation functions
957 * @brief UART Transmit/Receive functions
958 *
959 @verbatim
960 ===============================================================================
961 ##### IO operation functions #####
962 ===============================================================================
963 This subsection provides a set of functions allowing to manage the UART asynchronous
964 and Half duplex data transfers.
965
966 (#) There are two mode of transfer:
967 (+) Blocking mode: The communication is performed in polling mode.
968 The HAL status of all data processing is returned by the same function
969 after finishing transfer.
970 (+) Non-Blocking mode: The communication is performed using Interrupts
971 or DMA, These API's return the HAL status.
972 The end of the data processing will be indicated through the
973 dedicated UART IRQ when using Interrupt mode or the DMA IRQ when
974 using DMA mode.
975 The HAL_UART_TxCpltCallback(), HAL_UART_RxCpltCallback() user callbacks
976 will be executed respectively at the end of the transmit or Receive process
977 The HAL_UART_ErrorCallback()user callback will be executed when a communication error is detected
978
979 (#) Blocking mode API's are :
980 (+) HAL_UART_Transmit()
981 (+) HAL_UART_Receive()
982
983 (#) Non-Blocking mode API's with Interrupt are :
984 (+) HAL_UART_Transmit_IT()
985 (+) HAL_UART_Receive_IT()
986 (+) HAL_UART_IRQHandler()
987
988 (#) Non-Blocking mode API's with DMA are :
989 (+) HAL_UART_Transmit_DMA()
990 (+) HAL_UART_Receive_DMA()
991 (+) HAL_UART_DMAPause()
992 (+) HAL_UART_DMAResume()
993 (+) HAL_UART_DMAStop()
994
995 (#) A set of Transfer Complete Callbacks are provided in Non_Blocking mode:
996 (+) HAL_UART_TxHalfCpltCallback()
997 (+) HAL_UART_TxCpltCallback()
998 (+) HAL_UART_RxHalfCpltCallback()
999 (+) HAL_UART_RxCpltCallback()
1000 (+) HAL_UART_ErrorCallback()
1001
1002 (#) Non-Blocking mode transfers could be aborted using Abort API's :
1003 (+) HAL_UART_Abort()
1004 (+) HAL_UART_AbortTransmit()
1005 (+) HAL_UART_AbortReceive()
1006 (+) HAL_UART_Abort_IT()
1007 (+) HAL_UART_AbortTransmit_IT()
1008 (+) HAL_UART_AbortReceive_IT()
1009
1010 (#) For Abort services based on interrupts (HAL_UART_Abortxxx_IT), a set of Abort Complete Callbacks are provided:
1011 (+) HAL_UART_AbortCpltCallback()
1012 (+) HAL_UART_AbortTransmitCpltCallback()
1013 (+) HAL_UART_AbortReceiveCpltCallback()
1014
1015 (#) In Non-Blocking mode transfers, possible errors are split into 2 categories.
1016 Errors are handled as follows :
1017 (+) Error is considered as Recoverable and non blocking : Transfer could go till end, but error severity is
1018 to be evaluated by user : this concerns Frame Error, Parity Error or Noise Error in Interrupt mode reception .
1019 Received character is then retrieved and stored in Rx buffer, Error code is set to allow user to identify error type,
1020 and HAL_UART_ErrorCallback() user callback is executed. Transfer is kept ongoing on UART side.
1021 If user wants to abort it, Abort services should be called by user.
1022 (+) Error is considered as Blocking : Transfer could not be completed properly and is aborted.
1023 This concerns Overrun Error In Interrupt mode reception and all errors in DMA mode.
1024 Error code is set to allow user to identify error type, and HAL_UART_ErrorCallback() user callback is executed.
1025
1026 -@- In the Half duplex communication, it is forbidden to run the transmit
1027 and receive process in parallel, the UART state HAL_UART_STATE_BUSY_TX_RX can't be useful.
1028
1029 @endverbatim
1030 * @{
1031 */
1032
1033 /**
1034 * @brief Send an amount of data in blocking mode.
1035 * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
1036 * the sent data is handled as a set of u16. In this case, Size must indicate the number
1037 * of u16 provided through pData.
1038 * @note When FIFO mode is enabled, writing a data in the TDR register adds one
1039 * data to the TXFIFO. Write operations to the TDR register are performed
1040 * when TXFNF flag is set. From hardware perspective, TXFNF flag and
1041 * TXE are mapped on the same bit-field.
1042 * @param huart UART handle.
1043 * @param pData Pointer to data buffer (u8 or u16 data elements).
1044 * @param Size Amount of data elements (u8 or u16) to be sent.
1045 * @param Timeout Timeout duration.
1046 * @retval HAL status
1047 */
HAL_UART_Transmit(UART_HandleTypeDef * huart,uint8_t * pData,uint16_t Size,uint32_t Timeout)1048 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout)
1049 {
1050 uint8_t *pdata8bits;
1051 uint16_t *pdata16bits;
1052 uint32_t tickstart;
1053
1054 /* Check that a Tx process is not already ongoing */
1055 if (huart->gState == HAL_UART_STATE_READY)
1056 {
1057 if ((pData == NULL) || (Size == 0U))
1058 {
1059 return HAL_ERROR;
1060 }
1061
1062 __HAL_LOCK(huart);
1063
1064 huart->ErrorCode = HAL_UART_ERROR_NONE;
1065 huart->gState = HAL_UART_STATE_BUSY_TX;
1066
1067 /* Init tickstart for timeout managment*/
1068 tickstart = HAL_GetTick();
1069
1070 huart->TxXferSize = Size;
1071 huart->TxXferCount = Size;
1072
1073 /* In case of 9bits/No Parity transfer, pData needs to be handled as a uint16_t pointer */
1074 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
1075 {
1076 pdata8bits = NULL;
1077 pdata16bits = (uint16_t *) pData;
1078 }
1079 else
1080 {
1081 pdata8bits = pData;
1082 pdata16bits = NULL;
1083 }
1084
1085 __HAL_UNLOCK(huart);
1086
1087 while (huart->TxXferCount > 0U)
1088 {
1089 if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
1090 {
1091 return HAL_TIMEOUT;
1092 }
1093 if (pdata8bits == NULL)
1094 {
1095 huart->Instance->TDR = (uint16_t)(*pdata16bits & 0x01FFU);
1096 pdata16bits++;
1097 }
1098 else
1099 {
1100 huart->Instance->TDR = (uint8_t)(*pdata8bits & 0xFFU);
1101 pdata8bits++;
1102 }
1103 huart->TxXferCount--;
1104 }
1105
1106 if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
1107 {
1108 return HAL_TIMEOUT;
1109 }
1110
1111 /* At end of Tx process, restore huart->gState to Ready */
1112 huart->gState = HAL_UART_STATE_READY;
1113
1114 return HAL_OK;
1115 }
1116 else
1117 {
1118 return HAL_BUSY;
1119 }
1120 }
1121
1122 /**
1123 * @brief Receive an amount of data in blocking mode.
1124 * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
1125 * the received data is handled as a set of u16. In this case, Size must indicate the number
1126 * of u16 available through pData.
1127 * @note When FIFO mode is enabled, the RXFNE flag is set as long as the RXFIFO
1128 * is not empty. Read operations from the RDR register are performed when
1129 * RXFNE flag is set. From hardware perspective, RXFNE flag and
1130 * RXNE are mapped on the same bit-field.
1131 * @param huart UART handle.
1132 * @param pData Pointer to data buffer (u8 or u16 data elements).
1133 * @param Size Amount of data elements (u8 or u16) to be received.
1134 * @param Timeout Timeout duration.
1135 * @retval HAL status
1136 */
HAL_UART_Receive(UART_HandleTypeDef * huart,uint8_t * pData,uint16_t Size,uint32_t Timeout)1137 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout)
1138 {
1139 uint8_t *pdata8bits;
1140 uint16_t *pdata16bits;
1141 uint16_t uhMask;
1142 uint32_t tickstart;
1143
1144 /* Check that a Rx process is not already ongoing */
1145 if (huart->RxState == HAL_UART_STATE_READY)
1146 {
1147 if ((pData == NULL) || (Size == 0U))
1148 {
1149 return HAL_ERROR;
1150 }
1151
1152 __HAL_LOCK(huart);
1153
1154 huart->ErrorCode = HAL_UART_ERROR_NONE;
1155 huart->RxState = HAL_UART_STATE_BUSY_RX;
1156
1157 /* Init tickstart for timeout managment*/
1158 tickstart = HAL_GetTick();
1159
1160 huart->RxXferSize = Size;
1161 huart->RxXferCount = Size;
1162
1163 /* Computation of UART mask to apply to RDR register */
1164 UART_MASK_COMPUTATION(huart);
1165 uhMask = huart->Mask;
1166
1167 /* In case of 9bits/No Parity transfer, pRxData needs to be handled as a uint16_t pointer */
1168 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
1169 {
1170 pdata8bits = NULL;
1171 pdata16bits = (uint16_t *) pData;
1172 }
1173 else
1174 {
1175 pdata8bits = pData;
1176 pdata16bits = NULL;
1177 }
1178
1179 __HAL_UNLOCK(huart);
1180
1181 /* as long as data have to be received */
1182 while (huart->RxXferCount > 0U)
1183 {
1184 if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK)
1185 {
1186 return HAL_TIMEOUT;
1187 }
1188 if (pdata8bits == NULL)
1189 {
1190 *pdata16bits = (uint16_t)(huart->Instance->RDR & uhMask);
1191 pdata16bits++;
1192 }
1193 else
1194 {
1195 *pdata8bits = (uint8_t)(huart->Instance->RDR & (uint8_t)uhMask);
1196 pdata8bits++;
1197 }
1198 huart->RxXferCount--;
1199 }
1200
1201 /* At end of Rx process, restore huart->RxState to Ready */
1202 huart->RxState = HAL_UART_STATE_READY;
1203
1204 return HAL_OK;
1205 }
1206 else
1207 {
1208 return HAL_BUSY;
1209 }
1210 }
1211
1212 /**
1213 * @brief Send an amount of data in interrupt mode.
1214 * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
1215 * the sent data is handled as a set of u16. In this case, Size must indicate the number
1216 * of u16 provided through pData.
1217 * @param huart UART handle.
1218 * @param pData Pointer to data buffer (u8 or u16 data elements).
1219 * @param Size Amount of data elements (u8 or u16) to be sent.
1220 * @retval HAL status
1221 */
HAL_UART_Transmit_IT(UART_HandleTypeDef * huart,uint8_t * pData,uint16_t Size)1222 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
1223 {
1224 /* Check that a Tx process is not already ongoing */
1225 if (huart->gState == HAL_UART_STATE_READY)
1226 {
1227 if ((pData == NULL) || (Size == 0U))
1228 {
1229 return HAL_ERROR;
1230 }
1231
1232 __HAL_LOCK(huart);
1233
1234 huart->pTxBuffPtr = pData;
1235 huart->TxXferSize = Size;
1236 huart->TxXferCount = Size;
1237 huart->TxISR = NULL;
1238
1239 huart->ErrorCode = HAL_UART_ERROR_NONE;
1240 huart->gState = HAL_UART_STATE_BUSY_TX;
1241
1242 #if defined(USART_CR1_FIFOEN)
1243 /* Configure Tx interrupt processing */
1244 if (huart->FifoMode == UART_FIFOMODE_ENABLE)
1245 {
1246 /* Set the Tx ISR function pointer according to the data word length */
1247 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
1248 {
1249 huart->TxISR = UART_TxISR_16BIT_FIFOEN;
1250 }
1251 else
1252 {
1253 huart->TxISR = UART_TxISR_8BIT_FIFOEN;
1254 }
1255
1256 __HAL_UNLOCK(huart);
1257
1258 /* Enable the TX FIFO threshold interrupt */
1259 SET_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
1260 }
1261 else
1262 {
1263 /* Set the Tx ISR function pointer according to the data word length */
1264 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
1265 {
1266 huart->TxISR = UART_TxISR_16BIT;
1267 }
1268 else
1269 {
1270 huart->TxISR = UART_TxISR_8BIT;
1271 }
1272
1273 __HAL_UNLOCK(huart);
1274
1275 /* Enable the Transmit Data Register Empty interrupt */
1276 SET_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE);
1277 }
1278 #else
1279 /* Set the Tx ISR function pointer according to the data word length */
1280 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
1281 {
1282 huart->TxISR = UART_TxISR_16BIT;
1283 }
1284 else
1285 {
1286 huart->TxISR = UART_TxISR_8BIT;
1287 }
1288
1289 __HAL_UNLOCK(huart);
1290
1291 /* Enable the Transmit Data Register Empty interrupt */
1292 SET_BIT(huart->Instance->CR1, USART_CR1_TXEIE);
1293 #endif /* USART_CR1_FIFOEN */
1294
1295 return HAL_OK;
1296 }
1297 else
1298 {
1299 return HAL_BUSY;
1300 }
1301 }
1302
1303 /**
1304 * @brief Receive an amount of data in interrupt mode.
1305 * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
1306 * the received data is handled as a set of u16. In this case, Size must indicate the number
1307 * of u16 available through pData.
1308 * @param huart UART handle.
1309 * @param pData Pointer to data buffer (u8 or u16 data elements).
1310 * @param Size Amount of data elements (u8 or u16) to be received.
1311 * @retval HAL status
1312 */
HAL_UART_Receive_IT(UART_HandleTypeDef * huart,uint8_t * pData,uint16_t Size)1313 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
1314 {
1315 /* Check that a Rx process is not already ongoing */
1316 if (huart->RxState == HAL_UART_STATE_READY)
1317 {
1318 if ((pData == NULL) || (Size == 0U))
1319 {
1320 return HAL_ERROR;
1321 }
1322
1323 __HAL_LOCK(huart);
1324
1325 huart->pRxBuffPtr = pData;
1326 huart->RxXferSize = Size;
1327 huart->RxXferCount = Size;
1328 huart->RxISR = NULL;
1329
1330 /* Computation of UART mask to apply to RDR register */
1331 UART_MASK_COMPUTATION(huart);
1332
1333 huart->ErrorCode = HAL_UART_ERROR_NONE;
1334 huart->RxState = HAL_UART_STATE_BUSY_RX;
1335
1336 /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
1337 SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
1338
1339 #if defined(USART_CR1_FIFOEN)
1340 /* Configure Rx interrupt processing*/
1341 if ((huart->FifoMode == UART_FIFOMODE_ENABLE) && (Size >= huart->NbRxDataToProcess))
1342 {
1343 /* Set the Rx ISR function pointer according to the data word length */
1344 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
1345 {
1346 huart->RxISR = UART_RxISR_16BIT_FIFOEN;
1347 }
1348 else
1349 {
1350 huart->RxISR = UART_RxISR_8BIT_FIFOEN;
1351 }
1352
1353 __HAL_UNLOCK(huart);
1354
1355 /* Enable the UART Parity Error interrupt and RX FIFO Threshold interrupt */
1356 SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
1357 SET_BIT(huart->Instance->CR3, USART_CR3_RXFTIE);
1358 }
1359 else
1360 {
1361 /* Set the Rx ISR function pointer according to the data word length */
1362 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
1363 {
1364 huart->RxISR = UART_RxISR_16BIT;
1365 }
1366 else
1367 {
1368 huart->RxISR = UART_RxISR_8BIT;
1369 }
1370
1371 __HAL_UNLOCK(huart);
1372
1373 /* Enable the UART Parity Error interrupt and Data Register Not Empty interrupt */
1374 SET_BIT(huart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE);
1375 }
1376 #else
1377 /* Set the Rx ISR function pointer according to the data word length */
1378 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
1379 {
1380 huart->RxISR = UART_RxISR_16BIT;
1381 }
1382 else
1383 {
1384 huart->RxISR = UART_RxISR_8BIT;
1385 }
1386
1387 __HAL_UNLOCK(huart);
1388
1389 /* Enable the UART Parity Error interrupt and Data Register Not Empty interrupt */
1390 SET_BIT(huart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE);
1391 #endif /* USART_CR1_FIFOEN */
1392
1393 return HAL_OK;
1394 }
1395 else
1396 {
1397 return HAL_BUSY;
1398 }
1399 }
1400
1401 /**
1402 * @brief Send an amount of data in DMA mode.
1403 * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
1404 * the sent data is handled as a set of u16. In this case, Size must indicate the number
1405 * of u16 provided through pData.
1406 * @param huart UART handle.
1407 * @param pData Pointer to data buffer (u8 or u16 data elements).
1408 * @param Size Amount of data elements (u8 or u16) to be sent.
1409 * @retval HAL status
1410 */
HAL_UART_Transmit_DMA(UART_HandleTypeDef * huart,uint8_t * pData,uint16_t Size)1411 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
1412 {
1413 /* Check that a Tx process is not already ongoing */
1414 if (huart->gState == HAL_UART_STATE_READY)
1415 {
1416 if ((pData == NULL) || (Size == 0U))
1417 {
1418 return HAL_ERROR;
1419 }
1420
1421 __HAL_LOCK(huart);
1422
1423 huart->pTxBuffPtr = pData;
1424 huart->TxXferSize = Size;
1425 huart->TxXferCount = Size;
1426
1427 huart->ErrorCode = HAL_UART_ERROR_NONE;
1428 huart->gState = HAL_UART_STATE_BUSY_TX;
1429
1430 if (huart->hdmatx != NULL)
1431 {
1432 /* Set the UART DMA transfer complete callback */
1433 huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt;
1434
1435 /* Set the UART DMA Half transfer complete callback */
1436 huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt;
1437
1438 /* Set the DMA error callback */
1439 huart->hdmatx->XferErrorCallback = UART_DMAError;
1440
1441 /* Set the DMA abort callback */
1442 huart->hdmatx->XferAbortCallback = NULL;
1443
1444 /* Enable the UART transmit DMA channel */
1445 if (HAL_DMA_Start_IT(huart->hdmatx, (uint32_t)huart->pTxBuffPtr, (uint32_t)&huart->Instance->TDR, Size) != HAL_OK)
1446 {
1447 /* Set error code to DMA */
1448 huart->ErrorCode = HAL_UART_ERROR_DMA;
1449
1450 __HAL_UNLOCK(huart);
1451
1452 /* Restore huart->gState to ready */
1453 huart->gState = HAL_UART_STATE_READY;
1454
1455 return HAL_ERROR;
1456 }
1457 }
1458 /* Clear the TC flag in the ICR register */
1459 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_TCF);
1460
1461 __HAL_UNLOCK(huart);
1462
1463 /* Enable the DMA transfer for transmit request by setting the DMAT bit
1464 in the UART CR3 register */
1465 SET_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1466
1467 return HAL_OK;
1468 }
1469 else
1470 {
1471 return HAL_BUSY;
1472 }
1473 }
1474
1475 /**
1476 * @brief Receive an amount of data in DMA mode.
1477 * @note When the UART parity is enabled (PCE = 1), the received data contain
1478 * the parity bit (MSB position).
1479 * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
1480 * the received data is handled as a set of u16. In this case, Size must indicate the number
1481 * of u16 available through pData.
1482 * @param huart UART handle.
1483 * @param pData Pointer to data buffer (u8 or u16 data elements).
1484 * @param Size Amount of data elements (u8 or u16) to be received.
1485 * @retval HAL status
1486 */
HAL_UART_Receive_DMA(UART_HandleTypeDef * huart,uint8_t * pData,uint16_t Size)1487 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
1488 {
1489 /* Check that a Rx process is not already ongoing */
1490 if (huart->RxState == HAL_UART_STATE_READY)
1491 {
1492 if ((pData == NULL) || (Size == 0U))
1493 {
1494 return HAL_ERROR;
1495 }
1496
1497 __HAL_LOCK(huart);
1498
1499 huart->pRxBuffPtr = pData;
1500 huart->RxXferSize = Size;
1501
1502 huart->ErrorCode = HAL_UART_ERROR_NONE;
1503 huart->RxState = HAL_UART_STATE_BUSY_RX;
1504
1505 if (huart->hdmarx != NULL)
1506 {
1507 /* Set the UART DMA transfer complete callback */
1508 huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt;
1509
1510 /* Set the UART DMA Half transfer complete callback */
1511 huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt;
1512
1513 /* Set the DMA error callback */
1514 huart->hdmarx->XferErrorCallback = UART_DMAError;
1515
1516 /* Set the DMA abort callback */
1517 huart->hdmarx->XferAbortCallback = NULL;
1518
1519 /* Enable the DMA channel */
1520 if (HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->RDR, (uint32_t)huart->pRxBuffPtr, Size) != HAL_OK)
1521 {
1522 /* Set error code to DMA */
1523 huart->ErrorCode = HAL_UART_ERROR_DMA;
1524
1525 __HAL_UNLOCK(huart);
1526
1527 /* Restore huart->gState to ready */
1528 huart->gState = HAL_UART_STATE_READY;
1529
1530 return HAL_ERROR;
1531 }
1532 }
1533 __HAL_UNLOCK(huart);
1534
1535 /* Enable the UART Parity Error Interrupt */
1536 SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
1537
1538 /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
1539 SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
1540
1541 /* Enable the DMA transfer for the receiver request by setting the DMAR bit
1542 in the UART CR3 register */
1543 SET_BIT(huart->Instance->CR3, USART_CR3_DMAR);
1544
1545 return HAL_OK;
1546 }
1547 else
1548 {
1549 return HAL_BUSY;
1550 }
1551 }
1552
1553 /**
1554 * @brief Pause the DMA Transfer.
1555 * @param huart UART handle.
1556 * @retval HAL status
1557 */
HAL_UART_DMAPause(UART_HandleTypeDef * huart)1558 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart)
1559 {
1560 const HAL_UART_StateTypeDef gstate = huart->gState;
1561 const HAL_UART_StateTypeDef rxstate = huart->RxState;
1562
1563 __HAL_LOCK(huart);
1564
1565 if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) &&
1566 (gstate == HAL_UART_STATE_BUSY_TX))
1567 {
1568 /* Disable the UART DMA Tx request */
1569 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1570 }
1571 if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) &&
1572 (rxstate == HAL_UART_STATE_BUSY_RX))
1573 {
1574 /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
1575 CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
1576 CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
1577
1578 /* Disable the UART DMA Rx request */
1579 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
1580 }
1581
1582 __HAL_UNLOCK(huart);
1583
1584 return HAL_OK;
1585 }
1586
1587 /**
1588 * @brief Resume the DMA Transfer.
1589 * @param huart UART handle.
1590 * @retval HAL status
1591 */
HAL_UART_DMAResume(UART_HandleTypeDef * huart)1592 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart)
1593 {
1594 __HAL_LOCK(huart);
1595
1596 if (huart->gState == HAL_UART_STATE_BUSY_TX)
1597 {
1598 /* Enable the UART DMA Tx request */
1599 SET_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1600 }
1601 if (huart->RxState == HAL_UART_STATE_BUSY_RX)
1602 {
1603 /* Clear the Overrun flag before resuming the Rx transfer */
1604 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF);
1605
1606 /* Reenable PE and ERR (Frame error, noise error, overrun error) interrupts */
1607 SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
1608 SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
1609
1610 /* Enable the UART DMA Rx request */
1611 SET_BIT(huart->Instance->CR3, USART_CR3_DMAR);
1612 }
1613
1614 __HAL_UNLOCK(huart);
1615
1616 return HAL_OK;
1617 }
1618
1619 /**
1620 * @brief Stop the DMA Transfer.
1621 * @param huart UART handle.
1622 * @retval HAL status
1623 */
HAL_UART_DMAStop(UART_HandleTypeDef * huart)1624 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart)
1625 {
1626 /* The Lock is not implemented on this API to allow the user application
1627 to call the HAL UART API under callbacks HAL_UART_TxCpltCallback() / HAL_UART_RxCpltCallback() /
1628 HAL_UART_TxHalfCpltCallback / HAL_UART_RxHalfCpltCallback:
1629 indeed, when HAL_DMA_Abort() API is called, the DMA TX/RX Transfer or Half Transfer complete
1630 interrupt is generated if the DMA transfer interruption occurs at the middle or at the end of
1631 the stream and the corresponding call back is executed. */
1632
1633 const HAL_UART_StateTypeDef gstate = huart->gState;
1634 const HAL_UART_StateTypeDef rxstate = huart->RxState;
1635
1636 /* Stop UART DMA Tx request if ongoing */
1637 if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) &&
1638 (gstate == HAL_UART_STATE_BUSY_TX))
1639 {
1640 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1641
1642 /* Abort the UART DMA Tx channel */
1643 if (huart->hdmatx != NULL)
1644 {
1645 if (HAL_DMA_Abort(huart->hdmatx) != HAL_OK)
1646 {
1647 if (HAL_DMA_GetError(huart->hdmatx) == HAL_DMA_ERROR_TIMEOUT)
1648 {
1649 /* Set error code to DMA */
1650 huart->ErrorCode = HAL_UART_ERROR_DMA;
1651
1652 return HAL_TIMEOUT;
1653 }
1654 }
1655 }
1656
1657 UART_EndTxTransfer(huart);
1658 }
1659
1660 /* Stop UART DMA Rx request if ongoing */
1661 if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) &&
1662 (rxstate == HAL_UART_STATE_BUSY_RX))
1663 {
1664 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
1665
1666 /* Abort the UART DMA Rx channel */
1667 if (huart->hdmarx != NULL)
1668 {
1669 if (HAL_DMA_Abort(huart->hdmarx) != HAL_OK)
1670 {
1671 if (HAL_DMA_GetError(huart->hdmarx) == HAL_DMA_ERROR_TIMEOUT)
1672 {
1673 /* Set error code to DMA */
1674 huart->ErrorCode = HAL_UART_ERROR_DMA;
1675
1676 return HAL_TIMEOUT;
1677 }
1678 }
1679 }
1680
1681 UART_EndRxTransfer(huart);
1682 }
1683
1684 return HAL_OK;
1685 }
1686
1687 /**
1688 * @brief Abort ongoing transfers (blocking mode).
1689 * @param huart UART handle.
1690 * @note This procedure could be used for aborting any ongoing transfer started in Interrupt or DMA mode.
1691 * This procedure performs following operations :
1692 * - Disable UART Interrupts (Tx and Rx)
1693 * - Disable the DMA transfer in the peripheral register (if enabled)
1694 * - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
1695 * - Set handle State to READY
1696 * @note This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
1697 * @retval HAL status
1698 */
HAL_UART_Abort(UART_HandleTypeDef * huart)1699 HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart)
1700 {
1701 #if defined(USART_CR1_FIFOEN)
1702 /* Disable TXE, TC, RXNE, PE, RXFT, TXFT and ERR (Frame error, noise error, overrun error) interrupts */
1703 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | USART_CR1_TXEIE_TXFNFIE | USART_CR1_TCIE));
1704 CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE | USART_CR3_RXFTIE | USART_CR3_TXFTIE);
1705 #else
1706 /* Disable TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
1707 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE));
1708 CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
1709 #endif /* USART_CR1_FIFOEN */
1710
1711 /* Disable the UART DMA Tx request if enabled */
1712 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
1713 {
1714 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1715
1716 /* Abort the UART DMA Tx channel : use blocking DMA Abort API (no callback) */
1717 if (huart->hdmatx != NULL)
1718 {
1719 /* Set the UART DMA Abort callback to Null.
1720 No call back execution at end of DMA abort procedure */
1721 huart->hdmatx->XferAbortCallback = NULL;
1722
1723 if (HAL_DMA_Abort(huart->hdmatx) != HAL_OK)
1724 {
1725 if (HAL_DMA_GetError(huart->hdmatx) == HAL_DMA_ERROR_TIMEOUT)
1726 {
1727 /* Set error code to DMA */
1728 huart->ErrorCode = HAL_UART_ERROR_DMA;
1729
1730 return HAL_TIMEOUT;
1731 }
1732 }
1733 }
1734 }
1735
1736 /* Disable the UART DMA Rx request if enabled */
1737 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
1738 {
1739 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
1740
1741 /* Abort the UART DMA Rx channel : use blocking DMA Abort API (no callback) */
1742 if (huart->hdmarx != NULL)
1743 {
1744 /* Set the UART DMA Abort callback to Null.
1745 No call back execution at end of DMA abort procedure */
1746 huart->hdmarx->XferAbortCallback = NULL;
1747
1748 if (HAL_DMA_Abort(huart->hdmarx) != HAL_OK)
1749 {
1750 if (HAL_DMA_GetError(huart->hdmarx) == HAL_DMA_ERROR_TIMEOUT)
1751 {
1752 /* Set error code to DMA */
1753 huart->ErrorCode = HAL_UART_ERROR_DMA;
1754
1755 return HAL_TIMEOUT;
1756 }
1757 }
1758 }
1759 }
1760
1761 /* Reset Tx and Rx transfer counters */
1762 huart->TxXferCount = 0U;
1763 huart->RxXferCount = 0U;
1764
1765 /* Clear the Error flags in the ICR register */
1766 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
1767
1768 #if defined(USART_CR1_FIFOEN)
1769 /* Flush the whole TX FIFO (if needed) */
1770 if (huart->FifoMode == UART_FIFOMODE_ENABLE)
1771 {
1772 __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST);
1773 }
1774 #endif /* USART_CR1_FIFOEN */
1775
1776 /* Discard the received data */
1777 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
1778
1779 /* Restore huart->gState and huart->RxState to Ready */
1780 huart->gState = HAL_UART_STATE_READY;
1781 huart->RxState = HAL_UART_STATE_READY;
1782
1783 huart->ErrorCode = HAL_UART_ERROR_NONE;
1784
1785 return HAL_OK;
1786 }
1787
1788 /**
1789 * @brief Abort ongoing Transmit transfer (blocking mode).
1790 * @param huart UART handle.
1791 * @note This procedure could be used for aborting any ongoing Tx transfer started in Interrupt or DMA mode.
1792 * This procedure performs following operations :
1793 * - Disable UART Interrupts (Tx)
1794 * - Disable the DMA transfer in the peripheral register (if enabled)
1795 * - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
1796 * - Set handle State to READY
1797 * @note This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
1798 * @retval HAL status
1799 */
HAL_UART_AbortTransmit(UART_HandleTypeDef * huart)1800 HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart)
1801 {
1802 #if defined(USART_CR1_FIFOEN)
1803 /* Disable TCIE, TXEIE and TXFTIE interrupts */
1804 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TCIE | USART_CR1_TXEIE_TXFNFIE));
1805 CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
1806 #else
1807 /* Disable TXEIE and TCIE interrupts */
1808 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
1809 #endif /* USART_CR1_FIFOEN */
1810
1811 /* Disable the UART DMA Tx request if enabled */
1812 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
1813 {
1814 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1815
1816 /* Abort the UART DMA Tx channel : use blocking DMA Abort API (no callback) */
1817 if (huart->hdmatx != NULL)
1818 {
1819 /* Set the UART DMA Abort callback to Null.
1820 No call back execution at end of DMA abort procedure */
1821 huart->hdmatx->XferAbortCallback = NULL;
1822
1823 if (HAL_DMA_Abort(huart->hdmatx) != HAL_OK)
1824 {
1825 if (HAL_DMA_GetError(huart->hdmatx) == HAL_DMA_ERROR_TIMEOUT)
1826 {
1827 /* Set error code to DMA */
1828 huart->ErrorCode = HAL_UART_ERROR_DMA;
1829
1830 return HAL_TIMEOUT;
1831 }
1832 }
1833 }
1834 }
1835
1836 /* Reset Tx transfer counter */
1837 huart->TxXferCount = 0U;
1838
1839 #if defined(USART_CR1_FIFOEN)
1840 /* Flush the whole TX FIFO (if needed) */
1841 if (huart->FifoMode == UART_FIFOMODE_ENABLE)
1842 {
1843 __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST);
1844 }
1845 #endif /* USART_CR1_FIFOEN */
1846
1847 /* Restore huart->gState to Ready */
1848 huart->gState = HAL_UART_STATE_READY;
1849
1850 return HAL_OK;
1851 }
1852
1853 /**
1854 * @brief Abort ongoing Receive transfer (blocking mode).
1855 * @param huart UART handle.
1856 * @note This procedure could be used for aborting any ongoing Rx transfer started in Interrupt or DMA mode.
1857 * This procedure performs following operations :
1858 * - Disable UART Interrupts (Rx)
1859 * - Disable the DMA transfer in the peripheral register (if enabled)
1860 * - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
1861 * - Set handle State to READY
1862 * @note This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
1863 * @retval HAL status
1864 */
HAL_UART_AbortReceive(UART_HandleTypeDef * huart)1865 HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart)
1866 {
1867 #if defined(USART_CR1_FIFOEN)
1868 /* Disable PEIE, EIE, RXNEIE and RXFTIE interrupts */
1869 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE));
1870 CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE | USART_CR3_RXFTIE);
1871 #else
1872 /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
1873 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
1874 CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
1875 #endif /* USART_CR1_FIFOEN */
1876
1877 /* Disable the UART DMA Rx request if enabled */
1878 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
1879 {
1880 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
1881
1882 /* Abort the UART DMA Rx channel : use blocking DMA Abort API (no callback) */
1883 if (huart->hdmarx != NULL)
1884 {
1885 /* Set the UART DMA Abort callback to Null.
1886 No call back execution at end of DMA abort procedure */
1887 huart->hdmarx->XferAbortCallback = NULL;
1888
1889 if (HAL_DMA_Abort(huart->hdmarx) != HAL_OK)
1890 {
1891 if (HAL_DMA_GetError(huart->hdmarx) == HAL_DMA_ERROR_TIMEOUT)
1892 {
1893 /* Set error code to DMA */
1894 huart->ErrorCode = HAL_UART_ERROR_DMA;
1895
1896 return HAL_TIMEOUT;
1897 }
1898 }
1899 }
1900 }
1901
1902 /* Reset Rx transfer counter */
1903 huart->RxXferCount = 0U;
1904
1905 /* Clear the Error flags in the ICR register */
1906 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
1907
1908 /* Discard the received data */
1909 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
1910
1911 /* Restore huart->RxState to Ready */
1912 huart->RxState = HAL_UART_STATE_READY;
1913
1914 return HAL_OK;
1915 }
1916
1917 /**
1918 * @brief Abort ongoing transfers (Interrupt mode).
1919 * @param huart UART handle.
1920 * @note This procedure could be used for aborting any ongoing transfer started in Interrupt or DMA mode.
1921 * This procedure performs following operations :
1922 * - Disable UART Interrupts (Tx and Rx)
1923 * - Disable the DMA transfer in the peripheral register (if enabled)
1924 * - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
1925 * - Set handle State to READY
1926 * - At abort completion, call user abort complete callback
1927 * @note This procedure is executed in Interrupt mode, meaning that abort procedure could be
1928 * considered as completed only when user abort complete callback is executed (not when exiting function).
1929 * @retval HAL status
1930 */
HAL_UART_Abort_IT(UART_HandleTypeDef * huart)1931 HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart)
1932 {
1933 uint32_t abortcplt = 1U;
1934
1935 /* Disable interrupts */
1936 #if defined(USART_CR1_FIFOEN)
1937 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_PEIE | USART_CR1_TCIE | USART_CR1_RXNEIE_RXFNEIE | USART_CR1_TXEIE_TXFNFIE));
1938 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE | USART_CR3_TXFTIE));
1939 #else
1940 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE));
1941 CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
1942 #endif /* USART_CR1_FIFOEN */
1943
1944 /* If DMA Tx and/or DMA Rx Handles are associated to UART Handle, DMA Abort complete callbacks should be initialised
1945 before any call to DMA Abort functions */
1946 /* DMA Tx Handle is valid */
1947 if (huart->hdmatx != NULL)
1948 {
1949 /* Set DMA Abort Complete callback if UART DMA Tx request if enabled.
1950 Otherwise, set it to NULL */
1951 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
1952 {
1953 huart->hdmatx->XferAbortCallback = UART_DMATxAbortCallback;
1954 }
1955 else
1956 {
1957 huart->hdmatx->XferAbortCallback = NULL;
1958 }
1959 }
1960 /* DMA Rx Handle is valid */
1961 if (huart->hdmarx != NULL)
1962 {
1963 /* Set DMA Abort Complete callback if UART DMA Rx request if enabled.
1964 Otherwise, set it to NULL */
1965 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
1966 {
1967 huart->hdmarx->XferAbortCallback = UART_DMARxAbortCallback;
1968 }
1969 else
1970 {
1971 huart->hdmarx->XferAbortCallback = NULL;
1972 }
1973 }
1974
1975 /* Disable the UART DMA Tx request if enabled */
1976 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
1977 {
1978 /* Disable DMA Tx at UART level */
1979 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
1980
1981 /* Abort the UART DMA Tx channel : use non blocking DMA Abort API (callback) */
1982 if (huart->hdmatx != NULL)
1983 {
1984 /* UART Tx DMA Abort callback has already been initialised :
1985 will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */
1986
1987 /* Abort DMA TX */
1988 if (HAL_DMA_Abort_IT(huart->hdmatx) != HAL_OK)
1989 {
1990 huart->hdmatx->XferAbortCallback = NULL;
1991 }
1992 else
1993 {
1994 abortcplt = 0U;
1995 }
1996 }
1997 }
1998
1999 /* Disable the UART DMA Rx request if enabled */
2000 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
2001 {
2002 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
2003
2004 /* Abort the UART DMA Rx channel : use non blocking DMA Abort API (callback) */
2005 if (huart->hdmarx != NULL)
2006 {
2007 /* UART Rx DMA Abort callback has already been initialised :
2008 will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */
2009
2010 /* Abort DMA RX */
2011 if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
2012 {
2013 huart->hdmarx->XferAbortCallback = NULL;
2014 abortcplt = 1U;
2015 }
2016 else
2017 {
2018 abortcplt = 0U;
2019 }
2020 }
2021 }
2022
2023 /* if no DMA abort complete callback execution is required => call user Abort Complete callback */
2024 if (abortcplt == 1U)
2025 {
2026 /* Reset Tx and Rx transfer counters */
2027 huart->TxXferCount = 0U;
2028 huart->RxXferCount = 0U;
2029
2030 /* Clear ISR function pointers */
2031 huart->RxISR = NULL;
2032 huart->TxISR = NULL;
2033
2034 /* Reset errorCode */
2035 huart->ErrorCode = HAL_UART_ERROR_NONE;
2036
2037 /* Clear the Error flags in the ICR register */
2038 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
2039
2040 #if defined(USART_CR1_FIFOEN)
2041 /* Flush the whole TX FIFO (if needed) */
2042 if (huart->FifoMode == UART_FIFOMODE_ENABLE)
2043 {
2044 __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST);
2045 }
2046 #endif /* USART_CR1_FIFOEN */
2047
2048 /* Discard the received data */
2049 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
2050
2051 /* Restore huart->gState and huart->RxState to Ready */
2052 huart->gState = HAL_UART_STATE_READY;
2053 huart->RxState = HAL_UART_STATE_READY;
2054
2055 /* As no DMA to be aborted, call directly user Abort complete callback */
2056 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2057 /* Call registered Abort complete callback */
2058 huart->AbortCpltCallback(huart);
2059 #else
2060 /* Call legacy weak Abort complete callback */
2061 HAL_UART_AbortCpltCallback(huart);
2062 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2063 }
2064
2065 return HAL_OK;
2066 }
2067
2068 /**
2069 * @brief Abort ongoing Transmit transfer (Interrupt mode).
2070 * @param huart UART handle.
2071 * @note This procedure could be used for aborting any ongoing Tx transfer started in Interrupt or DMA mode.
2072 * This procedure performs following operations :
2073 * - Disable UART Interrupts (Tx)
2074 * - Disable the DMA transfer in the peripheral register (if enabled)
2075 * - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
2076 * - Set handle State to READY
2077 * - At abort completion, call user abort complete callback
2078 * @note This procedure is executed in Interrupt mode, meaning that abort procedure could be
2079 * considered as completed only when user abort complete callback is executed (not when exiting function).
2080 * @retval HAL status
2081 */
HAL_UART_AbortTransmit_IT(UART_HandleTypeDef * huart)2082 HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart)
2083 {
2084 /* Disable interrupts */
2085 #if defined(USART_CR1_FIFOEN)
2086 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TCIE | USART_CR1_TXEIE_TXFNFIE));
2087 CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
2088 #else
2089 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
2090 #endif /* USART_CR1_FIFOEN */
2091
2092 /* Disable the UART DMA Tx request if enabled */
2093 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
2094 {
2095 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
2096
2097 /* Abort the UART DMA Tx channel : use non blocking DMA Abort API (callback) */
2098 if (huart->hdmatx != NULL)
2099 {
2100 /* Set the UART DMA Abort callback :
2101 will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */
2102 huart->hdmatx->XferAbortCallback = UART_DMATxOnlyAbortCallback;
2103
2104 /* Abort DMA TX */
2105 if (HAL_DMA_Abort_IT(huart->hdmatx) != HAL_OK)
2106 {
2107 /* Call Directly huart->hdmatx->XferAbortCallback function in case of error */
2108 huart->hdmatx->XferAbortCallback(huart->hdmatx);
2109 }
2110 }
2111 else
2112 {
2113 /* Reset Tx transfer counter */
2114 huart->TxXferCount = 0U;
2115
2116 /* Clear TxISR function pointers */
2117 huart->TxISR = NULL;
2118
2119 /* Restore huart->gState to Ready */
2120 huart->gState = HAL_UART_STATE_READY;
2121
2122 /* As no DMA to be aborted, call directly user Abort complete callback */
2123 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2124 /* Call registered Abort Transmit Complete Callback */
2125 huart->AbortTransmitCpltCallback(huart);
2126 #else
2127 /* Call legacy weak Abort Transmit Complete Callback */
2128 HAL_UART_AbortTransmitCpltCallback(huart);
2129 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2130 }
2131 }
2132 else
2133 {
2134 /* Reset Tx transfer counter */
2135 huart->TxXferCount = 0U;
2136
2137 /* Clear TxISR function pointers */
2138 huart->TxISR = NULL;
2139
2140 #if defined(USART_CR1_FIFOEN)
2141 /* Flush the whole TX FIFO (if needed) */
2142 if (huart->FifoMode == UART_FIFOMODE_ENABLE)
2143 {
2144 __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST);
2145 }
2146 #endif /* USART_CR1_FIFOEN */
2147
2148 /* Restore huart->gState to Ready */
2149 huart->gState = HAL_UART_STATE_READY;
2150
2151 /* As no DMA to be aborted, call directly user Abort complete callback */
2152 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2153 /* Call registered Abort Transmit Complete Callback */
2154 huart->AbortTransmitCpltCallback(huart);
2155 #else
2156 /* Call legacy weak Abort Transmit Complete Callback */
2157 HAL_UART_AbortTransmitCpltCallback(huart);
2158 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2159 }
2160
2161 return HAL_OK;
2162 }
2163
2164 /**
2165 * @brief Abort ongoing Receive transfer (Interrupt mode).
2166 * @param huart UART handle.
2167 * @note This procedure could be used for aborting any ongoing Rx transfer started in Interrupt or DMA mode.
2168 * This procedure performs following operations :
2169 * - Disable UART Interrupts (Rx)
2170 * - Disable the DMA transfer in the peripheral register (if enabled)
2171 * - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
2172 * - Set handle State to READY
2173 * - At abort completion, call user abort complete callback
2174 * @note This procedure is executed in Interrupt mode, meaning that abort procedure could be
2175 * considered as completed only when user abort complete callback is executed (not when exiting function).
2176 * @retval HAL status
2177 */
HAL_UART_AbortReceive_IT(UART_HandleTypeDef * huart)2178 HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart)
2179 {
2180 /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
2181 #if defined(USART_CR1_FIFOEN)
2182 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE));
2183 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
2184 #else
2185 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
2186 CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
2187 #endif /* USART_CR1_FIFOEN */
2188
2189 /* Disable the UART DMA Rx request if enabled */
2190 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
2191 {
2192 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
2193
2194 /* Abort the UART DMA Rx channel : use non blocking DMA Abort API (callback) */
2195 if (huart->hdmarx != NULL)
2196 {
2197 /* Set the UART DMA Abort callback :
2198 will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */
2199 huart->hdmarx->XferAbortCallback = UART_DMARxOnlyAbortCallback;
2200
2201 /* Abort DMA RX */
2202 if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
2203 {
2204 /* Call Directly huart->hdmarx->XferAbortCallback function in case of error */
2205 huart->hdmarx->XferAbortCallback(huart->hdmarx);
2206 }
2207 }
2208 else
2209 {
2210 /* Reset Rx transfer counter */
2211 huart->RxXferCount = 0U;
2212
2213 /* Clear RxISR function pointer */
2214 huart->pRxBuffPtr = NULL;
2215
2216 /* Clear the Error flags in the ICR register */
2217 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
2218
2219 /* Discard the received data */
2220 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
2221
2222 /* Restore huart->RxState to Ready */
2223 huart->RxState = HAL_UART_STATE_READY;
2224
2225 /* As no DMA to be aborted, call directly user Abort complete callback */
2226 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2227 /* Call registered Abort Receive Complete Callback */
2228 huart->AbortReceiveCpltCallback(huart);
2229 #else
2230 /* Call legacy weak Abort Receive Complete Callback */
2231 HAL_UART_AbortReceiveCpltCallback(huart);
2232 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2233 }
2234 }
2235 else
2236 {
2237 /* Reset Rx transfer counter */
2238 huart->RxXferCount = 0U;
2239
2240 /* Clear RxISR function pointer */
2241 huart->pRxBuffPtr = NULL;
2242
2243 /* Clear the Error flags in the ICR register */
2244 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
2245
2246 /* Restore huart->RxState to Ready */
2247 huart->RxState = HAL_UART_STATE_READY;
2248
2249 /* As no DMA to be aborted, call directly user Abort complete callback */
2250 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2251 /* Call registered Abort Receive Complete Callback */
2252 huart->AbortReceiveCpltCallback(huart);
2253 #else
2254 /* Call legacy weak Abort Receive Complete Callback */
2255 HAL_UART_AbortReceiveCpltCallback(huart);
2256 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2257 }
2258
2259 return HAL_OK;
2260 }
2261
2262 /**
2263 * @brief Handle UART interrupt request.
2264 * @param huart UART handle.
2265 * @retval None
2266 */
HAL_UART_IRQHandler(UART_HandleTypeDef * huart)2267 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart)
2268 {
2269 uint32_t isrflags = READ_REG(huart->Instance->ISR);
2270 uint32_t cr1its = READ_REG(huart->Instance->CR1);
2271 uint32_t cr3its = READ_REG(huart->Instance->CR3);
2272
2273 uint32_t errorflags;
2274 uint32_t errorcode;
2275
2276 /* If no error occurs */
2277 errorflags = (isrflags & (uint32_t)(USART_ISR_PE | USART_ISR_FE | USART_ISR_ORE | USART_ISR_NE | USART_ISR_RTOF));
2278 if (errorflags == 0U)
2279 {
2280 /* UART in mode Receiver ---------------------------------------------------*/
2281 #if defined(USART_CR1_FIFOEN)
2282 if (((isrflags & USART_ISR_RXNE_RXFNE) != 0U)
2283 && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U)
2284 || ((cr3its & USART_CR3_RXFTIE) != 0U)))
2285 #else
2286 if (((isrflags & USART_ISR_RXNE) != 0U)
2287 && ((cr1its & USART_CR1_RXNEIE) != 0U))
2288 #endif /* USART_CR1_FIFOEN */
2289 {
2290 if (huart->RxISR != NULL)
2291 {
2292 huart->RxISR(huart);
2293 }
2294 return;
2295 }
2296 }
2297
2298 /* If some errors occur */
2299 #if defined(USART_CR1_FIFOEN)
2300 if ((errorflags != 0U)
2301 && ((((cr3its & (USART_CR3_RXFTIE | USART_CR3_EIE)) != 0U)
2302 || ((cr1its & (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | USART_CR1_RTOIE)) != 0U))))
2303 #else
2304 if ((errorflags != 0U)
2305 && (((cr3its & USART_CR3_EIE) != 0U)
2306 || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != 0U)))
2307 #endif /* USART_CR1_FIFOEN */
2308 {
2309 /* UART parity error interrupt occurred -------------------------------------*/
2310 if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U))
2311 {
2312 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF);
2313
2314 huart->ErrorCode |= HAL_UART_ERROR_PE;
2315 }
2316
2317 /* UART frame error interrupt occurred --------------------------------------*/
2318 if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
2319 {
2320 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF);
2321
2322 huart->ErrorCode |= HAL_UART_ERROR_FE;
2323 }
2324
2325 /* UART noise error interrupt occurred --------------------------------------*/
2326 if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
2327 {
2328 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF);
2329
2330 huart->ErrorCode |= HAL_UART_ERROR_NE;
2331 }
2332
2333 /* UART Over-Run interrupt occurred -----------------------------------------*/
2334 #if defined(USART_CR1_FIFOEN)
2335 if (((isrflags & USART_ISR_ORE) != 0U)
2336 && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U) ||
2337 ((cr3its & (USART_CR3_RXFTIE | USART_CR3_EIE)) != 0U)))
2338 #else
2339 if (((isrflags & USART_ISR_ORE) != 0U)
2340 && (((cr1its & USART_CR1_RXNEIE) != 0U) ||
2341 ((cr3its & USART_CR3_EIE) != 0U)))
2342 #endif /* USART_CR1_FIFOEN */
2343 {
2344 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF);
2345
2346 huart->ErrorCode |= HAL_UART_ERROR_ORE;
2347 }
2348
2349 /* UART Receiver Timeout interrupt occurred ---------------------------------*/
2350 if (((isrflags & USART_ISR_RTOF) != 0U) && ((cr1its & USART_CR1_RTOIE) != 0U))
2351 {
2352 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF);
2353
2354 huart->ErrorCode |= HAL_UART_ERROR_RTO;
2355 }
2356
2357 /* Call UART Error Call back function if need be ----------------------------*/
2358 if (huart->ErrorCode != HAL_UART_ERROR_NONE)
2359 {
2360 /* UART in mode Receiver --------------------------------------------------*/
2361 #if defined(USART_CR1_FIFOEN)
2362 if (((isrflags & USART_ISR_RXNE_RXFNE) != 0U)
2363 && (((cr1its & USART_CR1_RXNEIE_RXFNEIE) != 0U)
2364 || ((cr3its & USART_CR3_RXFTIE) != 0U)))
2365 #else
2366 if (((isrflags & USART_ISR_RXNE) != 0U)
2367 && ((cr1its & USART_CR1_RXNEIE) != 0U))
2368 #endif /* USART_CR1_FIFOEN */
2369 {
2370 if (huart->RxISR != NULL)
2371 {
2372 huart->RxISR(huart);
2373 }
2374 }
2375
2376 /* If Error is to be considered as blocking :
2377 - Receiver Timeout error in Reception
2378 - Overrun error in Reception
2379 - any error occurs in DMA mode reception
2380 */
2381 errorcode = huart->ErrorCode;
2382 if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) ||
2383 ((errorcode & (HAL_UART_ERROR_RTO | HAL_UART_ERROR_ORE)) != 0U))
2384 {
2385 /* Blocking error : transfer is aborted
2386 Set the UART state ready to be able to start again the process,
2387 Disable Rx Interrupts, and disable Rx DMA request, if ongoing */
2388 UART_EndRxTransfer(huart);
2389
2390 /* Disable the UART DMA Rx request if enabled */
2391 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
2392 {
2393 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
2394
2395 /* Abort the UART DMA Rx channel */
2396 if (huart->hdmarx != NULL)
2397 {
2398 /* Set the UART DMA Abort callback :
2399 will lead to call HAL_UART_ErrorCallback() at end of DMA abort procedure */
2400 huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError;
2401
2402 /* Abort DMA RX */
2403 if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
2404 {
2405 /* Call Directly huart->hdmarx->XferAbortCallback function in case of error */
2406 huart->hdmarx->XferAbortCallback(huart->hdmarx);
2407 }
2408 }
2409 else
2410 {
2411 /* Call user error callback */
2412 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2413 /*Call registered error callback*/
2414 huart->ErrorCallback(huart);
2415 #else
2416 /*Call legacy weak error callback*/
2417 HAL_UART_ErrorCallback(huart);
2418 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2419
2420 }
2421 }
2422 else
2423 {
2424 /* Call user error callback */
2425 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2426 /*Call registered error callback*/
2427 huart->ErrorCallback(huart);
2428 #else
2429 /*Call legacy weak error callback*/
2430 HAL_UART_ErrorCallback(huart);
2431 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2432 }
2433 }
2434 else
2435 {
2436 /* Non Blocking error : transfer could go on.
2437 Error is notified to user through user error callback */
2438 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2439 /*Call registered error callback*/
2440 huart->ErrorCallback(huart);
2441 #else
2442 /*Call legacy weak error callback*/
2443 HAL_UART_ErrorCallback(huart);
2444 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2445 huart->ErrorCode = HAL_UART_ERROR_NONE;
2446 }
2447 }
2448 return;
2449
2450 } /* End if some error occurs */
2451
2452 /* UART wakeup from Stop mode interrupt occurred ---------------------------*/
2453 if (((isrflags & USART_ISR_WUF) != 0U) && ((cr3its & USART_CR3_WUFIE) != 0U))
2454 {
2455 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_WUF);
2456
2457 /* UART Rx state is not reset as a reception process might be ongoing.
2458 If UART handle state fields need to be reset to READY, this could be done in Wakeup callback */
2459
2460 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2461 /* Call registered Wakeup Callback */
2462 huart->WakeupCallback(huart);
2463 #else
2464 /* Call legacy weak Wakeup Callback */
2465 HAL_UARTEx_WakeupCallback(huart);
2466 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2467 return;
2468 }
2469
2470 /* UART in mode Transmitter ------------------------------------------------*/
2471 #if defined(USART_CR1_FIFOEN)
2472 if (((isrflags & USART_ISR_TXE_TXFNF) != 0U)
2473 && (((cr1its & USART_CR1_TXEIE_TXFNFIE) != 0U)
2474 || ((cr3its & USART_CR3_TXFTIE) != 0U)))
2475 #else
2476 if (((isrflags & USART_ISR_TXE) != 0U)
2477 && ((cr1its & USART_CR1_TXEIE) != 0U))
2478 #endif /* USART_CR1_FIFOEN */
2479 {
2480 if (huart->TxISR != NULL)
2481 {
2482 huart->TxISR(huart);
2483 }
2484 return;
2485 }
2486
2487 /* UART in mode Transmitter (transmission end) -----------------------------*/
2488 if (((isrflags & USART_ISR_TC) != 0U) && ((cr1its & USART_CR1_TCIE) != 0U))
2489 {
2490 UART_EndTransmit_IT(huart);
2491 return;
2492 }
2493
2494 #if defined(USART_CR1_FIFOEN)
2495 /* UART TX Fifo Empty occurred ----------------------------------------------*/
2496 if (((isrflags & USART_ISR_TXFE) != 0U) && ((cr1its & USART_CR1_TXFEIE) != 0U))
2497 {
2498 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2499 /* Call registered Tx Fifo Empty Callback */
2500 huart->TxFifoEmptyCallback(huart);
2501 #else
2502 /* Call legacy weak Tx Fifo Empty Callback */
2503 HAL_UARTEx_TxFifoEmptyCallback(huart);
2504 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2505 return;
2506 }
2507
2508 /* UART RX Fifo Full occurred ----------------------------------------------*/
2509 if (((isrflags & USART_ISR_RXFF) != 0U) && ((cr1its & USART_CR1_RXFFIE) != 0U))
2510 {
2511 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
2512 /* Call registered Rx Fifo Full Callback */
2513 huart->RxFifoFullCallback(huart);
2514 #else
2515 /* Call legacy weak Rx Fifo Full Callback */
2516 HAL_UARTEx_RxFifoFullCallback(huart);
2517 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2518 return;
2519 }
2520 #endif /* USART_CR1_FIFOEN */
2521 }
2522
2523 /**
2524 * @brief Tx Transfer completed callback.
2525 * @param huart UART handle.
2526 * @retval None
2527 */
HAL_UART_TxCpltCallback(UART_HandleTypeDef * huart)2528 __weak void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
2529 {
2530 /* Prevent unused argument(s) compilation warning */
2531 UNUSED(huart);
2532
2533 /* NOTE : This function should not be modified, when the callback is needed,
2534 the HAL_UART_TxCpltCallback can be implemented in the user file.
2535 */
2536 }
2537
2538 /**
2539 * @brief Tx Half Transfer completed callback.
2540 * @param huart UART handle.
2541 * @retval None
2542 */
HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef * huart)2543 __weak void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart)
2544 {
2545 /* Prevent unused argument(s) compilation warning */
2546 UNUSED(huart);
2547
2548 /* NOTE: This function should not be modified, when the callback is needed,
2549 the HAL_UART_TxHalfCpltCallback can be implemented in the user file.
2550 */
2551 }
2552
2553 /**
2554 * @brief Rx Transfer completed callback.
2555 * @param huart UART handle.
2556 * @retval None
2557 */
HAL_UART_RxCpltCallback(UART_HandleTypeDef * huart)2558 __weak void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
2559 {
2560 /* Prevent unused argument(s) compilation warning */
2561 UNUSED(huart);
2562
2563 /* NOTE : This function should not be modified, when the callback is needed,
2564 the HAL_UART_RxCpltCallback can be implemented in the user file.
2565 */
2566 }
2567
2568 /**
2569 * @brief Rx Half Transfer completed callback.
2570 * @param huart UART handle.
2571 * @retval None
2572 */
HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef * huart)2573 __weak void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart)
2574 {
2575 /* Prevent unused argument(s) compilation warning */
2576 UNUSED(huart);
2577
2578 /* NOTE: This function should not be modified, when the callback is needed,
2579 the HAL_UART_RxHalfCpltCallback can be implemented in the user file.
2580 */
2581 }
2582
2583 /**
2584 * @brief UART error callback.
2585 * @param huart UART handle.
2586 * @retval None
2587 */
HAL_UART_ErrorCallback(UART_HandleTypeDef * huart)2588 __weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart)
2589 {
2590 /* Prevent unused argument(s) compilation warning */
2591 UNUSED(huart);
2592
2593 /* NOTE : This function should not be modified, when the callback is needed,
2594 the HAL_UART_ErrorCallback can be implemented in the user file.
2595 */
2596 }
2597
2598 /**
2599 * @brief UART Abort Complete callback.
2600 * @param huart UART handle.
2601 * @retval None
2602 */
HAL_UART_AbortCpltCallback(UART_HandleTypeDef * huart)2603 __weak void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart)
2604 {
2605 /* Prevent unused argument(s) compilation warning */
2606 UNUSED(huart);
2607
2608 /* NOTE : This function should not be modified, when the callback is needed,
2609 the HAL_UART_AbortCpltCallback can be implemented in the user file.
2610 */
2611 }
2612
2613 /**
2614 * @brief UART Abort Complete callback.
2615 * @param huart UART handle.
2616 * @retval None
2617 */
HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef * huart)2618 __weak void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart)
2619 {
2620 /* Prevent unused argument(s) compilation warning */
2621 UNUSED(huart);
2622
2623 /* NOTE : This function should not be modified, when the callback is needed,
2624 the HAL_UART_AbortTransmitCpltCallback can be implemented in the user file.
2625 */
2626 }
2627
2628 /**
2629 * @brief UART Abort Receive Complete callback.
2630 * @param huart UART handle.
2631 * @retval None
2632 */
HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef * huart)2633 __weak void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart)
2634 {
2635 /* Prevent unused argument(s) compilation warning */
2636 UNUSED(huart);
2637
2638 /* NOTE : This function should not be modified, when the callback is needed,
2639 the HAL_UART_AbortReceiveCpltCallback can be implemented in the user file.
2640 */
2641 }
2642
2643 /**
2644 * @}
2645 */
2646
2647 /** @defgroup UART_Exported_Functions_Group3 Peripheral Control functions
2648 * @brief UART control functions
2649 *
2650 @verbatim
2651 ===============================================================================
2652 ##### Peripheral Control functions #####
2653 ===============================================================================
2654 [..]
2655 This subsection provides a set of functions allowing to control the UART.
2656 (+) HAL_UART_ReceiverTimeout_Config() API allows to configure the receiver timeout value on the fly
2657 (+) HAL_UART_EnableReceiverTimeout() API enables the receiver timeout feature
2658 (+) HAL_UART_DisableReceiverTimeout() API disables the receiver timeout feature
2659 (+) HAL_MultiProcessor_EnableMuteMode() API enables mute mode
2660 (+) HAL_MultiProcessor_DisableMuteMode() API disables mute mode
2661 (+) HAL_MultiProcessor_EnterMuteMode() API enters mute mode
2662 (+) UART_SetConfig() API configures the UART peripheral
2663 (+) UART_AdvFeatureConfig() API optionally configures the UART advanced features
2664 (+) UART_CheckIdleState() API ensures that TEACK and/or REACK are set after initialization
2665 (+) HAL_HalfDuplex_EnableTransmitter() API disables receiver and enables transmitter
2666 (+) HAL_HalfDuplex_EnableReceiver() API disables transmitter and enables receiver
2667 (+) HAL_LIN_SendBreak() API transmits the break characters
2668 @endverbatim
2669 * @{
2670 */
2671
2672 /**
2673 * @brief Update on the fly the receiver timeout value in RTOR register.
2674 * @param huart Pointer to a UART_HandleTypeDef structure that contains
2675 * the configuration information for the specified UART module.
2676 * @param TimeoutValue receiver timeout value in number of baud blocks. The timeout
2677 * value must be less or equal to 0x0FFFFFFFF.
2678 * @retval None
2679 */
HAL_UART_ReceiverTimeout_Config(UART_HandleTypeDef * huart,uint32_t TimeoutValue)2680 void HAL_UART_ReceiverTimeout_Config(UART_HandleTypeDef *huart, uint32_t TimeoutValue)
2681 {
2682 if (!(IS_LPUART_INSTANCE(huart->Instance)))
2683 {
2684 assert_param(IS_UART_RECEIVER_TIMEOUT_VALUE(TimeoutValue));
2685 MODIFY_REG(huart->Instance->RTOR, USART_RTOR_RTO, TimeoutValue);
2686 }
2687 }
2688
2689 /**
2690 * @brief Enable the UART receiver timeout feature.
2691 * @param huart Pointer to a UART_HandleTypeDef structure that contains
2692 * the configuration information for the specified UART module.
2693 * @retval HAL status
2694 */
HAL_UART_EnableReceiverTimeout(UART_HandleTypeDef * huart)2695 HAL_StatusTypeDef HAL_UART_EnableReceiverTimeout(UART_HandleTypeDef *huart)
2696 {
2697 if (!(IS_LPUART_INSTANCE(huart->Instance)))
2698 {
2699 if (huart->gState == HAL_UART_STATE_READY)
2700 {
2701 /* Process Locked */
2702 __HAL_LOCK(huart);
2703
2704 huart->gState = HAL_UART_STATE_BUSY;
2705
2706 /* Set the USART RTOEN bit */
2707 SET_BIT(huart->Instance->CR2, USART_CR2_RTOEN);
2708
2709 huart->gState = HAL_UART_STATE_READY;
2710
2711 /* Process Unlocked */
2712 __HAL_UNLOCK(huart);
2713
2714 return HAL_OK;
2715 }
2716 else
2717 {
2718 return HAL_BUSY;
2719 }
2720 }
2721 else
2722 {
2723 return HAL_ERROR;
2724 }
2725 }
2726
2727 /**
2728 * @brief Disable the UART receiver timeout feature.
2729 * @param huart Pointer to a UART_HandleTypeDef structure that contains
2730 * the configuration information for the specified UART module.
2731 * @retval HAL status
2732 */
HAL_UART_DisableReceiverTimeout(UART_HandleTypeDef * huart)2733 HAL_StatusTypeDef HAL_UART_DisableReceiverTimeout(UART_HandleTypeDef *huart)
2734 {
2735 if (!(IS_LPUART_INSTANCE(huart->Instance)))
2736 {
2737 if (huart->gState == HAL_UART_STATE_READY)
2738 {
2739 /* Process Locked */
2740 __HAL_LOCK(huart);
2741
2742 huart->gState = HAL_UART_STATE_BUSY;
2743
2744 /* Clear the USART RTOEN bit */
2745 CLEAR_BIT(huart->Instance->CR2, USART_CR2_RTOEN);
2746
2747 huart->gState = HAL_UART_STATE_READY;
2748
2749 /* Process Unlocked */
2750 __HAL_UNLOCK(huart);
2751
2752 return HAL_OK;
2753 }
2754 else
2755 {
2756 return HAL_BUSY;
2757 }
2758 }
2759 else
2760 {
2761 return HAL_ERROR;
2762 }
2763 }
2764
2765 /**
2766 * @brief Enable UART in mute mode (does not mean UART enters mute mode;
2767 * to enter mute mode, HAL_MultiProcessor_EnterMuteMode() API must be called).
2768 * @param huart UART handle.
2769 * @retval HAL status
2770 */
HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef * huart)2771 HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart)
2772 {
2773 __HAL_LOCK(huart);
2774
2775 huart->gState = HAL_UART_STATE_BUSY;
2776
2777 /* Enable USART mute mode by setting the MME bit in the CR1 register */
2778 SET_BIT(huart->Instance->CR1, USART_CR1_MME);
2779
2780 huart->gState = HAL_UART_STATE_READY;
2781
2782 return (UART_CheckIdleState(huart));
2783 }
2784
2785 /**
2786 * @brief Disable UART mute mode (does not mean the UART actually exits mute mode
2787 * as it may not have been in mute mode at this very moment).
2788 * @param huart UART handle.
2789 * @retval HAL status
2790 */
HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef * huart)2791 HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart)
2792 {
2793 __HAL_LOCK(huart);
2794
2795 huart->gState = HAL_UART_STATE_BUSY;
2796
2797 /* Disable USART mute mode by clearing the MME bit in the CR1 register */
2798 CLEAR_BIT(huart->Instance->CR1, USART_CR1_MME);
2799
2800 huart->gState = HAL_UART_STATE_READY;
2801
2802 return (UART_CheckIdleState(huart));
2803 }
2804
2805 /**
2806 * @brief Enter UART mute mode (means UART actually enters mute mode).
2807 * @note To exit from mute mode, HAL_MultiProcessor_DisableMuteMode() API must be called.
2808 * @param huart UART handle.
2809 * @retval None
2810 */
HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef * huart)2811 void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart)
2812 {
2813 __HAL_UART_SEND_REQ(huart, UART_MUTE_MODE_REQUEST);
2814 }
2815
2816 /**
2817 * @brief Enable the UART transmitter and disable the UART receiver.
2818 * @param huart UART handle.
2819 * @retval HAL status
2820 */
HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef * huart)2821 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart)
2822 {
2823 __HAL_LOCK(huart);
2824 huart->gState = HAL_UART_STATE_BUSY;
2825
2826 /* Clear TE and RE bits */
2827 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TE | USART_CR1_RE));
2828
2829 /* Enable the USART's transmit interface by setting the TE bit in the USART CR1 register */
2830 SET_BIT(huart->Instance->CR1, USART_CR1_TE);
2831
2832 huart->gState = HAL_UART_STATE_READY;
2833
2834 __HAL_UNLOCK(huart);
2835
2836 return HAL_OK;
2837 }
2838
2839 /**
2840 * @brief Enable the UART receiver and disable the UART transmitter.
2841 * @param huart UART handle.
2842 * @retval HAL status.
2843 */
HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef * huart)2844 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart)
2845 {
2846 __HAL_LOCK(huart);
2847 huart->gState = HAL_UART_STATE_BUSY;
2848
2849 /* Clear TE and RE bits */
2850 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TE | USART_CR1_RE));
2851
2852 /* Enable the USART's receive interface by setting the RE bit in the USART CR1 register */
2853 SET_BIT(huart->Instance->CR1, USART_CR1_RE);
2854
2855 huart->gState = HAL_UART_STATE_READY;
2856
2857 __HAL_UNLOCK(huart);
2858
2859 return HAL_OK;
2860 }
2861
2862
2863 /**
2864 * @brief Transmit break characters.
2865 * @param huart UART handle.
2866 * @retval HAL status
2867 */
HAL_LIN_SendBreak(UART_HandleTypeDef * huart)2868 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart)
2869 {
2870 /* Check the parameters */
2871 assert_param(IS_UART_LIN_INSTANCE(huart->Instance));
2872
2873 __HAL_LOCK(huart);
2874
2875 huart->gState = HAL_UART_STATE_BUSY;
2876
2877 /* Send break characters */
2878 __HAL_UART_SEND_REQ(huart, UART_SENDBREAK_REQUEST);
2879
2880 huart->gState = HAL_UART_STATE_READY;
2881
2882 __HAL_UNLOCK(huart);
2883
2884 return HAL_OK;
2885 }
2886
2887 /**
2888 * @}
2889 */
2890
2891 /** @defgroup UART_Exported_Functions_Group4 Peripheral State and Error functions
2892 * @brief UART Peripheral State functions
2893 *
2894 @verbatim
2895 ==============================================================================
2896 ##### Peripheral State and Error functions #####
2897 ==============================================================================
2898 [..]
2899 This subsection provides functions allowing to :
2900 (+) Return the UART handle state.
2901 (+) Return the UART handle error code
2902
2903 @endverbatim
2904 * @{
2905 */
2906
2907 /**
2908 * @brief Return the UART handle state.
2909 * @param huart Pointer to a UART_HandleTypeDef structure that contains
2910 * the configuration information for the specified UART.
2911 * @retval HAL state
2912 */
HAL_UART_GetState(UART_HandleTypeDef * huart)2913 HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart)
2914 {
2915 uint32_t temp1;
2916 uint32_t temp2;
2917 temp1 = huart->gState;
2918 temp2 = huart->RxState;
2919
2920 return (HAL_UART_StateTypeDef)(temp1 | temp2);
2921 }
2922
2923 /**
2924 * @brief Return the UART handle error code.
2925 * @param huart Pointer to a UART_HandleTypeDef structure that contains
2926 * the configuration information for the specified UART.
2927 * @retval UART Error Code
2928 */
HAL_UART_GetError(UART_HandleTypeDef * huart)2929 uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart)
2930 {
2931 return huart->ErrorCode;
2932 }
2933 /**
2934 * @}
2935 */
2936
2937 /**
2938 * @}
2939 */
2940
2941 /** @defgroup UART_Private_Functions UART Private Functions
2942 * @{
2943 */
2944
2945 /**
2946 * @brief Initialize the callbacks to their default values.
2947 * @param huart UART handle.
2948 * @retval none
2949 */
2950 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
UART_InitCallbacksToDefault(UART_HandleTypeDef * huart)2951 void UART_InitCallbacksToDefault(UART_HandleTypeDef *huart)
2952 {
2953 /* Init the UART Callback settings */
2954 huart->TxHalfCpltCallback = HAL_UART_TxHalfCpltCallback; /* Legacy weak TxHalfCpltCallback */
2955 huart->TxCpltCallback = HAL_UART_TxCpltCallback; /* Legacy weak TxCpltCallback */
2956 huart->RxHalfCpltCallback = HAL_UART_RxHalfCpltCallback; /* Legacy weak RxHalfCpltCallback */
2957 huart->RxCpltCallback = HAL_UART_RxCpltCallback; /* Legacy weak RxCpltCallback */
2958 huart->ErrorCallback = HAL_UART_ErrorCallback; /* Legacy weak ErrorCallback */
2959 huart->AbortCpltCallback = HAL_UART_AbortCpltCallback; /* Legacy weak AbortCpltCallback */
2960 huart->AbortTransmitCpltCallback = HAL_UART_AbortTransmitCpltCallback; /* Legacy weak AbortTransmitCpltCallback */
2961 huart->AbortReceiveCpltCallback = HAL_UART_AbortReceiveCpltCallback; /* Legacy weak AbortReceiveCpltCallback */
2962 huart->WakeupCallback = HAL_UARTEx_WakeupCallback; /* Legacy weak WakeupCallback */
2963 #if defined(USART_CR1_FIFOEN)
2964 huart->RxFifoFullCallback = HAL_UARTEx_RxFifoFullCallback; /* Legacy weak RxFifoFullCallback */
2965 huart->TxFifoEmptyCallback = HAL_UARTEx_TxFifoEmptyCallback; /* Legacy weak TxFifoEmptyCallback */
2966 #endif /* USART_CR1_FIFOEN */
2967
2968 }
2969 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
2970
2971 /**
2972 * @brief Configure the UART peripheral.
2973 * @param huart UART handle.
2974 * @retval HAL status
2975 */
UART_SetConfig(UART_HandleTypeDef * huart)2976 HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart)
2977 {
2978 uint32_t tmpreg;
2979 uint16_t brrtemp;
2980 UART_ClockSourceTypeDef clocksource;
2981 uint32_t usartdiv = 0x00000000U;
2982 HAL_StatusTypeDef ret = HAL_OK;
2983 uint32_t lpuart_ker_ck_pres = 0x00000000U;
2984 uint32_t pclk;
2985
2986 /* Check the parameters */
2987 assert_param(IS_UART_BAUDRATE(huart->Init.BaudRate));
2988 assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
2989 if (UART_INSTANCE_LOWPOWER(huart))
2990 {
2991 assert_param(IS_LPUART_STOPBITS(huart->Init.StopBits));
2992 }
2993 else
2994 {
2995 assert_param(IS_UART_STOPBITS(huart->Init.StopBits));
2996 assert_param(IS_UART_ONE_BIT_SAMPLE(huart->Init.OneBitSampling));
2997 }
2998
2999 assert_param(IS_UART_PARITY(huart->Init.Parity));
3000 assert_param(IS_UART_MODE(huart->Init.Mode));
3001 assert_param(IS_UART_HARDWARE_FLOW_CONTROL(huart->Init.HwFlowCtl));
3002 assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));
3003 #if defined(USART_PRESC_PRESCALER)
3004 assert_param(IS_UART_PRESCALER(huart->Init.ClockPrescaler));
3005 #endif /* USART_PRESC_PRESCALER */
3006
3007 /*-------------------------- USART CR1 Configuration -----------------------*/
3008 /* Clear M, PCE, PS, TE, RE and OVER8 bits and configure
3009 * the UART Word Length, Parity, Mode and oversampling:
3010 * set the M bits according to huart->Init.WordLength value
3011 * set PCE and PS bits according to huart->Init.Parity value
3012 * set TE and RE bits according to huart->Init.Mode value
3013 * set OVER8 bit according to huart->Init.OverSampling value */
3014 tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling ;
3015 #if defined(USART_CR1_FIFOEN)
3016 tmpreg |= (uint32_t)huart->FifoMode;
3017 #endif /* USART_CR1_FIFOEN */
3018 MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg);
3019
3020 /*-------------------------- USART CR2 Configuration -----------------------*/
3021 /* Configure the UART Stop Bits: Set STOP[13:12] bits according
3022 * to huart->Init.StopBits value */
3023 MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
3024
3025 /*-------------------------- USART CR3 Configuration -----------------------*/
3026 /* Configure
3027 * - UART HardWare Flow Control: set CTSE and RTSE bits according
3028 * to huart->Init.HwFlowCtl value
3029 * - one-bit sampling method versus three samples' majority rule according
3030 * to huart->Init.OneBitSampling (not applicable to LPUART) */
3031 tmpreg = (uint32_t)huart->Init.HwFlowCtl;
3032
3033 if (!(UART_INSTANCE_LOWPOWER(huart)))
3034 {
3035 tmpreg |= huart->Init.OneBitSampling;
3036 }
3037 MODIFY_REG(huart->Instance->CR3, USART_CR3_FIELDS, tmpreg);
3038
3039 #if defined(USART_PRESC_PRESCALER)
3040 /*-------------------------- USART PRESC Configuration -----------------------*/
3041 /* Configure
3042 * - UART Clock Prescaler : set PRESCALER according to huart->Init.ClockPrescaler value */
3043 MODIFY_REG(huart->Instance->PRESC, USART_PRESC_PRESCALER, huart->Init.ClockPrescaler);
3044 #endif /* USART_PRESC_PRESCALER */
3045
3046 /*-------------------------- USART BRR Configuration -----------------------*/
3047 UART_GETCLOCKSOURCE(huart, clocksource);
3048
3049 /* Check LPUART instance */
3050 if (UART_INSTANCE_LOWPOWER(huart))
3051 {
3052 /* Retrieve frequency clock */
3053 switch (clocksource)
3054 {
3055 case UART_CLOCKSOURCE_PCLK1:
3056 #if defined(USART_PRESC_PRESCALER)
3057 lpuart_ker_ck_pres = (HAL_RCC_GetPCLK1Freq() / UART_GET_DIV_FACTOR(huart->Init.ClockPrescaler));
3058 #else
3059 lpuart_ker_ck_pres = HAL_RCC_GetPCLK1Freq();
3060 #endif /* USART_PRESC_PRESCALER */
3061 break;
3062 case UART_CLOCKSOURCE_HSI:
3063 #if defined(USART_PRESC_PRESCALER)
3064 lpuart_ker_ck_pres = ((uint32_t)HSI_VALUE / UART_GET_DIV_FACTOR(huart->Init.ClockPrescaler));
3065 #else
3066 lpuart_ker_ck_pres = (uint32_t)HSI_VALUE;
3067 #endif /* USART_PRESC_PRESCALER */
3068 break;
3069 case UART_CLOCKSOURCE_SYSCLK:
3070 #if defined(USART_PRESC_PRESCALER)
3071 lpuart_ker_ck_pres = (HAL_RCC_GetSysClockFreq() / UART_GET_DIV_FACTOR(huart->Init.ClockPrescaler));
3072 #else
3073 lpuart_ker_ck_pres = HAL_RCC_GetSysClockFreq();
3074 #endif /* USART_PRESC_PRESCALER */
3075 break;
3076 case UART_CLOCKSOURCE_LSE:
3077 #if defined(USART_PRESC_PRESCALER)
3078 lpuart_ker_ck_pres = ((uint32_t)LSE_VALUE / UART_GET_DIV_FACTOR(huart->Init.ClockPrescaler));
3079 #else
3080 lpuart_ker_ck_pres = (uint32_t)LSE_VALUE;
3081 #endif /* USART_PRESC_PRESCALER */
3082 break;
3083 default:
3084 ret = HAL_ERROR;
3085 break;
3086 }
3087
3088 /* if proper clock source reported */
3089 if (lpuart_ker_ck_pres != 0U)
3090 {
3091 /* ensure that Frequency clock is in the range [3 * baudrate, 4096 * baudrate] */
3092 if ((lpuart_ker_ck_pres < (3U * huart->Init.BaudRate)) ||
3093 (lpuart_ker_ck_pres > (4096U * huart->Init.BaudRate)))
3094 {
3095 ret = HAL_ERROR;
3096 }
3097 else
3098 {
3099 switch (clocksource)
3100 {
3101 case UART_CLOCKSOURCE_PCLK1:
3102 pclk = HAL_RCC_GetPCLK1Freq();
3103 #if defined(USART_PRESC_PRESCALER)
3104 usartdiv = (uint32_t)(UART_DIV_LPUART(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler));
3105 #else
3106 usartdiv = (uint32_t)(UART_DIV_LPUART(pclk, huart->Init.BaudRate));
3107 #endif /* USART_PRESC_PRESCALER */
3108 break;
3109 case UART_CLOCKSOURCE_HSI:
3110 #if defined(USART_PRESC_PRESCALER)
3111 usartdiv = (uint32_t)(UART_DIV_LPUART(HSI_VALUE, huart->Init.BaudRate, huart->Init.ClockPrescaler));
3112 #else
3113 usartdiv = (uint32_t)(UART_DIV_LPUART(HSI_VALUE, huart->Init.BaudRate));
3114 #endif /* USART_PRESC_PRESCALER */
3115 break;
3116 case UART_CLOCKSOURCE_SYSCLK:
3117 pclk = HAL_RCC_GetSysClockFreq();
3118 #if defined(USART_PRESC_PRESCALER)
3119 usartdiv = (uint32_t)(UART_DIV_LPUART(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler));
3120 #else
3121 usartdiv = (uint32_t)(UART_DIV_LPUART(pclk, huart->Init.BaudRate));
3122 #endif /* USART_PRESC_PRESCALER */
3123 break;
3124 case UART_CLOCKSOURCE_LSE:
3125 #if defined(USART_PRESC_PRESCALER)
3126 usartdiv = (uint32_t)(UART_DIV_LPUART(LSE_VALUE, huart->Init.BaudRate, huart->Init.ClockPrescaler));
3127 #else
3128 usartdiv = (uint32_t)(UART_DIV_LPUART(LSE_VALUE, huart->Init.BaudRate));
3129 #endif /* USART_PRESC_PRESCALER */
3130 break;
3131 default:
3132 ret = HAL_ERROR;
3133 break;
3134 }
3135
3136 /* It is forbidden to write values lower than 0x300 in the LPUART_BRR register */
3137 if ((usartdiv >= LPUART_BRR_MIN) && (usartdiv <= LPUART_BRR_MAX))
3138 {
3139 huart->Instance->BRR = usartdiv;
3140 }
3141 else
3142 {
3143 ret = HAL_ERROR;
3144 }
3145 } /* if ( (lpuart_ker_ck_pres < (3 * huart->Init.BaudRate) ) || (lpuart_ker_ck_pres > (4096 * huart->Init.BaudRate) )) */
3146 } /* if (lpuart_ker_ck_pres != 0) */
3147 }
3148 /* Check UART Over Sampling to set Baud Rate Register */
3149 else if (huart->Init.OverSampling == UART_OVERSAMPLING_8)
3150 {
3151 switch (clocksource)
3152 {
3153 case UART_CLOCKSOURCE_PCLK1:
3154 pclk = HAL_RCC_GetPCLK1Freq();
3155 #if defined(USART_PRESC_PRESCALER)
3156 usartdiv = (uint16_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler));
3157 #else
3158 usartdiv = (uint16_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate));
3159 #endif /* USART_PRESC_PRESCALER */
3160 break;
3161 case UART_CLOCKSOURCE_PCLK2:
3162 pclk = HAL_RCC_GetPCLK2Freq();
3163 #if defined(USART_PRESC_PRESCALER)
3164 usartdiv = (uint16_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler));
3165 #else
3166 usartdiv = (uint16_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate));
3167 #endif /* USART_PRESC_PRESCALER */
3168 break;
3169 case UART_CLOCKSOURCE_HSI:
3170 #if defined(USART_PRESC_PRESCALER)
3171 usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HSI_VALUE, huart->Init.BaudRate, huart->Init.ClockPrescaler));
3172 #else
3173 usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HSI_VALUE, huart->Init.BaudRate));
3174 #endif /* USART_PRESC_PRESCALER */
3175 break;
3176 case UART_CLOCKSOURCE_SYSCLK:
3177 pclk = HAL_RCC_GetSysClockFreq();
3178 #if defined(USART_PRESC_PRESCALER)
3179 usartdiv = (uint16_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler));
3180 #else
3181 usartdiv = (uint16_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate));
3182 #endif /* USART_PRESC_PRESCALER */
3183 break;
3184 case UART_CLOCKSOURCE_LSE:
3185 #if defined(USART_PRESC_PRESCALER)
3186 usartdiv = (uint16_t)(UART_DIV_SAMPLING8((uint32_t)LSE_VALUE, huart->Init.BaudRate, huart->Init.ClockPrescaler));
3187 #else
3188 usartdiv = (uint16_t)(UART_DIV_SAMPLING8(LSE_VALUE, huart->Init.BaudRate));
3189 #endif /* USART_PRESC_PRESCALER */
3190 break;
3191 default:
3192 ret = HAL_ERROR;
3193 break;
3194 }
3195
3196 /* USARTDIV must be greater than or equal to 0d16 */
3197 if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX))
3198 {
3199 brrtemp = (uint16_t)(usartdiv & 0xFFF0U);
3200 brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U);
3201 huart->Instance->BRR = brrtemp;
3202 }
3203 else
3204 {
3205 ret = HAL_ERROR;
3206 }
3207 }
3208 else
3209 {
3210 switch (clocksource)
3211 {
3212 case UART_CLOCKSOURCE_PCLK1:
3213 pclk = HAL_RCC_GetPCLK1Freq();
3214 #if defined(USART_PRESC_PRESCALER)
3215 usartdiv = (uint16_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler));
3216 #else
3217 usartdiv = (uint16_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate));
3218 #endif /* USART_PRESC_PRESCALER */
3219 break;
3220 case UART_CLOCKSOURCE_PCLK2:
3221 pclk = HAL_RCC_GetPCLK2Freq();
3222 #if defined(USART_PRESC_PRESCALER)
3223 usartdiv = (uint16_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler));
3224 #else
3225 usartdiv = (uint16_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate));
3226 #endif /* USART_PRESC_PRESCALER */
3227 break;
3228 case UART_CLOCKSOURCE_HSI:
3229 #if defined(USART_PRESC_PRESCALER)
3230 usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HSI_VALUE, huart->Init.BaudRate, huart->Init.ClockPrescaler));
3231 #else
3232 usartdiv = (uint16_t)(UART_DIV_SAMPLING16(HSI_VALUE, huart->Init.BaudRate));
3233 #endif /* USART_PRESC_PRESCALER */
3234 break;
3235 case UART_CLOCKSOURCE_SYSCLK:
3236 pclk = HAL_RCC_GetSysClockFreq();
3237 #if defined(USART_PRESC_PRESCALER)
3238 usartdiv = (uint16_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler));
3239 #else
3240 usartdiv = (uint16_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate));
3241 #endif /* USART_PRESC_PRESCALER */
3242 break;
3243 case UART_CLOCKSOURCE_LSE:
3244 #if defined(USART_PRESC_PRESCALER)
3245 usartdiv = (uint16_t)(UART_DIV_SAMPLING16((uint32_t)LSE_VALUE, huart->Init.BaudRate, huart->Init.ClockPrescaler));
3246 #else
3247 usartdiv = (uint16_t)(UART_DIV_SAMPLING16(LSE_VALUE, huart->Init.BaudRate));
3248 #endif /* USART_PRESC_PRESCALER */
3249 break;
3250 default:
3251 ret = HAL_ERROR;
3252 break;
3253 }
3254
3255 /* USARTDIV must be greater than or equal to 0d16 */
3256 if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX))
3257 {
3258 huart->Instance->BRR = usartdiv;
3259 }
3260 else
3261 {
3262 ret = HAL_ERROR;
3263 }
3264 }
3265
3266 #if defined(USART_CR1_FIFOEN)
3267 /* Initialize the number of data to process during RX/TX ISR execution */
3268 huart->NbTxDataToProcess = 1;
3269 huart->NbRxDataToProcess = 1;
3270 #endif /* USART_CR1_FIFOEN */
3271
3272 /* Clear ISR function pointers */
3273 huart->RxISR = NULL;
3274 huart->TxISR = NULL;
3275
3276 return ret;
3277 }
3278
3279 /**
3280 * @brief Configure the UART peripheral advanced features.
3281 * @param huart UART handle.
3282 * @retval None
3283 */
UART_AdvFeatureConfig(UART_HandleTypeDef * huart)3284 void UART_AdvFeatureConfig(UART_HandleTypeDef *huart)
3285 {
3286 /* Check whether the set of advanced features to configure is properly set */
3287 assert_param(IS_UART_ADVFEATURE_INIT(huart->AdvancedInit.AdvFeatureInit));
3288
3289 /* if required, configure TX pin active level inversion */
3290 if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT))
3291 {
3292 assert_param(IS_UART_ADVFEATURE_TXINV(huart->AdvancedInit.TxPinLevelInvert));
3293 MODIFY_REG(huart->Instance->CR2, USART_CR2_TXINV, huart->AdvancedInit.TxPinLevelInvert);
3294 }
3295
3296 /* if required, configure RX pin active level inversion */
3297 if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXINVERT_INIT))
3298 {
3299 assert_param(IS_UART_ADVFEATURE_RXINV(huart->AdvancedInit.RxPinLevelInvert));
3300 MODIFY_REG(huart->Instance->CR2, USART_CR2_RXINV, huart->AdvancedInit.RxPinLevelInvert);
3301 }
3302
3303 /* if required, configure data inversion */
3304 if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DATAINVERT_INIT))
3305 {
3306 assert_param(IS_UART_ADVFEATURE_DATAINV(huart->AdvancedInit.DataInvert));
3307 MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert);
3308 }
3309
3310 /* if required, configure RX/TX pins swap */
3311 if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT))
3312 {
3313 assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap));
3314 MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap);
3315 }
3316
3317 /* if required, configure RX overrun detection disabling */
3318 if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT))
3319 {
3320 assert_param(IS_UART_OVERRUN(huart->AdvancedInit.OverrunDisable));
3321 MODIFY_REG(huart->Instance->CR3, USART_CR3_OVRDIS, huart->AdvancedInit.OverrunDisable);
3322 }
3323
3324 /* if required, configure DMA disabling on reception error */
3325 if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DMADISABLEONERROR_INIT))
3326 {
3327 assert_param(IS_UART_ADVFEATURE_DMAONRXERROR(huart->AdvancedInit.DMADisableonRxError));
3328 MODIFY_REG(huart->Instance->CR3, USART_CR3_DDRE, huart->AdvancedInit.DMADisableonRxError);
3329 }
3330
3331 /* if required, configure auto Baud rate detection scheme */
3332 if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_AUTOBAUDRATE_INIT))
3333 {
3334 assert_param(IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(huart->Instance));
3335 assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATE(huart->AdvancedInit.AutoBaudRateEnable));
3336 MODIFY_REG(huart->Instance->CR2, USART_CR2_ABREN, huart->AdvancedInit.AutoBaudRateEnable);
3337 /* set auto Baudrate detection parameters if detection is enabled */
3338 if (huart->AdvancedInit.AutoBaudRateEnable == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)
3339 {
3340 assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(huart->AdvancedInit.AutoBaudRateMode));
3341 MODIFY_REG(huart->Instance->CR2, USART_CR2_ABRMODE, huart->AdvancedInit.AutoBaudRateMode);
3342 }
3343 }
3344
3345 /* if required, configure MSB first on communication line */
3346 if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_MSBFIRST_INIT))
3347 {
3348 assert_param(IS_UART_ADVFEATURE_MSBFIRST(huart->AdvancedInit.MSBFirst));
3349 MODIFY_REG(huart->Instance->CR2, USART_CR2_MSBFIRST, huart->AdvancedInit.MSBFirst);
3350 }
3351 }
3352
3353 /**
3354 * @brief Check the UART Idle State.
3355 * @param huart UART handle.
3356 * @retval HAL status
3357 */
UART_CheckIdleState(UART_HandleTypeDef * huart)3358 HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart)
3359 {
3360 uint32_t tickstart;
3361
3362 /* Initialize the UART ErrorCode */
3363 huart->ErrorCode = HAL_UART_ERROR_NONE;
3364
3365 /* Init tickstart for timeout managment*/
3366 tickstart = HAL_GetTick();
3367
3368 /* Check if the Transmitter is enabled */
3369 if ((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE)
3370 {
3371 /* Wait until TEACK flag is set */
3372 if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
3373 {
3374 /* Timeout occurred */
3375 return HAL_TIMEOUT;
3376 }
3377 }
3378
3379 /* Check if the Receiver is enabled */
3380 if ((huart->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE)
3381 {
3382 /* Wait until REACK flag is set */
3383 if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
3384 {
3385 /* Timeout occurred */
3386 return HAL_TIMEOUT;
3387 }
3388 }
3389
3390 /* Initialize the UART State */
3391 huart->gState = HAL_UART_STATE_READY;
3392 huart->RxState = HAL_UART_STATE_READY;
3393
3394 __HAL_UNLOCK(huart);
3395
3396 return HAL_OK;
3397 }
3398
3399 /**
3400 * @brief Handle UART Communication Timeout.
3401 * @param huart UART handle.
3402 * @param Flag Specifies the UART flag to check
3403 * @param Status Flag status (SET or RESET)
3404 * @param Tickstart Tick start value
3405 * @param Timeout Timeout duration
3406 * @retval HAL status
3407 */
UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef * huart,uint32_t Flag,FlagStatus Status,uint32_t Tickstart,uint32_t Timeout)3408 HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status,
3409 uint32_t Tickstart, uint32_t Timeout)
3410 {
3411 /* Wait until flag is set */
3412 while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
3413 {
3414 /* Check for the Timeout */
3415 if (Timeout != HAL_MAX_DELAY)
3416 {
3417 if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
3418 {
3419 /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
3420 #if defined(USART_CR1_FIFOEN)
3421 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | USART_CR1_TXEIE_TXFNFIE));
3422 #else
3423 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
3424 #endif /* USART_CR1_FIFOEN */
3425 CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
3426
3427 huart->gState = HAL_UART_STATE_READY;
3428 huart->RxState = HAL_UART_STATE_READY;
3429
3430 __HAL_UNLOCK(huart);
3431
3432 return HAL_TIMEOUT;
3433 }
3434
3435 if (READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U)
3436 {
3437 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RTOF) == SET)
3438 {
3439 /* Clear Receiver Timeout flag*/
3440 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF);
3441
3442 /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
3443 #if defined(USART_CR1_FIFOEN)
3444 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | USART_CR1_TXEIE_TXFNFIE));
3445 #else
3446 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
3447 #endif
3448 CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
3449
3450 huart->gState = HAL_UART_STATE_READY;
3451 huart->RxState = HAL_UART_STATE_READY;
3452 huart->ErrorCode = HAL_UART_ERROR_RTO;
3453
3454 /* Process Unlocked */
3455 __HAL_UNLOCK(huart);
3456
3457 return HAL_TIMEOUT;
3458 }
3459 }
3460 }
3461 }
3462 return HAL_OK;
3463 }
3464
3465
3466 /**
3467 * @brief End ongoing Tx transfer on UART peripheral (following error detection or Transmit completion).
3468 * @param huart UART handle.
3469 * @retval None
3470 */
UART_EndTxTransfer(UART_HandleTypeDef * huart)3471 static void UART_EndTxTransfer(UART_HandleTypeDef *huart)
3472 {
3473 #if defined(USART_CR1_FIFOEN)
3474 /* Disable TXEIE, TCIE, TXFT interrupts */
3475 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE_TXFNFIE | USART_CR1_TCIE));
3476 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_TXFTIE));
3477 #else
3478 /* Disable TXEIE and TCIE interrupts */
3479 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
3480 #endif /* USART_CR1_FIFOEN */
3481
3482 /* At end of Tx process, restore huart->gState to Ready */
3483 huart->gState = HAL_UART_STATE_READY;
3484 }
3485
3486
3487 /**
3488 * @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion).
3489 * @param huart UART handle.
3490 * @retval None
3491 */
UART_EndRxTransfer(UART_HandleTypeDef * huart)3492 static void UART_EndRxTransfer(UART_HandleTypeDef *huart)
3493 {
3494 /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
3495 #if defined(USART_CR1_FIFOEN)
3496 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
3497 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
3498 #else
3499 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
3500 CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
3501 #endif /* USART_CR1_FIFOEN */
3502
3503 /* At end of Rx process, restore huart->RxState to Ready */
3504 huart->RxState = HAL_UART_STATE_READY;
3505
3506 /* Reset RxIsr function pointer */
3507 huart->RxISR = NULL;
3508 }
3509
3510
3511 /**
3512 * @brief DMA UART transmit process complete callback.
3513 * @param hdma DMA handle.
3514 * @retval None
3515 */
UART_DMATransmitCplt(DMA_HandleTypeDef * hdma)3516 static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma)
3517 {
3518 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3519
3520 /* DMA Normal mode */
3521 if (HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC))
3522 {
3523 huart->TxXferCount = 0U;
3524
3525 /* Disable the DMA transfer for transmit request by resetting the DMAT bit
3526 in the UART CR3 register */
3527 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
3528
3529 /* Enable the UART Transmit Complete Interrupt */
3530 SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
3531 }
3532 /* DMA Circular mode */
3533 else
3534 {
3535 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3536 /*Call registered Tx complete callback*/
3537 huart->TxCpltCallback(huart);
3538 #else
3539 /*Call legacy weak Tx complete callback*/
3540 HAL_UART_TxCpltCallback(huart);
3541 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3542 }
3543 }
3544
3545 /**
3546 * @brief DMA UART transmit process half complete callback.
3547 * @param hdma DMA handle.
3548 * @retval None
3549 */
UART_DMATxHalfCplt(DMA_HandleTypeDef * hdma)3550 static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
3551 {
3552 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3553
3554 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3555 /*Call registered Tx Half complete callback*/
3556 huart->TxHalfCpltCallback(huart);
3557 #else
3558 /*Call legacy weak Tx Half complete callback*/
3559 HAL_UART_TxHalfCpltCallback(huart);
3560 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3561 }
3562
3563 /**
3564 * @brief DMA UART receive process complete callback.
3565 * @param hdma DMA handle.
3566 * @retval None
3567 */
UART_DMAReceiveCplt(DMA_HandleTypeDef * hdma)3568 static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
3569 {
3570 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3571
3572 /* DMA Normal mode */
3573 if (HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC))
3574 {
3575 huart->RxXferCount = 0U;
3576
3577 /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
3578 CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
3579 CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
3580
3581 /* Disable the DMA transfer for the receiver request by resetting the DMAR bit
3582 in the UART CR3 register */
3583 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
3584
3585 /* At end of Rx process, restore huart->RxState to Ready */
3586 huart->RxState = HAL_UART_STATE_READY;
3587 }
3588
3589 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3590 /*Call registered Rx complete callback*/
3591 huart->RxCpltCallback(huart);
3592 #else
3593 /*Call legacy weak Rx complete callback*/
3594 HAL_UART_RxCpltCallback(huart);
3595 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3596 }
3597
3598 /**
3599 * @brief DMA UART receive process half complete callback.
3600 * @param hdma DMA handle.
3601 * @retval None
3602 */
UART_DMARxHalfCplt(DMA_HandleTypeDef * hdma)3603 static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
3604 {
3605 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3606
3607 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3608 /*Call registered Rx Half complete callback*/
3609 huart->RxHalfCpltCallback(huart);
3610 #else
3611 /*Call legacy weak Rx Half complete callback*/
3612 HAL_UART_RxHalfCpltCallback(huart);
3613 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3614 }
3615
3616 /**
3617 * @brief DMA UART communication error callback.
3618 * @param hdma DMA handle.
3619 * @retval None
3620 */
UART_DMAError(DMA_HandleTypeDef * hdma)3621 static void UART_DMAError(DMA_HandleTypeDef *hdma)
3622 {
3623 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3624
3625 const HAL_UART_StateTypeDef gstate = huart->gState;
3626 const HAL_UART_StateTypeDef rxstate = huart->RxState;
3627
3628 /* Stop UART DMA Tx request if ongoing */
3629 if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) &&
3630 (gstate == HAL_UART_STATE_BUSY_TX))
3631 {
3632 huart->TxXferCount = 0U;
3633 UART_EndTxTransfer(huart);
3634 }
3635
3636 /* Stop UART DMA Rx request if ongoing */
3637 if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) &&
3638 (rxstate == HAL_UART_STATE_BUSY_RX))
3639 {
3640 huart->RxXferCount = 0U;
3641 UART_EndRxTransfer(huart);
3642 }
3643
3644 huart->ErrorCode |= HAL_UART_ERROR_DMA;
3645
3646 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3647 /*Call registered error callback*/
3648 huart->ErrorCallback(huart);
3649 #else
3650 /*Call legacy weak error callback*/
3651 HAL_UART_ErrorCallback(huart);
3652 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3653 }
3654
3655 /**
3656 * @brief DMA UART communication abort callback, when initiated by HAL services on Error
3657 * (To be called at end of DMA Abort procedure following error occurrence).
3658 * @param hdma DMA handle.
3659 * @retval None
3660 */
UART_DMAAbortOnError(DMA_HandleTypeDef * hdma)3661 static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma)
3662 {
3663 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3664 huart->RxXferCount = 0U;
3665 huart->TxXferCount = 0U;
3666
3667 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3668 /*Call registered error callback*/
3669 huart->ErrorCallback(huart);
3670 #else
3671 /*Call legacy weak error callback*/
3672 HAL_UART_ErrorCallback(huart);
3673 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3674 }
3675
3676 /**
3677 * @brief DMA UART Tx communication abort callback, when initiated by user
3678 * (To be called at end of DMA Tx Abort procedure following user abort request).
3679 * @note When this callback is executed, User Abort complete call back is called only if no
3680 * Abort still ongoing for Rx DMA Handle.
3681 * @param hdma DMA handle.
3682 * @retval None
3683 */
UART_DMATxAbortCallback(DMA_HandleTypeDef * hdma)3684 static void UART_DMATxAbortCallback(DMA_HandleTypeDef *hdma)
3685 {
3686 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3687
3688 huart->hdmatx->XferAbortCallback = NULL;
3689
3690 /* Check if an Abort process is still ongoing */
3691 if (huart->hdmarx != NULL)
3692 {
3693 if (huart->hdmarx->XferAbortCallback != NULL)
3694 {
3695 return;
3696 }
3697 }
3698
3699 /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
3700 huart->TxXferCount = 0U;
3701 huart->RxXferCount = 0U;
3702
3703 /* Reset errorCode */
3704 huart->ErrorCode = HAL_UART_ERROR_NONE;
3705
3706 /* Clear the Error flags in the ICR register */
3707 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
3708
3709 #if defined(USART_CR1_FIFOEN)
3710 /* Flush the whole TX FIFO (if needed) */
3711 if (huart->FifoMode == UART_FIFOMODE_ENABLE)
3712 {
3713 __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST);
3714 }
3715 #endif /* USART_CR1_FIFOEN */
3716
3717 /* Restore huart->gState and huart->RxState to Ready */
3718 huart->gState = HAL_UART_STATE_READY;
3719 huart->RxState = HAL_UART_STATE_READY;
3720
3721 /* Call user Abort complete callback */
3722 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3723 /* Call registered Abort complete callback */
3724 huart->AbortCpltCallback(huart);
3725 #else
3726 /* Call legacy weak Abort complete callback */
3727 HAL_UART_AbortCpltCallback(huart);
3728 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3729 }
3730
3731
3732 /**
3733 * @brief DMA UART Rx communication abort callback, when initiated by user
3734 * (To be called at end of DMA Rx Abort procedure following user abort request).
3735 * @note When this callback is executed, User Abort complete call back is called only if no
3736 * Abort still ongoing for Tx DMA Handle.
3737 * @param hdma DMA handle.
3738 * @retval None
3739 */
UART_DMARxAbortCallback(DMA_HandleTypeDef * hdma)3740 static void UART_DMARxAbortCallback(DMA_HandleTypeDef *hdma)
3741 {
3742 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3743
3744 huart->hdmarx->XferAbortCallback = NULL;
3745
3746 /* Check if an Abort process is still ongoing */
3747 if (huart->hdmatx != NULL)
3748 {
3749 if (huart->hdmatx->XferAbortCallback != NULL)
3750 {
3751 return;
3752 }
3753 }
3754
3755 /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
3756 huart->TxXferCount = 0U;
3757 huart->RxXferCount = 0U;
3758
3759 /* Reset errorCode */
3760 huart->ErrorCode = HAL_UART_ERROR_NONE;
3761
3762 /* Clear the Error flags in the ICR register */
3763 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
3764
3765 /* Discard the received data */
3766 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
3767
3768 /* Restore huart->gState and huart->RxState to Ready */
3769 huart->gState = HAL_UART_STATE_READY;
3770 huart->RxState = HAL_UART_STATE_READY;
3771
3772 /* Call user Abort complete callback */
3773 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3774 /* Call registered Abort complete callback */
3775 huart->AbortCpltCallback(huart);
3776 #else
3777 /* Call legacy weak Abort complete callback */
3778 HAL_UART_AbortCpltCallback(huart);
3779 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3780 }
3781
3782
3783 /**
3784 * @brief DMA UART Tx communication abort callback, when initiated by user by a call to
3785 * HAL_UART_AbortTransmit_IT API (Abort only Tx transfer)
3786 * (This callback is executed at end of DMA Tx Abort procedure following user abort request,
3787 * and leads to user Tx Abort Complete callback execution).
3788 * @param hdma DMA handle.
3789 * @retval None
3790 */
UART_DMATxOnlyAbortCallback(DMA_HandleTypeDef * hdma)3791 static void UART_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma)
3792 {
3793 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3794
3795 huart->TxXferCount = 0U;
3796
3797 #if defined(USART_CR1_FIFOEN)
3798 /* Flush the whole TX FIFO (if needed) */
3799 if (huart->FifoMode == UART_FIFOMODE_ENABLE)
3800 {
3801 __HAL_UART_SEND_REQ(huart, UART_TXDATA_FLUSH_REQUEST);
3802 }
3803 #endif /* USART_CR1_FIFOEN */
3804
3805 /* Restore huart->gState to Ready */
3806 huart->gState = HAL_UART_STATE_READY;
3807
3808 /* Call user Abort complete callback */
3809 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3810 /* Call registered Abort Transmit Complete Callback */
3811 huart->AbortTransmitCpltCallback(huart);
3812 #else
3813 /* Call legacy weak Abort Transmit Complete Callback */
3814 HAL_UART_AbortTransmitCpltCallback(huart);
3815 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3816 }
3817
3818 /**
3819 * @brief DMA UART Rx communication abort callback, when initiated by user by a call to
3820 * HAL_UART_AbortReceive_IT API (Abort only Rx transfer)
3821 * (This callback is executed at end of DMA Rx Abort procedure following user abort request,
3822 * and leads to user Rx Abort Complete callback execution).
3823 * @param hdma DMA handle.
3824 * @retval None
3825 */
UART_DMARxOnlyAbortCallback(DMA_HandleTypeDef * hdma)3826 static void UART_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma)
3827 {
3828 UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
3829
3830 huart->RxXferCount = 0U;
3831
3832 /* Clear the Error flags in the ICR register */
3833 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF);
3834
3835 /* Discard the received data */
3836 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
3837
3838 /* Restore huart->RxState to Ready */
3839 huart->RxState = HAL_UART_STATE_READY;
3840
3841 /* Call user Abort complete callback */
3842 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
3843 /* Call registered Abort Receive Complete Callback */
3844 huart->AbortReceiveCpltCallback(huart);
3845 #else
3846 /* Call legacy weak Abort Receive Complete Callback */
3847 HAL_UART_AbortReceiveCpltCallback(huart);
3848 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
3849 }
3850
3851 /**
3852 * @brief TX interrrupt handler for 7 or 8 bits data word length .
3853 * @note Function is called under interruption only, once
3854 * interruptions have been enabled by HAL_UART_Transmit_IT().
3855 * @param huart UART handle.
3856 * @retval None
3857 */
UART_TxISR_8BIT(UART_HandleTypeDef * huart)3858 static void UART_TxISR_8BIT(UART_HandleTypeDef *huart)
3859 {
3860 /* Check that a Tx process is ongoing */
3861 if (huart->gState == HAL_UART_STATE_BUSY_TX)
3862 {
3863 if (huart->TxXferCount == 0U)
3864 {
3865 /* Disable the UART Transmit Data Register Empty Interrupt */
3866 #if defined(USART_CR1_FIFOEN)
3867 CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE);
3868 #else
3869 CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE);
3870 #endif /* USART_CR1_FIFOEN */
3871
3872 /* Enable the UART Transmit Complete Interrupt */
3873 SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
3874 }
3875 else
3876 {
3877 huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr & (uint8_t)0xFF);
3878 huart->pTxBuffPtr++;
3879 huart->TxXferCount--;
3880 }
3881 }
3882 }
3883
3884 /**
3885 * @brief TX interrrupt handler for 9 bits data word length.
3886 * @note Function is called under interruption only, once
3887 * interruptions have been enabled by HAL_UART_Transmit_IT().
3888 * @param huart UART handle.
3889 * @retval None
3890 */
UART_TxISR_16BIT(UART_HandleTypeDef * huart)3891 static void UART_TxISR_16BIT(UART_HandleTypeDef *huart)
3892 {
3893 uint16_t *tmp;
3894
3895 /* Check that a Tx process is ongoing */
3896 if (huart->gState == HAL_UART_STATE_BUSY_TX)
3897 {
3898 if (huart->TxXferCount == 0U)
3899 {
3900 /* Disable the UART Transmit Data Register Empty Interrupt */
3901 #if defined(USART_CR1_FIFOEN)
3902 CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE);
3903 #else
3904 CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE);
3905 #endif /* USART_CR1_FIFOEN */
3906
3907 /* Enable the UART Transmit Complete Interrupt */
3908 SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
3909 }
3910 else
3911 {
3912 tmp = (uint16_t *) huart->pTxBuffPtr;
3913 huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL);
3914 huart->pTxBuffPtr += 2U;
3915 huart->TxXferCount--;
3916 }
3917 }
3918 }
3919
3920 #if defined(USART_CR1_FIFOEN)
3921 /**
3922 * @brief TX interrrupt handler for 7 or 8 bits data word length and FIFO mode is enabled.
3923 * @note Function is called under interruption only, once
3924 * interruptions have been enabled by HAL_UART_Transmit_IT().
3925 * @param huart UART handle.
3926 * @retval None
3927 */
UART_TxISR_8BIT_FIFOEN(UART_HandleTypeDef * huart)3928 static void UART_TxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart)
3929 {
3930 uint16_t nb_tx_data;
3931
3932 /* Check that a Tx process is ongoing */
3933 if (huart->gState == HAL_UART_STATE_BUSY_TX)
3934 {
3935 for (nb_tx_data = huart->NbTxDataToProcess ; nb_tx_data > 0U ; nb_tx_data--)
3936 {
3937 if (huart->TxXferCount == 0U)
3938 {
3939 /* Disable the TX FIFO threshold interrupt */
3940 CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
3941
3942 /* Enable the UART Transmit Complete Interrupt */
3943 SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
3944
3945 break; /* force exit loop */
3946 }
3947 else if (READ_BIT(huart->Instance->ISR, USART_ISR_TXE_TXFNF) != 0U)
3948 {
3949 huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr & (uint8_t)0xFF);
3950 huart->pTxBuffPtr++;
3951 huart->TxXferCount--;
3952 }
3953 else
3954 {
3955 /* Nothing to do */
3956 }
3957 }
3958 }
3959 }
3960
3961 /**
3962 * @brief TX interrrupt handler for 9 bits data word length and FIFO mode is enabled.
3963 * @note Function is called under interruption only, once
3964 * interruptions have been enabled by HAL_UART_Transmit_IT().
3965 * @param huart UART handle.
3966 * @retval None
3967 */
UART_TxISR_16BIT_FIFOEN(UART_HandleTypeDef * huart)3968 static void UART_TxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart)
3969 {
3970 uint16_t *tmp;
3971 uint16_t nb_tx_data;
3972
3973 /* Check that a Tx process is ongoing */
3974 if (huart->gState == HAL_UART_STATE_BUSY_TX)
3975 {
3976 for (nb_tx_data = huart->NbTxDataToProcess ; nb_tx_data > 0U ; nb_tx_data--)
3977 {
3978 if (huart->TxXferCount == 0U)
3979 {
3980 /* Disable the TX FIFO threshold interrupt */
3981 CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE);
3982
3983 /* Enable the UART Transmit Complete Interrupt */
3984 SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
3985
3986 break; /* force exit loop */
3987 }
3988 else if (READ_BIT(huart->Instance->ISR, USART_ISR_TXE_TXFNF) != 0U)
3989 {
3990 tmp = (uint16_t *) huart->pTxBuffPtr;
3991 huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL);
3992 huart->pTxBuffPtr += 2U;
3993 huart->TxXferCount--;
3994 }
3995 else
3996 {
3997 /* Nothing to do */
3998 }
3999 }
4000 }
4001 }
4002 #endif /* USART_CR1_FIFOEN */
4003
4004 /**
4005 * @brief Wrap up transmission in non-blocking mode.
4006 * @param huart pointer to a UART_HandleTypeDef structure that contains
4007 * the configuration information for the specified UART module.
4008 * @retval None
4009 */
UART_EndTransmit_IT(UART_HandleTypeDef * huart)4010 static void UART_EndTransmit_IT(UART_HandleTypeDef *huart)
4011 {
4012 /* Disable the UART Transmit Complete Interrupt */
4013 CLEAR_BIT(huart->Instance->CR1, USART_CR1_TCIE);
4014
4015 /* Tx process is ended, restore huart->gState to Ready */
4016 huart->gState = HAL_UART_STATE_READY;
4017
4018 /* Cleat TxISR function pointer */
4019 huart->TxISR = NULL;
4020
4021 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4022 /*Call registered Tx complete callback*/
4023 huart->TxCpltCallback(huart);
4024 #else
4025 /*Call legacy weak Tx complete callback*/
4026 HAL_UART_TxCpltCallback(huart);
4027 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
4028 }
4029
4030 /**
4031 * @brief RX interrrupt handler for 7 or 8 bits data word length .
4032 * @param huart UART handle.
4033 * @retval None
4034 */
UART_RxISR_8BIT(UART_HandleTypeDef * huart)4035 static void UART_RxISR_8BIT(UART_HandleTypeDef *huart)
4036 {
4037 uint16_t uhMask = huart->Mask;
4038 uint16_t uhdata;
4039
4040 /* Check that a Rx process is ongoing */
4041 if (huart->RxState == HAL_UART_STATE_BUSY_RX)
4042 {
4043 uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
4044 *huart->pRxBuffPtr = (uint8_t)(uhdata & (uint8_t)uhMask);
4045 huart->pRxBuffPtr++;
4046 huart->RxXferCount--;
4047
4048 if (huart->RxXferCount == 0U)
4049 {
4050 /* Disable the UART Parity Error Interrupt and RXNE interrupts */
4051 #if defined(USART_CR1_FIFOEN)
4052 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
4053 #else
4054 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
4055 #endif /* USART_CR1_FIFOEN */
4056
4057 /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
4058 CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
4059
4060 /* Rx process is completed, restore huart->RxState to Ready */
4061 huart->RxState = HAL_UART_STATE_READY;
4062
4063 /* Clear RxISR function pointer */
4064 huart->RxISR = NULL;
4065
4066 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4067 /*Call registered Rx complete callback*/
4068 huart->RxCpltCallback(huart);
4069 #else
4070 /*Call legacy weak Rx complete callback*/
4071 HAL_UART_RxCpltCallback(huart);
4072 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
4073 }
4074 }
4075 else
4076 {
4077 /* Clear RXNE interrupt flag */
4078 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
4079 }
4080 }
4081
4082 /**
4083 * @brief RX interrrupt handler for 9 bits data word length .
4084 * @note Function is called under interruption only, once
4085 * interruptions have been enabled by HAL_UART_Receive_IT()
4086 * @param huart UART handle.
4087 * @retval None
4088 */
UART_RxISR_16BIT(UART_HandleTypeDef * huart)4089 static void UART_RxISR_16BIT(UART_HandleTypeDef *huart)
4090 {
4091 uint16_t *tmp;
4092 uint16_t uhMask = huart->Mask;
4093 uint16_t uhdata;
4094
4095 /* Check that a Rx process is ongoing */
4096 if (huart->RxState == HAL_UART_STATE_BUSY_RX)
4097 {
4098 uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
4099 tmp = (uint16_t *) huart->pRxBuffPtr ;
4100 *tmp = (uint16_t)(uhdata & uhMask);
4101 huart->pRxBuffPtr += 2U;
4102 huart->RxXferCount--;
4103
4104 if (huart->RxXferCount == 0U)
4105 {
4106 /* Disable the UART Parity Error Interrupt and RXNE interrupt*/
4107 #if defined(USART_CR1_FIFOEN)
4108 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE));
4109 #else
4110 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
4111 #endif /* USART_CR1_FIFOEN */
4112
4113 /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
4114 CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
4115
4116 /* Rx process is completed, restore huart->RxState to Ready */
4117 huart->RxState = HAL_UART_STATE_READY;
4118
4119 /* Clear RxISR function pointer */
4120 huart->RxISR = NULL;
4121
4122 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4123 /*Call registered Rx complete callback*/
4124 huart->RxCpltCallback(huart);
4125 #else
4126 /*Call legacy weak Rx complete callback*/
4127 HAL_UART_RxCpltCallback(huart);
4128 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
4129 }
4130 }
4131 else
4132 {
4133 /* Clear RXNE interrupt flag */
4134 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
4135 }
4136 }
4137
4138 #if defined(USART_CR1_FIFOEN)
4139 /**
4140 * @brief RX interrrupt handler for 7 or 8 bits data word length and FIFO mode is enabled.
4141 * @note Function is called under interruption only, once
4142 * interruptions have been enabled by HAL_UART_Receive_IT()
4143 * @param huart UART handle.
4144 * @retval None
4145 */
UART_RxISR_8BIT_FIFOEN(UART_HandleTypeDef * huart)4146 static void UART_RxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart)
4147 {
4148 uint16_t uhMask = huart->Mask;
4149 uint16_t uhdata;
4150 uint16_t nb_rx_data;
4151 uint16_t rxdatacount;
4152
4153 /* Check that a Rx process is ongoing */
4154 if (huart->RxState == HAL_UART_STATE_BUSY_RX)
4155 {
4156 for (nb_rx_data = huart->NbRxDataToProcess ; nb_rx_data > 0U ; nb_rx_data--)
4157 {
4158 uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
4159 *huart->pRxBuffPtr = (uint8_t)(uhdata & (uint8_t)uhMask);
4160 huart->pRxBuffPtr++;
4161 huart->RxXferCount--;
4162
4163 if (huart->RxXferCount == 0U)
4164 {
4165 /* Disable the UART Parity Error Interrupt and RXFT interrupt*/
4166 CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
4167
4168 /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) and RX FIFO Threshold interrupt */
4169 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
4170
4171 /* Rx process is completed, restore huart->RxState to Ready */
4172 huart->RxState = HAL_UART_STATE_READY;
4173
4174 /* Clear RxISR function pointer */
4175 huart->RxISR = NULL;
4176
4177 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4178 /*Call registered Rx complete callback*/
4179 huart->RxCpltCallback(huart);
4180 #else
4181 /*Call legacy weak Rx complete callback*/
4182 HAL_UART_RxCpltCallback(huart);
4183 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
4184 }
4185 }
4186
4187 /* When remaining number of bytes to receive is less than the RX FIFO
4188 threshold, next incoming frames are processed as if FIFO mode was
4189 disabled (i.e. one interrupt per received frame).
4190 */
4191 rxdatacount = huart->RxXferCount;
4192 if ((rxdatacount != 0U) && (rxdatacount < huart->NbRxDataToProcess))
4193 {
4194 /* Disable the UART RXFT interrupt*/
4195 CLEAR_BIT(huart->Instance->CR3, USART_CR3_RXFTIE);
4196
4197 /* Update the RxISR function pointer */
4198 huart->RxISR = UART_RxISR_8BIT;
4199
4200 /* Enable the UART Data Register Not Empty interrupt */
4201 SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE);
4202 }
4203 }
4204 else
4205 {
4206 /* Clear RXNE interrupt flag */
4207 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
4208 }
4209 }
4210
4211 /**
4212 * @brief RX interrrupt handler for 9 bits data word length and FIFO mode is enabled.
4213 * @note Function is called under interruption only, once
4214 * interruptions have been enabled by HAL_UART_Receive_IT()
4215 * @param huart UART handle.
4216 * @retval None
4217 */
UART_RxISR_16BIT_FIFOEN(UART_HandleTypeDef * huart)4218 static void UART_RxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart)
4219 {
4220 uint16_t *tmp;
4221 uint16_t uhMask = huart->Mask;
4222 uint16_t uhdata;
4223 uint16_t nb_rx_data;
4224 uint16_t rxdatacount;
4225
4226 /* Check that a Rx process is ongoing */
4227 if (huart->RxState == HAL_UART_STATE_BUSY_RX)
4228 {
4229 for (nb_rx_data = huart->NbRxDataToProcess ; nb_rx_data > 0U ; nb_rx_data--)
4230 {
4231 uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
4232 tmp = (uint16_t *) huart->pRxBuffPtr ;
4233 *tmp = (uint16_t)(uhdata & uhMask);
4234 huart->pRxBuffPtr += 2U;
4235 huart->RxXferCount--;
4236
4237 if (huart->RxXferCount == 0U)
4238 {
4239 /* Disable the UART Parity Error Interrupt and RXFT interrupt*/
4240 CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
4241
4242 /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) and RX FIFO Threshold interrupt */
4243 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE));
4244
4245 /* Rx process is completed, restore huart->RxState to Ready */
4246 huart->RxState = HAL_UART_STATE_READY;
4247
4248 /* Clear RxISR function pointer */
4249 huart->RxISR = NULL;
4250
4251 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
4252 /*Call registered Rx complete callback*/
4253 huart->RxCpltCallback(huart);
4254 #else
4255 /*Call legacy weak Rx complete callback*/
4256 HAL_UART_RxCpltCallback(huart);
4257 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
4258 }
4259 }
4260
4261 /* When remaining number of bytes to receive is less than the RX FIFO
4262 threshold, next incoming frames are processed as if FIFO mode was
4263 disabled (i.e. one interrupt per received frame).
4264 */
4265 rxdatacount = huart->RxXferCount;
4266 if ((rxdatacount != 0U) && (rxdatacount < huart->NbRxDataToProcess))
4267 {
4268 /* Disable the UART RXFT interrupt*/
4269 CLEAR_BIT(huart->Instance->CR3, USART_CR3_RXFTIE);
4270
4271 /* Update the RxISR function pointer */
4272 huart->RxISR = UART_RxISR_16BIT;
4273
4274 /* Enable the UART Data Register Not Empty interrupt */
4275 SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE);
4276 }
4277 }
4278 else
4279 {
4280 /* Clear RXNE interrupt flag */
4281 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
4282 }
4283 }
4284 #endif /* USART_CR1_FIFOEN */
4285
4286 /**
4287 * @}
4288 */
4289
4290 #endif /* HAL_UART_MODULE_ENABLED */
4291 /**
4292 * @}
4293 */
4294
4295 /**
4296 * @}
4297 */
4298
4299 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
4300