1 /**
2 ******************************************************************************
3 * @file stm32f4xx_ll_usart.c
4 * @author MCD Application Team
5 * @brief USART LL module driver.
6 ******************************************************************************
7 * @attention
8 *
9 * <h2><center>© Copyright (c) 2016 STMicroelectronics.
10 * All rights reserved.</center></h2>
11 *
12 * This software component is licensed by ST under BSD 3-Clause license,
13 * the "License"; You may not use this file except in compliance with the
14 * License. You may obtain a copy of the License at:
15 * opensource.org/licenses/BSD-3-Clause
16 *
17 ******************************************************************************
18 */
19
20 #if defined(USE_FULL_LL_DRIVER)
21
22 /* Includes ------------------------------------------------------------------*/
23 #include "stm32f4xx_ll_usart.h"
24 #include "stm32f4xx_ll_rcc.h"
25 #include "stm32f4xx_ll_bus.h"
26 #ifdef USE_FULL_ASSERT
27 #include "stm32_assert.h"
28 #else
29 #define assert_param(expr) ((void)0U)
30 #endif
31
32 /** @addtogroup STM32F4xx_LL_Driver
33 * @{
34 */
35
36 #if defined (USART1) || defined (USART2) || defined (USART3) || defined (USART6) || defined (UART4) || defined (UART5) || defined (UART7) || defined (UART8) || defined (UART9) || defined (UART10)
37
38 /** @addtogroup USART_LL
39 * @{
40 */
41
42 /* Private types -------------------------------------------------------------*/
43 /* Private variables ---------------------------------------------------------*/
44 /* Private constants ---------------------------------------------------------*/
45 /** @addtogroup USART_LL_Private_Constants
46 * @{
47 */
48
49 /**
50 * @}
51 */
52
53
54 /* Private macros ------------------------------------------------------------*/
55 /** @addtogroup USART_LL_Private_Macros
56 * @{
57 */
58
59 /* __BAUDRATE__ The maximum Baud Rate is derived from the maximum clock available
60 * divided by the smallest oversampling used on the USART (i.e. 8) */
61 #define IS_LL_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 12500000U)
62
63 /* __VALUE__ In case of oversampling by 16 and 8, BRR content must be greater than or equal to 16d. */
64 #define IS_LL_USART_BRR_MIN(__VALUE__) ((__VALUE__) >= 16U)
65
66 /* __VALUE__ BRR content must be lower than or equal to 0xFFFF. */
67 #define IS_LL_USART_BRR_MAX(__VALUE__) ((__VALUE__) <= 0x0000FFFFU)
68
69 #define IS_LL_USART_DIRECTION(__VALUE__) (((__VALUE__) == LL_USART_DIRECTION_NONE) \
70 || ((__VALUE__) == LL_USART_DIRECTION_RX) \
71 || ((__VALUE__) == LL_USART_DIRECTION_TX) \
72 || ((__VALUE__) == LL_USART_DIRECTION_TX_RX))
73
74 #define IS_LL_USART_PARITY(__VALUE__) (((__VALUE__) == LL_USART_PARITY_NONE) \
75 || ((__VALUE__) == LL_USART_PARITY_EVEN) \
76 || ((__VALUE__) == LL_USART_PARITY_ODD))
77
78 #define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_8B) \
79 || ((__VALUE__) == LL_USART_DATAWIDTH_9B))
80
81 #define IS_LL_USART_OVERSAMPLING(__VALUE__) (((__VALUE__) == LL_USART_OVERSAMPLING_16) \
82 || ((__VALUE__) == LL_USART_OVERSAMPLING_8))
83
84 #define IS_LL_USART_LASTBITCLKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_LASTCLKPULSE_NO_OUTPUT) \
85 || ((__VALUE__) == LL_USART_LASTCLKPULSE_OUTPUT))
86
87 #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
88 || ((__VALUE__) == LL_USART_PHASE_2EDGE))
89
90 #define IS_LL_USART_CLOCKPOLARITY(__VALUE__) (((__VALUE__) == LL_USART_POLARITY_LOW) \
91 || ((__VALUE__) == LL_USART_POLARITY_HIGH))
92
93 #define IS_LL_USART_CLOCKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_CLOCK_DISABLE) \
94 || ((__VALUE__) == LL_USART_CLOCK_ENABLE))
95
96 #define IS_LL_USART_STOPBITS(__VALUE__) (((__VALUE__) == LL_USART_STOPBITS_0_5) \
97 || ((__VALUE__) == LL_USART_STOPBITS_1) \
98 || ((__VALUE__) == LL_USART_STOPBITS_1_5) \
99 || ((__VALUE__) == LL_USART_STOPBITS_2))
100
101 #define IS_LL_USART_HWCONTROL(__VALUE__) (((__VALUE__) == LL_USART_HWCONTROL_NONE) \
102 || ((__VALUE__) == LL_USART_HWCONTROL_RTS) \
103 || ((__VALUE__) == LL_USART_HWCONTROL_CTS) \
104 || ((__VALUE__) == LL_USART_HWCONTROL_RTS_CTS))
105
106 /**
107 * @}
108 */
109
110 /* Private function prototypes -----------------------------------------------*/
111
112 /* Exported functions --------------------------------------------------------*/
113 /** @addtogroup USART_LL_Exported_Functions
114 * @{
115 */
116
117 /** @addtogroup USART_LL_EF_Init
118 * @{
119 */
120
121 /**
122 * @brief De-initialize USART registers (Registers restored to their default values).
123 * @param USARTx USART Instance
124 * @retval An ErrorStatus enumeration value:
125 * - SUCCESS: USART registers are de-initialized
126 * - ERROR: USART registers are not de-initialized
127 */
LL_USART_DeInit(USART_TypeDef * USARTx)128 ErrorStatus LL_USART_DeInit(USART_TypeDef *USARTx)
129 {
130 ErrorStatus status = SUCCESS;
131
132 /* Check the parameters */
133 assert_param(IS_UART_INSTANCE(USARTx));
134
135 if (USARTx == USART1)
136 {
137 /* Force reset of USART clock */
138 LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART1);
139
140 /* Release reset of USART clock */
141 LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART1);
142 }
143 else if (USARTx == USART2)
144 {
145 /* Force reset of USART clock */
146 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART2);
147
148 /* Release reset of USART clock */
149 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART2);
150 }
151 #if defined(USART3)
152 else if (USARTx == USART3)
153 {
154 /* Force reset of USART clock */
155 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART3);
156
157 /* Release reset of USART clock */
158 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART3);
159 }
160 #endif /* USART3 */
161 #if defined(USART6)
162 else if (USARTx == USART6)
163 {
164 /* Force reset of USART clock */
165 LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART6);
166
167 /* Release reset of USART clock */
168 LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART6);
169 }
170 #endif /* USART6 */
171 #if defined(UART4)
172 else if (USARTx == UART4)
173 {
174 /* Force reset of UART clock */
175 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART4);
176
177 /* Release reset of UART clock */
178 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART4);
179 }
180 #endif /* UART4 */
181 #if defined(UART5)
182 else if (USARTx == UART5)
183 {
184 /* Force reset of UART clock */
185 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART5);
186
187 /* Release reset of UART clock */
188 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART5);
189 }
190 #endif /* UART5 */
191 #if defined(UART7)
192 else if (USARTx == UART7)
193 {
194 /* Force reset of UART clock */
195 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART7);
196
197 /* Release reset of UART clock */
198 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART7);
199 }
200 #endif /* UART7 */
201 #if defined(UART8)
202 else if (USARTx == UART8)
203 {
204 /* Force reset of UART clock */
205 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART8);
206
207 /* Release reset of UART clock */
208 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART8);
209 }
210 #endif /* UART8 */
211 #if defined(UART9)
212 else if (USARTx == UART9)
213 {
214 /* Force reset of UART clock */
215 LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_UART9);
216
217 /* Release reset of UART clock */
218 LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_UART9);
219 }
220 #endif /* UART9 */
221 #if defined(UART10)
222 else if (USARTx == UART10)
223 {
224 /* Force reset of UART clock */
225 LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_UART10);
226
227 /* Release reset of UART clock */
228 LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_UART10);
229 }
230 #endif /* UART10 */
231 else
232 {
233 status = ERROR;
234 }
235
236 return (status);
237 }
238
239 /**
240 * @brief Initialize USART registers according to the specified
241 * parameters in USART_InitStruct.
242 * @note As some bits in USART configuration registers can only be written when the USART is disabled (USART_CR1_UE bit =0),
243 * USART IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
244 * @note Baud rate value stored in USART_InitStruct BaudRate field, should be valid (different from 0).
245 * @param USARTx USART Instance
246 * @param USART_InitStruct pointer to a LL_USART_InitTypeDef structure
247 * that contains the configuration information for the specified USART peripheral.
248 * @retval An ErrorStatus enumeration value:
249 * - SUCCESS: USART registers are initialized according to USART_InitStruct content
250 * - ERROR: Problem occurred during USART Registers initialization
251 */
LL_USART_Init(USART_TypeDef * USARTx,LL_USART_InitTypeDef * USART_InitStruct)252 ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, LL_USART_InitTypeDef *USART_InitStruct)
253 {
254 ErrorStatus status = ERROR;
255 uint32_t periphclk = LL_RCC_PERIPH_FREQUENCY_NO;
256 LL_RCC_ClocksTypeDef rcc_clocks;
257
258 /* Check the parameters */
259 assert_param(IS_UART_INSTANCE(USARTx));
260 assert_param(IS_LL_USART_BAUDRATE(USART_InitStruct->BaudRate));
261 assert_param(IS_LL_USART_DATAWIDTH(USART_InitStruct->DataWidth));
262 assert_param(IS_LL_USART_STOPBITS(USART_InitStruct->StopBits));
263 assert_param(IS_LL_USART_PARITY(USART_InitStruct->Parity));
264 assert_param(IS_LL_USART_DIRECTION(USART_InitStruct->TransferDirection));
265 assert_param(IS_LL_USART_HWCONTROL(USART_InitStruct->HardwareFlowControl));
266 assert_param(IS_LL_USART_OVERSAMPLING(USART_InitStruct->OverSampling));
267
268 /* USART needs to be in disabled state, in order to be able to configure some bits in
269 CRx registers */
270 if (LL_USART_IsEnabled(USARTx) == 0U)
271 {
272 /*---------------------------- USART CR1 Configuration -----------------------
273 * Configure USARTx CR1 (USART Word Length, Parity, Mode and Oversampling bits) with parameters:
274 * - DataWidth: USART_CR1_M bits according to USART_InitStruct->DataWidth value
275 * - Parity: USART_CR1_PCE, USART_CR1_PS bits according to USART_InitStruct->Parity value
276 * - TransferDirection: USART_CR1_TE, USART_CR1_RE bits according to USART_InitStruct->TransferDirection value
277 * - Oversampling: USART_CR1_OVER8 bit according to USART_InitStruct->OverSampling value.
278 */
279 MODIFY_REG(USARTx->CR1,
280 (USART_CR1_M | USART_CR1_PCE | USART_CR1_PS |
281 USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
282 (USART_InitStruct->DataWidth | USART_InitStruct->Parity |
283 USART_InitStruct->TransferDirection | USART_InitStruct->OverSampling));
284
285 /*---------------------------- USART CR2 Configuration -----------------------
286 * Configure USARTx CR2 (Stop bits) with parameters:
287 * - Stop Bits: USART_CR2_STOP bits according to USART_InitStruct->StopBits value.
288 * - CLKEN, CPOL, CPHA and LBCL bits are to be configured using LL_USART_ClockInit().
289 */
290 LL_USART_SetStopBitsLength(USARTx, USART_InitStruct->StopBits);
291
292 /*---------------------------- USART CR3 Configuration -----------------------
293 * Configure USARTx CR3 (Hardware Flow Control) with parameters:
294 * - HardwareFlowControl: USART_CR3_RTSE, USART_CR3_CTSE bits according to USART_InitStruct->HardwareFlowControl value.
295 */
296 LL_USART_SetHWFlowCtrl(USARTx, USART_InitStruct->HardwareFlowControl);
297
298 /*---------------------------- USART BRR Configuration -----------------------
299 * Retrieve Clock frequency used for USART Peripheral
300 */
301 LL_RCC_GetSystemClocksFreq(&rcc_clocks);
302 if (USARTx == USART1)
303 {
304 periphclk = rcc_clocks.PCLK2_Frequency;
305 }
306 else if (USARTx == USART2)
307 {
308 periphclk = rcc_clocks.PCLK1_Frequency;
309 }
310 #if defined(USART3)
311 else if (USARTx == USART3)
312 {
313 periphclk = rcc_clocks.PCLK1_Frequency;
314 }
315 #endif /* USART3 */
316 #if defined(USART6)
317 else if (USARTx == USART6)
318 {
319 periphclk = rcc_clocks.PCLK2_Frequency;
320 }
321 #endif /* USART6 */
322 #if defined(UART4)
323 else if (USARTx == UART4)
324 {
325 periphclk = rcc_clocks.PCLK1_Frequency;
326 }
327 #endif /* UART4 */
328 #if defined(UART5)
329 else if (USARTx == UART5)
330 {
331 periphclk = rcc_clocks.PCLK1_Frequency;
332 }
333 #endif /* UART5 */
334 #if defined(UART7)
335 else if (USARTx == UART7)
336 {
337 periphclk = rcc_clocks.PCLK1_Frequency;
338 }
339 #endif /* UART7 */
340 #if defined(UART8)
341 else if (USARTx == UART8)
342 {
343 periphclk = rcc_clocks.PCLK1_Frequency;
344 }
345 #endif /* UART8 */
346 #if defined(UART9)
347 else if (USARTx == UART9)
348 {
349 periphclk = rcc_clocks.PCLK2_Frequency;
350 }
351 #endif /* UART9 */
352 #if defined(UART10)
353 else if (USARTx == UART10)
354 {
355 periphclk = rcc_clocks.PCLK2_Frequency;
356 }
357 #endif /* UART10 */
358 else
359 {
360 /* Nothing to do, as error code is already assigned to ERROR value */
361 }
362
363 /* Configure the USART Baud Rate :
364 - valid baud rate value (different from 0) is required
365 - Peripheral clock as returned by RCC service, should be valid (different from 0).
366 */
367 if ((periphclk != LL_RCC_PERIPH_FREQUENCY_NO)
368 && (USART_InitStruct->BaudRate != 0U))
369 {
370 status = SUCCESS;
371 LL_USART_SetBaudRate(USARTx,
372 periphclk,
373 USART_InitStruct->OverSampling,
374 USART_InitStruct->BaudRate);
375
376 /* Check BRR is greater than or equal to 16d */
377 assert_param(IS_LL_USART_BRR_MIN(USARTx->BRR));
378
379 /* Check BRR is greater than or equal to 16d */
380 assert_param(IS_LL_USART_BRR_MAX(USARTx->BRR));
381 }
382 }
383 /* Endif (=> USART not in Disabled state => return ERROR) */
384
385 return (status);
386 }
387
388 /**
389 * @brief Set each @ref LL_USART_InitTypeDef field to default value.
390 * @param USART_InitStruct Pointer to a @ref LL_USART_InitTypeDef structure
391 * whose fields will be set to default values.
392 * @retval None
393 */
394
LL_USART_StructInit(LL_USART_InitTypeDef * USART_InitStruct)395 void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct)
396 {
397 /* Set USART_InitStruct fields to default values */
398 USART_InitStruct->BaudRate = 9600U;
399 USART_InitStruct->DataWidth = LL_USART_DATAWIDTH_8B;
400 USART_InitStruct->StopBits = LL_USART_STOPBITS_1;
401 USART_InitStruct->Parity = LL_USART_PARITY_NONE ;
402 USART_InitStruct->TransferDirection = LL_USART_DIRECTION_TX_RX;
403 USART_InitStruct->HardwareFlowControl = LL_USART_HWCONTROL_NONE;
404 USART_InitStruct->OverSampling = LL_USART_OVERSAMPLING_16;
405 }
406
407 /**
408 * @brief Initialize USART Clock related settings according to the
409 * specified parameters in the USART_ClockInitStruct.
410 * @note As some bits in USART configuration registers can only be written when the USART is disabled (USART_CR1_UE bit =0),
411 * USART IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
412 * @param USARTx USART Instance
413 * @param USART_ClockInitStruct Pointer to a @ref LL_USART_ClockInitTypeDef structure
414 * that contains the Clock configuration information for the specified USART peripheral.
415 * @retval An ErrorStatus enumeration value:
416 * - SUCCESS: USART registers related to Clock settings are initialized according to USART_ClockInitStruct content
417 * - ERROR: Problem occurred during USART Registers initialization
418 */
LL_USART_ClockInit(USART_TypeDef * USARTx,LL_USART_ClockInitTypeDef * USART_ClockInitStruct)419 ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
420 {
421 ErrorStatus status = SUCCESS;
422
423 /* Check USART Instance and Clock signal output parameters */
424 assert_param(IS_UART_INSTANCE(USARTx));
425 assert_param(IS_LL_USART_CLOCKOUTPUT(USART_ClockInitStruct->ClockOutput));
426
427 /* USART needs to be in disabled state, in order to be able to configure some bits in
428 CRx registers */
429 if (LL_USART_IsEnabled(USARTx) == 0U)
430 {
431 /*---------------------------- USART CR2 Configuration -----------------------*/
432 /* If Clock signal has to be output */
433 if (USART_ClockInitStruct->ClockOutput == LL_USART_CLOCK_DISABLE)
434 {
435 /* Deactivate Clock signal delivery :
436 * - Disable Clock Output: USART_CR2_CLKEN cleared
437 */
438 LL_USART_DisableSCLKOutput(USARTx);
439 }
440 else
441 {
442 /* Ensure USART instance is USART capable */
443 assert_param(IS_USART_INSTANCE(USARTx));
444
445 /* Check clock related parameters */
446 assert_param(IS_LL_USART_CLOCKPOLARITY(USART_ClockInitStruct->ClockPolarity));
447 assert_param(IS_LL_USART_CLOCKPHASE(USART_ClockInitStruct->ClockPhase));
448 assert_param(IS_LL_USART_LASTBITCLKOUTPUT(USART_ClockInitStruct->LastBitClockPulse));
449
450 /*---------------------------- USART CR2 Configuration -----------------------
451 * Configure USARTx CR2 (Clock signal related bits) with parameters:
452 * - Enable Clock Output: USART_CR2_CLKEN set
453 * - Clock Polarity: USART_CR2_CPOL bit according to USART_ClockInitStruct->ClockPolarity value
454 * - Clock Phase: USART_CR2_CPHA bit according to USART_ClockInitStruct->ClockPhase value
455 * - Last Bit Clock Pulse Output: USART_CR2_LBCL bit according to USART_ClockInitStruct->LastBitClockPulse value.
456 */
457 MODIFY_REG(USARTx->CR2,
458 USART_CR2_CLKEN | USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL,
459 USART_CR2_CLKEN | USART_ClockInitStruct->ClockPolarity |
460 USART_ClockInitStruct->ClockPhase | USART_ClockInitStruct->LastBitClockPulse);
461 }
462 }
463 /* Else (USART not in Disabled state => return ERROR */
464 else
465 {
466 status = ERROR;
467 }
468
469 return (status);
470 }
471
472 /**
473 * @brief Set each field of a @ref LL_USART_ClockInitTypeDef type structure to default value.
474 * @param USART_ClockInitStruct Pointer to a @ref LL_USART_ClockInitTypeDef structure
475 * whose fields will be set to default values.
476 * @retval None
477 */
LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef * USART_ClockInitStruct)478 void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
479 {
480 /* Set LL_USART_ClockInitStruct fields with default values */
481 USART_ClockInitStruct->ClockOutput = LL_USART_CLOCK_DISABLE;
482 USART_ClockInitStruct->ClockPolarity = LL_USART_POLARITY_LOW; /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
483 USART_ClockInitStruct->ClockPhase = LL_USART_PHASE_1EDGE; /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
484 USART_ClockInitStruct->LastBitClockPulse = LL_USART_LASTCLKPULSE_NO_OUTPUT; /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
485 }
486
487 /**
488 * @}
489 */
490
491 /**
492 * @}
493 */
494
495 /**
496 * @}
497 */
498
499 #endif /* USART1 || USART2 || USART3 || USART6 || UART4 || UART5 || UART7 || UART8 || UART9 || UART10 */
500
501 /**
502 * @}
503 */
504
505 #endif /* USE_FULL_LL_DRIVER */
506
507 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
508
509