1 /**
2 ******************************************************************************
3 * @file stm32f4xx_hal_lptim.c
4 * @author MCD Application Team
5 * @brief LPTIM HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of the Low Power Timer (LPTIM) peripheral:
8 * + Initialization and de-initialization functions.
9 * + Start/Stop operation functions in polling mode.
10 * + Start/Stop operation functions in interrupt mode.
11 * + Reading operation functions.
12 * + Peripheral State functions.
13 *
14 @verbatim
15 ==============================================================================
16 ##### How to use this driver #####
17 ==============================================================================
18 [..]
19 The LPTIM HAL driver can be used as follows:
20
21 (#)Initialize the LPTIM low level resources by implementing the
22 HAL_LPTIM_MspInit():
23 (++) Enable the LPTIM interface clock using __HAL_RCC_LPTIMx_CLK_ENABLE().
24 (++) In case of using interrupts (e.g. HAL_LPTIM_PWM_Start_IT()):
25 (+++) Configure the LPTIM interrupt priority using HAL_NVIC_SetPriority().
26 (+++) Enable the LPTIM IRQ handler using HAL_NVIC_EnableIRQ().
27 (+++) In LPTIM IRQ handler, call HAL_LPTIM_IRQHandler().
28
29 (#)Initialize the LPTIM HAL using HAL_LPTIM_Init(). This function
30 configures mainly:
31 (++) The instance: LPTIM1.
32 (++) Clock: the counter clock.
33 (+++) Source : it can be either the ULPTIM input (IN1) or one of
34 the internal clock; (APB, LSE or LSI).
35 (+++) Prescaler: select the clock divider.
36 (++) UltraLowPowerClock : To be used only if the ULPTIM is selected
37 as counter clock source.
38 (+++) Polarity: polarity of the active edge for the counter unit
39 if the ULPTIM input is selected.
40 (+++) SampleTime: clock sampling time to configure the clock glitch
41 filter.
42 (++) Trigger: How the counter start.
43 (+++) Source: trigger can be software or one of the hardware triggers.
44 (+++) ActiveEdge : only for hardware trigger.
45 (+++) SampleTime : trigger sampling time to configure the trigger
46 glitch filter.
47 (++) OutputPolarity : 2 opposite polarities are possible.
48 (++) UpdateMode: specifies whether the update of the autoreload and
49 the compare values is done immediately or after the end of current
50 period.
51
52 (#)Six modes are available:
53
54 (++) PWM Mode: To generate a PWM signal with specified period and pulse,
55 call HAL_LPTIM_PWM_Start() or HAL_LPTIM_PWM_Start_IT() for interruption
56 mode.
57
58 (++) One Pulse Mode: To generate pulse with specified width in response
59 to a stimulus, call HAL_LPTIM_OnePulse_Start() or
60 HAL_LPTIM_OnePulse_Start_IT() for interruption mode.
61
62 (++) Set once Mode: In this mode, the output changes the level (from
63 low level to high level if the output polarity is configured high, else
64 the opposite) when a compare match occurs. To start this mode, call
65 HAL_LPTIM_SetOnce_Start() or HAL_LPTIM_SetOnce_Start_IT() for
66 interruption mode.
67
68 (++) Encoder Mode: To use the encoder interface call
69 HAL_LPTIM_Encoder_Start() or HAL_LPTIM_Encoder_Start_IT() for
70 interruption mode. Only available for LPTIM1 instance.
71
72 (++) Time out Mode: an active edge on one selected trigger input rests
73 the counter. The first trigger event will start the timer, any
74 successive trigger event will reset the counter and the timer will
75 restart. To start this mode call HAL_LPTIM_TimeOut_Start_IT() or
76 HAL_LPTIM_TimeOut_Start_IT() for interruption mode.
77
78 (++) Counter Mode: counter can be used to count external events on
79 the LPTIM Input1 or it can be used to count internal clock cycles.
80 To start this mode, call HAL_LPTIM_Counter_Start() or
81 HAL_LPTIM_Counter_Start_IT() for interruption mode.
82
83
84 (#) User can stop any process by calling the corresponding API:
85 HAL_LPTIM_Xxx_Stop() or HAL_LPTIM_Xxx_Stop_IT() if the process is
86 already started in interruption mode.
87
88 (#) De-initialize the LPTIM peripheral using HAL_LPTIM_DeInit().
89
90 *** Callback registration ***
91 =============================================
92 [..]
93 The compilation define USE_HAL_LPTIM_REGISTER_CALLBACKS when set to 1
94 allows the user to configure dynamically the driver callbacks.
95 [..]
96 Use Function @ref HAL_LPTIM_RegisterCallback() to register a callback.
97 @ref HAL_LPTIM_RegisterCallback() takes as parameters the HAL peripheral handle,
98 the Callback ID and a pointer to the user callback function.
99 [..]
100 Use function @ref HAL_LPTIM_UnRegisterCallback() to reset a callback to the
101 default weak function.
102 @ref HAL_LPTIM_UnRegisterCallback takes as parameters the HAL peripheral handle,
103 and the Callback ID.
104 [..]
105 These functions allow to register/unregister following callbacks:
106
107 (+) MspInitCallback : LPTIM Base Msp Init Callback.
108 (+) MspDeInitCallback : LPTIM Base Msp DeInit Callback.
109 (+) CompareMatchCallback : Compare match Callback.
110 (+) AutoReloadMatchCallback : Auto-reload match Callback.
111 (+) TriggerCallback : External trigger event detection Callback.
112 (+) CompareWriteCallback : Compare register write complete Callback.
113 (+) AutoReloadWriteCallback : Auto-reload register write complete Callback.
114 (+) DirectionUpCallback : Up-counting direction change Callback.
115 (+) DirectionDownCallback : Down-counting direction change Callback.
116
117 [..]
118 By default, after the Init and when the state is HAL_LPTIM_STATE_RESET
119 all interrupt callbacks are set to the corresponding weak functions:
120 examples @ref HAL_LPTIM_TriggerCallback(), @ref HAL_LPTIM_CompareMatchCallback().
121
122 [..]
123 Exception done for MspInit and MspDeInit functions that are reset to the legacy weak
124 functionalities in the Init/DeInit only when these callbacks are null
125 (not registered beforehand). If not, MspInit or MspDeInit are not null, the Init/DeInit
126 keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
127
128 [..]
129 Callbacks can be registered/unregistered in HAL_LPTIM_STATE_READY state only.
130 Exception done MspInit/MspDeInit that can be registered/unregistered
131 in HAL_LPTIM_STATE_READY or HAL_LPTIM_STATE_RESET state,
132 thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
133 In that case first register the MspInit/MspDeInit user callbacks
134 using @ref HAL_LPTIM_RegisterCallback() before calling DeInit or Init function.
135
136 [..]
137 When The compilation define USE_HAL_LPTIM_REGISTER_CALLBACKS is set to 0 or
138 not defined, the callback registration feature is not available and all callbacks
139 are set to the corresponding weak functions.
140
141 @endverbatim
142 ******************************************************************************
143 * @attention
144 *
145 * <h2><center>© Copyright (c) 2016 STMicroelectronics.
146 * All rights reserved.</center></h2>
147 *
148 * This software component is licensed by ST under BSD 3-Clause license,
149 * the "License"; You may not use this file except in compliance with the
150 * License. You may obtain a copy of the License at:
151 * opensource.org/licenses/BSD-3-Clause
152 *
153 ******************************************************************************
154 */
155
156 /* Includes ------------------------------------------------------------------*/
157 #include "stm32f4xx_hal.h"
158
159 /** @addtogroup STM32F4xx_HAL_Driver
160 * @{
161 */
162
163 /** @defgroup LPTIM LPTIM
164 * @brief LPTIM HAL module driver.
165 * @{
166 */
167
168 #ifdef HAL_LPTIM_MODULE_ENABLED
169
170 #if defined (LPTIM1)
171
172 /* Private typedef -----------------------------------------------------------*/
173 /* Private define ------------------------------------------------------------*/
174 /** @addtogroup LPTIM_Private_Constants
175 * @{
176 */
177 #define TIMEOUT 1000UL /* Timeout is 1s */
178 /**
179 * @}
180 */
181
182 /* Private macro -------------------------------------------------------------*/
183 /* Private variables ---------------------------------------------------------*/
184 /* Private function prototypes -----------------------------------------------*/
185 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
186 static void LPTIM_ResetCallback(LPTIM_HandleTypeDef *lptim);
187 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
188 static HAL_StatusTypeDef LPTIM_WaitForFlag(LPTIM_HandleTypeDef *hlptim, uint32_t flag);
189
190 /* Exported functions --------------------------------------------------------*/
191
192 /** @defgroup LPTIM_Exported_Functions LPTIM Exported Functions
193 * @{
194 */
195
196 /** @defgroup LPTIM_Exported_Functions_Group1 Initialization/de-initialization functions
197 * @brief Initialization and Configuration functions.
198 *
199 @verbatim
200 ==============================================================================
201 ##### Initialization and de-initialization functions #####
202 ==============================================================================
203 [..] This section provides functions allowing to:
204 (+) Initialize the LPTIM according to the specified parameters in the
205 LPTIM_InitTypeDef and initialize the associated handle.
206 (+) DeInitialize the LPTIM peripheral.
207 (+) Initialize the LPTIM MSP.
208 (+) DeInitialize the LPTIM MSP.
209
210 @endverbatim
211 * @{
212 */
213
214 /**
215 * @brief Initialize the LPTIM according to the specified parameters in the
216 * LPTIM_InitTypeDef and initialize the associated handle.
217 * @param hlptim LPTIM handle
218 * @retval HAL status
219 */
HAL_LPTIM_Init(LPTIM_HandleTypeDef * hlptim)220 HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim)
221 {
222 uint32_t tmpcfgr;
223
224 /* Check the LPTIM handle allocation */
225 if (hlptim == NULL)
226 {
227 return HAL_ERROR;
228 }
229
230 /* Check the parameters */
231 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
232
233 assert_param(IS_LPTIM_CLOCK_SOURCE(hlptim->Init.Clock.Source));
234 assert_param(IS_LPTIM_CLOCK_PRESCALER(hlptim->Init.Clock.Prescaler));
235 if ((hlptim->Init.Clock.Source) == LPTIM_CLOCKSOURCE_ULPTIM)
236 {
237 assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
238 assert_param(IS_LPTIM_CLOCK_SAMPLE_TIME(hlptim->Init.UltraLowPowerClock.SampleTime));
239 }
240 assert_param(IS_LPTIM_TRG_SOURCE(hlptim->Init.Trigger.Source));
241 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
242 {
243 assert_param(IS_LPTIM_TRIG_SAMPLE_TIME(hlptim->Init.Trigger.SampleTime));
244 assert_param(IS_LPTIM_EXT_TRG_POLARITY(hlptim->Init.Trigger.ActiveEdge));
245 }
246 assert_param(IS_LPTIM_OUTPUT_POLARITY(hlptim->Init.OutputPolarity));
247 assert_param(IS_LPTIM_UPDATE_MODE(hlptim->Init.UpdateMode));
248 assert_param(IS_LPTIM_COUNTER_SOURCE(hlptim->Init.CounterSource));
249
250 if (hlptim->State == HAL_LPTIM_STATE_RESET)
251 {
252 /* Allocate lock resource and initialize it */
253 hlptim->Lock = HAL_UNLOCKED;
254
255 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
256 /* Reset interrupt callbacks to legacy weak callbacks */
257 LPTIM_ResetCallback(hlptim);
258
259 if (hlptim->MspInitCallback == NULL)
260 {
261 hlptim->MspInitCallback = HAL_LPTIM_MspInit;
262 }
263
264 /* Init the low level hardware : GPIO, CLOCK, NVIC */
265 hlptim->MspInitCallback(hlptim);
266 #else
267 /* Init the low level hardware : GPIO, CLOCK, NVIC */
268 HAL_LPTIM_MspInit(hlptim);
269 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
270 }
271
272 /* Change the LPTIM state */
273 hlptim->State = HAL_LPTIM_STATE_BUSY;
274
275 /* Get the LPTIMx CFGR value */
276 tmpcfgr = hlptim->Instance->CFGR;
277
278 if (((hlptim->Init.Clock.Source) == LPTIM_CLOCKSOURCE_ULPTIM) || ((hlptim->Init.CounterSource) == LPTIM_COUNTERSOURCE_EXTERNAL))
279 {
280 tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKPOL | LPTIM_CFGR_CKFLT));
281 }
282 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
283 {
284 tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_TRGFLT | LPTIM_CFGR_TRIGSEL));
285 }
286
287 /* Clear CKSEL, CKPOL, PRESC, TRIGEN, TRGFLT, WAVPOL, PRELOAD & COUNTMODE bits */
288 tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKSEL | LPTIM_CFGR_CKPOL | LPTIM_CFGR_TRIGEN | LPTIM_CFGR_PRELOAD |
289 LPTIM_CFGR_WAVPOL | LPTIM_CFGR_PRESC | LPTIM_CFGR_COUNTMODE));
290
291 /* Set initialization parameters */
292 tmpcfgr |= (hlptim->Init.Clock.Source |
293 hlptim->Init.Clock.Prescaler |
294 hlptim->Init.OutputPolarity |
295 hlptim->Init.UpdateMode |
296 hlptim->Init.CounterSource);
297
298 if (((hlptim->Init.Clock.Source) == LPTIM_CLOCKSOURCE_ULPTIM) || ((hlptim->Init.CounterSource) == LPTIM_COUNTERSOURCE_EXTERNAL))
299 {
300 tmpcfgr |= (hlptim->Init.UltraLowPowerClock.Polarity |
301 hlptim->Init.UltraLowPowerClock.SampleTime);
302 }
303
304 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
305 {
306 /* Enable External trigger and set the trigger source */
307 tmpcfgr |= (hlptim->Init.Trigger.Source |
308 hlptim->Init.Trigger.ActiveEdge |
309 hlptim->Init.Trigger.SampleTime);
310 }
311
312 /* Write to LPTIMx CFGR */
313 hlptim->Instance->CFGR = tmpcfgr;
314
315 /* Change the LPTIM state */
316 hlptim->State = HAL_LPTIM_STATE_READY;
317
318 /* Return function status */
319 return HAL_OK;
320 }
321
322 /**
323 * @brief DeInitialize the LPTIM peripheral.
324 * @param hlptim LPTIM handle
325 * @retval HAL status
326 */
HAL_LPTIM_DeInit(LPTIM_HandleTypeDef * hlptim)327 HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim)
328 {
329 /* Check the LPTIM handle allocation */
330 if (hlptim == NULL)
331 {
332 return HAL_ERROR;
333 }
334
335 /* Change the LPTIM state */
336 hlptim->State = HAL_LPTIM_STATE_BUSY;
337
338 /* Disable the LPTIM Peripheral Clock */
339 __HAL_LPTIM_DISABLE(hlptim);
340
341 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
342 {
343 return HAL_TIMEOUT;
344 }
345
346 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
347 if (hlptim->MspDeInitCallback == NULL)
348 {
349 hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit;
350 }
351
352 /* DeInit the low level hardware: CLOCK, NVIC.*/
353 hlptim->MspDeInitCallback(hlptim);
354 #else
355 /* DeInit the low level hardware: CLOCK, NVIC.*/
356 HAL_LPTIM_MspDeInit(hlptim);
357 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
358
359 /* Change the LPTIM state */
360 hlptim->State = HAL_LPTIM_STATE_RESET;
361
362 /* Release Lock */
363 __HAL_UNLOCK(hlptim);
364
365 /* Return function status */
366 return HAL_OK;
367 }
368
369 /**
370 * @brief Initialize the LPTIM MSP.
371 * @param hlptim LPTIM handle
372 * @retval None
373 */
HAL_LPTIM_MspInit(LPTIM_HandleTypeDef * hlptim)374 __weak void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim)
375 {
376 /* Prevent unused argument(s) compilation warning */
377 UNUSED(hlptim);
378
379 /* NOTE : This function should not be modified, when the callback is needed,
380 the HAL_LPTIM_MspInit could be implemented in the user file
381 */
382 }
383
384 /**
385 * @brief DeInitialize LPTIM MSP.
386 * @param hlptim LPTIM handle
387 * @retval None
388 */
HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef * hlptim)389 __weak void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim)
390 {
391 /* Prevent unused argument(s) compilation warning */
392 UNUSED(hlptim);
393
394 /* NOTE : This function should not be modified, when the callback is needed,
395 the HAL_LPTIM_MspDeInit could be implemented in the user file
396 */
397 }
398
399 /**
400 * @}
401 */
402
403 /** @defgroup LPTIM_Exported_Functions_Group2 LPTIM Start-Stop operation functions
404 * @brief Start-Stop operation functions.
405 *
406 @verbatim
407 ==============================================================================
408 ##### LPTIM Start Stop operation functions #####
409 ==============================================================================
410 [..] This section provides functions allowing to:
411 (+) Start the PWM mode.
412 (+) Stop the PWM mode.
413 (+) Start the One pulse mode.
414 (+) Stop the One pulse mode.
415 (+) Start the Set once mode.
416 (+) Stop the Set once mode.
417 (+) Start the Encoder mode.
418 (+) Stop the Encoder mode.
419 (+) Start the Timeout mode.
420 (+) Stop the Timeout mode.
421 (+) Start the Counter mode.
422 (+) Stop the Counter mode.
423
424
425 @endverbatim
426 * @{
427 */
428
429 /**
430 * @brief Start the LPTIM PWM generation.
431 * @param hlptim LPTIM handle
432 * @param Period Specifies the Autoreload value.
433 * This parameter must be a value between 0x0000 and 0xFFFF.
434 * @param Pulse Specifies the compare value.
435 * This parameter must be a value between 0x0000 and 0xFFFF.
436 * @retval HAL status
437 */
HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)438 HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
439 {
440 /* Check the parameters */
441 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
442 assert_param(IS_LPTIM_PERIOD(Period));
443 assert_param(IS_LPTIM_PULSE(Pulse));
444
445 /* Set the LPTIM state */
446 hlptim->State = HAL_LPTIM_STATE_BUSY;
447
448 /* Reset WAVE bit to set PWM mode */
449 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
450
451 /* Enable the Peripheral */
452 __HAL_LPTIM_ENABLE(hlptim);
453
454 /* Clear flag */
455 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
456
457 /* Load the period value in the autoreload register */
458 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
459
460 /* Wait for the completion of the write operation to the LPTIM_ARR register */
461 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
462 {
463 return HAL_TIMEOUT;
464 }
465
466 /* Clear flag */
467 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
468
469 /* Load the pulse value in the compare register */
470 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
471
472 /* Wait for the completion of the write operation to the LPTIM_CMP register */
473 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
474 {
475 return HAL_TIMEOUT;
476 }
477
478 /* Start timer in continuous mode */
479 __HAL_LPTIM_START_CONTINUOUS(hlptim);
480
481 /* Change the TIM state*/
482 hlptim->State = HAL_LPTIM_STATE_READY;
483
484 /* Return function status */
485 return HAL_OK;
486 }
487
488 /**
489 * @brief Stop the LPTIM PWM generation.
490 * @param hlptim LPTIM handle
491 * @retval HAL status
492 */
HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef * hlptim)493 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim)
494 {
495 /* Check the parameters */
496 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
497
498 /* Set the LPTIM state */
499 hlptim->State = HAL_LPTIM_STATE_BUSY;
500
501 /* Disable the Peripheral */
502 __HAL_LPTIM_DISABLE(hlptim);
503
504 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
505 {
506 return HAL_TIMEOUT;
507 }
508
509 /* Change the TIM state*/
510 hlptim->State = HAL_LPTIM_STATE_READY;
511
512 /* Return function status */
513 return HAL_OK;
514 }
515
516 /**
517 * @brief Start the LPTIM PWM generation in interrupt mode.
518 * @param hlptim LPTIM handle
519 * @param Period Specifies the Autoreload value.
520 * This parameter must be a value between 0x0000 and 0xFFFF
521 * @param Pulse Specifies the compare value.
522 * This parameter must be a value between 0x0000 and 0xFFFF
523 * @retval HAL status
524 */
HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)525 HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
526 {
527 /* Check the parameters */
528 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
529 assert_param(IS_LPTIM_PERIOD(Period));
530 assert_param(IS_LPTIM_PULSE(Pulse));
531
532 /* Set the LPTIM state */
533 hlptim->State = HAL_LPTIM_STATE_BUSY;
534
535 /* Reset WAVE bit to set PWM mode */
536 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
537
538 /* Enable the Peripheral */
539 __HAL_LPTIM_ENABLE(hlptim);
540
541 /* Clear flag */
542 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
543
544 /* Load the period value in the autoreload register */
545 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
546
547 /* Wait for the completion of the write operation to the LPTIM_ARR register */
548 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
549 {
550 return HAL_TIMEOUT;
551 }
552
553 /* Clear flag */
554 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
555
556 /* Load the pulse value in the compare register */
557 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
558
559 /* Wait for the completion of the write operation to the LPTIM_CMP register */
560 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
561 {
562 return HAL_TIMEOUT;
563 }
564
565 /* Disable the Peripheral */
566 __HAL_LPTIM_DISABLE(hlptim);
567
568 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
569 {
570 return HAL_TIMEOUT;
571 }
572
573 /* Enable Autoreload write complete interrupt */
574 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
575
576 /* Enable Compare write complete interrupt */
577 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
578
579 /* Enable Autoreload match interrupt */
580 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
581
582 /* Enable Compare match interrupt */
583 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
584
585 /* If external trigger source is used, then enable external trigger interrupt */
586 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
587 {
588 /* Enable external trigger interrupt */
589 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
590 }
591
592 /* Enable the Peripheral */
593 __HAL_LPTIM_ENABLE(hlptim);
594
595 /* Start timer in continuous mode */
596 __HAL_LPTIM_START_CONTINUOUS(hlptim);
597
598 /* Change the TIM state*/
599 hlptim->State = HAL_LPTIM_STATE_READY;
600
601 /* Return function status */
602 return HAL_OK;
603 }
604
605 /**
606 * @brief Stop the LPTIM PWM generation in interrupt mode.
607 * @param hlptim LPTIM handle
608 * @retval HAL status
609 */
HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef * hlptim)610 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim)
611 {
612 /* Check the parameters */
613 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
614
615 /* Set the LPTIM state */
616 hlptim->State = HAL_LPTIM_STATE_BUSY;
617
618 /* Disable the Peripheral */
619 __HAL_LPTIM_DISABLE(hlptim);
620
621 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
622 {
623 return HAL_TIMEOUT;
624 }
625
626 /* Disable Autoreload write complete interrupt */
627 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
628
629 /* Disable Compare write complete interrupt */
630 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
631
632 /* Disable Autoreload match interrupt */
633 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
634
635 /* Disable Compare match interrupt */
636 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
637
638 /* If external trigger source is used, then disable external trigger interrupt */
639 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
640 {
641 /* Disable external trigger interrupt */
642 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
643 }
644
645 /* Change the TIM state*/
646 hlptim->State = HAL_LPTIM_STATE_READY;
647
648 /* Return function status */
649 return HAL_OK;
650 }
651
652 /**
653 * @brief Start the LPTIM One pulse generation.
654 * @param hlptim LPTIM handle
655 * @param Period Specifies the Autoreload value.
656 * This parameter must be a value between 0x0000 and 0xFFFF.
657 * @param Pulse Specifies the compare value.
658 * This parameter must be a value between 0x0000 and 0xFFFF.
659 * @retval HAL status
660 */
HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)661 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
662 {
663 /* Check the parameters */
664 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
665 assert_param(IS_LPTIM_PERIOD(Period));
666 assert_param(IS_LPTIM_PULSE(Pulse));
667
668 /* Set the LPTIM state */
669 hlptim->State = HAL_LPTIM_STATE_BUSY;
670
671 /* Reset WAVE bit to set one pulse mode */
672 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
673
674 /* Enable the Peripheral */
675 __HAL_LPTIM_ENABLE(hlptim);
676
677 /* Clear flag */
678 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
679
680 /* Load the period value in the autoreload register */
681 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
682
683 /* Wait for the completion of the write operation to the LPTIM_ARR register */
684 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
685 {
686 return HAL_TIMEOUT;
687 }
688
689 /* Clear flag */
690 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
691
692 /* Load the pulse value in the compare register */
693 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
694
695 /* Wait for the completion of the write operation to the LPTIM_CMP register */
696 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
697 {
698 return HAL_TIMEOUT;
699 }
700
701 /* Start timer in single (one shot) mode */
702 __HAL_LPTIM_START_SINGLE(hlptim);
703
704 /* Change the TIM state*/
705 hlptim->State = HAL_LPTIM_STATE_READY;
706
707 /* Return function status */
708 return HAL_OK;
709 }
710
711 /**
712 * @brief Stop the LPTIM One pulse generation.
713 * @param hlptim LPTIM handle
714 * @retval HAL status
715 */
HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef * hlptim)716 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef *hlptim)
717 {
718 /* Check the parameters */
719 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
720
721 /* Set the LPTIM state */
722 hlptim->State = HAL_LPTIM_STATE_BUSY;
723
724 /* Disable the Peripheral */
725 __HAL_LPTIM_DISABLE(hlptim);
726
727 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
728 {
729 return HAL_TIMEOUT;
730 }
731
732 /* Change the TIM state*/
733 hlptim->State = HAL_LPTIM_STATE_READY;
734
735 /* Return function status */
736 return HAL_OK;
737 }
738
739 /**
740 * @brief Start the LPTIM One pulse generation in interrupt mode.
741 * @param hlptim LPTIM handle
742 * @param Period Specifies the Autoreload value.
743 * This parameter must be a value between 0x0000 and 0xFFFF.
744 * @param Pulse Specifies the compare value.
745 * This parameter must be a value between 0x0000 and 0xFFFF.
746 * @retval HAL status
747 */
HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)748 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
749 {
750 /* Check the parameters */
751 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
752 assert_param(IS_LPTIM_PERIOD(Period));
753 assert_param(IS_LPTIM_PULSE(Pulse));
754
755 /* Set the LPTIM state */
756 hlptim->State = HAL_LPTIM_STATE_BUSY;
757
758 /* Reset WAVE bit to set one pulse mode */
759 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
760
761 /* Enable the Peripheral */
762 __HAL_LPTIM_ENABLE(hlptim);
763
764 /* Clear flag */
765 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
766
767 /* Load the period value in the autoreload register */
768 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
769
770 /* Wait for the completion of the write operation to the LPTIM_ARR register */
771 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
772 {
773 return HAL_TIMEOUT;
774 }
775
776 /* Clear flag */
777 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
778
779 /* Load the pulse value in the compare register */
780 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
781
782 /* Wait for the completion of the write operation to the LPTIM_CMP register */
783 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
784 {
785 return HAL_TIMEOUT;
786 }
787
788 /* Disable the Peripheral */
789 __HAL_LPTIM_DISABLE(hlptim);
790
791 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
792 {
793 return HAL_TIMEOUT;
794 }
795
796 /* Enable Autoreload write complete interrupt */
797 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
798
799 /* Enable Compare write complete interrupt */
800 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
801
802 /* Enable Autoreload match interrupt */
803 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
804
805 /* Enable Compare match interrupt */
806 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
807
808 /* If external trigger source is used, then enable external trigger interrupt */
809 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
810 {
811 /* Enable external trigger interrupt */
812 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
813 }
814
815 /* Enable the Peripheral */
816 __HAL_LPTIM_ENABLE(hlptim);
817
818 /* Start timer in single (one shot) mode */
819 __HAL_LPTIM_START_SINGLE(hlptim);
820
821 /* Change the TIM state*/
822 hlptim->State = HAL_LPTIM_STATE_READY;
823
824 /* Return function status */
825 return HAL_OK;
826 }
827
828 /**
829 * @brief Stop the LPTIM One pulse generation in interrupt mode.
830 * @param hlptim LPTIM handle
831 * @retval HAL status
832 */
HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef * hlptim)833 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef *hlptim)
834 {
835 /* Check the parameters */
836 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
837
838 /* Set the LPTIM state */
839 hlptim->State = HAL_LPTIM_STATE_BUSY;
840
841 /* Disable the Peripheral */
842 __HAL_LPTIM_DISABLE(hlptim);
843
844 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
845 {
846 return HAL_TIMEOUT;
847 }
848
849 /* Disable Autoreload write complete interrupt */
850 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
851
852 /* Disable Compare write complete interrupt */
853 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
854
855 /* Disable Autoreload match interrupt */
856 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
857
858 /* Disable Compare match interrupt */
859 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
860
861 /* If external trigger source is used, then disable external trigger interrupt */
862 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
863 {
864 /* Disable external trigger interrupt */
865 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
866 }
867
868 /* Change the TIM state*/
869 hlptim->State = HAL_LPTIM_STATE_READY;
870
871 /* Return function status */
872 return HAL_OK;
873 }
874
875 /**
876 * @brief Start the LPTIM in Set once mode.
877 * @param hlptim LPTIM handle
878 * @param Period Specifies the Autoreload value.
879 * This parameter must be a value between 0x0000 and 0xFFFF.
880 * @param Pulse Specifies the compare value.
881 * This parameter must be a value between 0x0000 and 0xFFFF.
882 * @retval HAL status
883 */
HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)884 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
885 {
886 /* Check the parameters */
887 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
888 assert_param(IS_LPTIM_PERIOD(Period));
889 assert_param(IS_LPTIM_PULSE(Pulse));
890
891 /* Set the LPTIM state */
892 hlptim->State = HAL_LPTIM_STATE_BUSY;
893
894 /* Set WAVE bit to enable the set once mode */
895 hlptim->Instance->CFGR |= LPTIM_CFGR_WAVE;
896
897 /* Enable the Peripheral */
898 __HAL_LPTIM_ENABLE(hlptim);
899
900 /* Clear flag */
901 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
902
903 /* Load the period value in the autoreload register */
904 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
905
906 /* Wait for the completion of the write operation to the LPTIM_ARR register */
907 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
908 {
909 return HAL_TIMEOUT;
910 }
911
912 /* Clear flag */
913 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
914
915 /* Load the pulse value in the compare register */
916 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
917
918 /* Wait for the completion of the write operation to the LPTIM_CMP register */
919 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
920 {
921 return HAL_TIMEOUT;
922 }
923
924 /* Start timer in single (one shot) mode */
925 __HAL_LPTIM_START_SINGLE(hlptim);
926
927 /* Change the TIM state*/
928 hlptim->State = HAL_LPTIM_STATE_READY;
929
930 /* Return function status */
931 return HAL_OK;
932 }
933
934 /**
935 * @brief Stop the LPTIM Set once mode.
936 * @param hlptim LPTIM handle
937 * @retval HAL status
938 */
HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef * hlptim)939 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim)
940 {
941 /* Check the parameters */
942 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
943
944 /* Set the LPTIM state */
945 hlptim->State = HAL_LPTIM_STATE_BUSY;
946
947 /* Disable the Peripheral */
948 __HAL_LPTIM_DISABLE(hlptim);
949
950 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
951 {
952 return HAL_TIMEOUT;
953 }
954
955 /* Change the TIM state*/
956 hlptim->State = HAL_LPTIM_STATE_READY;
957
958 /* Return function status */
959 return HAL_OK;
960 }
961
962 /**
963 * @brief Start the LPTIM Set once mode in interrupt mode.
964 * @param hlptim LPTIM handle
965 * @param Period Specifies the Autoreload value.
966 * This parameter must be a value between 0x0000 and 0xFFFF.
967 * @param Pulse Specifies the compare value.
968 * This parameter must be a value between 0x0000 and 0xFFFF.
969 * @retval HAL status
970 */
HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Pulse)971 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
972 {
973 /* Check the parameters */
974 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
975 assert_param(IS_LPTIM_PERIOD(Period));
976 assert_param(IS_LPTIM_PULSE(Pulse));
977
978 /* Set the LPTIM state */
979 hlptim->State = HAL_LPTIM_STATE_BUSY;
980
981 /* Set WAVE bit to enable the set once mode */
982 hlptim->Instance->CFGR |= LPTIM_CFGR_WAVE;
983
984 /* Enable the Peripheral */
985 __HAL_LPTIM_ENABLE(hlptim);
986
987 /* Clear flag */
988 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
989
990 /* Load the period value in the autoreload register */
991 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
992
993 /* Wait for the completion of the write operation to the LPTIM_ARR register */
994 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
995 {
996 return HAL_TIMEOUT;
997 }
998
999 /* Clear flag */
1000 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1001
1002 /* Load the pulse value in the compare register */
1003 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
1004
1005 /* Wait for the completion of the write operation to the LPTIM_CMP register */
1006 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
1007 {
1008 return HAL_TIMEOUT;
1009 }
1010
1011 /* Disable the Peripheral */
1012 __HAL_LPTIM_DISABLE(hlptim);
1013
1014 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1015 {
1016 return HAL_TIMEOUT;
1017 }
1018
1019 /* Enable Autoreload write complete interrupt */
1020 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
1021
1022 /* Enable Compare write complete interrupt */
1023 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
1024
1025 /* Enable Autoreload match interrupt */
1026 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
1027
1028 /* Enable Compare match interrupt */
1029 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
1030
1031 /* If external trigger source is used, then enable external trigger interrupt */
1032 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
1033 {
1034 /* Enable external trigger interrupt */
1035 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
1036 }
1037
1038 /* Enable the Peripheral */
1039 __HAL_LPTIM_ENABLE(hlptim);
1040
1041 /* Start timer in single (one shot) mode */
1042 __HAL_LPTIM_START_SINGLE(hlptim);
1043
1044 /* Change the TIM state*/
1045 hlptim->State = HAL_LPTIM_STATE_READY;
1046
1047 /* Return function status */
1048 return HAL_OK;
1049 }
1050
1051 /**
1052 * @brief Stop the LPTIM Set once mode in interrupt mode.
1053 * @param hlptim LPTIM handle
1054 * @retval HAL status
1055 */
HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef * hlptim)1056 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1057 {
1058 /* Check the parameters */
1059 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1060
1061 /* Set the LPTIM state */
1062 hlptim->State = HAL_LPTIM_STATE_BUSY;
1063
1064 /* Disable the Peripheral */
1065 __HAL_LPTIM_DISABLE(hlptim);
1066
1067 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1068 {
1069 return HAL_TIMEOUT;
1070 }
1071
1072 /* Disable Autoreload write complete interrupt */
1073 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
1074
1075 /* Disable Compare write complete interrupt */
1076 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
1077
1078 /* Disable Autoreload match interrupt */
1079 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
1080
1081 /* Disable Compare match interrupt */
1082 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
1083
1084 /* If external trigger source is used, then disable external trigger interrupt */
1085 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
1086 {
1087 /* Disable external trigger interrupt */
1088 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
1089 }
1090
1091 /* Change the TIM state*/
1092 hlptim->State = HAL_LPTIM_STATE_READY;
1093
1094 /* Return function status */
1095 return HAL_OK;
1096 }
1097
1098 /**
1099 * @brief Start the Encoder interface.
1100 * @param hlptim LPTIM handle
1101 * @param Period Specifies the Autoreload value.
1102 * This parameter must be a value between 0x0000 and 0xFFFF.
1103 * @retval HAL status
1104 */
HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period)1105 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1106 {
1107 uint32_t tmpcfgr;
1108
1109 /* Check the parameters */
1110 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1111 assert_param(IS_LPTIM_PERIOD(Period));
1112 assert_param(hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC);
1113 assert_param(hlptim->Init.Clock.Prescaler == LPTIM_PRESCALER_DIV1);
1114 assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
1115
1116 /* Set the LPTIM state */
1117 hlptim->State = HAL_LPTIM_STATE_BUSY;
1118
1119 /* Get the LPTIMx CFGR value */
1120 tmpcfgr = hlptim->Instance->CFGR;
1121
1122 /* Clear CKPOL bits */
1123 tmpcfgr &= (uint32_t)(~LPTIM_CFGR_CKPOL);
1124
1125 /* Set Input polarity */
1126 tmpcfgr |= hlptim->Init.UltraLowPowerClock.Polarity;
1127
1128 /* Write to LPTIMx CFGR */
1129 hlptim->Instance->CFGR = tmpcfgr;
1130
1131 /* Set ENC bit to enable the encoder interface */
1132 hlptim->Instance->CFGR |= LPTIM_CFGR_ENC;
1133
1134 /* Enable the Peripheral */
1135 __HAL_LPTIM_ENABLE(hlptim);
1136
1137 /* Clear flag */
1138 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1139
1140 /* Load the period value in the autoreload register */
1141 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1142
1143 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1144 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1145 {
1146 return HAL_TIMEOUT;
1147 }
1148
1149 /* Start timer in continuous mode */
1150 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1151
1152 /* Change the TIM state*/
1153 hlptim->State = HAL_LPTIM_STATE_READY;
1154
1155 /* Return function status */
1156 return HAL_OK;
1157 }
1158
1159 /**
1160 * @brief Stop the Encoder interface.
1161 * @param hlptim LPTIM handle
1162 * @retval HAL status
1163 */
HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef * hlptim)1164 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef *hlptim)
1165 {
1166 /* Check the parameters */
1167 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1168
1169 /* Set the LPTIM state */
1170 hlptim->State = HAL_LPTIM_STATE_BUSY;
1171
1172 /* Disable the Peripheral */
1173 __HAL_LPTIM_DISABLE(hlptim);
1174
1175 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1176 {
1177 return HAL_TIMEOUT;
1178 }
1179
1180 /* Reset ENC bit to disable the encoder interface */
1181 hlptim->Instance->CFGR &= ~LPTIM_CFGR_ENC;
1182
1183 /* Change the TIM state*/
1184 hlptim->State = HAL_LPTIM_STATE_READY;
1185
1186 /* Return function status */
1187 return HAL_OK;
1188 }
1189
1190 /**
1191 * @brief Start the Encoder interface in interrupt mode.
1192 * @param hlptim LPTIM handle
1193 * @param Period Specifies the Autoreload value.
1194 * This parameter must be a value between 0x0000 and 0xFFFF.
1195 * @retval HAL status
1196 */
HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period)1197 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1198 {
1199 uint32_t tmpcfgr;
1200
1201 /* Check the parameters */
1202 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1203 assert_param(IS_LPTIM_PERIOD(Period));
1204 assert_param(hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC);
1205 assert_param(hlptim->Init.Clock.Prescaler == LPTIM_PRESCALER_DIV1);
1206 assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
1207
1208 /* Set the LPTIM state */
1209 hlptim->State = HAL_LPTIM_STATE_BUSY;
1210
1211 /* Configure edge sensitivity for encoder mode */
1212 /* Get the LPTIMx CFGR value */
1213 tmpcfgr = hlptim->Instance->CFGR;
1214
1215 /* Clear CKPOL bits */
1216 tmpcfgr &= (uint32_t)(~LPTIM_CFGR_CKPOL);
1217
1218 /* Set Input polarity */
1219 tmpcfgr |= hlptim->Init.UltraLowPowerClock.Polarity;
1220
1221 /* Write to LPTIMx CFGR */
1222 hlptim->Instance->CFGR = tmpcfgr;
1223
1224 /* Set ENC bit to enable the encoder interface */
1225 hlptim->Instance->CFGR |= LPTIM_CFGR_ENC;
1226
1227 /* Enable the Peripheral */
1228 __HAL_LPTIM_ENABLE(hlptim);
1229
1230 /* Clear flag */
1231 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1232
1233 /* Load the period value in the autoreload register */
1234 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1235
1236 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1237 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1238 {
1239 return HAL_TIMEOUT;
1240 }
1241
1242 /* Disable the Peripheral */
1243 __HAL_LPTIM_DISABLE(hlptim);
1244
1245 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1246 {
1247 return HAL_TIMEOUT;
1248 }
1249
1250 /* Enable "switch to down direction" interrupt */
1251 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_DOWN);
1252
1253 /* Enable "switch to up direction" interrupt */
1254 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_UP);
1255
1256 /* Enable the Peripheral */
1257 __HAL_LPTIM_ENABLE(hlptim);
1258
1259 /* Start timer in continuous mode */
1260 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1261
1262 /* Change the TIM state*/
1263 hlptim->State = HAL_LPTIM_STATE_READY;
1264
1265 /* Return function status */
1266 return HAL_OK;
1267 }
1268
1269 /**
1270 * @brief Stop the Encoder interface in interrupt mode.
1271 * @param hlptim LPTIM handle
1272 * @retval HAL status
1273 */
HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef * hlptim)1274 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1275 {
1276 /* Check the parameters */
1277 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1278
1279 /* Set the LPTIM state */
1280 hlptim->State = HAL_LPTIM_STATE_BUSY;
1281
1282 /* Disable the Peripheral */
1283 __HAL_LPTIM_DISABLE(hlptim);
1284
1285 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1286 {
1287 return HAL_TIMEOUT;
1288 }
1289
1290 /* Reset ENC bit to disable the encoder interface */
1291 hlptim->Instance->CFGR &= ~LPTIM_CFGR_ENC;
1292
1293 /* Disable "switch to down direction" interrupt */
1294 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_DOWN);
1295
1296 /* Disable "switch to up direction" interrupt */
1297 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_UP);
1298
1299 /* Change the TIM state*/
1300 hlptim->State = HAL_LPTIM_STATE_READY;
1301
1302 /* Return function status */
1303 return HAL_OK;
1304 }
1305
1306 /**
1307 * @brief Start the Timeout function.
1308 * @note The first trigger event will start the timer, any successive
1309 * trigger event will reset the counter and the timer restarts.
1310 * @param hlptim LPTIM handle
1311 * @param Period Specifies the Autoreload value.
1312 * This parameter must be a value between 0x0000 and 0xFFFF.
1313 * @param Timeout Specifies the TimeOut value to reset the counter.
1314 * This parameter must be a value between 0x0000 and 0xFFFF.
1315 * @retval HAL status
1316 */
HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Timeout)1317 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout)
1318 {
1319 /* Check the parameters */
1320 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1321 assert_param(IS_LPTIM_PERIOD(Period));
1322 assert_param(IS_LPTIM_PULSE(Timeout));
1323
1324 /* Set the LPTIM state */
1325 hlptim->State = HAL_LPTIM_STATE_BUSY;
1326
1327 /* Set TIMOUT bit to enable the timeout function */
1328 hlptim->Instance->CFGR |= LPTIM_CFGR_TIMOUT;
1329
1330 /* Enable the Peripheral */
1331 __HAL_LPTIM_ENABLE(hlptim);
1332
1333 /* Clear flag */
1334 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1335
1336 /* Load the period value in the autoreload register */
1337 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1338
1339 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1340 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1341 {
1342 return HAL_TIMEOUT;
1343 }
1344
1345 /* Clear flag */
1346 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1347
1348 /* Load the Timeout value in the compare register */
1349 __HAL_LPTIM_COMPARE_SET(hlptim, Timeout);
1350
1351 /* Wait for the completion of the write operation to the LPTIM_CMP register */
1352 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
1353 {
1354 return HAL_TIMEOUT;
1355 }
1356
1357 /* Start timer in continuous mode */
1358 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1359
1360 /* Change the TIM state*/
1361 hlptim->State = HAL_LPTIM_STATE_READY;
1362
1363 /* Return function status */
1364 return HAL_OK;
1365 }
1366
1367 /**
1368 * @brief Stop the Timeout function.
1369 * @param hlptim LPTIM handle
1370 * @retval HAL status
1371 */
HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef * hlptim)1372 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef *hlptim)
1373 {
1374 /* Check the parameters */
1375 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1376
1377 /* Set the LPTIM state */
1378 hlptim->State = HAL_LPTIM_STATE_BUSY;
1379
1380 /* Disable the Peripheral */
1381 __HAL_LPTIM_DISABLE(hlptim);
1382
1383 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1384 {
1385 return HAL_TIMEOUT;
1386 }
1387
1388 /* Reset TIMOUT bit to enable the timeout function */
1389 hlptim->Instance->CFGR &= ~LPTIM_CFGR_TIMOUT;
1390
1391 /* Change the TIM state*/
1392 hlptim->State = HAL_LPTIM_STATE_READY;
1393
1394 /* Return function status */
1395 return HAL_OK;
1396 }
1397
1398 /**
1399 * @brief Start the Timeout function in interrupt mode.
1400 * @note The first trigger event will start the timer, any successive
1401 * trigger event will reset the counter and the timer restarts.
1402 * @param hlptim LPTIM handle
1403 * @param Period Specifies the Autoreload value.
1404 * This parameter must be a value between 0x0000 and 0xFFFF.
1405 * @param Timeout Specifies the TimeOut value to reset the counter.
1406 * This parameter must be a value between 0x0000 and 0xFFFF.
1407 * @retval HAL status
1408 */
HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period,uint32_t Timeout)1409 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout)
1410 {
1411 /* Check the parameters */
1412 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1413 assert_param(IS_LPTIM_PERIOD(Period));
1414 assert_param(IS_LPTIM_PULSE(Timeout));
1415
1416 /* Set the LPTIM state */
1417 hlptim->State = HAL_LPTIM_STATE_BUSY;
1418
1419 /* Enable EXTI Line interrupt on the LPTIM Wake-up Timer */
1420 __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT();
1421 #if defined(EXTI_IMR_MR23)
1422 /* Enable rising edge trigger on the LPTIM Wake-up Timer Exti line */
1423 __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE();
1424 #endif /* EXTI_IMR_MR23 */
1425
1426 /* Set TIMOUT bit to enable the timeout function */
1427 hlptim->Instance->CFGR |= LPTIM_CFGR_TIMOUT;
1428
1429 /* Enable the Peripheral */
1430 __HAL_LPTIM_ENABLE(hlptim);
1431
1432 /* Clear flag */
1433 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1434
1435 /* Load the period value in the autoreload register */
1436 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1437
1438 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1439 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1440 {
1441 return HAL_TIMEOUT;
1442 }
1443
1444 /* Clear flag */
1445 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1446
1447 /* Load the Timeout value in the compare register */
1448 __HAL_LPTIM_COMPARE_SET(hlptim, Timeout);
1449
1450 /* Wait for the completion of the write operation to the LPTIM_CMP register */
1451 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
1452 {
1453 return HAL_TIMEOUT;
1454 }
1455
1456 /* Disable the Peripheral */
1457 __HAL_LPTIM_DISABLE(hlptim);
1458
1459 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1460 {
1461 return HAL_TIMEOUT;
1462 }
1463
1464 /* Enable Compare match interrupt */
1465 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
1466
1467 /* Enable the Peripheral */
1468 __HAL_LPTIM_ENABLE(hlptim);
1469
1470 /* Start timer in continuous mode */
1471 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1472
1473 /* Change the TIM state*/
1474 hlptim->State = HAL_LPTIM_STATE_READY;
1475
1476 /* Return function status */
1477 return HAL_OK;
1478 }
1479
1480 /**
1481 * @brief Stop the Timeout function in interrupt mode.
1482 * @param hlptim LPTIM handle
1483 * @retval HAL status
1484 */
HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef * hlptim)1485 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1486 {
1487 /* Check the parameters */
1488 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1489
1490 /* Set the LPTIM state */
1491 hlptim->State = HAL_LPTIM_STATE_BUSY;
1492 #if defined(EXTI_IMR_MR23)
1493 /* Disable rising edge trigger on the LPTIM Wake-up Timer Exti line */
1494 __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_RISING_EDGE();
1495 #endif /* EXTI_IMR_MR23 */
1496
1497 /* Disable EXTI Line interrupt on the LPTIM Wake-up Timer */
1498 __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT();
1499
1500 /* Disable the Peripheral */
1501 __HAL_LPTIM_DISABLE(hlptim);
1502
1503 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1504 {
1505 return HAL_TIMEOUT;
1506 }
1507
1508 /* Reset TIMOUT bit to enable the timeout function */
1509 hlptim->Instance->CFGR &= ~LPTIM_CFGR_TIMOUT;
1510
1511 /* Disable Compare match interrupt */
1512 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
1513
1514 /* Change the TIM state*/
1515 hlptim->State = HAL_LPTIM_STATE_READY;
1516
1517 /* Return function status */
1518 return HAL_OK;
1519 }
1520
1521 /**
1522 * @brief Start the Counter mode.
1523 * @param hlptim LPTIM handle
1524 * @param Period Specifies the Autoreload value.
1525 * This parameter must be a value between 0x0000 and 0xFFFF.
1526 * @retval HAL status
1527 */
HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef * hlptim,uint32_t Period)1528 HAL_StatusTypeDef HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1529 {
1530 /* Check the parameters */
1531 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1532 assert_param(IS_LPTIM_PERIOD(Period));
1533
1534 /* Set the LPTIM state */
1535 hlptim->State = HAL_LPTIM_STATE_BUSY;
1536
1537 /* If clock source is not ULPTIM clock and counter source is external, then it must not be prescaled */
1538 if ((hlptim->Init.Clock.Source != LPTIM_CLOCKSOURCE_ULPTIM) && (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
1539 {
1540 /* Check if clock is prescaled */
1541 assert_param(IS_LPTIM_CLOCK_PRESCALERDIV1(hlptim->Init.Clock.Prescaler));
1542 /* Set clock prescaler to 0 */
1543 hlptim->Instance->CFGR &= ~LPTIM_CFGR_PRESC;
1544 }
1545
1546 /* Enable the Peripheral */
1547 __HAL_LPTIM_ENABLE(hlptim);
1548
1549 /* Clear flag */
1550 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1551
1552 /* Load the period value in the autoreload register */
1553 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1554
1555 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1556 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1557 {
1558 return HAL_TIMEOUT;
1559 }
1560
1561 /* Start timer in continuous mode */
1562 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1563
1564 /* Change the TIM state*/
1565 hlptim->State = HAL_LPTIM_STATE_READY;
1566
1567 /* Return function status */
1568 return HAL_OK;
1569 }
1570
1571 /**
1572 * @brief Stop the Counter mode.
1573 * @param hlptim LPTIM handle
1574 * @retval HAL status
1575 */
HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef * hlptim)1576 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef *hlptim)
1577 {
1578 /* Check the parameters */
1579 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1580
1581 /* Set the LPTIM state */
1582 hlptim->State = HAL_LPTIM_STATE_BUSY;
1583
1584 /* Disable the Peripheral */
1585 __HAL_LPTIM_DISABLE(hlptim);
1586
1587 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1588 {
1589 return HAL_TIMEOUT;
1590 }
1591
1592 /* Change the TIM state*/
1593 hlptim->State = HAL_LPTIM_STATE_READY;
1594
1595 /* Return function status */
1596 return HAL_OK;
1597 }
1598
1599 /**
1600 * @brief Start the Counter mode in interrupt mode.
1601 * @param hlptim LPTIM handle
1602 * @param Period Specifies the Autoreload value.
1603 * This parameter must be a value between 0x0000 and 0xFFFF.
1604 * @retval HAL status
1605 */
HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef * hlptim,uint32_t Period)1606 HAL_StatusTypeDef HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1607 {
1608 /* Check the parameters */
1609 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1610 assert_param(IS_LPTIM_PERIOD(Period));
1611
1612 /* Set the LPTIM state */
1613 hlptim->State = HAL_LPTIM_STATE_BUSY;
1614
1615 /* Enable EXTI Line interrupt on the LPTIM Wake-up Timer */
1616 __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT();
1617 #if defined(EXTI_IMR_MR23)
1618 /* Enable rising edge trigger on the LPTIM Wake-up Timer Exti line */
1619 __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE();
1620 #endif /* EXTI_IMR_MR23 */
1621
1622 /* If clock source is not ULPTIM clock and counter source is external, then it must not be prescaled */
1623 if ((hlptim->Init.Clock.Source != LPTIM_CLOCKSOURCE_ULPTIM) && (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
1624 {
1625 /* Check if clock is prescaled */
1626 assert_param(IS_LPTIM_CLOCK_PRESCALERDIV1(hlptim->Init.Clock.Prescaler));
1627 /* Set clock prescaler to 0 */
1628 hlptim->Instance->CFGR &= ~LPTIM_CFGR_PRESC;
1629 }
1630
1631 /* Enable the Peripheral */
1632 __HAL_LPTIM_ENABLE(hlptim);
1633
1634 /* Clear flag */
1635 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1636
1637 /* Load the period value in the autoreload register */
1638 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1639
1640 /* Wait for the completion of the write operation to the LPTIM_ARR register */
1641 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
1642 {
1643 return HAL_TIMEOUT;
1644 }
1645
1646 /* Disable the Peripheral */
1647 __HAL_LPTIM_DISABLE(hlptim);
1648
1649 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1650 {
1651 return HAL_TIMEOUT;
1652 }
1653
1654 /* Enable Autoreload write complete interrupt */
1655 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
1656
1657 /* Enable Autoreload match interrupt */
1658 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
1659
1660 /* Enable the Peripheral */
1661 __HAL_LPTIM_ENABLE(hlptim);
1662
1663 /* Start timer in continuous mode */
1664 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1665
1666 /* Change the TIM state*/
1667 hlptim->State = HAL_LPTIM_STATE_READY;
1668
1669 /* Return function status */
1670 return HAL_OK;
1671 }
1672
1673 /**
1674 * @brief Stop the Counter mode in interrupt mode.
1675 * @param hlptim LPTIM handle
1676 * @retval HAL status
1677 */
HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef * hlptim)1678 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1679 {
1680 /* Check the parameters */
1681 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1682
1683 /* Set the LPTIM state */
1684 hlptim->State = HAL_LPTIM_STATE_BUSY;
1685 #if defined(EXTI_IMR_MR23)
1686 /* Disable rising edge trigger on the LPTIM Wake-up Timer Exti line */
1687 __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_RISING_EDGE();
1688 #endif /* EXTI_IMR_MR23 */
1689
1690 /* Disable EXTI Line interrupt on the LPTIM Wake-up Timer */
1691 __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT();
1692
1693 /* Disable the Peripheral */
1694 __HAL_LPTIM_DISABLE(hlptim);
1695
1696 if (HAL_LPTIM_GetState(hlptim) == HAL_LPTIM_STATE_TIMEOUT)
1697 {
1698 return HAL_TIMEOUT;
1699 }
1700
1701 /* Disable Autoreload write complete interrupt */
1702 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
1703
1704 /* Disable Autoreload match interrupt */
1705 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
1706 /* Change the TIM state*/
1707 hlptim->State = HAL_LPTIM_STATE_READY;
1708
1709 /* Return function status */
1710 return HAL_OK;
1711 }
1712
1713 /**
1714 * @}
1715 */
1716
1717 /** @defgroup LPTIM_Exported_Functions_Group3 LPTIM Read operation functions
1718 * @brief Read operation functions.
1719 *
1720 @verbatim
1721 ==============================================================================
1722 ##### LPTIM Read operation functions #####
1723 ==============================================================================
1724 [..] This section provides LPTIM Reading functions.
1725 (+) Read the counter value.
1726 (+) Read the period (Auto-reload) value.
1727 (+) Read the pulse (Compare)value.
1728 @endverbatim
1729 * @{
1730 */
1731
1732 /**
1733 * @brief Return the current counter value.
1734 * @param hlptim LPTIM handle
1735 * @retval Counter value.
1736 */
HAL_LPTIM_ReadCounter(LPTIM_HandleTypeDef * hlptim)1737 uint32_t HAL_LPTIM_ReadCounter(LPTIM_HandleTypeDef *hlptim)
1738 {
1739 /* Check the parameters */
1740 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1741
1742 return (hlptim->Instance->CNT);
1743 }
1744
1745 /**
1746 * @brief Return the current Autoreload (Period) value.
1747 * @param hlptim LPTIM handle
1748 * @retval Autoreload value.
1749 */
HAL_LPTIM_ReadAutoReload(LPTIM_HandleTypeDef * hlptim)1750 uint32_t HAL_LPTIM_ReadAutoReload(LPTIM_HandleTypeDef *hlptim)
1751 {
1752 /* Check the parameters */
1753 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1754
1755 return (hlptim->Instance->ARR);
1756 }
1757
1758 /**
1759 * @brief Return the current Compare (Pulse) value.
1760 * @param hlptim LPTIM handle
1761 * @retval Compare value.
1762 */
HAL_LPTIM_ReadCompare(LPTIM_HandleTypeDef * hlptim)1763 uint32_t HAL_LPTIM_ReadCompare(LPTIM_HandleTypeDef *hlptim)
1764 {
1765 /* Check the parameters */
1766 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1767
1768 return (hlptim->Instance->CMP);
1769 }
1770
1771 /**
1772 * @}
1773 */
1774
1775 /** @defgroup LPTIM_Exported_Functions_Group4 LPTIM IRQ handler and callbacks
1776 * @brief LPTIM IRQ handler.
1777 *
1778 @verbatim
1779 ==============================================================================
1780 ##### LPTIM IRQ handler and callbacks #####
1781 ==============================================================================
1782 [..] This section provides LPTIM IRQ handler and callback functions called within
1783 the IRQ handler:
1784 (+) LPTIM interrupt request handler
1785 (+) Compare match Callback
1786 (+) Auto-reload match Callback
1787 (+) External trigger event detection Callback
1788 (+) Compare register write complete Callback
1789 (+) Auto-reload register write complete Callback
1790 (+) Up-counting direction change Callback
1791 (+) Down-counting direction change Callback
1792
1793 @endverbatim
1794 * @{
1795 */
1796
1797 /**
1798 * @brief Handle LPTIM interrupt request.
1799 * @param hlptim LPTIM handle
1800 * @retval None
1801 */
HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef * hlptim)1802 void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim)
1803 {
1804 /* Compare match interrupt */
1805 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_CMPM) != RESET)
1806 {
1807 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_CMPM) != RESET)
1808 {
1809 /* Clear Compare match flag */
1810 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPM);
1811
1812 /* Compare match Callback */
1813 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1814 hlptim->CompareMatchCallback(hlptim);
1815 #else
1816 HAL_LPTIM_CompareMatchCallback(hlptim);
1817 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1818 }
1819 }
1820
1821 /* Autoreload match interrupt */
1822 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_ARRM) != RESET)
1823 {
1824 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_ARRM) != RESET)
1825 {
1826 /* Clear Autoreload match flag */
1827 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARRM);
1828
1829 /* Autoreload match Callback */
1830 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1831 hlptim->AutoReloadMatchCallback(hlptim);
1832 #else
1833 HAL_LPTIM_AutoReloadMatchCallback(hlptim);
1834 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1835 }
1836 }
1837
1838 /* Trigger detected interrupt */
1839 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_EXTTRIG) != RESET)
1840 {
1841 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_EXTTRIG) != RESET)
1842 {
1843 /* Clear Trigger detected flag */
1844 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_EXTTRIG);
1845
1846 /* Trigger detected callback */
1847 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1848 hlptim->TriggerCallback(hlptim);
1849 #else
1850 HAL_LPTIM_TriggerCallback(hlptim);
1851 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1852 }
1853 }
1854
1855 /* Compare write interrupt */
1856 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_CMPOK) != RESET)
1857 {
1858 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_CMPOK) != RESET)
1859 {
1860 /* Clear Compare write flag */
1861 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1862
1863 /* Compare write Callback */
1864 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1865 hlptim->CompareWriteCallback(hlptim);
1866 #else
1867 HAL_LPTIM_CompareWriteCallback(hlptim);
1868 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1869 }
1870 }
1871
1872 /* Autoreload write interrupt */
1873 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_ARROK) != RESET)
1874 {
1875 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_ARROK) != RESET)
1876 {
1877 /* Clear Autoreload write flag */
1878 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1879
1880 /* Autoreload write Callback */
1881 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1882 hlptim->AutoReloadWriteCallback(hlptim);
1883 #else
1884 HAL_LPTIM_AutoReloadWriteCallback(hlptim);
1885 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1886 }
1887 }
1888
1889 /* Direction counter changed from Down to Up interrupt */
1890 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_UP) != RESET)
1891 {
1892 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_UP) != RESET)
1893 {
1894 /* Clear Direction counter changed from Down to Up flag */
1895 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_UP);
1896
1897 /* Direction counter changed from Down to Up Callback */
1898 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1899 hlptim->DirectionUpCallback(hlptim);
1900 #else
1901 HAL_LPTIM_DirectionUpCallback(hlptim);
1902 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1903 }
1904 }
1905
1906 /* Direction counter changed from Up to Down interrupt */
1907 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_DOWN) != RESET)
1908 {
1909 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_DOWN) != RESET)
1910 {
1911 /* Clear Direction counter changed from Up to Down flag */
1912 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_DOWN);
1913
1914 /* Direction counter changed from Up to Down Callback */
1915 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1916 hlptim->DirectionDownCallback(hlptim);
1917 #else
1918 HAL_LPTIM_DirectionDownCallback(hlptim);
1919 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1920 }
1921 }
1922 #if defined(EXTI_IMR_MR23)
1923 __HAL_LPTIM_WAKEUPTIMER_EXTI_CLEAR_FLAG();
1924 #endif /* EXTI_IMR_MR23 */
1925 }
1926
1927 /**
1928 * @brief Compare match callback in non-blocking mode.
1929 * @param hlptim LPTIM handle
1930 * @retval None
1931 */
HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef * hlptim)1932 __weak void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim)
1933 {
1934 /* Prevent unused argument(s) compilation warning */
1935 UNUSED(hlptim);
1936
1937 /* NOTE : This function should not be modified, when the callback is needed,
1938 the HAL_LPTIM_CompareMatchCallback could be implemented in the user file
1939 */
1940 }
1941
1942 /**
1943 * @brief Autoreload match callback in non-blocking mode.
1944 * @param hlptim LPTIM handle
1945 * @retval None
1946 */
HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef * hlptim)1947 __weak void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim)
1948 {
1949 /* Prevent unused argument(s) compilation warning */
1950 UNUSED(hlptim);
1951
1952 /* NOTE : This function should not be modified, when the callback is needed,
1953 the HAL_LPTIM_AutoReloadMatchCallback could be implemented in the user file
1954 */
1955 }
1956
1957 /**
1958 * @brief Trigger detected callback in non-blocking mode.
1959 * @param hlptim LPTIM handle
1960 * @retval None
1961 */
HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef * hlptim)1962 __weak void HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef *hlptim)
1963 {
1964 /* Prevent unused argument(s) compilation warning */
1965 UNUSED(hlptim);
1966
1967 /* NOTE : This function should not be modified, when the callback is needed,
1968 the HAL_LPTIM_TriggerCallback could be implemented in the user file
1969 */
1970 }
1971
1972 /**
1973 * @brief Compare write callback in non-blocking mode.
1974 * @param hlptim LPTIM handle
1975 * @retval None
1976 */
HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef * hlptim)1977 __weak void HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef *hlptim)
1978 {
1979 /* Prevent unused argument(s) compilation warning */
1980 UNUSED(hlptim);
1981
1982 /* NOTE : This function should not be modified, when the callback is needed,
1983 the HAL_LPTIM_CompareWriteCallback could be implemented in the user file
1984 */
1985 }
1986
1987 /**
1988 * @brief Autoreload write callback in non-blocking mode.
1989 * @param hlptim LPTIM handle
1990 * @retval None
1991 */
HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef * hlptim)1992 __weak void HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef *hlptim)
1993 {
1994 /* Prevent unused argument(s) compilation warning */
1995 UNUSED(hlptim);
1996
1997 /* NOTE : This function should not be modified, when the callback is needed,
1998 the HAL_LPTIM_AutoReloadWriteCallback could be implemented in the user file
1999 */
2000 }
2001
2002 /**
2003 * @brief Direction counter changed from Down to Up callback in non-blocking mode.
2004 * @param hlptim LPTIM handle
2005 * @retval None
2006 */
HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef * hlptim)2007 __weak void HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef *hlptim)
2008 {
2009 /* Prevent unused argument(s) compilation warning */
2010 UNUSED(hlptim);
2011
2012 /* NOTE : This function should not be modified, when the callback is needed,
2013 the HAL_LPTIM_DirectionUpCallback could be implemented in the user file
2014 */
2015 }
2016
2017 /**
2018 * @brief Direction counter changed from Up to Down callback in non-blocking mode.
2019 * @param hlptim LPTIM handle
2020 * @retval None
2021 */
HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef * hlptim)2022 __weak void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim)
2023 {
2024 /* Prevent unused argument(s) compilation warning */
2025 UNUSED(hlptim);
2026
2027 /* NOTE : This function should not be modified, when the callback is needed,
2028 the HAL_LPTIM_DirectionDownCallback could be implemented in the user file
2029 */
2030 }
2031
2032 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
2033 /**
2034 * @brief Register a User LPTIM callback to be used instead of the weak predefined callback
2035 * @param hlptim LPTIM handle
2036 * @param CallbackID ID of the callback to be registered
2037 * This parameter can be one of the following values:
2038 * @arg @ref HAL_LPTIM_MSPINIT_CB_ID LPTIM Base Msp Init Callback ID
2039 * @arg @ref HAL_LPTIM_MSPDEINIT_CB_ID LPTIM Base Msp DeInit Callback ID
2040 * @arg @ref HAL_LPTIM_COMPARE_MATCH_CB_ID Compare match Callback ID
2041 * @arg @ref HAL_LPTIM_AUTORELOAD_MATCH_CB_ID Auto-reload match Callback ID
2042 * @arg @ref HAL_LPTIM_TRIGGER_CB_ID External trigger event detection Callback ID
2043 * @arg @ref HAL_LPTIM_COMPARE_WRITE_CB_ID Compare register write complete Callback ID
2044 * @arg @ref HAL_LPTIM_AUTORELOAD_WRITE_CB_ID Auto-reload register write complete Callback ID
2045 * @arg @ref HAL_LPTIM_DIRECTION_UP_CB_ID Up-counting direction change Callback ID
2046 * @arg @ref HAL_LPTIM_DIRECTION_DOWN_CB_ID Down-counting direction change Callback ID
2047 * @param pCallback pointer to the callback function
2048 * @retval status
2049 */
HAL_LPTIM_RegisterCallback(LPTIM_HandleTypeDef * hlptim,HAL_LPTIM_CallbackIDTypeDef CallbackID,pLPTIM_CallbackTypeDef pCallback)2050 HAL_StatusTypeDef HAL_LPTIM_RegisterCallback(LPTIM_HandleTypeDef *hlptim,
2051 HAL_LPTIM_CallbackIDTypeDef CallbackID,
2052 pLPTIM_CallbackTypeDef pCallback)
2053 {
2054 HAL_StatusTypeDef status = HAL_OK;
2055
2056 if (pCallback == NULL)
2057 {
2058 return HAL_ERROR;
2059 }
2060
2061 /* Process locked */
2062 __HAL_LOCK(hlptim);
2063
2064 if (hlptim->State == HAL_LPTIM_STATE_READY)
2065 {
2066 switch (CallbackID)
2067 {
2068 case HAL_LPTIM_MSPINIT_CB_ID :
2069 hlptim->MspInitCallback = pCallback;
2070 break;
2071
2072 case HAL_LPTIM_MSPDEINIT_CB_ID :
2073 hlptim->MspDeInitCallback = pCallback;
2074 break;
2075
2076 case HAL_LPTIM_COMPARE_MATCH_CB_ID :
2077 hlptim->CompareMatchCallback = pCallback;
2078 break;
2079
2080 case HAL_LPTIM_AUTORELOAD_MATCH_CB_ID :
2081 hlptim->AutoReloadMatchCallback = pCallback;
2082 break;
2083
2084 case HAL_LPTIM_TRIGGER_CB_ID :
2085 hlptim->TriggerCallback = pCallback;
2086 break;
2087
2088 case HAL_LPTIM_COMPARE_WRITE_CB_ID :
2089 hlptim->CompareWriteCallback = pCallback;
2090 break;
2091
2092 case HAL_LPTIM_AUTORELOAD_WRITE_CB_ID :
2093 hlptim->AutoReloadWriteCallback = pCallback;
2094 break;
2095
2096 case HAL_LPTIM_DIRECTION_UP_CB_ID :
2097 hlptim->DirectionUpCallback = pCallback;
2098 break;
2099
2100 case HAL_LPTIM_DIRECTION_DOWN_CB_ID :
2101 hlptim->DirectionDownCallback = pCallback;
2102 break;
2103
2104 default :
2105 /* Return error status */
2106 status = HAL_ERROR;
2107 break;
2108 }
2109 }
2110 else if (hlptim->State == HAL_LPTIM_STATE_RESET)
2111 {
2112 switch (CallbackID)
2113 {
2114 case HAL_LPTIM_MSPINIT_CB_ID :
2115 hlptim->MspInitCallback = pCallback;
2116 break;
2117
2118 case HAL_LPTIM_MSPDEINIT_CB_ID :
2119 hlptim->MspDeInitCallback = pCallback;
2120 break;
2121
2122 default :
2123 /* Return error status */
2124 status = HAL_ERROR;
2125 break;
2126 }
2127 }
2128 else
2129 {
2130 /* Return error status */
2131 status = HAL_ERROR;
2132 }
2133
2134 /* Release Lock */
2135 __HAL_UNLOCK(hlptim);
2136
2137 return status;
2138 }
2139
2140 /**
2141 * @brief Unregister a LPTIM callback
2142 * LLPTIM callback is redirected to the weak predefined callback
2143 * @param hlptim LPTIM handle
2144 * @param CallbackID ID of the callback to be unregistered
2145 * This parameter can be one of the following values:
2146 * @arg @ref HAL_LPTIM_MSPINIT_CB_ID LPTIM Base Msp Init Callback ID
2147 * @arg @ref HAL_LPTIM_MSPDEINIT_CB_ID LPTIM Base Msp DeInit Callback ID
2148 * @arg @ref HAL_LPTIM_COMPARE_MATCH_CB_ID Compare match Callback ID
2149 * @arg @ref HAL_LPTIM_AUTORELOAD_MATCH_CB_ID Auto-reload match Callback ID
2150 * @arg @ref HAL_LPTIM_TRIGGER_CB_ID External trigger event detection Callback ID
2151 * @arg @ref HAL_LPTIM_COMPARE_WRITE_CB_ID Compare register write complete Callback ID
2152 * @arg @ref HAL_LPTIM_AUTORELOAD_WRITE_CB_ID Auto-reload register write complete Callback ID
2153 * @arg @ref HAL_LPTIM_DIRECTION_UP_CB_ID Up-counting direction change Callback ID
2154 * @arg @ref HAL_LPTIM_DIRECTION_DOWN_CB_ID Down-counting direction change Callback ID
2155 * @retval status
2156 */
HAL_LPTIM_UnRegisterCallback(LPTIM_HandleTypeDef * hlptim,HAL_LPTIM_CallbackIDTypeDef CallbackID)2157 HAL_StatusTypeDef HAL_LPTIM_UnRegisterCallback(LPTIM_HandleTypeDef *hlptim,
2158 HAL_LPTIM_CallbackIDTypeDef CallbackID)
2159 {
2160 HAL_StatusTypeDef status = HAL_OK;
2161
2162 /* Process locked */
2163 __HAL_LOCK(hlptim);
2164
2165 if (hlptim->State == HAL_LPTIM_STATE_READY)
2166 {
2167 switch (CallbackID)
2168 {
2169 case HAL_LPTIM_MSPINIT_CB_ID :
2170 hlptim->MspInitCallback = HAL_LPTIM_MspInit; /* Legacy weak MspInit Callback */
2171 break;
2172
2173 case HAL_LPTIM_MSPDEINIT_CB_ID :
2174 hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit; /* Legacy weak Msp DeInit Callback */
2175 break;
2176
2177 case HAL_LPTIM_COMPARE_MATCH_CB_ID :
2178 hlptim->CompareMatchCallback = HAL_LPTIM_CompareMatchCallback; /* Legacy weak Compare match Callback */
2179 break;
2180
2181 case HAL_LPTIM_AUTORELOAD_MATCH_CB_ID :
2182 hlptim->AutoReloadMatchCallback = HAL_LPTIM_AutoReloadMatchCallback; /* Legacy weak Auto-reload match Callback */
2183 break;
2184
2185 case HAL_LPTIM_TRIGGER_CB_ID :
2186 hlptim->TriggerCallback = HAL_LPTIM_TriggerCallback; /* Legacy weak External trigger event detection Callback */
2187 break;
2188
2189 case HAL_LPTIM_COMPARE_WRITE_CB_ID :
2190 hlptim->CompareWriteCallback = HAL_LPTIM_CompareWriteCallback; /* Legacy weak Compare register write complete Callback */
2191 break;
2192
2193 case HAL_LPTIM_AUTORELOAD_WRITE_CB_ID :
2194 hlptim->AutoReloadWriteCallback = HAL_LPTIM_AutoReloadWriteCallback; /* Legacy weak Auto-reload register write complete Callback */
2195 break;
2196
2197 case HAL_LPTIM_DIRECTION_UP_CB_ID :
2198 hlptim->DirectionUpCallback = HAL_LPTIM_DirectionUpCallback; /* Legacy weak Up-counting direction change Callback */
2199 break;
2200
2201 case HAL_LPTIM_DIRECTION_DOWN_CB_ID :
2202 hlptim->DirectionDownCallback = HAL_LPTIM_DirectionDownCallback; /* Legacy weak Down-counting direction change Callback */
2203 break;
2204
2205 default :
2206 /* Return error status */
2207 status = HAL_ERROR;
2208 break;
2209 }
2210 }
2211 else if (hlptim->State == HAL_LPTIM_STATE_RESET)
2212 {
2213 switch (CallbackID)
2214 {
2215 case HAL_LPTIM_MSPINIT_CB_ID :
2216 hlptim->MspInitCallback = HAL_LPTIM_MspInit; /* Legacy weak MspInit Callback */
2217 break;
2218
2219 case HAL_LPTIM_MSPDEINIT_CB_ID :
2220 hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit; /* Legacy weak Msp DeInit Callback */
2221 break;
2222
2223 default :
2224 /* Return error status */
2225 status = HAL_ERROR;
2226 break;
2227 }
2228 }
2229 else
2230 {
2231 /* Return error status */
2232 status = HAL_ERROR;
2233 }
2234
2235 /* Release Lock */
2236 __HAL_UNLOCK(hlptim);
2237
2238 return status;
2239 }
2240 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
2241
2242 /**
2243 * @}
2244 */
2245
2246 /** @defgroup LPTIM_Group5 Peripheral State functions
2247 * @brief Peripheral State functions.
2248 *
2249 @verbatim
2250 ==============================================================================
2251 ##### Peripheral State functions #####
2252 ==============================================================================
2253 [..]
2254 This subsection permits to get in run-time the status of the peripheral.
2255
2256 @endverbatim
2257 * @{
2258 */
2259
2260 /**
2261 * @brief Return the LPTIM handle state.
2262 * @param hlptim LPTIM handle
2263 * @retval HAL state
2264 */
HAL_LPTIM_GetState(LPTIM_HandleTypeDef * hlptim)2265 HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(LPTIM_HandleTypeDef *hlptim)
2266 {
2267 /* Return LPTIM handle state */
2268 return hlptim->State;
2269 }
2270
2271 /**
2272 * @}
2273 */
2274
2275
2276 /**
2277 * @}
2278 */
2279
2280 /* Private functions ---------------------------------------------------------*/
2281
2282 /** @defgroup LPTIM_Private_Functions LPTIM Private Functions
2283 * @{
2284 */
2285 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
2286 /**
2287 * @brief Reset interrupt callbacks to the legacy weak callbacks.
2288 * @param lptim pointer to a LPTIM_HandleTypeDef structure that contains
2289 * the configuration information for LPTIM module.
2290 * @retval None
2291 */
LPTIM_ResetCallback(LPTIM_HandleTypeDef * lptim)2292 static void LPTIM_ResetCallback(LPTIM_HandleTypeDef *lptim)
2293 {
2294 /* Reset the LPTIM callback to the legacy weak callbacks */
2295 lptim->CompareMatchCallback = HAL_LPTIM_CompareMatchCallback; /* Compare match Callback */
2296 lptim->AutoReloadMatchCallback = HAL_LPTIM_AutoReloadMatchCallback; /* Auto-reload match Callback */
2297 lptim->TriggerCallback = HAL_LPTIM_TriggerCallback; /* External trigger event detection Callback */
2298 lptim->CompareWriteCallback = HAL_LPTIM_CompareWriteCallback; /* Compare register write complete Callback */
2299 lptim->AutoReloadWriteCallback = HAL_LPTIM_AutoReloadWriteCallback; /* Auto-reload register write complete Callback */
2300 lptim->DirectionUpCallback = HAL_LPTIM_DirectionUpCallback; /* Up-counting direction change Callback */
2301 lptim->DirectionDownCallback = HAL_LPTIM_DirectionDownCallback; /* Down-counting direction change Callback */
2302 }
2303 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
2304
2305 /**
2306 * @brief LPTimer Wait for flag set
2307 * @param hlptim pointer to a LPTIM_HandleTypeDef structure that contains
2308 * the configuration information for LPTIM module.
2309 * @param flag The lptim flag
2310 * @retval HAL status
2311 */
LPTIM_WaitForFlag(LPTIM_HandleTypeDef * hlptim,uint32_t flag)2312 static HAL_StatusTypeDef LPTIM_WaitForFlag(LPTIM_HandleTypeDef *hlptim, uint32_t flag)
2313 {
2314 HAL_StatusTypeDef result = HAL_OK;
2315 uint32_t count = TIMEOUT * (SystemCoreClock / 20UL / 1000UL);
2316 do
2317 {
2318 count--;
2319 if (count == 0UL)
2320 {
2321 result = HAL_TIMEOUT;
2322 }
2323 }
2324 while ((!(__HAL_LPTIM_GET_FLAG((hlptim), (flag)))) && (count != 0UL));
2325
2326 return result;
2327 }
2328
2329 /**
2330 * @brief Disable LPTIM HW instance.
2331 * @param hlptim pointer to a LPTIM_HandleTypeDef structure that contains
2332 * the configuration information for LPTIM module.
2333 * @note The following sequence is required to solve LPTIM disable HW limitation.
2334 * Please check Errata Sheet ES0335 for more details under "MCU may remain
2335 * stuck in LPTIM interrupt when entering Stop mode" section.
2336 * @retval None
2337 */
LPTIM_Disable(LPTIM_HandleTypeDef * hlptim)2338 void LPTIM_Disable(LPTIM_HandleTypeDef *hlptim)
2339 {
2340 uint32_t tmpclksource = 0;
2341 uint32_t tmpIER;
2342 uint32_t tmpCFGR;
2343 uint32_t tmpCMP;
2344 uint32_t tmpARR;
2345 uint32_t tmpOR;
2346
2347 __disable_irq();
2348
2349 /*********** Save LPTIM Config ***********/
2350 /* Save LPTIM source clock */
2351 switch ((uint32_t)hlptim->Instance)
2352 {
2353 case LPTIM1_BASE:
2354 tmpclksource = __HAL_RCC_GET_LPTIM1_SOURCE();
2355 break;
2356 default:
2357 break;
2358 }
2359
2360 /* Save LPTIM configuration registers */
2361 tmpIER = hlptim->Instance->IER;
2362 tmpCFGR = hlptim->Instance->CFGR;
2363 tmpCMP = hlptim->Instance->CMP;
2364 tmpARR = hlptim->Instance->ARR;
2365 tmpOR = hlptim->Instance->OR;
2366
2367 /*********** Reset LPTIM ***********/
2368 switch ((uint32_t)hlptim->Instance)
2369 {
2370 case LPTIM1_BASE:
2371 __HAL_RCC_LPTIM1_FORCE_RESET();
2372 __HAL_RCC_LPTIM1_RELEASE_RESET();
2373 break;
2374 default:
2375 break;
2376 }
2377
2378 /*********** Restore LPTIM Config ***********/
2379 if ((tmpCMP != 0UL) || (tmpARR != 0UL))
2380 {
2381 /* Force LPTIM source kernel clock from APB */
2382 switch ((uint32_t)hlptim->Instance)
2383 {
2384 case LPTIM1_BASE:
2385 __HAL_RCC_LPTIM1_CONFIG(RCC_LPTIM1CLKSOURCE_PCLK1);
2386 break;
2387 default:
2388 break;
2389 }
2390
2391 if (tmpCMP != 0UL)
2392 {
2393 /* Restore CMP register (LPTIM should be enabled first) */
2394 hlptim->Instance->CR |= LPTIM_CR_ENABLE;
2395 hlptim->Instance->CMP = tmpCMP;
2396
2397 /* Wait for the completion of the write operation to the LPTIM_CMP register */
2398 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_CMPOK) == HAL_TIMEOUT)
2399 {
2400 hlptim->State = HAL_LPTIM_STATE_TIMEOUT;
2401 }
2402 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
2403 }
2404
2405 if (tmpARR != 0UL)
2406 {
2407 /* Restore ARR register (LPTIM should be enabled first) */
2408 hlptim->Instance->CR |= LPTIM_CR_ENABLE;
2409 hlptim->Instance->ARR = tmpARR;
2410
2411 /* Wait for the completion of the write operation to the LPTIM_ARR register */
2412 if (LPTIM_WaitForFlag(hlptim, LPTIM_FLAG_ARROK) == HAL_TIMEOUT)
2413 {
2414 hlptim->State = HAL_LPTIM_STATE_TIMEOUT;
2415 }
2416
2417 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
2418 }
2419
2420 /* Restore LPTIM source kernel clock */
2421 switch ((uint32_t)hlptim->Instance)
2422 {
2423 case LPTIM1_BASE:
2424 __HAL_RCC_LPTIM1_CONFIG(tmpclksource);
2425 break;
2426 default:
2427 break;
2428 }
2429 }
2430
2431 /* Restore configuration registers (LPTIM should be disabled first) */
2432 hlptim->Instance->CR &= ~(LPTIM_CR_ENABLE);
2433 hlptim->Instance->IER = tmpIER;
2434 hlptim->Instance->CFGR = tmpCFGR;
2435 hlptim->Instance->OR = tmpOR;
2436
2437 __enable_irq();
2438 }
2439 /**
2440 * @}
2441 */
2442 #endif /* LPTIM1 */
2443
2444 #endif /* HAL_LPTIM_MODULE_ENABLED */
2445 /**
2446 * @}
2447 */
2448
2449 /**
2450 * @}
2451 */
2452
2453 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
2454