xref: /btstack/port/stm32-f4discovery-usb/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_iwdg.h (revision a8f7f3fcbcd51f8d2e92aca076b6a9f812db358c)
1 /**
2   ******************************************************************************
3   * @file    stm32f4xx_ll_iwdg.h
4   * @author  MCD Application Team
5   * @brief   Header file of IWDG LL module.
6   ******************************************************************************
7   * @attention
8   *
9   * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
10   * All rights reserved.</center></h2>
11   *
12   * This software component is licensed by ST under BSD 3-Clause license,
13   * the "License"; You may not use this file except in compliance with the
14   * License. You may obtain a copy of the License at:
15   *                        opensource.org/licenses/BSD-3-Clause
16   *
17   ******************************************************************************
18   */
19 
20 /* Define to prevent recursive inclusion -------------------------------------*/
21 #ifndef STM32F4xx_LL_IWDG_H
22 #define STM32F4xx_LL_IWDG_H
23 
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27 
28 /* Includes ------------------------------------------------------------------*/
29 #include "stm32f4xx.h"
30 
31 /** @addtogroup STM32F4xx_LL_Driver
32   * @{
33   */
34 
35 #if defined(IWDG)
36 
37 /** @defgroup IWDG_LL IWDG
38   * @{
39   */
40 
41 /* Private types -------------------------------------------------------------*/
42 /* Private variables ---------------------------------------------------------*/
43 
44 /* Private constants ---------------------------------------------------------*/
45 /** @defgroup IWDG_LL_Private_Constants IWDG Private Constants
46   * @{
47   */
48 #define LL_IWDG_KEY_RELOAD                 0x0000AAAAU               /*!< IWDG Reload Counter Enable   */
49 #define LL_IWDG_KEY_ENABLE                 0x0000CCCCU               /*!< IWDG Peripheral Enable       */
50 #define LL_IWDG_KEY_WR_ACCESS_ENABLE       0x00005555U               /*!< IWDG KR Write Access Enable  */
51 #define LL_IWDG_KEY_WR_ACCESS_DISABLE      0x00000000U               /*!< IWDG KR Write Access Disable */
52 /**
53   * @}
54   */
55 
56 /* Private macros ------------------------------------------------------------*/
57 
58 /* Exported types ------------------------------------------------------------*/
59 /* Exported constants --------------------------------------------------------*/
60 /** @defgroup IWDG_LL_Exported_Constants IWDG Exported Constants
61   * @{
62   */
63 
64 /** @defgroup IWDG_LL_EC_GET_FLAG Get Flags Defines
65   * @brief    Flags defines which can be used with LL_IWDG_ReadReg function
66   * @{
67   */
68 #define LL_IWDG_SR_PVU                     IWDG_SR_PVU                           /*!< Watchdog prescaler value update */
69 #define LL_IWDG_SR_RVU                     IWDG_SR_RVU                           /*!< Watchdog counter reload value update */
70 /**
71   * @}
72   */
73 
74 /** @defgroup IWDG_LL_EC_PRESCALER  Prescaler Divider
75   * @{
76   */
77 #define LL_IWDG_PRESCALER_4                0x00000000U                           /*!< Divider by 4   */
78 #define LL_IWDG_PRESCALER_8                (IWDG_PR_PR_0)                        /*!< Divider by 8   */
79 #define LL_IWDG_PRESCALER_16               (IWDG_PR_PR_1)                        /*!< Divider by 16  */
80 #define LL_IWDG_PRESCALER_32               (IWDG_PR_PR_1 | IWDG_PR_PR_0)         /*!< Divider by 32  */
81 #define LL_IWDG_PRESCALER_64               (IWDG_PR_PR_2)                        /*!< Divider by 64  */
82 #define LL_IWDG_PRESCALER_128              (IWDG_PR_PR_2 | IWDG_PR_PR_0)         /*!< Divider by 128 */
83 #define LL_IWDG_PRESCALER_256              (IWDG_PR_PR_2 | IWDG_PR_PR_1)         /*!< Divider by 256 */
84 /**
85   * @}
86   */
87 
88 /**
89   * @}
90   */
91 
92 /* Exported macro ------------------------------------------------------------*/
93 /** @defgroup IWDG_LL_Exported_Macros IWDG Exported Macros
94   * @{
95   */
96 
97 /** @defgroup IWDG_LL_EM_WRITE_READ Common Write and read registers Macros
98   * @{
99   */
100 
101 /**
102   * @brief  Write a value in IWDG register
103   * @param  __INSTANCE__ IWDG Instance
104   * @param  __REG__ Register to be written
105   * @param  __VALUE__ Value to be written in the register
106   * @retval None
107   */
108 #define LL_IWDG_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
109 
110 /**
111   * @brief  Read a value in IWDG register
112   * @param  __INSTANCE__ IWDG Instance
113   * @param  __REG__ Register to be read
114   * @retval Register value
115   */
116 #define LL_IWDG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
117 /**
118   * @}
119   */
120 
121 /**
122   * @}
123   */
124 
125 
126 /* Exported functions --------------------------------------------------------*/
127 /** @defgroup IWDG_LL_Exported_Functions IWDG Exported Functions
128   * @{
129   */
130 /** @defgroup IWDG_LL_EF_Configuration Configuration
131   * @{
132   */
133 
134 /**
135   * @brief  Start the Independent Watchdog
136   * @note   Except if the hardware watchdog option is selected
137   * @rmtoll KR           KEY           LL_IWDG_Enable
138   * @param  IWDGx IWDG Instance
139   * @retval None
140   */
LL_IWDG_Enable(IWDG_TypeDef * IWDGx)141 __STATIC_INLINE void LL_IWDG_Enable(IWDG_TypeDef *IWDGx)
142 {
143   WRITE_REG(IWDGx->KR, LL_IWDG_KEY_ENABLE);
144 }
145 
146 /**
147   * @brief  Reloads IWDG counter with value defined in the reload register
148   * @rmtoll KR           KEY           LL_IWDG_ReloadCounter
149   * @param  IWDGx IWDG Instance
150   * @retval None
151   */
LL_IWDG_ReloadCounter(IWDG_TypeDef * IWDGx)152 __STATIC_INLINE void LL_IWDG_ReloadCounter(IWDG_TypeDef *IWDGx)
153 {
154   WRITE_REG(IWDGx->KR, LL_IWDG_KEY_RELOAD);
155 }
156 
157 /**
158   * @brief  Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers
159   * @rmtoll KR           KEY           LL_IWDG_EnableWriteAccess
160   * @param  IWDGx IWDG Instance
161   * @retval None
162   */
LL_IWDG_EnableWriteAccess(IWDG_TypeDef * IWDGx)163 __STATIC_INLINE void LL_IWDG_EnableWriteAccess(IWDG_TypeDef *IWDGx)
164 {
165   WRITE_REG(IWDGx->KR, LL_IWDG_KEY_WR_ACCESS_ENABLE);
166 }
167 
168 /**
169   * @brief  Disable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers
170   * @rmtoll KR           KEY           LL_IWDG_DisableWriteAccess
171   * @param  IWDGx IWDG Instance
172   * @retval None
173   */
LL_IWDG_DisableWriteAccess(IWDG_TypeDef * IWDGx)174 __STATIC_INLINE void LL_IWDG_DisableWriteAccess(IWDG_TypeDef *IWDGx)
175 {
176   WRITE_REG(IWDGx->KR, LL_IWDG_KEY_WR_ACCESS_DISABLE);
177 }
178 
179 /**
180   * @brief  Select the prescaler of the IWDG
181   * @rmtoll PR           PR            LL_IWDG_SetPrescaler
182   * @param  IWDGx IWDG Instance
183   * @param  Prescaler This parameter can be one of the following values:
184   *         @arg @ref LL_IWDG_PRESCALER_4
185   *         @arg @ref LL_IWDG_PRESCALER_8
186   *         @arg @ref LL_IWDG_PRESCALER_16
187   *         @arg @ref LL_IWDG_PRESCALER_32
188   *         @arg @ref LL_IWDG_PRESCALER_64
189   *         @arg @ref LL_IWDG_PRESCALER_128
190   *         @arg @ref LL_IWDG_PRESCALER_256
191   * @retval None
192   */
LL_IWDG_SetPrescaler(IWDG_TypeDef * IWDGx,uint32_t Prescaler)193 __STATIC_INLINE void LL_IWDG_SetPrescaler(IWDG_TypeDef *IWDGx, uint32_t Prescaler)
194 {
195   WRITE_REG(IWDGx->PR, IWDG_PR_PR & Prescaler);
196 }
197 
198 /**
199   * @brief  Get the selected prescaler of the IWDG
200   * @rmtoll PR           PR            LL_IWDG_GetPrescaler
201   * @param  IWDGx IWDG Instance
202   * @retval Returned value can be one of the following values:
203   *         @arg @ref LL_IWDG_PRESCALER_4
204   *         @arg @ref LL_IWDG_PRESCALER_8
205   *         @arg @ref LL_IWDG_PRESCALER_16
206   *         @arg @ref LL_IWDG_PRESCALER_32
207   *         @arg @ref LL_IWDG_PRESCALER_64
208   *         @arg @ref LL_IWDG_PRESCALER_128
209   *         @arg @ref LL_IWDG_PRESCALER_256
210   */
LL_IWDG_GetPrescaler(IWDG_TypeDef * IWDGx)211 __STATIC_INLINE uint32_t LL_IWDG_GetPrescaler(IWDG_TypeDef *IWDGx)
212 {
213   return (READ_REG(IWDGx->PR));
214 }
215 
216 /**
217   * @brief  Specify the IWDG down-counter reload value
218   * @rmtoll RLR          RL            LL_IWDG_SetReloadCounter
219   * @param  IWDGx IWDG Instance
220   * @param  Counter Value between Min_Data=0 and Max_Data=0x0FFF
221   * @retval None
222   */
LL_IWDG_SetReloadCounter(IWDG_TypeDef * IWDGx,uint32_t Counter)223 __STATIC_INLINE void LL_IWDG_SetReloadCounter(IWDG_TypeDef *IWDGx, uint32_t Counter)
224 {
225   WRITE_REG(IWDGx->RLR, IWDG_RLR_RL & Counter);
226 }
227 
228 /**
229   * @brief  Get the specified IWDG down-counter reload value
230   * @rmtoll RLR          RL            LL_IWDG_GetReloadCounter
231   * @param  IWDGx IWDG Instance
232   * @retval Value between Min_Data=0 and Max_Data=0x0FFF
233   */
LL_IWDG_GetReloadCounter(IWDG_TypeDef * IWDGx)234 __STATIC_INLINE uint32_t LL_IWDG_GetReloadCounter(IWDG_TypeDef *IWDGx)
235 {
236   return (READ_REG(IWDGx->RLR));
237 }
238 
239 
240 /**
241   * @}
242   */
243 
244 /** @defgroup IWDG_LL_EF_FLAG_Management FLAG_Management
245   * @{
246   */
247 
248 /**
249   * @brief  Check if flag Prescaler Value Update is set or not
250   * @rmtoll SR           PVU           LL_IWDG_IsActiveFlag_PVU
251   * @param  IWDGx IWDG Instance
252   * @retval State of bit (1 or 0).
253   */
LL_IWDG_IsActiveFlag_PVU(IWDG_TypeDef * IWDGx)254 __STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_PVU(IWDG_TypeDef *IWDGx)
255 {
256   return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU) == (IWDG_SR_PVU)) ? 1UL : 0UL);
257 }
258 
259 /**
260   * @brief  Check if flag Reload Value Update is set or not
261   * @rmtoll SR           RVU           LL_IWDG_IsActiveFlag_RVU
262   * @param  IWDGx IWDG Instance
263   * @retval State of bit (1 or 0).
264   */
LL_IWDG_IsActiveFlag_RVU(IWDG_TypeDef * IWDGx)265 __STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_RVU(IWDG_TypeDef *IWDGx)
266 {
267   return ((READ_BIT(IWDGx->SR, IWDG_SR_RVU) == (IWDG_SR_RVU)) ? 1UL : 0UL);
268 }
269 
270 /**
271   * @brief  Check if flags Prescaler & Reload Value Update are reset or not
272   * @rmtoll SR           PVU           LL_IWDG_IsReady\n
273   *         SR           RVU           LL_IWDG_IsReady
274   * @param  IWDGx IWDG Instance
275   * @retval State of bits (1 or 0).
276   */
LL_IWDG_IsReady(IWDG_TypeDef * IWDGx)277 __STATIC_INLINE uint32_t LL_IWDG_IsReady(IWDG_TypeDef *IWDGx)
278 {
279   return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU) == 0U) ? 1UL : 0UL);
280 }
281 
282 /**
283   * @}
284   */
285 
286 
287 /**
288   * @}
289   */
290 
291 /**
292   * @}
293   */
294 
295 #endif /* IWDG */
296 
297 /**
298   * @}
299   */
300 
301 #ifdef __cplusplus
302 }
303 #endif
304 
305 #endif /* STM32F4xx_LL_IWDG_H */
306 
307 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
308