xref: /btstack/port/stm32-f4discovery-usb/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h (revision a8f7f3fcbcd51f8d2e92aca076b6a9f812db358c)
1 /**
2   ******************************************************************************
3   * @file    stm32f4xx_hal.h
4   * @author  MCD Application Team
5   * @brief   This file contains all the functions prototypes for the HAL
6   *          module driver.
7   ******************************************************************************
8   * @attention
9   *
10   * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
11   * All rights reserved.</center></h2>
12   *
13   * This software component is licensed by ST under BSD 3-Clause license,
14   * the "License"; You may not use this file except in compliance with the
15   * License. You may obtain a copy of the License at:
16   *                        opensource.org/licenses/BSD-3-Clause
17   *
18   ******************************************************************************
19   */
20 
21 /* Define to prevent recursive inclusion -------------------------------------*/
22 #ifndef __STM32F4xx_HAL_H
23 #define __STM32F4xx_HAL_H
24 
25 #ifdef __cplusplus
26  extern "C" {
27 #endif
28 
29 /* Includes ------------------------------------------------------------------*/
30 #include "stm32f4xx_hal_conf.h"
31 
32 /** @addtogroup STM32F4xx_HAL_Driver
33   * @{
34   */
35 
36 /** @addtogroup HAL
37   * @{
38   */
39 
40 /* Exported types ------------------------------------------------------------*/
41 /* Exported constants --------------------------------------------------------*/
42 
43 /** @defgroup HAL_Exported_Constants HAL Exported Constants
44   * @{
45   */
46 
47 /** @defgroup HAL_TICK_FREQ Tick Frequency
48   * @{
49   */
50 typedef enum
51 {
52   HAL_TICK_FREQ_10HZ         = 100U,
53   HAL_TICK_FREQ_100HZ        = 10U,
54   HAL_TICK_FREQ_1KHZ         = 1U,
55   HAL_TICK_FREQ_DEFAULT      = HAL_TICK_FREQ_1KHZ
56 } HAL_TickFreqTypeDef;
57 /**
58   * @}
59   */
60 
61 /**
62   * @}
63   */
64 
65 /* Exported macro ------------------------------------------------------------*/
66 /** @defgroup HAL_Exported_Macros HAL Exported Macros
67   * @{
68   */
69 
70 /** @brief  Freeze/Unfreeze Peripherals in Debug mode
71   */
72 #define __HAL_DBGMCU_FREEZE_TIM2()           (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM2_STOP))
73 #define __HAL_DBGMCU_FREEZE_TIM3()           (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM3_STOP))
74 #define __HAL_DBGMCU_FREEZE_TIM4()           (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM4_STOP))
75 #define __HAL_DBGMCU_FREEZE_TIM5()           (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM5_STOP))
76 #define __HAL_DBGMCU_FREEZE_TIM6()           (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM6_STOP))
77 #define __HAL_DBGMCU_FREEZE_TIM7()           (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM7_STOP))
78 #define __HAL_DBGMCU_FREEZE_TIM12()          (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM12_STOP))
79 #define __HAL_DBGMCU_FREEZE_TIM13()          (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM13_STOP))
80 #define __HAL_DBGMCU_FREEZE_TIM14()          (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM14_STOP))
81 #define __HAL_DBGMCU_FREEZE_RTC()            (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_RTC_STOP))
82 #define __HAL_DBGMCU_FREEZE_WWDG()           (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_WWDG_STOP))
83 #define __HAL_DBGMCU_FREEZE_IWDG()           (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_IWDG_STOP))
84 #define __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT))
85 #define __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT))
86 #define __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT()   (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT))
87 #define __HAL_DBGMCU_FREEZE_CAN1()           (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN1_STOP))
88 #define __HAL_DBGMCU_FREEZE_CAN2()           (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN2_STOP))
89 #define __HAL_DBGMCU_FREEZE_TIM1()           (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM1_STOP))
90 #define __HAL_DBGMCU_FREEZE_TIM8()           (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM8_STOP))
91 #define __HAL_DBGMCU_FREEZE_TIM9()           (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM9_STOP))
92 #define __HAL_DBGMCU_FREEZE_TIM10()          (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM10_STOP))
93 #define __HAL_DBGMCU_FREEZE_TIM11()          (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM11_STOP))
94 
95 #define __HAL_DBGMCU_UNFREEZE_TIM2()           (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM2_STOP))
96 #define __HAL_DBGMCU_UNFREEZE_TIM3()           (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM3_STOP))
97 #define __HAL_DBGMCU_UNFREEZE_TIM4()           (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM4_STOP))
98 #define __HAL_DBGMCU_UNFREEZE_TIM5()           (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM5_STOP))
99 #define __HAL_DBGMCU_UNFREEZE_TIM6()           (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM6_STOP))
100 #define __HAL_DBGMCU_UNFREEZE_TIM7()           (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM7_STOP))
101 #define __HAL_DBGMCU_UNFREEZE_TIM12()          (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM12_STOP))
102 #define __HAL_DBGMCU_UNFREEZE_TIM13()          (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM13_STOP))
103 #define __HAL_DBGMCU_UNFREEZE_TIM14()          (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM14_STOP))
104 #define __HAL_DBGMCU_UNFREEZE_RTC()            (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_RTC_STOP))
105 #define __HAL_DBGMCU_UNFREEZE_WWDG()           (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_WWDG_STOP))
106 #define __HAL_DBGMCU_UNFREEZE_IWDG()           (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_IWDG_STOP))
107 #define __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT))
108 #define __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT))
109 #define __HAL_DBGMCU_UNFREEZE_I2C3_TIMEOUT()   (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT))
110 #define __HAL_DBGMCU_UNFREEZE_CAN1()           (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN1_STOP))
111 #define __HAL_DBGMCU_UNFREEZE_CAN2()           (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN2_STOP))
112 #define __HAL_DBGMCU_UNFREEZE_TIM1()           (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM1_STOP))
113 #define __HAL_DBGMCU_UNFREEZE_TIM8()           (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM8_STOP))
114 #define __HAL_DBGMCU_UNFREEZE_TIM9()           (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM9_STOP))
115 #define __HAL_DBGMCU_UNFREEZE_TIM10()          (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM10_STOP))
116 #define __HAL_DBGMCU_UNFREEZE_TIM11()          (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM11_STOP))
117 
118 /** @brief  Main Flash memory mapped at 0x00000000
119   */
120 #define __HAL_SYSCFG_REMAPMEMORY_FLASH()             (SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE))
121 
122 /** @brief  System Flash memory mapped at 0x00000000
123   */
124 #define __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH()       do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
125                                                          SYSCFG->MEMRMP |= SYSCFG_MEMRMP_MEM_MODE_0;\
126                                                         }while(0);
127 
128 /** @brief  Embedded SRAM mapped at 0x00000000
129   */
130 #define __HAL_SYSCFG_REMAPMEMORY_SRAM()       do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
131                                                   SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_0 | SYSCFG_MEMRMP_MEM_MODE_1);\
132                                                  }while(0);
133 
134 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx)
135 /** @brief  FSMC Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000
136   */
137 #define __HAL_SYSCFG_REMAPMEMORY_FSMC()       do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
138                                                   SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_1);\
139                                                  }while(0);
140 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
141 
142 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
143     defined(STM32F469xx) || defined(STM32F479xx)
144 /** @brief  FMC Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000
145   */
146 #define __HAL_SYSCFG_REMAPMEMORY_FMC()       do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
147                                                  SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_1);\
148                                                 }while(0);
149 
150 /** @brief  FMC/SDRAM Bank 1 and 2 mapped at 0x00000000
151   */
152 #define __HAL_SYSCFG_REMAPMEMORY_FMC_SDRAM()       do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
153                                                        SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_2);\
154                                                       }while(0);
155 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
156 
157 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F413xx) || defined(STM32F423xx)
158 /** @defgroup Cortex_Lockup_Enable Cortex Lockup Enable
159   * @{
160   */
161 /** @brief  SYSCFG Break Lockup lock
162   *         Enables and locks the connection of Cortex-M4 LOCKUP (Hardfault) output to TIM1/8 input
163   * @note   The selected configuration is locked and can be unlocked by system reset
164   */
165 #define __HAL_SYSCFG_BREAK_PVD_LOCK()      do {SYSCFG->CFGR2 &= ~(SYSCFG_CFGR2_PVD_LOCK); \
166                                                SYSCFG->CFGR2 |= SYSCFG_CFGR2_PVD_LOCK;    \
167                                               }while(0)
168 /**
169  * @}
170  */
171 
172 /** @defgroup PVD_Lock_Enable PVD Lock
173   * @{
174   */
175 /** @brief  SYSCFG Break PVD lock
176   *         Enables and locks the PVD connection with Timer1/8 Break Input, , as well as the PVDE and PLS[2:0] in the PWR_CR register
177   * @note   The selected configuration is locked and can be unlocked by system reset
178   */
179 #define __HAL_SYSCFG_BREAK_LOCKUP_LOCK()     do {SYSCFG->CFGR2 &= ~(SYSCFG_CFGR2_LOCKUP_LOCK); \
180                                                  SYSCFG->CFGR2 |= SYSCFG_CFGR2_LOCKUP_LOCK;    \
181                                                 }while(0)
182 /**
183  * @}
184  */
185 #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx || STM32F413xx || STM32F423xx */
186 /**
187   * @}
188   */
189 
190 /** @defgroup HAL_Private_Macros HAL Private Macros
191   * @{
192   */
193 #define IS_TICKFREQ(FREQ) (((FREQ) == HAL_TICK_FREQ_10HZ)  || \
194                            ((FREQ) == HAL_TICK_FREQ_100HZ) || \
195                            ((FREQ) == HAL_TICK_FREQ_1KHZ))
196 /**
197   * @}
198   */
199 
200 /* Exported variables --------------------------------------------------------*/
201 
202 /** @addtogroup HAL_Exported_Variables
203   * @{
204   */
205 extern __IO uint32_t uwTick;
206 extern uint32_t uwTickPrio;
207 extern HAL_TickFreqTypeDef uwTickFreq;
208 /**
209   * @}
210   */
211 
212 /* Exported functions --------------------------------------------------------*/
213 /** @addtogroup HAL_Exported_Functions
214   * @{
215   */
216 /** @addtogroup HAL_Exported_Functions_Group1
217   * @{
218   */
219 /* Initialization and Configuration functions  ******************************/
220 HAL_StatusTypeDef HAL_Init(void);
221 HAL_StatusTypeDef HAL_DeInit(void);
222 void HAL_MspInit(void);
223 void HAL_MspDeInit(void);
224 HAL_StatusTypeDef HAL_InitTick (uint32_t TickPriority);
225 /**
226   * @}
227   */
228 
229 /** @addtogroup HAL_Exported_Functions_Group2
230   * @{
231   */
232 /* Peripheral Control functions  ************************************************/
233 void HAL_IncTick(void);
234 void HAL_Delay(uint32_t Delay);
235 uint32_t HAL_GetTick(void);
236 uint32_t HAL_GetTickPrio(void);
237 HAL_StatusTypeDef HAL_SetTickFreq(HAL_TickFreqTypeDef Freq);
238 HAL_TickFreqTypeDef HAL_GetTickFreq(void);
239 void HAL_SuspendTick(void);
240 void HAL_ResumeTick(void);
241 uint32_t HAL_GetHalVersion(void);
242 uint32_t HAL_GetREVID(void);
243 uint32_t HAL_GetDEVID(void);
244 void HAL_DBGMCU_EnableDBGSleepMode(void);
245 void HAL_DBGMCU_DisableDBGSleepMode(void);
246 void HAL_DBGMCU_EnableDBGStopMode(void);
247 void HAL_DBGMCU_DisableDBGStopMode(void);
248 void HAL_DBGMCU_EnableDBGStandbyMode(void);
249 void HAL_DBGMCU_DisableDBGStandbyMode(void);
250 void HAL_EnableCompensationCell(void);
251 void HAL_DisableCompensationCell(void);
252 uint32_t HAL_GetUIDw0(void);
253 uint32_t HAL_GetUIDw1(void);
254 uint32_t HAL_GetUIDw2(void);
255 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
256     defined(STM32F469xx) || defined(STM32F479xx)
257 void HAL_EnableMemorySwappingBank(void);
258 void HAL_DisableMemorySwappingBank(void);
259 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
260 /**
261   * @}
262   */
263 
264 /**
265   * @}
266   */
267 /* Private types -------------------------------------------------------------*/
268 /* Private variables ---------------------------------------------------------*/
269 /** @defgroup HAL_Private_Variables HAL Private Variables
270   * @{
271   */
272 /**
273   * @}
274   */
275 /* Private constants ---------------------------------------------------------*/
276 /** @defgroup HAL_Private_Constants HAL Private Constants
277   * @{
278   */
279 /**
280   * @}
281   */
282 /* Private macros ------------------------------------------------------------*/
283 /* Private functions ---------------------------------------------------------*/
284 /**
285   * @}
286   */
287 
288 /**
289   * @}
290   */
291 
292 #ifdef __cplusplus
293 }
294 #endif
295 
296 #endif /* __STM32F4xx_HAL_H */
297 
298 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
299