xref: /btstack/port/stm32-f4discovery-cc256x/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2c.h (revision 225f4ba4fe806afeda1ee8519bb5f4a8ce540af2)
1 /**
2   ******************************************************************************
3   * @file    stm32f4xx_hal_i2c.h
4   * @author  MCD Application Team
5   * @brief   Header file of I2C HAL module.
6   ******************************************************************************
7   * @attention
8   *
9   * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
10   * All rights reserved.</center></h2>
11   *
12   * This software component is licensed by ST under BSD 3-Clause license,
13   * the "License"; You may not use this file except in compliance with the
14   * License. You may obtain a copy of the License at:
15   *                        opensource.org/licenses/BSD-3-Clause
16   *
17   ******************************************************************************
18   */
19 
20 /* Define to prevent recursive inclusion -------------------------------------*/
21 #ifndef __STM32F4xx_HAL_I2C_H
22 #define __STM32F4xx_HAL_I2C_H
23 
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27 
28 /* Includes ------------------------------------------------------------------*/
29 #include "stm32f4xx_hal_def.h"
30 
31 /** @addtogroup STM32F4xx_HAL_Driver
32   * @{
33   */
34 
35 /** @addtogroup I2C
36   * @{
37   */
38 
39 /* Exported types ------------------------------------------------------------*/
40 /** @defgroup I2C_Exported_Types I2C Exported Types
41   * @{
42   */
43 
44 /** @defgroup I2C_Configuration_Structure_definition I2C Configuration Structure definition
45   * @brief  I2C Configuration Structure definition
46   * @{
47   */
48 typedef struct
49 {
50   uint32_t ClockSpeed;       /*!< Specifies the clock frequency.
51                                   This parameter must be set to a value lower than 400kHz */
52 
53   uint32_t DutyCycle;        /*!< Specifies the I2C fast mode duty cycle.
54                                   This parameter can be a value of @ref I2C_duty_cycle_in_fast_mode */
55 
56   uint32_t OwnAddress1;      /*!< Specifies the first device own address.
57                                   This parameter can be a 7-bit or 10-bit address. */
58 
59   uint32_t AddressingMode;   /*!< Specifies if 7-bit or 10-bit addressing mode is selected.
60                                   This parameter can be a value of @ref I2C_addressing_mode */
61 
62   uint32_t DualAddressMode;  /*!< Specifies if dual addressing mode is selected.
63                                   This parameter can be a value of @ref I2C_dual_addressing_mode */
64 
65   uint32_t OwnAddress2;      /*!< Specifies the second device own address if dual addressing mode is selected
66                                   This parameter can be a 7-bit address. */
67 
68   uint32_t GeneralCallMode;  /*!< Specifies if general call mode is selected.
69                                   This parameter can be a value of @ref I2C_general_call_addressing_mode */
70 
71   uint32_t NoStretchMode;    /*!< Specifies if nostretch mode is selected.
72                                   This parameter can be a value of @ref I2C_nostretch_mode */
73 
74 } I2C_InitTypeDef;
75 
76 /**
77   * @}
78   */
79 
80 /** @defgroup HAL_state_structure_definition HAL state structure definition
81   * @brief  HAL State structure definition
82   * @note  HAL I2C State value coding follow below described bitmap :
83   *          b7-b6  Error information
84   *             00 : No Error
85   *             01 : Abort (Abort user request on going)
86   *             10 : Timeout
87   *             11 : Error
88   *          b5     Peripheral initilisation status
89   *             0  : Reset (Peripheral not initialized)
90   *             1  : Init done (Peripheral initialized and ready to use. HAL I2C Init function called)
91   *          b4     (not used)
92   *             x  : Should be set to 0
93   *          b3
94   *             0  : Ready or Busy (No Listen mode ongoing)
95   *             1  : Listen (Peripheral in Address Listen Mode)
96   *          b2     Intrinsic process state
97   *             0  : Ready
98   *             1  : Busy (Peripheral busy with some configuration or internal operations)
99   *          b1     Rx state
100   *             0  : Ready (no Rx operation ongoing)
101   *             1  : Busy (Rx operation ongoing)
102   *          b0     Tx state
103   *             0  : Ready (no Tx operation ongoing)
104   *             1  : Busy (Tx operation ongoing)
105   * @{
106   */
107 typedef enum
108 {
109   HAL_I2C_STATE_RESET             = 0x00U,   /*!< Peripheral is not yet Initialized         */
110   HAL_I2C_STATE_READY             = 0x20U,   /*!< Peripheral Initialized and ready for use  */
111   HAL_I2C_STATE_BUSY              = 0x24U,   /*!< An internal process is ongoing            */
112   HAL_I2C_STATE_BUSY_TX           = 0x21U,   /*!< Data Transmission process is ongoing      */
113   HAL_I2C_STATE_BUSY_RX           = 0x22U,   /*!< Data Reception process is ongoing         */
114   HAL_I2C_STATE_LISTEN            = 0x28U,   /*!< Address Listen Mode is ongoing            */
115   HAL_I2C_STATE_BUSY_TX_LISTEN    = 0x29U,   /*!< Address Listen Mode and Data Transmission
116                                                  process is ongoing                         */
117   HAL_I2C_STATE_BUSY_RX_LISTEN    = 0x2AU,   /*!< Address Listen Mode and Data Reception
118                                                  process is ongoing                         */
119   HAL_I2C_STATE_ABORT             = 0x60U,   /*!< Abort user request ongoing                */
120   HAL_I2C_STATE_TIMEOUT           = 0xA0U,   /*!< Timeout state                             */
121   HAL_I2C_STATE_ERROR             = 0xE0U    /*!< Error                                     */
122 
123 } HAL_I2C_StateTypeDef;
124 
125 /**
126   * @}
127   */
128 
129 /** @defgroup HAL_mode_structure_definition HAL mode structure definition
130   * @brief  HAL Mode structure definition
131   * @note  HAL I2C Mode value coding follow below described bitmap :\n
132   *          b7     (not used)\n
133   *             x  : Should be set to 0\n
134   *          b6\n
135   *             0  : None\n
136   *             1  : Memory (HAL I2C communication is in Memory Mode)\n
137   *          b5\n
138   *             0  : None\n
139   *             1  : Slave (HAL I2C communication is in Slave Mode)\n
140   *          b4\n
141   *             0  : None\n
142   *             1  : Master (HAL I2C communication is in Master Mode)\n
143   *          b3-b2-b1-b0  (not used)\n
144   *             xxxx : Should be set to 0000
145   * @{
146   */
147 typedef enum
148 {
149   HAL_I2C_MODE_NONE               = 0x00U,   /*!< No I2C communication on going             */
150   HAL_I2C_MODE_MASTER             = 0x10U,   /*!< I2C communication is in Master Mode       */
151   HAL_I2C_MODE_SLAVE              = 0x20U,   /*!< I2C communication is in Slave Mode        */
152   HAL_I2C_MODE_MEM                = 0x40U    /*!< I2C communication is in Memory Mode       */
153 
154 } HAL_I2C_ModeTypeDef;
155 
156 /**
157   * @}
158   */
159 
160 /** @defgroup I2C_Error_Code_definition I2C Error Code definition
161   * @brief  I2C Error Code definition
162   * @{
163   */
164 #define HAL_I2C_ERROR_NONE              0x00000000U    /*!< No error              */
165 #define HAL_I2C_ERROR_BERR              0x00000001U    /*!< BERR error            */
166 #define HAL_I2C_ERROR_ARLO              0x00000002U    /*!< ARLO error            */
167 #define HAL_I2C_ERROR_AF                0x00000004U    /*!< AF error              */
168 #define HAL_I2C_ERROR_OVR               0x00000008U    /*!< OVR error             */
169 #define HAL_I2C_ERROR_DMA               0x00000010U    /*!< DMA transfer error    */
170 #define HAL_I2C_ERROR_TIMEOUT           0x00000020U    /*!< Timeout Error         */
171 #define HAL_I2C_ERROR_SIZE              0x00000040U    /*!< Size Management error */
172 #define HAL_I2C_ERROR_DMA_PARAM         0x00000080U    /*!< DMA Parameter Error   */
173 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
174 #define HAL_I2C_ERROR_INVALID_CALLBACK  0x00000100U    /*!< Invalid Callback error */
175 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
176 /**
177   * @}
178   */
179 
180 /** @defgroup I2C_handle_Structure_definition I2C handle Structure definition
181   * @brief  I2C handle Structure definition
182   * @{
183   */
184 typedef struct __I2C_HandleTypeDef
185 {
186   I2C_TypeDef                *Instance;      /*!< I2C registers base address               */
187 
188   I2C_InitTypeDef            Init;           /*!< I2C communication parameters             */
189 
190   uint8_t                    *pBuffPtr;      /*!< Pointer to I2C transfer buffer           */
191 
192   uint16_t                   XferSize;       /*!< I2C transfer size                        */
193 
194   __IO uint16_t              XferCount;      /*!< I2C transfer counter                     */
195 
196   __IO uint32_t              XferOptions;    /*!< I2C transfer options                     */
197 
198   __IO uint32_t              PreviousState;  /*!< I2C communication Previous state and mode
199                                                   context for internal usage               */
200 
201   DMA_HandleTypeDef          *hdmatx;        /*!< I2C Tx DMA handle parameters             */
202 
203   DMA_HandleTypeDef          *hdmarx;        /*!< I2C Rx DMA handle parameters             */
204 
205   HAL_LockTypeDef            Lock;           /*!< I2C locking object                       */
206 
207   __IO HAL_I2C_StateTypeDef  State;          /*!< I2C communication state                  */
208 
209   __IO HAL_I2C_ModeTypeDef   Mode;           /*!< I2C communication mode                   */
210 
211   __IO uint32_t              ErrorCode;      /*!< I2C Error code                           */
212 
213   __IO uint32_t              Devaddress;     /*!< I2C Target device address                */
214 
215   __IO uint32_t              Memaddress;     /*!< I2C Target memory address                */
216 
217   __IO uint32_t              MemaddSize;     /*!< I2C Target memory address  size          */
218 
219   __IO uint32_t              EventCount;     /*!< I2C Event counter                        */
220 
221 
222 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
223   void (* MasterTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c);           /*!< I2C Master Tx Transfer completed callback */
224   void (* MasterRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c);           /*!< I2C Master Rx Transfer completed callback */
225   void (* SlaveTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c);            /*!< I2C Slave Tx Transfer completed callback  */
226   void (* SlaveRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c);            /*!< I2C Slave Rx Transfer completed callback  */
227   void (* ListenCpltCallback)(struct __I2C_HandleTypeDef *hi2c);             /*!< I2C Listen Complete callback              */
228   void (* MemTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c);              /*!< I2C Memory Tx Transfer completed callback */
229   void (* MemRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c);              /*!< I2C Memory Rx Transfer completed callback */
230   void (* ErrorCallback)(struct __I2C_HandleTypeDef *hi2c);                  /*!< I2C Error callback                        */
231   void (* AbortCpltCallback)(struct __I2C_HandleTypeDef *hi2c);              /*!< I2C Abort callback                        */
232 
233   void (* AddrCallback)(struct __I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode);  /*!< I2C Slave Address Match callback */
234 
235   void (* MspInitCallback)(struct __I2C_HandleTypeDef *hi2c);                /*!< I2C Msp Init callback                     */
236   void (* MspDeInitCallback)(struct __I2C_HandleTypeDef *hi2c);              /*!< I2C Msp DeInit callback                   */
237 
238 #endif  /* USE_HAL_I2C_REGISTER_CALLBACKS */
239 } I2C_HandleTypeDef;
240 
241 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
242 /**
243   * @brief  HAL I2C Callback ID enumeration definition
244   */
245 typedef enum
246 {
247   HAL_I2C_MASTER_TX_COMPLETE_CB_ID      = 0x00U,    /*!< I2C Master Tx Transfer completed callback ID  */
248   HAL_I2C_MASTER_RX_COMPLETE_CB_ID      = 0x01U,    /*!< I2C Master Rx Transfer completed callback ID  */
249   HAL_I2C_SLAVE_TX_COMPLETE_CB_ID       = 0x02U,    /*!< I2C Slave Tx Transfer completed callback ID   */
250   HAL_I2C_SLAVE_RX_COMPLETE_CB_ID       = 0x03U,    /*!< I2C Slave Rx Transfer completed callback ID   */
251   HAL_I2C_LISTEN_COMPLETE_CB_ID         = 0x04U,    /*!< I2C Listen Complete callback ID               */
252   HAL_I2C_MEM_TX_COMPLETE_CB_ID         = 0x05U,    /*!< I2C Memory Tx Transfer callback ID            */
253   HAL_I2C_MEM_RX_COMPLETE_CB_ID         = 0x06U,    /*!< I2C Memory Rx Transfer completed callback ID  */
254   HAL_I2C_ERROR_CB_ID                   = 0x07U,    /*!< I2C Error callback ID                         */
255   HAL_I2C_ABORT_CB_ID                   = 0x08U,    /*!< I2C Abort callback ID                         */
256 
257   HAL_I2C_MSPINIT_CB_ID                 = 0x09U,    /*!< I2C Msp Init callback ID                      */
258   HAL_I2C_MSPDEINIT_CB_ID               = 0x0AU     /*!< I2C Msp DeInit callback ID                    */
259 
260 } HAL_I2C_CallbackIDTypeDef;
261 
262 /**
263   * @brief  HAL I2C Callback pointer definition
264   */
265 typedef  void (*pI2C_CallbackTypeDef)(I2C_HandleTypeDef *hi2c); /*!< pointer to an I2C callback function */
266 typedef  void (*pI2C_AddrCallbackTypeDef)(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); /*!< pointer to an I2C Address Match callback function */
267 
268 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
269 /**
270   * @}
271   */
272 
273 /**
274   * @}
275   */
276 /* Exported constants --------------------------------------------------------*/
277 
278 /** @defgroup I2C_Exported_Constants I2C Exported Constants
279   * @{
280   */
281 
282 /** @defgroup I2C_duty_cycle_in_fast_mode I2C duty cycle in fast mode
283   * @{
284   */
285 #define I2C_DUTYCYCLE_2                 0x00000000U
286 #define I2C_DUTYCYCLE_16_9              I2C_CCR_DUTY
287 /**
288   * @}
289   */
290 
291 /** @defgroup I2C_addressing_mode I2C addressing mode
292   * @{
293   */
294 #define I2C_ADDRESSINGMODE_7BIT         0x00004000U
295 #define I2C_ADDRESSINGMODE_10BIT        (I2C_OAR1_ADDMODE | 0x00004000U)
296 /**
297   * @}
298   */
299 
300 /** @defgroup I2C_dual_addressing_mode  I2C dual addressing mode
301   * @{
302   */
303 #define I2C_DUALADDRESS_DISABLE        0x00000000U
304 #define I2C_DUALADDRESS_ENABLE         I2C_OAR2_ENDUAL
305 /**
306   * @}
307   */
308 
309 /** @defgroup I2C_general_call_addressing_mode I2C general call addressing mode
310   * @{
311   */
312 #define I2C_GENERALCALL_DISABLE        0x00000000U
313 #define I2C_GENERALCALL_ENABLE         I2C_CR1_ENGC
314 /**
315   * @}
316   */
317 
318 /** @defgroup I2C_nostretch_mode I2C nostretch mode
319   * @{
320   */
321 #define I2C_NOSTRETCH_DISABLE          0x00000000U
322 #define I2C_NOSTRETCH_ENABLE           I2C_CR1_NOSTRETCH
323 /**
324   * @}
325   */
326 
327 /** @defgroup I2C_Memory_Address_Size I2C Memory Address Size
328   * @{
329   */
330 #define I2C_MEMADD_SIZE_8BIT            0x00000001U
331 #define I2C_MEMADD_SIZE_16BIT           0x00000010U
332 /**
333   * @}
334   */
335 
336 /** @defgroup I2C_XferDirection_definition I2C XferDirection definition
337   * @{
338   */
339 #define I2C_DIRECTION_RECEIVE           0x00000000U
340 #define I2C_DIRECTION_TRANSMIT          0x00000001U
341 /**
342   * @}
343   */
344 
345 /** @defgroup I2C_XferOptions_definition I2C XferOptions definition
346   * @{
347   */
348 #define  I2C_FIRST_FRAME                0x00000001U
349 #define  I2C_FIRST_AND_NEXT_FRAME       0x00000002U
350 #define  I2C_NEXT_FRAME                 0x00000004U
351 #define  I2C_FIRST_AND_LAST_FRAME       0x00000008U
352 #define  I2C_LAST_FRAME_NO_STOP         0x00000010U
353 #define  I2C_LAST_FRAME                 0x00000020U
354 
355 /* List of XferOptions in usage of :
356  * 1- Restart condition in all use cases (direction change or not)
357  */
358 #define  I2C_OTHER_FRAME                (0x00AA0000U)
359 #define  I2C_OTHER_AND_LAST_FRAME       (0xAA000000U)
360 /**
361   * @}
362   */
363 
364 /** @defgroup I2C_Interrupt_configuration_definition I2C Interrupt configuration definition
365   * @brief I2C Interrupt definition
366   *        Elements values convention: 0xXXXXXXXX
367   *           - XXXXXXXX  : Interrupt control mask
368   * @{
369   */
370 #define I2C_IT_BUF                      I2C_CR2_ITBUFEN
371 #define I2C_IT_EVT                      I2C_CR2_ITEVTEN
372 #define I2C_IT_ERR                      I2C_CR2_ITERREN
373 /**
374   * @}
375   */
376 
377 /** @defgroup I2C_Flag_definition I2C Flag definition
378   * @{
379   */
380 
381 #define I2C_FLAG_OVR                    0x00010800U
382 #define I2C_FLAG_AF                     0x00010400U
383 #define I2C_FLAG_ARLO                   0x00010200U
384 #define I2C_FLAG_BERR                   0x00010100U
385 #define I2C_FLAG_TXE                    0x00010080U
386 #define I2C_FLAG_RXNE                   0x00010040U
387 #define I2C_FLAG_STOPF                  0x00010010U
388 #define I2C_FLAG_ADD10                  0x00010008U
389 #define I2C_FLAG_BTF                    0x00010004U
390 #define I2C_FLAG_ADDR                   0x00010002U
391 #define I2C_FLAG_SB                     0x00010001U
392 #define I2C_FLAG_DUALF                  0x00100080U
393 #define I2C_FLAG_GENCALL                0x00100010U
394 #define I2C_FLAG_TRA                    0x00100004U
395 #define I2C_FLAG_BUSY                   0x00100002U
396 #define I2C_FLAG_MSL                    0x00100001U
397 /**
398   * @}
399   */
400 
401 /**
402   * @}
403   */
404 
405 /* Exported macros -----------------------------------------------------------*/
406 
407 /** @defgroup I2C_Exported_Macros I2C Exported Macros
408   * @{
409   */
410 
411 /** @brief Reset I2C handle state.
412   * @param  __HANDLE__ specifies the I2C Handle.
413   * @retval None
414   */
415 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
416 #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__)                do{                                                   \
417                                                                     (__HANDLE__)->State = HAL_I2C_STATE_RESET;       \
418                                                                     (__HANDLE__)->MspInitCallback = NULL;            \
419                                                                     (__HANDLE__)->MspDeInitCallback = NULL;          \
420                                                                   } while(0)
421 #else
422 #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__)                ((__HANDLE__)->State = HAL_I2C_STATE_RESET)
423 #endif
424 
425 /** @brief  Enable or disable the specified I2C interrupts.
426   * @param  __HANDLE__ specifies the I2C Handle.
427   * @param  __INTERRUPT__ specifies the interrupt source to enable or disable.
428   *         This parameter can be one of the following values:
429   *            @arg I2C_IT_BUF: Buffer interrupt enable
430   *            @arg I2C_IT_EVT: Event interrupt enable
431   *            @arg I2C_IT_ERR: Error interrupt enable
432   * @retval None
433   */
434 #define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__)   SET_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__))
435 #define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__)  CLEAR_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__))
436 
437 /** @brief  Checks if the specified I2C interrupt source is enabled or disabled.
438   * @param  __HANDLE__ specifies the I2C Handle.
439   * @param  __INTERRUPT__ specifies the I2C interrupt source to check.
440   *          This parameter can be one of the following values:
441   *            @arg I2C_IT_BUF: Buffer interrupt enable
442   *            @arg I2C_IT_EVT: Event interrupt enable
443   *            @arg I2C_IT_ERR: Error interrupt enable
444   * @retval The new state of __INTERRUPT__ (TRUE or FALSE).
445   */
446 #define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
447 
448 /** @brief  Checks whether the specified I2C flag is set or not.
449   * @param  __HANDLE__ specifies the I2C Handle.
450   * @param  __FLAG__ specifies the flag to check.
451   *         This parameter can be one of the following values:
452   *            @arg I2C_FLAG_OVR: Overrun/Underrun flag
453   *            @arg I2C_FLAG_AF: Acknowledge failure flag
454   *            @arg I2C_FLAG_ARLO: Arbitration lost flag
455   *            @arg I2C_FLAG_BERR: Bus error flag
456   *            @arg I2C_FLAG_TXE: Data register empty flag
457   *            @arg I2C_FLAG_RXNE: Data register not empty flag
458   *            @arg I2C_FLAG_STOPF: Stop detection flag
459   *            @arg I2C_FLAG_ADD10: 10-bit header sent flag
460   *            @arg I2C_FLAG_BTF: Byte transfer finished flag
461   *            @arg I2C_FLAG_ADDR: Address sent flag
462   *                                Address matched flag
463   *            @arg I2C_FLAG_SB: Start bit flag
464   *            @arg I2C_FLAG_DUALF: Dual flag
465   *            @arg I2C_FLAG_GENCALL: General call header flag
466   *            @arg I2C_FLAG_TRA: Transmitter/Receiver flag
467   *            @arg I2C_FLAG_BUSY: Bus busy flag
468   *            @arg I2C_FLAG_MSL: Master/Slave flag
469   * @retval The new state of __FLAG__ (TRUE or FALSE).
470   */
471 #define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) ((((uint8_t)((__FLAG__) >> 16U)) == 0x01U) ? \
472                                                   (((((__HANDLE__)->Instance->SR1) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET) : \
473                                                   (((((__HANDLE__)->Instance->SR2) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET))
474 
475 /** @brief  Clears the I2C pending flags which are cleared by writing 0 in a specific bit.
476   * @param  __HANDLE__ specifies the I2C Handle.
477   * @param  __FLAG__ specifies the flag to clear.
478   *         This parameter can be any combination of the following values:
479   *            @arg I2C_FLAG_OVR: Overrun/Underrun flag (Slave mode)
480   *            @arg I2C_FLAG_AF: Acknowledge failure flag
481   *            @arg I2C_FLAG_ARLO: Arbitration lost flag (Master mode)
482   *            @arg I2C_FLAG_BERR: Bus error flag
483   * @retval None
484   */
485 #define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR1 = ~((__FLAG__) & I2C_FLAG_MASK))
486 
487 /** @brief  Clears the I2C ADDR pending flag.
488   * @param  __HANDLE__ specifies the I2C Handle.
489   *         This parameter can be I2C where x: 1, 2, or 3 to select the I2C peripheral.
490   * @retval None
491   */
492 #define __HAL_I2C_CLEAR_ADDRFLAG(__HANDLE__)    \
493   do{                                           \
494     __IO uint32_t tmpreg = 0x00U;               \
495     tmpreg = (__HANDLE__)->Instance->SR1;       \
496     tmpreg = (__HANDLE__)->Instance->SR2;       \
497     UNUSED(tmpreg);                             \
498   } while(0)
499 
500 /** @brief  Clears the I2C STOPF pending flag.
501   * @param  __HANDLE__ specifies the I2C Handle.
502   * @retval None
503   */
504 #define __HAL_I2C_CLEAR_STOPFLAG(__HANDLE__)           \
505   do{                                                  \
506     __IO uint32_t tmpreg = 0x00U;                      \
507     tmpreg = (__HANDLE__)->Instance->SR1;              \
508     SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE);  \
509     UNUSED(tmpreg);                                    \
510   } while(0)
511 
512 /** @brief  Enable the specified I2C peripheral.
513   * @param  __HANDLE__ specifies the I2C Handle.
514   * @retval None
515   */
516 #define __HAL_I2C_ENABLE(__HANDLE__)                  SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)
517 
518 /** @brief  Disable the specified I2C peripheral.
519   * @param  __HANDLE__ specifies the I2C Handle.
520   * @retval None
521   */
522 #define __HAL_I2C_DISABLE(__HANDLE__)                 CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)
523 
524 /**
525   * @}
526   */
527 
528 /* Include I2C HAL Extension module */
529 #include "stm32f4xx_hal_i2c_ex.h"
530 
531 /* Exported functions --------------------------------------------------------*/
532 /** @addtogroup I2C_Exported_Functions
533   * @{
534   */
535 
536 /** @addtogroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
537   * @{
538   */
539 /* Initialization and de-initialization functions******************************/
540 HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c);
541 HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c);
542 void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c);
543 void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c);
544 
545 /* Callbacks Register/UnRegister functions  ***********************************/
546 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
547 HAL_StatusTypeDef HAL_I2C_RegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID, pI2C_CallbackTypeDef pCallback);
548 HAL_StatusTypeDef HAL_I2C_UnRegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID);
549 
550 HAL_StatusTypeDef HAL_I2C_RegisterAddrCallback(I2C_HandleTypeDef *hi2c, pI2C_AddrCallbackTypeDef pCallback);
551 HAL_StatusTypeDef HAL_I2C_UnRegisterAddrCallback(I2C_HandleTypeDef *hi2c);
552 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
553 /**
554   * @}
555   */
556 
557 /** @addtogroup I2C_Exported_Functions_Group2 Input and Output operation functions
558   * @{
559   */
560 /* IO operation functions  ****************************************************/
561 /******* Blocking mode: Polling */
562 HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
563 HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
564 HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);
565 HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);
566 HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
567 HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
568 HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout);
569 
570 /******* Non-Blocking mode: Interrupt */
571 HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
572 HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
573 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
574 HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
575 HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
576 HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
577 
578 HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
579 HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
580 HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
581 HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
582 HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c);
583 HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c);
584 HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress);
585 
586 /******* Non-Blocking mode: DMA */
587 HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
588 HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
589 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
590 HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
591 HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
592 HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
593 
594 HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
595 HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
596 HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
597 HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
598 /**
599   * @}
600   */
601 
602 /** @addtogroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
603  * @{
604  */
605 /******* I2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */
606 void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c);
607 void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c);
608 void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c);
609 void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c);
610 void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c);
611 void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c);
612 void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode);
613 void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c);
614 void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c);
615 void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c);
616 void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c);
617 void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c);
618 /**
619   * @}
620   */
621 
622 /** @addtogroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions
623   * @{
624   */
625 /* Peripheral State, Mode and Error functions  *********************************/
626 HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c);
627 HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c);
628 uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c);
629 
630 /**
631   * @}
632   */
633 
634 /**
635   * @}
636   */
637 /* Private types -------------------------------------------------------------*/
638 /* Private variables ---------------------------------------------------------*/
639 /* Private constants ---------------------------------------------------------*/
640 /** @defgroup I2C_Private_Constants I2C Private Constants
641   * @{
642   */
643 #define I2C_FLAG_MASK                    0x0000FFFFU
644 #define I2C_MIN_PCLK_FREQ_STANDARD       2000000U     /*!< 2 MHz                     */
645 #define I2C_MIN_PCLK_FREQ_FAST           4000000U     /*!< 4 MHz                     */
646 /**
647   * @}
648   */
649 
650 /* Private macros ------------------------------------------------------------*/
651 /** @defgroup I2C_Private_Macros I2C Private Macros
652   * @{
653   */
654 
655 #define I2C_MIN_PCLK_FREQ(__PCLK__, __SPEED__)             (((__SPEED__) <= 100000U) ? ((__PCLK__) < I2C_MIN_PCLK_FREQ_STANDARD) : ((__PCLK__) < I2C_MIN_PCLK_FREQ_FAST))
656 #define I2C_CCR_CALCULATION(__PCLK__, __SPEED__, __COEFF__)     (((((__PCLK__) - 1U)/((__SPEED__) * (__COEFF__))) + 1U) & I2C_CCR_CCR)
657 #define I2C_FREQRANGE(__PCLK__)                            ((__PCLK__)/1000000U)
658 #define I2C_RISE_TIME(__FREQRANGE__, __SPEED__)            (((__SPEED__) <= 100000U) ? ((__FREQRANGE__) + 1U) : ((((__FREQRANGE__) * 300U) / 1000U) + 1U))
659 #define I2C_SPEED_STANDARD(__PCLK__, __SPEED__)            ((I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 2U) < 4U)? 4U:I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 2U))
660 #define I2C_SPEED_FAST(__PCLK__, __SPEED__, __DUTYCYCLE__) (((__DUTYCYCLE__) == I2C_DUTYCYCLE_2)? I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 3U) : (I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 25U) | I2C_DUTYCYCLE_16_9))
661 #define I2C_SPEED(__PCLK__, __SPEED__, __DUTYCYCLE__)      (((__SPEED__) <= 100000U)? (I2C_SPEED_STANDARD((__PCLK__), (__SPEED__))) : \
662                                                                   ((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__)) & I2C_CCR_CCR) == 0U)? 1U : \
663                                                                   ((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__))) | I2C_CCR_FS))
664 
665 #define I2C_7BIT_ADD_WRITE(__ADDRESS__)                    ((uint8_t)((__ADDRESS__) & (uint8_t)(~I2C_OAR1_ADD0)))
666 #define I2C_7BIT_ADD_READ(__ADDRESS__)                     ((uint8_t)((__ADDRESS__) | I2C_OAR1_ADD0))
667 
668 #define I2C_10BIT_ADDRESS(__ADDRESS__)                     ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)0x00FF)))
669 #define I2C_10BIT_HEADER_WRITE(__ADDRESS__)                ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0x0300)) >> 7) | (uint16_t)0x00F0)))
670 #define I2C_10BIT_HEADER_READ(__ADDRESS__)                 ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0x0300)) >> 7) | (uint16_t)(0x00F1))))
671 
672 #define I2C_MEM_ADD_MSB(__ADDRESS__)                       ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0xFF00)) >> 8)))
673 #define I2C_MEM_ADD_LSB(__ADDRESS__)                       ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)0x00FF)))
674 
675 /** @defgroup I2C_IS_RTC_Definitions I2C Private macros to check input parameters
676   * @{
677   */
678 #define IS_I2C_DUTY_CYCLE(CYCLE) (((CYCLE) == I2C_DUTYCYCLE_2) || \
679                                   ((CYCLE) == I2C_DUTYCYCLE_16_9))
680 #define IS_I2C_ADDRESSING_MODE(ADDRESS) (((ADDRESS) == I2C_ADDRESSINGMODE_7BIT) || \
681                                          ((ADDRESS) == I2C_ADDRESSINGMODE_10BIT))
682 #define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLE) || \
683                                       ((ADDRESS) == I2C_DUALADDRESS_ENABLE))
684 #define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLE) || \
685                                    ((CALL) == I2C_GENERALCALL_ENABLE))
686 #define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLE) || \
687                                     ((STRETCH) == I2C_NOSTRETCH_ENABLE))
688 #define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \
689                                   ((SIZE) == I2C_MEMADD_SIZE_16BIT))
690 #define IS_I2C_CLOCK_SPEED(SPEED) (((SPEED) > 0U) && ((SPEED) <= 400000U))
691 #define IS_I2C_OWN_ADDRESS1(ADDRESS1) (((ADDRESS1) & 0xFFFFFC00U) == 0U)
692 #define IS_I2C_OWN_ADDRESS2(ADDRESS2) (((ADDRESS2) & 0xFFFFFF01U) == 0U)
693 #define IS_I2C_TRANSFER_OPTIONS_REQUEST(REQUEST)      (((REQUEST) == I2C_FIRST_FRAME)              || \
694                                                        ((REQUEST) == I2C_FIRST_AND_NEXT_FRAME)     || \
695                                                        ((REQUEST) == I2C_NEXT_FRAME)               || \
696                                                        ((REQUEST) == I2C_FIRST_AND_LAST_FRAME)     || \
697                                                        ((REQUEST) == I2C_LAST_FRAME)               || \
698                                                        ((REQUEST) == I2C_LAST_FRAME_NO_STOP)       || \
699                                                        IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST))
700 
701 #define IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_OTHER_FRAME)     || \
702                                                         ((REQUEST) == I2C_OTHER_AND_LAST_FRAME))
703 
704 #define I2C_CHECK_FLAG(__ISR__, __FLAG__)         ((((__ISR__) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET)
705 #define I2C_CHECK_IT_SOURCE(__CR1__, __IT__)      ((((__CR1__) & (__IT__)) == (__IT__)) ? SET : RESET)
706 /**
707   * @}
708   */
709 
710 /**
711   * @}
712   */
713 
714 /* Private functions ---------------------------------------------------------*/
715 /** @defgroup I2C_Private_Functions I2C Private Functions
716   * @{
717   */
718 
719 /**
720   * @}
721   */
722 
723 /**
724   * @}
725   */
726 
727 /**
728   * @}
729   */
730 
731 #ifdef __cplusplus
732 }
733 #endif
734 
735 
736 #endif /* __STM32F4xx_HAL_I2C_H */
737 
738 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
739