1 /* generated HAL source file - do not edit */
2 #include "hal_data.h"
3 #if (3) != BSP_IRQ_DISABLED
4 #if !defined(SSP_SUPPRESS_ISR_g_timer0) && !defined(SSP_SUPPRESS_ISR_GPT0)
5 SSP_VECTOR_DEFINE_CHAN(gpt_counter_overflow_isr, GPT, COUNTER_OVERFLOW, 0);
6 #endif
7 #endif
8 static gpt_instance_ctrl_t g_timer0_ctrl;
9 static const timer_on_gpt_cfg_t g_timer0_extend =
10 { .gtioca =
11 { .output_enabled = false, .stop_level = GPT_PIN_LEVEL_LOW },
12 .gtiocb =
13 { .output_enabled = false, .stop_level = GPT_PIN_LEVEL_LOW },
14 .shortest_pwm_signal = GPT_SHORTEST_LEVEL_OFF, };
15 static const timer_cfg_t g_timer0_cfg =
16 { .mode = TIMER_MODE_PERIODIC,
17 .period = 1,
18 .unit = TIMER_UNIT_PERIOD_MSEC,
19 .duty_cycle = 50,
20 .duty_cycle_unit = TIMER_PWM_UNIT_RAW_COUNTS,
21 .channel = 0,
22 .autostart = true,
23 .p_callback = timer_1ms,
24 .p_context = &g_timer0,
25 .p_extend = &g_timer0_extend,
26 .irq_ipl = (3), };
27 /* Instance structure to use this module. */
28 const timer_instance_t g_timer0 =
29 { .p_ctrl = &g_timer0_ctrl, .p_cfg = &g_timer0_cfg, .p_api = &g_timer_on_gpt };
30 #if (BSP_IRQ_DISABLED) != BSP_IRQ_DISABLED
31 #if !defined(SSP_SUPPRESS_ISR_g_transfer1) && !defined(SSP_SUPPRESS_ISR_DTCELC_EVENT_SCI0_RXI)
32 #define DTC_ACTIVATION_SRC_ELC_EVENT_SCI0_RXI
33 #if defined(DTC_ACTIVATION_SRC_ELC_EVENT_ELC_SOFTWARE_EVENT_0) && !defined(DTC_VECTOR_DEFINED_SOFTWARE_EVENT_0)
34 SSP_VECTOR_DEFINE(elc_software_event_isr, ELC, SOFTWARE_EVENT_0);
35 #define DTC_VECTOR_DEFINED_SOFTWARE_EVENT_0
36 #endif
37 #if defined(DTC_ACTIVATION_SRC_ELC_EVENT_ELC_SOFTWARE_EVENT_1) && !defined(DTC_VECTOR_DEFINED_SOFTWARE_EVENT_1)
38 SSP_VECTOR_DEFINE(elc_software_event_isr, ELC, SOFTWARE_EVENT_1);
39 #define DTC_VECTOR_DEFINED_SOFTWARE_EVENT_1
40 #endif
41 #endif
42 #endif
43
44 dtc_instance_ctrl_t g_transfer1_ctrl;
45 transfer_info_t g_transfer1_info =
46 { .dest_addr_mode = TRANSFER_ADDR_MODE_INCREMENTED,
47 .repeat_area = TRANSFER_REPEAT_AREA_DESTINATION,
48 .irq = TRANSFER_IRQ_END,
49 .chain_mode = TRANSFER_CHAIN_MODE_DISABLED,
50 .src_addr_mode = TRANSFER_ADDR_MODE_FIXED,
51 .size = TRANSFER_SIZE_1_BYTE,
52 .mode = TRANSFER_MODE_NORMAL,
53 .p_dest = (void *) NULL,
54 .p_src = (void const *) NULL,
55 .num_blocks = 0,
56 .length = 0, };
57 const transfer_cfg_t g_transfer1_cfg =
58 { .p_info = &g_transfer1_info,
59 .activation_source = ELC_EVENT_SCI0_RXI,
60 .auto_enable = false,
61 .p_callback = NULL,
62 .p_context = &g_transfer1,
63 .irq_ipl = (BSP_IRQ_DISABLED) };
64 /* Instance structure to use this module. */
65 const transfer_instance_t g_transfer1 =
66 { .p_ctrl = &g_transfer1_ctrl, .p_cfg = &g_transfer1_cfg, .p_api = &g_transfer_on_dtc };
67 #if (BSP_IRQ_DISABLED) != BSP_IRQ_DISABLED
68 #if !defined(SSP_SUPPRESS_ISR_g_transfer0) && !defined(SSP_SUPPRESS_ISR_DTCELC_EVENT_SCI0_TXI)
69 #define DTC_ACTIVATION_SRC_ELC_EVENT_SCI0_TXI
70 #if defined(DTC_ACTIVATION_SRC_ELC_EVENT_ELC_SOFTWARE_EVENT_0) && !defined(DTC_VECTOR_DEFINED_SOFTWARE_EVENT_0)
71 SSP_VECTOR_DEFINE(elc_software_event_isr, ELC, SOFTWARE_EVENT_0);
72 #define DTC_VECTOR_DEFINED_SOFTWARE_EVENT_0
73 #endif
74 #if defined(DTC_ACTIVATION_SRC_ELC_EVENT_ELC_SOFTWARE_EVENT_1) && !defined(DTC_VECTOR_DEFINED_SOFTWARE_EVENT_1)
75 SSP_VECTOR_DEFINE(elc_software_event_isr, ELC, SOFTWARE_EVENT_1);
76 #define DTC_VECTOR_DEFINED_SOFTWARE_EVENT_1
77 #endif
78 #endif
79 #endif
80
81 dtc_instance_ctrl_t g_transfer0_ctrl;
82 transfer_info_t g_transfer0_info =
83 { .dest_addr_mode = TRANSFER_ADDR_MODE_FIXED,
84 .repeat_area = TRANSFER_REPEAT_AREA_SOURCE,
85 .irq = TRANSFER_IRQ_END,
86 .chain_mode = TRANSFER_CHAIN_MODE_DISABLED,
87 .src_addr_mode = TRANSFER_ADDR_MODE_INCREMENTED,
88 .size = TRANSFER_SIZE_1_BYTE,
89 .mode = TRANSFER_MODE_NORMAL,
90 .p_dest = (void *) NULL,
91 .p_src = (void const *) NULL,
92 .num_blocks = 0,
93 .length = 0, };
94 const transfer_cfg_t g_transfer0_cfg =
95 { .p_info = &g_transfer0_info,
96 .activation_source = ELC_EVENT_SCI0_TXI,
97 .auto_enable = false,
98 .p_callback = NULL,
99 .p_context = &g_transfer0,
100 .irq_ipl = (BSP_IRQ_DISABLED) };
101 /* Instance structure to use this module. */
102 const transfer_instance_t g_transfer0 =
103 { .p_ctrl = &g_transfer0_ctrl, .p_cfg = &g_transfer0_cfg, .p_api = &g_transfer_on_dtc };
104 #if SCI_UART_CFG_RX_ENABLE
105 #if (2) != BSP_IRQ_DISABLED
106 #if !defined(SSP_SUPPRESS_ISR_g_uart0) && !defined(SSP_SUPPRESS_ISR_SCI0)
107 SSP_VECTOR_DEFINE_CHAN(sci_uart_rxi_isr, SCI, RXI, 0);
108 #endif
109 #endif
110 #endif
111 #if SCI_UART_CFG_TX_ENABLE
112 #if (2) != BSP_IRQ_DISABLED
113 #if !defined(SSP_SUPPRESS_ISR_g_uart0) && !defined(SSP_SUPPRESS_ISR_SCI0)
114 SSP_VECTOR_DEFINE_CHAN(sci_uart_txi_isr, SCI, TXI, 0);
115 #endif
116 #endif
117 #if (2) != BSP_IRQ_DISABLED
118 #if !defined(SSP_SUPPRESS_ISR_g_uart0) && !defined(SSP_SUPPRESS_ISR_SCI0)
119 SSP_VECTOR_DEFINE_CHAN(sci_uart_tei_isr, SCI, TEI, 0);
120 #endif
121 #endif
122 #endif
123 #if SCI_UART_CFG_RX_ENABLE
124 #if (BSP_IRQ_DISABLED) != BSP_IRQ_DISABLED
125 #if !defined(SSP_SUPPRESS_ISR_g_uart0) && !defined(SSP_SUPPRESS_ISR_SCI0)
126 SSP_VECTOR_DEFINE_CHAN(sci_uart_eri_isr, SCI, ERI, 0);
127 #endif
128 #endif
129 #endif
130 sci_uart_instance_ctrl_t g_uart0_ctrl;
131
132 /** UART extended configuration for UARTonSCI HAL driver */
133 const uart_on_sci_cfg_t g_uart0_cfg_extend =
134 { .clk_src = SCI_CLK_SRC_INT, .baudclk_out = false, .rx_edge_start = true, .noisecancel_en = false, .p_extpin_ctrl =
135 NULL,
136 .bitrate_modulation = true, .rx_fifo_trigger = SCI_UART_RX_FIFO_TRIGGER_1, .baud_rate_error_x_1000 = (uint32_t) (
137 2.0 * 1000),
138 .uart_comm_mode = UART_MODE_RS232, .uart_rs485_mode = UART_RS485_HD, .rs485_de_pin = IOPORT_PORT_09_PIN_14, };
139
140 /** UART interface configuration */
141 const uart_cfg_t g_uart0_cfg =
142 { .channel = 0, .baud_rate = 115200, .data_bits = UART_DATA_BITS_8, .parity = UART_PARITY_OFF, .stop_bits =
143 UART_STOP_BITS_1,
144 .ctsrts_en = false, .p_callback = user_uart_callback, .p_context = &g_uart0, .p_extend = &g_uart0_cfg_extend,
145 #define SYNERGY_NOT_DEFINED (1)
146 #if (SYNERGY_NOT_DEFINED == g_transfer0)
147 .p_transfer_tx = NULL,
148 #else
149 .p_transfer_tx = &g_transfer0,
150 #endif
151 #if (SYNERGY_NOT_DEFINED == g_transfer1)
152 .p_transfer_rx = NULL,
153 #else
154 .p_transfer_rx = &g_transfer1,
155 #endif
156 #undef SYNERGY_NOT_DEFINED
157 .rxi_ipl = (2),
158 .txi_ipl = (2), .tei_ipl = (2), .eri_ipl = (BSP_IRQ_DISABLED), };
159
160 /* Instance structure to use this module. */
161 const uart_instance_t g_uart0 =
162 { .p_ctrl = &g_uart0_ctrl, .p_cfg = &g_uart0_cfg, .p_api = &g_uart_on_sci };
g_hal_init(void)163 void g_hal_init(void)
164 {
165 g_common_init ();
166 }
167