1 /* 2 * Copyright (C) 2009-2012 by Matthias Ringwald 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. Neither the name of the copyright holders nor the names of 14 * contributors may be used to endorse or promote products derived 15 * from this software without specific prior written permission. 16 * 4. Any redistribution, use, or modification is done solely for 17 * personal benefit and not for any commercial purpose or for 18 * monetary gain. 19 * 20 * THIS SOFTWARE IS PROVIDED BY MATTHIAS RINGWALD AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 23 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL MATTHIAS 24 * RINGWALD OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 26 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS 27 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 28 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF 30 * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 * 33 * Please inquire about commercial licensing options at [email protected] 34 * 35 */ 36 37 #define __BTSTACK_FILE__ "btstack_chipset_cc256x.c" 38 39 /* 40 * btstack_chipset_cc256x.c 41 * 42 * Adapter to use cc256x-based chipsets with BTstack 43 * 44 * Handles init script (a.k.a. Service Patch) 45 * Allows for non-standard UART baud rate 46 * Allows to configure transmit power 47 * Allows to activate eHCILL deep sleep mode 48 * 49 * Issues with mspgcc LTS: 50 * - 20 bit support is not there yet -> .text cannot get bigger than 48 kb 51 * - arrays cannot have more than 32k entries 52 * 53 * workarounds: 54 * - store init script in .fartext and use assembly code to read from there 55 * - split into two arrays 56 * 57 * Issues with AVR 58 * - Harvard architecture doesn't allow to store init script directly -> use avr-libc helpers 59 * 60 * Documentation for TI VS CC256x commands: http://processors.wiki.ti.com/index.php/CC256x_VS_HCI_Commands 61 * 62 */ 63 64 #include "btstack_config.h" 65 #include "btstack_chipset_cc256x.h" 66 #include "btstack_debug.h" 67 68 #include <stddef.h> /* NULL */ 69 #include <stdio.h> 70 #include <string.h> /* memcpy */ 71 72 #if defined(__GNUC__) && defined(__MSP430X__) && (__MSP430X__ > 0) 73 #include "hal_compat.h" 74 #endif 75 76 #ifdef __AVR__ 77 #include <avr/pgmspace.h> 78 #endif 79 80 #include "btstack_control.h" 81 82 83 // default init script provided by separate .c file 84 extern const uint8_t cc256x_init_script[]; 85 extern const uint32_t cc256x_init_script_size; 86 87 // custom init script set by btstack_chipset_cc256x_set_init_script 88 // used to select init scripts before each power up 89 static const uint8_t * custom_init_script; 90 static uint32_t custom_init_script_size; 91 92 // init script to use: either cc256x_init_script or custom_init_script 93 static const uint8_t * init_script; 94 static uint32_t init_script_size; 95 96 // power in db - set by btstack_chipset_cc256x_set_power 97 static int16_t init_power_in_dB = 13; // 13 dBm 98 99 // upload position 100 static uint32_t init_script_offset = 0; 101 102 // support for SCO over HCI 103 #ifdef ENABLE_SCO_OVER_HCI 104 static int init_send_route_sco_over_hci = 0; 105 static const uint8_t hci_route_sco_over_hci[] = { 106 #if 1 107 // Follow recommendation from https://e2e.ti.com/support/wireless_connectivity/bluetooth_cc256x/f/660/t/397004 108 // route SCO over HCI (connection type=1, tx buffer size = 120, tx buffer max latency= 720, accept packets with CRC Error 109 0x10, 0xfe, 0x05, 0x01, 0x78, 0xd0, 0x02, 0x01, 110 #else 111 // Configure SCO via I2S interface - 256 kbps 112 // Send_HCI_VS_Write_CODEC_Config 0xFD06, 113 0x06, 0xfd, 114 // len 115 34, 116 //3072, - clock rate 3072000 hz 117 0x00, 0x01, 118 // 0x00 - clock direction: output = master 119 0x00, 120 // 8000, framesync frequency in hz 121 0x40, 0x1f, 0x00, 0x00, 122 // 0x0001, framesync duty cycle 123 0x01, 0x00, 124 // 1, framesync edge 125 1, 126 // 0x00, framesync polarity 127 0x00, 128 // 0x00, RESERVED 129 0x00, 130 // 16, channel 1 out size 131 8, 0, 132 // 0x0001, channel 1 out offset 133 0x01, 0x00, 134 // 1, channel 1 out edge 135 1, 136 // 16, channel 1 in size 137 8, 0, 138 // 0x0001, channel 1 in offset 139 0x01, 0x00, 140 // 0, channel 1 in edge 141 0, 142 // 0x00, RESERVED 143 0x00, 144 // 16, channel 2 out size 145 8, 0, 146 // 17, channel 2 out offset 147 9, 0, 148 // 0x01, channel 2 out edge 149 0x01, 150 // 16, channel 2 in size 151 8, 0, 152 // 17, channel 2 in offset 153 9, 0, 154 // 0x00, channel 2 in edge 155 0x00, 156 // 0x0001, RESERVED 157 0x00 158 #endif 159 }; 160 #endif 161 162 static void chipset_init(const void * config){ 163 init_script_offset = 0; 164 if (custom_init_script){ 165 log_info("cc256x: using custom init script"); 166 init_script = custom_init_script; 167 init_script_size = custom_init_script_size; 168 } else { 169 log_info("cc256x: using default init script"); 170 init_script = cc256x_init_script; 171 init_script_size = cc256x_init_script_size; 172 } 173 #ifdef ENABLE_SCO_OVER_HCI 174 init_send_route_sco_over_hci = 1; 175 #endif 176 } 177 178 static void chipset_set_baudrate_command(uint32_t baudrate, uint8_t *hci_cmd_buffer){ 179 hci_cmd_buffer[0] = 0x36; 180 hci_cmd_buffer[1] = 0xFF; 181 hci_cmd_buffer[2] = 0x04; 182 hci_cmd_buffer[3] = baudrate & 0xff; 183 hci_cmd_buffer[4] = (baudrate >> 8) & 0xff; 184 hci_cmd_buffer[5] = (baudrate >> 16) & 0xff; 185 hci_cmd_buffer[6] = 0; 186 } 187 188 static void chipset_set_bd_addr_command(bd_addr_t addr, uint8_t *hci_cmd_buffer){ 189 hci_cmd_buffer[0] = 0x06; 190 hci_cmd_buffer[1] = 0xFC; 191 hci_cmd_buffer[2] = 0x06; 192 reverse_bd_addr(addr, &hci_cmd_buffer[3]); 193 } 194 195 // Output Power control from: http://e2e.ti.com/support/low_power_rf/f/660/p/134853/484767.aspx 196 #define NUM_POWER_LEVELS 16 197 #define DB_MIN_LEVEL -35 198 #define DB_PER_LEVEL 5 199 #define DB_DYNAMIC_RANGE 30 200 201 static int get_max_power_for_modulation_type(int type){ 202 // a) limit max output power 203 int power_db; 204 switch (type){ 205 case 0: // GFSK 206 power_db = 12; 207 break; 208 default: // EDRx 209 power_db = 10; 210 break; 211 } 212 if (power_db > init_power_in_dB) { 213 power_db = init_power_in_dB; 214 } 215 return power_db; 216 } 217 218 static int get_highest_level_for_given_power(int power_db, int recommended_db){ 219 int i = NUM_POWER_LEVELS-1; 220 while (i) { 221 if (power_db <= recommended_db) { 222 return i; 223 } 224 power_db -= DB_PER_LEVEL; 225 i--; 226 } 227 return 0; 228 } 229 230 static void update_set_power_vector(uint8_t *hci_cmd_buffer){ 231 int i; 232 int modulation_type = hci_cmd_buffer[3]; 233 int power_db = get_max_power_for_modulation_type(modulation_type); 234 int dynamic_range = 0; 235 236 // f) don't touch level 0 237 for ( i = (NUM_POWER_LEVELS-1) ; i >= 1 ; i--){ 238 239 #ifdef ENABLE_BLE 240 // level 1 is BLE transmit power for GFSK 241 if (i == 1 && modulation_type == 0) { 242 hci_cmd_buffer[4+1] = 2 * get_max_power_for_modulation_type(modulation_type); 243 // as level 0 isn't set, we're done 244 continue; 245 } 246 #endif 247 hci_cmd_buffer[4+i] = 2 * power_db; 248 249 if (dynamic_range + DB_PER_LEVEL > DB_DYNAMIC_RANGE) continue; // e) 250 251 power_db -= DB_PER_LEVEL; // d) 252 dynamic_range += DB_PER_LEVEL; 253 254 if (power_db > DB_MIN_LEVEL) continue; 255 256 power_db = DB_MIN_LEVEL; // b) 257 } 258 } 259 260 // max permitted power for class 2 devices: 4 dBm 261 static void update_set_class2_single_power(uint8_t * hci_cmd_buffer){ 262 const int max_power_class_2 = 4; 263 int i = 0; 264 for (i=0;i<3;i++){ 265 hci_cmd_buffer[3+i] = get_highest_level_for_given_power(get_max_power_for_modulation_type(i), max_power_class_2); 266 } 267 } 268 269 // eHCILL activate from http://e2e.ti.com/support/low_power_rf/f/660/p/134855/484776.aspx 270 static void update_sleep_mode_configurations(uint8_t * hci_cmd_buffer){ 271 #ifdef ENABLE_EHCILL 272 hci_cmd_buffer[4] = 1; 273 #else 274 hci_cmd_buffer[4] = 0; 275 #endif 276 } 277 278 static void update_init_script_command(uint8_t *hci_cmd_buffer){ 279 280 uint16_t opcode = hci_cmd_buffer[0] | (hci_cmd_buffer[1] << 8); 281 282 switch (opcode){ 283 case 0xFD87: 284 update_set_class2_single_power(hci_cmd_buffer); 285 break; 286 case 0xFD82: 287 update_set_power_vector(hci_cmd_buffer); 288 break; 289 case 0xFD0C: 290 update_sleep_mode_configurations(hci_cmd_buffer); 291 break; 292 default: 293 break; 294 } 295 } 296 297 static btstack_chipset_result_t chipset_next_command(uint8_t * hci_cmd_buffer){ 298 if (init_script_offset >= init_script_size) { 299 300 #ifdef ENABLE_SCO_OVER_HCI 301 // append send route SCO over HCI if requested 302 if (init_send_route_sco_over_hci){ 303 init_send_route_sco_over_hci = 0; 304 memcpy(hci_cmd_buffer, hci_route_sco_over_hci, sizeof(hci_route_sco_over_hci)); 305 return BTSTACK_CHIPSET_VALID_COMMAND; 306 } 307 #endif 308 309 return BTSTACK_CHIPSET_DONE; 310 } 311 312 // extracted init script has 0x01 cmd packet type, but BTstack expects them without 313 init_script_offset++; 314 315 #if defined(__GNUC__) && defined(__MSP430X__) && (__MSP430X__ > 0) 316 317 // workaround: use FlashReadBlock with 32-bit integer and assume init script starts at 0x10000 318 uint32_t init_script_addr = 0x10000; 319 FlashReadBlock(&hci_cmd_buffer[0], init_script_addr + init_script_offset, 3); // cmd header 320 init_script_offset += 3; 321 int payload_len = hci_cmd_buffer[2]; 322 FlashReadBlock(&hci_cmd_buffer[3], init_script_addr + init_script_offset, payload_len); // cmd payload 323 324 #elif defined (__AVR__) 325 326 // workaround: use memcpy_P to access init script in lower 64 kB of flash 327 memcpy_P(&hci_cmd_buffer[0], &init_script[init_script_offset], 3); 328 init_script_offset += 3; 329 int payload_len = hci_cmd_buffer[2]; 330 memcpy_P(&hci_cmd_buffer[3], &init_script[init_script_offset], payload_len); 331 332 #else 333 334 // use memcpy with pointer 335 uint8_t * init_script_ptr = (uint8_t*) &init_script[0]; 336 memcpy(&hci_cmd_buffer[0], init_script_ptr + init_script_offset, 3); // cmd header 337 init_script_offset += 3; 338 int payload_len = hci_cmd_buffer[2]; 339 memcpy(&hci_cmd_buffer[3], init_script_ptr + init_script_offset, payload_len); // cmd payload 340 341 #endif 342 343 init_script_offset += payload_len; 344 345 // control power commands and ehcill 346 update_init_script_command(hci_cmd_buffer); 347 348 return BTSTACK_CHIPSET_VALID_COMMAND; 349 } 350 351 352 // MARK: public API 353 void btstack_chipset_cc256x_set_power(int16_t power_in_dB){ 354 init_power_in_dB = power_in_dB; 355 } 356 357 void btstack_chipset_cc256x_set_init_script(uint8_t * data, uint32_t size){ 358 custom_init_script = data; 359 custom_init_script_size = size; 360 } 361 362 static const btstack_chipset_t btstack_chipset_cc256x = { 363 "CC256x", 364 chipset_init, 365 chipset_next_command, 366 chipset_set_baudrate_command, 367 chipset_set_bd_addr_command, 368 }; 369 370 const btstack_chipset_t * btstack_chipset_cc256x_instance(void){ 371 return &btstack_chipset_cc256x; 372 } 373 374