1 /* 2 * Copyright (C) 2009-2012 by Matthias Ringwald 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. Neither the name of the copyright holders nor the names of 14 * contributors may be used to endorse or promote products derived 15 * from this software without specific prior written permission. 16 * 4. Any redistribution, use, or modification is done solely for 17 * personal benefit and not for any commercial purpose or for 18 * monetary gain. 19 * 20 * THIS SOFTWARE IS PROVIDED BY MATTHIAS RINGWALD AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 23 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL MATTHIAS 24 * RINGWALD OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 26 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS 27 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 28 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF 30 * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 * 33 * Please inquire about commercial licensing options at [email protected] 34 * 35 */ 36 37 /* 38 * btstack_chipset_cc256x.c 39 * 40 * Adapter to use cc256x-based chipsets with BTstack 41 * 42 * Handles init script (a.k.a. Service Patch) 43 * Allows for non-standard UART baud rate 44 * Allows to configure transmit power 45 * Allows to activate eHCILL deep sleep mode 46 * 47 * Issues with mspgcc LTS: 48 * - 20 bit support is not there yet -> .text cannot get bigger than 48 kb 49 * - arrays cannot have more than 32k entries 50 * 51 * workarounds: 52 * - store init script in .fartext and use assembly code to read from there 53 * - split into two arrays 54 * 55 * Issues with AVR 56 * - Harvard architecture doesn't allow to store init script directly -> use avr-libc helpers 57 * 58 * Documentation for TI VS CC256x commands: http://processors.wiki.ti.com/index.php/CC256x_VS_HCI_Commands 59 * 60 */ 61 62 #include "btstack_config.h" 63 #include "btstack_chipset_cc256x.h" 64 65 #include <stddef.h> /* NULL */ 66 #include <stdio.h> 67 #include <string.h> /* memcpy */ 68 69 #if defined(__GNUC__) && defined(__MSP430X__) && (__MSP430X__ > 0) 70 #include "hal_compat.h" 71 #endif 72 73 #ifdef __AVR__ 74 #include <avr/pgmspace.h> 75 #endif 76 77 #include "btstack_control.h" 78 79 80 // actual init script provided by seperate .c file 81 extern const uint8_t cc256x_init_script[]; 82 extern const uint32_t cc256x_init_script_size; 83 84 // init script 85 static uint32_t init_script_offset = 0; 86 static int16_t init_power_in_dB = 13; // 13 dBm 87 static int init_ehcill_enabled = 0; 88 89 // support for SCO over HCI 90 #ifdef ENABLE_SCO_OVER_HCI 91 static int init_send_route_sco_over_hci = 0; 92 // route SCO over HCI (connection type=1, tx buffer size = 0x00 (don't change), tx buffer max latency=0x0000(don't chnage)), accept packets - 0) 93 static const uint8_t hci_route_sco_over_hci[] = { 94 0x10, 0xfe, 0x05, 0x01, 0x00, 0x00, 0x00, 0x00 95 }; 96 #endif 97 98 static void chipset_init(const void * config){ 99 init_script_offset = 0; 100 #ifdef ENABLE_SCO_OVER_HCI 101 init_send_route_sco_over_hci = 1; 102 #endif 103 } 104 105 static void chipset_set_baudrate_command(uint32_t baudrate, uint8_t *hci_cmd_buffer){ 106 hci_cmd_buffer[0] = 0x36; 107 hci_cmd_buffer[1] = 0xFF; 108 hci_cmd_buffer[2] = 0x04; 109 hci_cmd_buffer[3] = baudrate & 0xff; 110 hci_cmd_buffer[4] = (baudrate >> 8) & 0xff; 111 hci_cmd_buffer[5] = (baudrate >> 16) & 0xff; 112 hci_cmd_buffer[6] = 0; 113 } 114 115 #if 0 116 static void chipset_set_bd_addr_command(bd_addr_t addr, uint8_t *hci_cmd_buffer){ 117 } 118 #endif 119 120 // Output Power control from: http://e2e.ti.com/support/low_power_rf/f/660/p/134853/484767.aspx 121 #define NUM_POWER_LEVELS 16 122 #define DB_MIN_LEVEL -35 123 #define DB_PER_LEVEL 5 124 #define DB_DYNAMIC_RANGE 30 125 126 static int get_max_power_for_modulation_type(int type){ 127 // a) limit max output power 128 int power_db; 129 switch (type){ 130 case 0: // GFSK 131 power_db = 12; 132 break; 133 default: // EDRx 134 power_db = 10; 135 break; 136 } 137 if (power_db > init_power_in_dB) { 138 power_db = init_power_in_dB; 139 } 140 return power_db; 141 } 142 143 static int get_highest_level_for_given_power(int power_db, int recommended_db){ 144 int i = NUM_POWER_LEVELS-1; 145 while (i) { 146 if (power_db <= recommended_db) { 147 return i; 148 } 149 power_db -= DB_PER_LEVEL; 150 i--; 151 } 152 return 0; 153 } 154 155 static void update_set_power_vector(uint8_t *hci_cmd_buffer){ 156 int i; 157 int modulation_type = hci_cmd_buffer[3]; 158 int power_db = get_max_power_for_modulation_type(modulation_type); 159 int dynamic_range = 0; 160 161 // f) don't touch level 0 162 for ( i = (NUM_POWER_LEVELS-1) ; i >= 1 ; i--){ 163 164 #ifdef ENABLE_BLE 165 // level 1 is BLE transmit power for GFSK 166 if (i == 1 && modulation_type == 0) { 167 hci_cmd_buffer[4+1] = 2 * get_max_power_for_modulation_type(modulation_type); 168 // as level 0 isn't set, we're done 169 continue; 170 } 171 #endif 172 hci_cmd_buffer[4+i] = 2 * power_db; 173 174 if (dynamic_range + DB_PER_LEVEL > DB_DYNAMIC_RANGE) continue; // e) 175 176 power_db -= DB_PER_LEVEL; // d) 177 dynamic_range += DB_PER_LEVEL; 178 179 if (power_db > DB_MIN_LEVEL) continue; 180 181 power_db = DB_MIN_LEVEL; // b) 182 } 183 } 184 185 // max permitted power for class 2 devices: 4 dBm 186 static void update_set_class2_single_power(uint8_t * hci_cmd_buffer){ 187 const int max_power_class_2 = 4; 188 int i = 0; 189 for (i=0;i<3;i++){ 190 hci_cmd_buffer[3+i] = get_highest_level_for_given_power(get_max_power_for_modulation_type(i), max_power_class_2); 191 } 192 } 193 194 // eHCILL activate from http://e2e.ti.com/support/low_power_rf/f/660/p/134855/484776.aspx 195 static void update_sleep_mode_configurations(uint8_t * hci_cmd_buffer){ 196 if (init_ehcill_enabled) { 197 hci_cmd_buffer[4] = 1; 198 } else { 199 hci_cmd_buffer[4] = 0; 200 } 201 } 202 203 static void update_init_script_command(uint8_t *hci_cmd_buffer){ 204 205 uint16_t opcode = hci_cmd_buffer[0] | (hci_cmd_buffer[1] << 8); 206 207 switch (opcode){ 208 case 0xFD87: 209 update_set_class2_single_power(hci_cmd_buffer); 210 break; 211 case 0xFD82: 212 update_set_power_vector(hci_cmd_buffer); 213 break; 214 case 0xFD0C: 215 update_sleep_mode_configurations(hci_cmd_buffer); 216 break; 217 default: 218 break; 219 } 220 } 221 222 static btstack_chipset_result_t chipset_next_command(uint8_t * hci_cmd_buffer){ 223 if (init_script_offset >= cc256x_init_script_size) { 224 225 #ifdef ENABLE_SCO_OVER_HCI 226 // append send route SCO over HCI if requested 227 if (init_send_route_sco_over_hci){ 228 init_send_route_sco_over_hci = 0; 229 memcpy(hci_cmd_buffer, hci_route_sco_over_hci, sizeof(hci_route_sco_over_hci)); 230 return BTSTACK_CHIPSET_VALID_COMMAND; 231 } 232 #endif 233 234 return BTSTACK_CHIPSET_DONE; 235 } 236 237 // extracted init script has 0x01 cmd packet type, but BTstack expects them without 238 init_script_offset++; 239 240 #if defined(__GNUC__) && defined(__MSP430X__) && (__MSP430X__ > 0) 241 242 // workaround: use FlashReadBlock with 32-bit integer and assume init script starts at 0x10000 243 uint32_t init_script_addr = 0x10000; 244 FlashReadBlock(&hci_cmd_buffer[0], init_script_addr + init_script_offset, 3); // cmd header 245 init_script_offset += 3; 246 int payload_len = hci_cmd_buffer[2]; 247 FlashReadBlock(&hci_cmd_buffer[3], init_script_addr + init_script_offset, payload_len); // cmd payload 248 249 #elif defined (__AVR__) 250 251 // workaround: use memcpy_P to access init script in lower 64 kB of flash 252 memcpy_P(&hci_cmd_buffer[0], &cc256x_init_script[init_script_offset], 3); 253 init_script_offset += 3; 254 int payload_len = hci_cmd_buffer[2]; 255 memcpy_P(&hci_cmd_buffer[3], &cc256x_init_script[init_script_offset], payload_len); 256 257 #else 258 259 // use memcpy with pointer 260 uint8_t * init_script_ptr = (uint8_t*) &cc256x_init_script[0]; 261 memcpy(&hci_cmd_buffer[0], init_script_ptr + init_script_offset, 3); // cmd header 262 init_script_offset += 3; 263 int payload_len = hci_cmd_buffer[2]; 264 memcpy(&hci_cmd_buffer[3], init_script_ptr + init_script_offset, payload_len); // cmd payload 265 266 #endif 267 268 init_script_offset += payload_len; 269 270 // control power commands and ehcill 271 update_init_script_command(hci_cmd_buffer); 272 273 return BTSTACK_CHIPSET_VALID_COMMAND; 274 } 275 276 277 // MARK: public API 278 void btstack_chipset_cc256x_enable_ehcill(int on){ 279 init_ehcill_enabled = on; 280 } 281 282 int btstack_chipset_cc256x_ehcill_enabled(void){ 283 return init_ehcill_enabled; 284 } 285 286 void btstack_chipset_cc256x_set_power(int16_t power_in_dB){ 287 init_power_in_dB = power_in_dB; 288 } 289 290 static const btstack_chipset_t btstack_chipset_cc256x = { 291 "CC256x", 292 chipset_init, 293 chipset_next_command, 294 chipset_set_baudrate_command, 295 NULL, // set bd addr command not available or impemented 296 }; 297 298 const btstack_chipset_t * btstack_chipset_cc256x_instance(void){ 299 return &btstack_chipset_cc256x; 300 } 301 302