1 /* 2 * Copyright (C) 2009-2012 by Matthias Ringwald 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. Neither the name of the copyright holders nor the names of 14 * contributors may be used to endorse or promote products derived 15 * from this software without specific prior written permission. 16 * 4. Any redistribution, use, or modification is done solely for 17 * personal benefit and not for any commercial purpose or for 18 * monetary gain. 19 * 20 * THIS SOFTWARE IS PROVIDED BY MATTHIAS RINGWALD AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 23 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL MATTHIAS 24 * RINGWALD OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 26 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS 27 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 28 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF 30 * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 * 33 * Please inquire about commercial licensing options at [email protected] 34 * 35 */ 36 37 #define BTSTACK_FILE__ "btstack_chipset_cc256x.c" 38 39 /* 40 * btstack_chipset_cc256x.c 41 * 42 * Adapter to use cc256x-based chipsets with BTstack 43 * 44 * Handles init script (a.k.a. Service Patch) 45 * Allows for non-standard UART baud rate 46 * Allows to configure transmit power 47 * Allows to activate eHCILL deep sleep mode 48 * 49 * Issues with mspgcc LTS: 50 * - 20 bit support is not there yet -> .text cannot get bigger than 48 kb 51 * - arrays cannot have more than 32k entries 52 * 53 * workarounds: 54 * - store init script in .fartext and use assembly code to read from there 55 * - split into two arrays 56 * 57 * Issues with AVR 58 * - Harvard architecture doesn't allow to store init script directly -> use avr-libc helpers 59 * 60 * Documentation for TI VS CC256x commands: http://processors.wiki.ti.com/index.php/CC256x_VS_HCI_Commands 61 * 62 */ 63 64 #include "btstack_config.h" 65 #include "btstack_chipset_cc256x.h" 66 #include "btstack_debug.h" 67 #include "hci.h" 68 69 #include <stddef.h> /* NULL */ 70 #include <stdio.h> 71 #include <string.h> /* memcpy */ 72 73 // assert outgoing and incoming hci packet buffers can hold max hci command resp. event packet 74 #if HCI_OUTGOING_PACKET_BUFFER_SIZE < (HCI_CMD_HEADER_SIZE + 255) 75 #error "HCI_OUTGOING_PACKET_BUFFER_SIZE to small. Outgoing HCI packet buffer to small for largest HCI Command packet. Please set HCI_ACL_PAYLOAD_SIZE to 258 or higher." 76 #endif 77 #if HCI_INCOMING_PACKET_BUFFER_SIZE < (HCI_EVENT_HEADER_SIZE + 255) 78 #error "HCI_INCOMING_PACKET_BUFFER_SIZE to small. Incoming HCI packet buffer to small for largest HCI Event packet. Please set HCI_ACL_PAYLOAD_SIZE to 257 or higher." 79 #endif 80 81 #if defined(__GNUC__) && defined(__MSP430X__) && (__MSP430X__ > 0) 82 #include "hal_compat.h" 83 #endif 84 85 #ifdef __AVR__ 86 #include <avr/pgmspace.h> 87 #endif 88 89 #include "btstack_control.h" 90 91 92 // default init script provided by separate .c file 93 extern const uint8_t cc256x_init_script[]; 94 extern const uint32_t cc256x_init_script_size; 95 96 // custom init script set by btstack_chipset_cc256x_set_init_script 97 // used to select init scripts before each power up 98 static const uint8_t * custom_init_script; 99 static uint32_t custom_init_script_size; 100 101 // init script to use: either cc256x_init_script or custom_init_script 102 static const uint8_t * init_script; 103 static uint32_t init_script_size; 104 105 // power in db - set by btstack_chipset_cc256x_set_power 106 static int16_t init_power_in_dB = 13; // 13 dBm 107 108 // explicit power vectors of 16 uint8_t bytes 109 static const uint8_t * init_power_vectors[3]; 110 111 // upload position 112 static uint32_t init_script_offset = 0; 113 114 // support for SCO over HCI 115 #ifdef ENABLE_SCO_OVER_HCI 116 static int init_send_route_sco_over_hci = 0; 117 static const uint8_t hci_route_sco_over_hci[] = { 118 #if 1 119 // Follow recommendation from https://e2e.ti.com/support/wireless_connectivity/bluetooth_cc256x/f/660/t/397004 120 // route SCO over HCI (connection type=1, tx buffer size = 120, tx buffer max latency= 720, accept packets with CRC Error 121 0x10, 0xfe, 0x05, 0x01, 0x78, 0xd0, 0x02, 0x01, 122 #else 123 // Configure SCO via I2S interface - 256 kbps 124 // Send_HCI_VS_Write_CODEC_Config 0xFD06, 125 0x06, 0xfd, 126 // len 127 34, 128 //3072, - clock rate 3072000 hz 129 0x00, 0x01, 130 // 0x00 - clock direction: output = master 131 0x00, 132 // 8000, framesync frequency in hz 133 0x40, 0x1f, 0x00, 0x00, 134 // 0x0001, framesync duty cycle 135 0x01, 0x00, 136 // 1, framesync edge 137 1, 138 // 0x00, framesync polarity 139 0x00, 140 // 0x00, RESERVED 141 0x00, 142 // 16, channel 1 out size 143 8, 0, 144 // 0x0001, channel 1 out offset 145 0x01, 0x00, 146 // 1, channel 1 out edge 147 1, 148 // 16, channel 1 in size 149 8, 0, 150 // 0x0001, channel 1 in offset 151 0x01, 0x00, 152 // 0, channel 1 in edge 153 0, 154 // 0x00, RESERVED 155 0x00, 156 // 16, channel 2 out size 157 8, 0, 158 // 17, channel 2 out offset 159 9, 0, 160 // 0x01, channel 2 out edge 161 0x01, 162 // 16, channel 2 in size 163 8, 0, 164 // 17, channel 2 in offset 165 9, 0, 166 // 0x00, channel 2 in edge 167 0x00, 168 // 0x0001, RESERVED 169 0x00 170 #endif 171 }; 172 #endif 173 174 static void chipset_init(const void * config){ 175 init_script_offset = 0; 176 #if defined(__GNUC__) && defined(__MSP430X__) && (__MSP430X__ > 0) 177 // On MSP430, custom init script is not supported 178 init_script_size = cc256x_init_script_size; 179 #else 180 if (custom_init_script){ 181 log_info("cc256x: using custom init script"); 182 init_script = custom_init_script; 183 init_script_size = custom_init_script_size; 184 } else { 185 log_info("cc256x: using default init script"); 186 init_script = cc256x_init_script; 187 init_script_size = cc256x_init_script_size; 188 } 189 #endif 190 #ifdef ENABLE_SCO_OVER_HCI 191 init_send_route_sco_over_hci = 1; 192 #endif 193 } 194 195 static void chipset_set_baudrate_command(uint32_t baudrate, uint8_t *hci_cmd_buffer){ 196 hci_cmd_buffer[0] = 0x36; 197 hci_cmd_buffer[1] = 0xFF; 198 hci_cmd_buffer[2] = 0x04; 199 hci_cmd_buffer[3] = baudrate & 0xff; 200 hci_cmd_buffer[4] = (baudrate >> 8) & 0xff; 201 hci_cmd_buffer[5] = (baudrate >> 16) & 0xff; 202 hci_cmd_buffer[6] = 0; 203 } 204 205 static void chipset_set_bd_addr_command(bd_addr_t addr, uint8_t *hci_cmd_buffer){ 206 hci_cmd_buffer[0] = 0x06; 207 hci_cmd_buffer[1] = 0xFC; 208 hci_cmd_buffer[2] = 0x06; 209 reverse_bd_addr(addr, &hci_cmd_buffer[3]); 210 } 211 212 // Output Power control from: http://e2e.ti.com/support/low_power_rf/f/660/p/134853/484767.aspx 213 #define NUM_POWER_LEVELS 16 214 #define DB_MIN_LEVEL -35 215 #define DB_PER_LEVEL 5 216 #define DB_DYNAMIC_RANGE 30 217 218 static int get_max_power_for_modulation_type(int type){ 219 // a) limit max output power 220 int power_db; 221 switch (type){ 222 case 0: // GFSK 223 power_db = 12; 224 break; 225 default: // EDRx 226 power_db = 10; 227 break; 228 } 229 if (power_db > init_power_in_dB) { 230 power_db = init_power_in_dB; 231 } 232 return power_db; 233 } 234 235 static int get_highest_level_for_given_power(int power_db, int recommended_db){ 236 int i = NUM_POWER_LEVELS-1; 237 while (i) { 238 if (power_db <= recommended_db) { 239 return i; 240 } 241 power_db -= DB_PER_LEVEL; 242 i--; 243 } 244 return 0; 245 } 246 247 static void update_set_power_vector(uint8_t *hci_cmd_buffer){ 248 uint8_t modulation_type = hci_cmd_buffer[3]; 249 btstack_assert(modulation_type <= 2); 250 251 // explicit power vector provided by user 252 if (init_power_vectors[modulation_type] != NULL){ 253 (void)memcpy(&hci_cmd_buffer[4], init_power_vectors[modulation_type], 16); 254 return; 255 } 256 257 unsigned int i; 258 int power_db = get_max_power_for_modulation_type(modulation_type); 259 int dynamic_range = 0; 260 261 // f) don't touch level 0 262 for ( i = (NUM_POWER_LEVELS-1) ; i >= 1 ; i--){ 263 264 #ifdef ENABLE_BLE 265 // level 1 is BLE transmit power for GFSK 266 if (i == 1 && modulation_type == 0) { 267 hci_cmd_buffer[4+1] = 2 * get_max_power_for_modulation_type(modulation_type); 268 // as level 0 isn't set, we're done 269 continue; 270 } 271 #endif 272 hci_cmd_buffer[4+i] = 2 * power_db; 273 274 if (dynamic_range + DB_PER_LEVEL > DB_DYNAMIC_RANGE) continue; // e) 275 276 power_db -= DB_PER_LEVEL; // d) 277 dynamic_range += DB_PER_LEVEL; 278 279 if (power_db > DB_MIN_LEVEL) continue; 280 281 power_db = DB_MIN_LEVEL; // b) 282 } 283 } 284 285 // max permitted power for class 2 devices: 4 dBm 286 static void update_set_class2_single_power(uint8_t * hci_cmd_buffer){ 287 const int max_power_class_2 = 4; 288 int i = 0; 289 for (i=0;i<3;i++){ 290 hci_cmd_buffer[3+i] = get_highest_level_for_given_power(get_max_power_for_modulation_type(i), max_power_class_2); 291 } 292 } 293 294 // eHCILL activate from http://e2e.ti.com/support/low_power_rf/f/660/p/134855/484776.aspx 295 static void update_sleep_mode_configurations(uint8_t * hci_cmd_buffer){ 296 #ifdef ENABLE_EHCILL 297 hci_cmd_buffer[4] = 1; 298 #else 299 hci_cmd_buffer[4] = 0; 300 #endif 301 } 302 303 static void update_init_script_command(uint8_t *hci_cmd_buffer){ 304 305 uint16_t opcode = hci_cmd_buffer[0] | (hci_cmd_buffer[1] << 8); 306 307 switch (opcode){ 308 case 0xFD87: 309 update_set_class2_single_power(hci_cmd_buffer); 310 break; 311 case 0xFD82: 312 update_set_power_vector(hci_cmd_buffer); 313 break; 314 case 0xFD0C: 315 update_sleep_mode_configurations(hci_cmd_buffer); 316 break; 317 default: 318 break; 319 } 320 } 321 322 static btstack_chipset_result_t chipset_next_command(uint8_t * hci_cmd_buffer){ 323 if (init_script_offset >= init_script_size) { 324 325 #ifdef ENABLE_SCO_OVER_HCI 326 // append send route SCO over HCI if requested 327 if (init_send_route_sco_over_hci){ 328 init_send_route_sco_over_hci = 0; 329 memcpy(hci_cmd_buffer, hci_route_sco_over_hci, sizeof(hci_route_sco_over_hci)); 330 return BTSTACK_CHIPSET_VALID_COMMAND; 331 } 332 #endif 333 334 return BTSTACK_CHIPSET_DONE; 335 } 336 337 // extracted init script has 0x01 cmd packet type, but BTstack expects them without 338 init_script_offset++; 339 340 #if defined(__GNUC__) && defined(__MSP430X__) && (__MSP430X__ > 0) 341 342 // workaround: use FlashReadBlock with 32-bit integer and assume init script starts at 0x10000 343 uint32_t init_script_addr = 0x10000; 344 FlashReadBlock(&hci_cmd_buffer[0], init_script_addr + init_script_offset, 3); // cmd header 345 init_script_offset += 3; 346 int payload_len = hci_cmd_buffer[2]; 347 FlashReadBlock(&hci_cmd_buffer[3], init_script_addr + init_script_offset, payload_len); // cmd payload 348 349 #elif defined (__AVR__) 350 351 // workaround: use memcpy_P to access init script in lower 64 kB of flash 352 memcpy_P(&hci_cmd_buffer[0], &init_script[init_script_offset], 3); 353 init_script_offset += 3; 354 int payload_len = hci_cmd_buffer[2]; 355 memcpy_P(&hci_cmd_buffer[3], &init_script[init_script_offset], payload_len); 356 357 #else 358 359 // use memcpy with pointer 360 uint8_t * init_script_ptr = (uint8_t*) &init_script[0]; 361 memcpy(&hci_cmd_buffer[0], init_script_ptr + init_script_offset, 3); // cmd header 362 init_script_offset += 3; 363 int payload_len = hci_cmd_buffer[2]; 364 memcpy(&hci_cmd_buffer[3], init_script_ptr + init_script_offset, payload_len); // cmd payload 365 366 #endif 367 368 init_script_offset += payload_len; 369 370 // control power commands and ehcill 371 update_init_script_command(hci_cmd_buffer); 372 373 return BTSTACK_CHIPSET_VALID_COMMAND; 374 } 375 376 377 // MARK: public API 378 void btstack_chipset_cc256x_set_power(int16_t power_in_dB){ 379 init_power_in_dB = power_in_dB; 380 } 381 382 void btstack_chipset_cc256x_set_power_vector(uint8_t modulation_type, const uint8_t * power_vector){ 383 btstack_assert(modulation_type <= 2); 384 init_power_vectors[modulation_type] = power_vector; 385 } 386 387 void btstack_chipset_cc256x_set_init_script(uint8_t * data, uint32_t size){ 388 custom_init_script = data; 389 custom_init_script_size = size; 390 } 391 392 static const btstack_chipset_t btstack_chipset_cc256x = { 393 "CC256x", 394 chipset_init, 395 chipset_next_command, 396 chipset_set_baudrate_command, 397 chipset_set_bd_addr_command, 398 }; 399 400 const btstack_chipset_t * btstack_chipset_cc256x_instance(void){ 401 return &btstack_chipset_cc256x; 402 } 403 404