1 /* 2 * Copyright (C) 2009-2012 by Matthias Ringwald 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. Neither the name of the copyright holders nor the names of 14 * contributors may be used to endorse or promote products derived 15 * from this software without specific prior written permission. 16 * 4. Any redistribution, use, or modification is done solely for 17 * personal benefit and not for any commercial purpose or for 18 * monetary gain. 19 * 20 * THIS SOFTWARE IS PROVIDED BY MATTHIAS RINGWALD AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 23 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL MATTHIAS 24 * RINGWALD OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 26 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS 27 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 28 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF 30 * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 * 33 * Please inquire about commercial licensing options at [email protected] 34 * 35 */ 36 37 #define BTSTACK_FILE__ "btstack_chipset_cc256x.c" 38 39 /* 40 * btstack_chipset_cc256x.c 41 * 42 * Adapter to use cc256x-based chipsets with BTstack 43 * 44 * Handles init script (a.k.a. Service Patch) 45 * Allows for non-standard UART baud rate 46 * Allows to configure transmit power 47 * Allows to activate eHCILL deep sleep mode 48 * 49 * Issues with mspgcc LTS: 50 * - 20 bit support is not there yet -> .text cannot get bigger than 48 kb 51 * - arrays cannot have more than 32k entries 52 * 53 * workarounds: 54 * - store init script in .fartext and use assembly code to read from there 55 * - split into two arrays 56 * 57 * Issues with AVR 58 * - Harvard architecture doesn't allow to store init script directly -> use avr-libc helpers 59 * 60 * Documentation for TI VS CC256x commands: http://processors.wiki.ti.com/index.php/CC256x_VS_HCI_Commands 61 * 62 */ 63 64 #include "btstack_config.h" 65 #include "btstack_chipset_cc256x.h" 66 #include "btstack_debug.h" 67 68 #include <stddef.h> /* NULL */ 69 #include <stdio.h> 70 #include <string.h> /* memcpy */ 71 72 #if defined(__GNUC__) && defined(__MSP430X__) && (__MSP430X__ > 0) 73 #include "hal_compat.h" 74 #endif 75 76 #ifdef __AVR__ 77 #include <avr/pgmspace.h> 78 #endif 79 80 #include "btstack_control.h" 81 82 83 // default init script provided by separate .c file 84 extern const uint8_t cc256x_init_script[]; 85 extern const uint32_t cc256x_init_script_size; 86 87 // custom init script set by btstack_chipset_cc256x_set_init_script 88 // used to select init scripts before each power up 89 static const uint8_t * custom_init_script; 90 static uint32_t custom_init_script_size; 91 92 // init script to use: either cc256x_init_script or custom_init_script 93 static const uint8_t * init_script; 94 static uint32_t init_script_size; 95 96 // power in db - set by btstack_chipset_cc256x_set_power 97 static int16_t init_power_in_dB = 13; // 13 dBm 98 99 // upload position 100 static uint32_t init_script_offset = 0; 101 102 // support for SCO over HCI 103 #ifdef ENABLE_SCO_OVER_HCI 104 static int init_send_route_sco_over_hci = 0; 105 static const uint8_t hci_route_sco_over_hci[] = { 106 #if 1 107 // Follow recommendation from https://e2e.ti.com/support/wireless_connectivity/bluetooth_cc256x/f/660/t/397004 108 // route SCO over HCI (connection type=1, tx buffer size = 120, tx buffer max latency= 720, accept packets with CRC Error 109 0x10, 0xfe, 0x05, 0x01, 0x78, 0xd0, 0x02, 0x01, 110 #else 111 // Configure SCO via I2S interface - 256 kbps 112 // Send_HCI_VS_Write_CODEC_Config 0xFD06, 113 0x06, 0xfd, 114 // len 115 34, 116 //3072, - clock rate 3072000 hz 117 0x00, 0x01, 118 // 0x00 - clock direction: output = master 119 0x00, 120 // 8000, framesync frequency in hz 121 0x40, 0x1f, 0x00, 0x00, 122 // 0x0001, framesync duty cycle 123 0x01, 0x00, 124 // 1, framesync edge 125 1, 126 // 0x00, framesync polarity 127 0x00, 128 // 0x00, RESERVED 129 0x00, 130 // 16, channel 1 out size 131 8, 0, 132 // 0x0001, channel 1 out offset 133 0x01, 0x00, 134 // 1, channel 1 out edge 135 1, 136 // 16, channel 1 in size 137 8, 0, 138 // 0x0001, channel 1 in offset 139 0x01, 0x00, 140 // 0, channel 1 in edge 141 0, 142 // 0x00, RESERVED 143 0x00, 144 // 16, channel 2 out size 145 8, 0, 146 // 17, channel 2 out offset 147 9, 0, 148 // 0x01, channel 2 out edge 149 0x01, 150 // 16, channel 2 in size 151 8, 0, 152 // 17, channel 2 in offset 153 9, 0, 154 // 0x00, channel 2 in edge 155 0x00, 156 // 0x0001, RESERVED 157 0x00 158 #endif 159 }; 160 #endif 161 162 static void chipset_init(const void * config){ 163 init_script_offset = 0; 164 #if defined(__GNUC__) && defined(__MSP430X__) && (__MSP430X__ > 0) 165 // On MSP430, custom init script is not supported 166 init_script_size = cc256x_init_script_size; 167 #else 168 if (custom_init_script){ 169 log_info("cc256x: using custom init script"); 170 init_script = custom_init_script; 171 init_script_size = custom_init_script_size; 172 } else { 173 log_info("cc256x: using default init script"); 174 init_script = cc256x_init_script; 175 init_script_size = cc256x_init_script_size; 176 } 177 #endif 178 #ifdef ENABLE_SCO_OVER_HCI 179 init_send_route_sco_over_hci = 1; 180 #endif 181 } 182 183 static void chipset_set_baudrate_command(uint32_t baudrate, uint8_t *hci_cmd_buffer){ 184 hci_cmd_buffer[0] = 0x36; 185 hci_cmd_buffer[1] = 0xFF; 186 hci_cmd_buffer[2] = 0x04; 187 hci_cmd_buffer[3] = baudrate & 0xff; 188 hci_cmd_buffer[4] = (baudrate >> 8) & 0xff; 189 hci_cmd_buffer[5] = (baudrate >> 16) & 0xff; 190 hci_cmd_buffer[6] = 0; 191 } 192 193 static void chipset_set_bd_addr_command(bd_addr_t addr, uint8_t *hci_cmd_buffer){ 194 hci_cmd_buffer[0] = 0x06; 195 hci_cmd_buffer[1] = 0xFC; 196 hci_cmd_buffer[2] = 0x06; 197 reverse_bd_addr(addr, &hci_cmd_buffer[3]); 198 } 199 200 // Output Power control from: http://e2e.ti.com/support/low_power_rf/f/660/p/134853/484767.aspx 201 #define NUM_POWER_LEVELS 16 202 #define DB_MIN_LEVEL -35 203 #define DB_PER_LEVEL 5 204 #define DB_DYNAMIC_RANGE 30 205 206 static int get_max_power_for_modulation_type(int type){ 207 // a) limit max output power 208 int power_db; 209 switch (type){ 210 case 0: // GFSK 211 power_db = 12; 212 break; 213 default: // EDRx 214 power_db = 10; 215 break; 216 } 217 if (power_db > init_power_in_dB) { 218 power_db = init_power_in_dB; 219 } 220 return power_db; 221 } 222 223 static int get_highest_level_for_given_power(int power_db, int recommended_db){ 224 int i = NUM_POWER_LEVELS-1; 225 while (i) { 226 if (power_db <= recommended_db) { 227 return i; 228 } 229 power_db -= DB_PER_LEVEL; 230 i--; 231 } 232 return 0; 233 } 234 235 static void update_set_power_vector(uint8_t *hci_cmd_buffer){ 236 int i; 237 int modulation_type = hci_cmd_buffer[3]; 238 int power_db = get_max_power_for_modulation_type(modulation_type); 239 int dynamic_range = 0; 240 241 // f) don't touch level 0 242 for ( i = (NUM_POWER_LEVELS-1) ; i >= 1 ; i--){ 243 244 #ifdef ENABLE_BLE 245 // level 1 is BLE transmit power for GFSK 246 if (i == 1 && modulation_type == 0) { 247 hci_cmd_buffer[4+1] = 2 * get_max_power_for_modulation_type(modulation_type); 248 // as level 0 isn't set, we're done 249 continue; 250 } 251 #endif 252 hci_cmd_buffer[4+i] = 2 * power_db; 253 254 if (dynamic_range + DB_PER_LEVEL > DB_DYNAMIC_RANGE) continue; // e) 255 256 power_db -= DB_PER_LEVEL; // d) 257 dynamic_range += DB_PER_LEVEL; 258 259 if (power_db > DB_MIN_LEVEL) continue; 260 261 power_db = DB_MIN_LEVEL; // b) 262 } 263 } 264 265 // max permitted power for class 2 devices: 4 dBm 266 static void update_set_class2_single_power(uint8_t * hci_cmd_buffer){ 267 const int max_power_class_2 = 4; 268 int i = 0; 269 for (i=0;i<3;i++){ 270 hci_cmd_buffer[3+i] = get_highest_level_for_given_power(get_max_power_for_modulation_type(i), max_power_class_2); 271 } 272 } 273 274 // eHCILL activate from http://e2e.ti.com/support/low_power_rf/f/660/p/134855/484776.aspx 275 static void update_sleep_mode_configurations(uint8_t * hci_cmd_buffer){ 276 #ifdef ENABLE_EHCILL 277 hci_cmd_buffer[4] = 1; 278 #else 279 hci_cmd_buffer[4] = 0; 280 #endif 281 } 282 283 static void update_init_script_command(uint8_t *hci_cmd_buffer){ 284 285 uint16_t opcode = hci_cmd_buffer[0] | (hci_cmd_buffer[1] << 8); 286 287 switch (opcode){ 288 case 0xFD87: 289 update_set_class2_single_power(hci_cmd_buffer); 290 break; 291 case 0xFD82: 292 update_set_power_vector(hci_cmd_buffer); 293 break; 294 case 0xFD0C: 295 update_sleep_mode_configurations(hci_cmd_buffer); 296 break; 297 default: 298 break; 299 } 300 } 301 302 static btstack_chipset_result_t chipset_next_command(uint8_t * hci_cmd_buffer){ 303 if (init_script_offset >= init_script_size) { 304 305 #ifdef ENABLE_SCO_OVER_HCI 306 // append send route SCO over HCI if requested 307 if (init_send_route_sco_over_hci){ 308 init_send_route_sco_over_hci = 0; 309 memcpy(hci_cmd_buffer, hci_route_sco_over_hci, sizeof(hci_route_sco_over_hci)); 310 return BTSTACK_CHIPSET_VALID_COMMAND; 311 } 312 #endif 313 314 return BTSTACK_CHIPSET_DONE; 315 } 316 317 // extracted init script has 0x01 cmd packet type, but BTstack expects them without 318 init_script_offset++; 319 320 #if defined(__GNUC__) && defined(__MSP430X__) && (__MSP430X__ > 0) 321 322 // workaround: use FlashReadBlock with 32-bit integer and assume init script starts at 0x10000 323 uint32_t init_script_addr = 0x10000; 324 FlashReadBlock(&hci_cmd_buffer[0], init_script_addr + init_script_offset, 3); // cmd header 325 init_script_offset += 3; 326 int payload_len = hci_cmd_buffer[2]; 327 FlashReadBlock(&hci_cmd_buffer[3], init_script_addr + init_script_offset, payload_len); // cmd payload 328 329 #elif defined (__AVR__) 330 331 // workaround: use memcpy_P to access init script in lower 64 kB of flash 332 memcpy_P(&hci_cmd_buffer[0], &init_script[init_script_offset], 3); 333 init_script_offset += 3; 334 int payload_len = hci_cmd_buffer[2]; 335 memcpy_P(&hci_cmd_buffer[3], &init_script[init_script_offset], payload_len); 336 337 #else 338 339 // use memcpy with pointer 340 uint8_t * init_script_ptr = (uint8_t*) &init_script[0]; 341 memcpy(&hci_cmd_buffer[0], init_script_ptr + init_script_offset, 3); // cmd header 342 init_script_offset += 3; 343 int payload_len = hci_cmd_buffer[2]; 344 memcpy(&hci_cmd_buffer[3], init_script_ptr + init_script_offset, payload_len); // cmd payload 345 346 #endif 347 348 init_script_offset += payload_len; 349 350 // control power commands and ehcill 351 update_init_script_command(hci_cmd_buffer); 352 353 return BTSTACK_CHIPSET_VALID_COMMAND; 354 } 355 356 357 // MARK: public API 358 void btstack_chipset_cc256x_set_power(int16_t power_in_dB){ 359 init_power_in_dB = power_in_dB; 360 } 361 362 void btstack_chipset_cc256x_set_init_script(uint8_t * data, uint32_t size){ 363 custom_init_script = data; 364 custom_init_script_size = size; 365 } 366 367 static const btstack_chipset_t btstack_chipset_cc256x = { 368 "CC256x", 369 chipset_init, 370 chipset_next_command, 371 chipset_set_baudrate_command, 372 chipset_set_bd_addr_command, 373 }; 374 375 const btstack_chipset_t * btstack_chipset_cc256x_instance(void){ 376 return &btstack_chipset_cc256x; 377 } 378 379