1faa6c1f6SMatthias Ringwald /* 2faa6c1f6SMatthias Ringwald * Copyright (C) 2009-2012 by Matthias Ringwald 3faa6c1f6SMatthias Ringwald * 4faa6c1f6SMatthias Ringwald * Redistribution and use in source and binary forms, with or without 5faa6c1f6SMatthias Ringwald * modification, are permitted provided that the following conditions 6faa6c1f6SMatthias Ringwald * are met: 7faa6c1f6SMatthias Ringwald * 8faa6c1f6SMatthias Ringwald * 1. Redistributions of source code must retain the above copyright 9faa6c1f6SMatthias Ringwald * notice, this list of conditions and the following disclaimer. 10faa6c1f6SMatthias Ringwald * 2. Redistributions in binary form must reproduce the above copyright 11faa6c1f6SMatthias Ringwald * notice, this list of conditions and the following disclaimer in the 12faa6c1f6SMatthias Ringwald * documentation and/or other materials provided with the distribution. 13faa6c1f6SMatthias Ringwald * 3. Neither the name of the copyright holders nor the names of 14faa6c1f6SMatthias Ringwald * contributors may be used to endorse or promote products derived 15faa6c1f6SMatthias Ringwald * from this software without specific prior written permission. 16faa6c1f6SMatthias Ringwald * 4. Any redistribution, use, or modification is done solely for 17faa6c1f6SMatthias Ringwald * personal benefit and not for any commercial purpose or for 18faa6c1f6SMatthias Ringwald * monetary gain. 19faa6c1f6SMatthias Ringwald * 20faa6c1f6SMatthias Ringwald * THIS SOFTWARE IS PROVIDED BY MATTHIAS RINGWALD AND CONTRIBUTORS 21faa6c1f6SMatthias Ringwald * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 22faa6c1f6SMatthias Ringwald * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 23faa6c1f6SMatthias Ringwald * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL MATTHIAS 24faa6c1f6SMatthias Ringwald * RINGWALD OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 25faa6c1f6SMatthias Ringwald * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 26faa6c1f6SMatthias Ringwald * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS 27faa6c1f6SMatthias Ringwald * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 28faa6c1f6SMatthias Ringwald * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 29faa6c1f6SMatthias Ringwald * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF 30faa6c1f6SMatthias Ringwald * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31faa6c1f6SMatthias Ringwald * SUCH DAMAGE. 32faa6c1f6SMatthias Ringwald * 3351acb414SMatthias Ringwald * Please inquire about commercial licensing options at [email protected] 34faa6c1f6SMatthias Ringwald * 35faa6c1f6SMatthias Ringwald */ 36faa6c1f6SMatthias Ringwald 37e501bae0SMatthias Ringwald #define BTSTACK_FILE__ "btstack_chipset_cc256x.c" 38ab2c6ae4SMatthias Ringwald 39faa6c1f6SMatthias Ringwald /* 40fb55bd0aSMatthias Ringwald * btstack_chipset_cc256x.c 41faa6c1f6SMatthias Ringwald * 42faa6c1f6SMatthias Ringwald * Adapter to use cc256x-based chipsets with BTstack 43faa6c1f6SMatthias Ringwald * 44faa6c1f6SMatthias Ringwald * Handles init script (a.k.a. Service Patch) 45faa6c1f6SMatthias Ringwald * Allows for non-standard UART baud rate 46faa6c1f6SMatthias Ringwald * Allows to configure transmit power 47faa6c1f6SMatthias Ringwald * Allows to activate eHCILL deep sleep mode 48faa6c1f6SMatthias Ringwald * 49faa6c1f6SMatthias Ringwald * Issues with mspgcc LTS: 50faa6c1f6SMatthias Ringwald * - 20 bit support is not there yet -> .text cannot get bigger than 48 kb 51faa6c1f6SMatthias Ringwald * - arrays cannot have more than 32k entries 52faa6c1f6SMatthias Ringwald * 53faa6c1f6SMatthias Ringwald * workarounds: 54faa6c1f6SMatthias Ringwald * - store init script in .fartext and use assembly code to read from there 55faa6c1f6SMatthias Ringwald * - split into two arrays 56faa6c1f6SMatthias Ringwald * 57faa6c1f6SMatthias Ringwald * Issues with AVR 58faa6c1f6SMatthias Ringwald * - Harvard architecture doesn't allow to store init script directly -> use avr-libc helpers 59faa6c1f6SMatthias Ringwald * 60faa6c1f6SMatthias Ringwald * Documentation for TI VS CC256x commands: http://processors.wiki.ti.com/index.php/CC256x_VS_HCI_Commands 61faa6c1f6SMatthias Ringwald * 62faa6c1f6SMatthias Ringwald */ 63faa6c1f6SMatthias Ringwald 64faa6c1f6SMatthias Ringwald #include "btstack_config.h" 65fb55bd0aSMatthias Ringwald #include "btstack_chipset_cc256x.h" 66e2ee49eaSMatthias Ringwald #include "btstack_debug.h" 677a4d61a3SMatthias Ringwald #include "hci.h" 68faa6c1f6SMatthias Ringwald 69faa6c1f6SMatthias Ringwald #include <stddef.h> /* NULL */ 70faa6c1f6SMatthias Ringwald #include <stdio.h> 71faa6c1f6SMatthias Ringwald #include <string.h> /* memcpy */ 72faa6c1f6SMatthias Ringwald 737a4d61a3SMatthias Ringwald // assert outgoing and incoming hci packet buffers can hold max hci command resp. event packet 747a4d61a3SMatthias Ringwald #if HCI_OUTGOING_PACKET_BUFFER_SIZE < (HCI_CMD_HEADER_SIZE + 255) 757a4d61a3SMatthias Ringwald #error "HCI_OUTGOING_PACKET_BUFFER_SIZE to small. Outgoing HCI packet buffer to small for largest HCI Command packet. Please set HCI_ACL_PAYLOAD_SIZE to 258 or higher." 767a4d61a3SMatthias Ringwald #endif 776ffe3f3eSMatthias Ringwald #if HCI_INCOMING_PACKET_BUFFER_SIZE < (HCI_EVENT_HEADER_SIZE + 255) 787a4d61a3SMatthias Ringwald #error "HCI_INCOMING_PACKET_BUFFER_SIZE to small. Incoming HCI packet buffer to small for largest HCI Event packet. Please set HCI_ACL_PAYLOAD_SIZE to 257 or higher." 797a4d61a3SMatthias Ringwald #endif 807a4d61a3SMatthias Ringwald 81faa6c1f6SMatthias Ringwald #if defined(__GNUC__) && defined(__MSP430X__) && (__MSP430X__ > 0) 82faa6c1f6SMatthias Ringwald #include "hal_compat.h" 83faa6c1f6SMatthias Ringwald #endif 84faa6c1f6SMatthias Ringwald 85faa6c1f6SMatthias Ringwald #ifdef __AVR__ 86faa6c1f6SMatthias Ringwald #include <avr/pgmspace.h> 87faa6c1f6SMatthias Ringwald #endif 88faa6c1f6SMatthias Ringwald 89faa6c1f6SMatthias Ringwald #include "btstack_control.h" 90faa6c1f6SMatthias Ringwald 91faa6c1f6SMatthias Ringwald 92e2ee49eaSMatthias Ringwald // default init script provided by separate .c file 93faa6c1f6SMatthias Ringwald extern const uint8_t cc256x_init_script[]; 94faa6c1f6SMatthias Ringwald extern const uint32_t cc256x_init_script_size; 95faa6c1f6SMatthias Ringwald 96e2ee49eaSMatthias Ringwald // custom init script set by btstack_chipset_cc256x_set_init_script 97e2ee49eaSMatthias Ringwald // used to select init scripts before each power up 98e2ee49eaSMatthias Ringwald static const uint8_t * custom_init_script; 99e2ee49eaSMatthias Ringwald static uint32_t custom_init_script_size; 100e2ee49eaSMatthias Ringwald 101e2ee49eaSMatthias Ringwald // init script to use: either cc256x_init_script or custom_init_script 102e2ee49eaSMatthias Ringwald static const uint8_t * init_script; 103e2ee49eaSMatthias Ringwald static uint32_t init_script_size; 104e2ee49eaSMatthias Ringwald 105e2ee49eaSMatthias Ringwald // power in db - set by btstack_chipset_cc256x_set_power 106faa6c1f6SMatthias Ringwald static int16_t init_power_in_dB = 13; // 13 dBm 107faa6c1f6SMatthias Ringwald 108*63efc2edSMatthias Ringwald // explicit power vectors of 16 uint8_t bytes 109*63efc2edSMatthias Ringwald static const uint8_t * init_power_vectors[3]; 110*63efc2edSMatthias Ringwald 111e2ee49eaSMatthias Ringwald // upload position 112e2ee49eaSMatthias Ringwald static uint32_t init_script_offset = 0; 113e2ee49eaSMatthias Ringwald 114faa6c1f6SMatthias Ringwald // support for SCO over HCI 11571c4de7aSMatthias Ringwald #ifdef ENABLE_SCO_OVER_HCI 116faa6c1f6SMatthias Ringwald static int init_send_route_sco_over_hci = 0; 117638e16f3SMatthias Ringwald static const uint8_t hci_route_sco_over_hci[] = { 118638e16f3SMatthias Ringwald #if 1 1195415113fSMatthias Ringwald // Follow recommendation from https://e2e.ti.com/support/wireless_connectivity/bluetooth_cc256x/f/660/t/397004 1205415113fSMatthias Ringwald // route SCO over HCI (connection type=1, tx buffer size = 120, tx buffer max latency= 720, accept packets with CRC Error 1215415113fSMatthias Ringwald 0x10, 0xfe, 0x05, 0x01, 0x78, 0xd0, 0x02, 0x01, 122638e16f3SMatthias Ringwald #else 123638e16f3SMatthias Ringwald // Configure SCO via I2S interface - 256 kbps 124638e16f3SMatthias Ringwald // Send_HCI_VS_Write_CODEC_Config 0xFD06, 125638e16f3SMatthias Ringwald 0x06, 0xfd, 126638e16f3SMatthias Ringwald // len 127638e16f3SMatthias Ringwald 34, 128638e16f3SMatthias Ringwald //3072, - clock rate 3072000 hz 129638e16f3SMatthias Ringwald 0x00, 0x01, 130638e16f3SMatthias Ringwald // 0x00 - clock direction: output = master 131638e16f3SMatthias Ringwald 0x00, 132638e16f3SMatthias Ringwald // 8000, framesync frequency in hz 133638e16f3SMatthias Ringwald 0x40, 0x1f, 0x00, 0x00, 134638e16f3SMatthias Ringwald // 0x0001, framesync duty cycle 135638e16f3SMatthias Ringwald 0x01, 0x00, 136638e16f3SMatthias Ringwald // 1, framesync edge 137638e16f3SMatthias Ringwald 1, 138638e16f3SMatthias Ringwald // 0x00, framesync polarity 139638e16f3SMatthias Ringwald 0x00, 140638e16f3SMatthias Ringwald // 0x00, RESERVED 141638e16f3SMatthias Ringwald 0x00, 142638e16f3SMatthias Ringwald // 16, channel 1 out size 143638e16f3SMatthias Ringwald 8, 0, 144638e16f3SMatthias Ringwald // 0x0001, channel 1 out offset 145638e16f3SMatthias Ringwald 0x01, 0x00, 146638e16f3SMatthias Ringwald // 1, channel 1 out edge 147638e16f3SMatthias Ringwald 1, 148638e16f3SMatthias Ringwald // 16, channel 1 in size 149638e16f3SMatthias Ringwald 8, 0, 150638e16f3SMatthias Ringwald // 0x0001, channel 1 in offset 151638e16f3SMatthias Ringwald 0x01, 0x00, 152638e16f3SMatthias Ringwald // 0, channel 1 in edge 153638e16f3SMatthias Ringwald 0, 154638e16f3SMatthias Ringwald // 0x00, RESERVED 155638e16f3SMatthias Ringwald 0x00, 156638e16f3SMatthias Ringwald // 16, channel 2 out size 157638e16f3SMatthias Ringwald 8, 0, 158638e16f3SMatthias Ringwald // 17, channel 2 out offset 159638e16f3SMatthias Ringwald 9, 0, 160638e16f3SMatthias Ringwald // 0x01, channel 2 out edge 161638e16f3SMatthias Ringwald 0x01, 162638e16f3SMatthias Ringwald // 16, channel 2 in size 163638e16f3SMatthias Ringwald 8, 0, 164638e16f3SMatthias Ringwald // 17, channel 2 in offset 165638e16f3SMatthias Ringwald 9, 0, 166638e16f3SMatthias Ringwald // 0x00, channel 2 in edge 167638e16f3SMatthias Ringwald 0x00, 168638e16f3SMatthias Ringwald // 0x0001, RESERVED 169638e16f3SMatthias Ringwald 0x00 170638e16f3SMatthias Ringwald #endif 171faa6c1f6SMatthias Ringwald }; 172faa6c1f6SMatthias Ringwald #endif 173faa6c1f6SMatthias Ringwald 174fb55bd0aSMatthias Ringwald static void chipset_init(const void * config){ 175faa6c1f6SMatthias Ringwald init_script_offset = 0; 17648900dc5SMatthias Ringwald #if defined(__GNUC__) && defined(__MSP430X__) && (__MSP430X__ > 0) 17748900dc5SMatthias Ringwald // On MSP430, custom init script is not supported 17848900dc5SMatthias Ringwald init_script_size = cc256x_init_script_size; 17948900dc5SMatthias Ringwald #else 180e2ee49eaSMatthias Ringwald if (custom_init_script){ 181e2ee49eaSMatthias Ringwald log_info("cc256x: using custom init script"); 182e2ee49eaSMatthias Ringwald init_script = custom_init_script; 183e2ee49eaSMatthias Ringwald init_script_size = custom_init_script_size; 184e2ee49eaSMatthias Ringwald } else { 185e2ee49eaSMatthias Ringwald log_info("cc256x: using default init script"); 186e2ee49eaSMatthias Ringwald init_script = cc256x_init_script; 187e2ee49eaSMatthias Ringwald init_script_size = cc256x_init_script_size; 188e2ee49eaSMatthias Ringwald } 18948900dc5SMatthias Ringwald #endif 19071c4de7aSMatthias Ringwald #ifdef ENABLE_SCO_OVER_HCI 191faa6c1f6SMatthias Ringwald init_send_route_sco_over_hci = 1; 192faa6c1f6SMatthias Ringwald #endif 193faa6c1f6SMatthias Ringwald } 194faa6c1f6SMatthias Ringwald 195faa6c1f6SMatthias Ringwald static void chipset_set_baudrate_command(uint32_t baudrate, uint8_t *hci_cmd_buffer){ 196faa6c1f6SMatthias Ringwald hci_cmd_buffer[0] = 0x36; 197faa6c1f6SMatthias Ringwald hci_cmd_buffer[1] = 0xFF; 198faa6c1f6SMatthias Ringwald hci_cmd_buffer[2] = 0x04; 199faa6c1f6SMatthias Ringwald hci_cmd_buffer[3] = baudrate & 0xff; 200faa6c1f6SMatthias Ringwald hci_cmd_buffer[4] = (baudrate >> 8) & 0xff; 201faa6c1f6SMatthias Ringwald hci_cmd_buffer[5] = (baudrate >> 16) & 0xff; 202faa6c1f6SMatthias Ringwald hci_cmd_buffer[6] = 0; 203faa6c1f6SMatthias Ringwald } 204faa6c1f6SMatthias Ringwald 205faa6c1f6SMatthias Ringwald static void chipset_set_bd_addr_command(bd_addr_t addr, uint8_t *hci_cmd_buffer){ 206e63eef5dSMatthias Ringwald hci_cmd_buffer[0] = 0x06; 207e63eef5dSMatthias Ringwald hci_cmd_buffer[1] = 0xFC; 208e63eef5dSMatthias Ringwald hci_cmd_buffer[2] = 0x06; 209e63eef5dSMatthias Ringwald reverse_bd_addr(addr, &hci_cmd_buffer[3]); 210faa6c1f6SMatthias Ringwald } 211faa6c1f6SMatthias Ringwald 212faa6c1f6SMatthias Ringwald // Output Power control from: http://e2e.ti.com/support/low_power_rf/f/660/p/134853/484767.aspx 213faa6c1f6SMatthias Ringwald #define NUM_POWER_LEVELS 16 214faa6c1f6SMatthias Ringwald #define DB_MIN_LEVEL -35 215faa6c1f6SMatthias Ringwald #define DB_PER_LEVEL 5 216faa6c1f6SMatthias Ringwald #define DB_DYNAMIC_RANGE 30 217faa6c1f6SMatthias Ringwald 218faa6c1f6SMatthias Ringwald static int get_max_power_for_modulation_type(int type){ 219faa6c1f6SMatthias Ringwald // a) limit max output power 220faa6c1f6SMatthias Ringwald int power_db; 221faa6c1f6SMatthias Ringwald switch (type){ 222faa6c1f6SMatthias Ringwald case 0: // GFSK 223faa6c1f6SMatthias Ringwald power_db = 12; 224faa6c1f6SMatthias Ringwald break; 225faa6c1f6SMatthias Ringwald default: // EDRx 226faa6c1f6SMatthias Ringwald power_db = 10; 227faa6c1f6SMatthias Ringwald break; 228faa6c1f6SMatthias Ringwald } 229faa6c1f6SMatthias Ringwald if (power_db > init_power_in_dB) { 230faa6c1f6SMatthias Ringwald power_db = init_power_in_dB; 231faa6c1f6SMatthias Ringwald } 232faa6c1f6SMatthias Ringwald return power_db; 233faa6c1f6SMatthias Ringwald } 234faa6c1f6SMatthias Ringwald 235faa6c1f6SMatthias Ringwald static int get_highest_level_for_given_power(int power_db, int recommended_db){ 236faa6c1f6SMatthias Ringwald int i = NUM_POWER_LEVELS-1; 237faa6c1f6SMatthias Ringwald while (i) { 238faa6c1f6SMatthias Ringwald if (power_db <= recommended_db) { 239faa6c1f6SMatthias Ringwald return i; 240faa6c1f6SMatthias Ringwald } 241faa6c1f6SMatthias Ringwald power_db -= DB_PER_LEVEL; 242faa6c1f6SMatthias Ringwald i--; 243faa6c1f6SMatthias Ringwald } 244faa6c1f6SMatthias Ringwald return 0; 245faa6c1f6SMatthias Ringwald } 246faa6c1f6SMatthias Ringwald 247faa6c1f6SMatthias Ringwald static void update_set_power_vector(uint8_t *hci_cmd_buffer){ 248*63efc2edSMatthias Ringwald uint8_t modulation_type = hci_cmd_buffer[3]; 249*63efc2edSMatthias Ringwald btstack_assert(modulation_type <= 2); 250*63efc2edSMatthias Ringwald 251*63efc2edSMatthias Ringwald // explicit power vector provided by user 252*63efc2edSMatthias Ringwald if (init_power_vectors[modulation_type] != NULL){ 253*63efc2edSMatthias Ringwald (void)memcpy(&hci_cmd_buffer[4], init_power_vectors[modulation_type], 16); 254*63efc2edSMatthias Ringwald return; 255*63efc2edSMatthias Ringwald } 256*63efc2edSMatthias Ringwald 257*63efc2edSMatthias Ringwald unsigned int i; 258faa6c1f6SMatthias Ringwald int power_db = get_max_power_for_modulation_type(modulation_type); 259faa6c1f6SMatthias Ringwald int dynamic_range = 0; 260faa6c1f6SMatthias Ringwald 261faa6c1f6SMatthias Ringwald // f) don't touch level 0 262faa6c1f6SMatthias Ringwald for ( i = (NUM_POWER_LEVELS-1) ; i >= 1 ; i--){ 263faa6c1f6SMatthias Ringwald 264faa6c1f6SMatthias Ringwald #ifdef ENABLE_BLE 265faa6c1f6SMatthias Ringwald // level 1 is BLE transmit power for GFSK 266faa6c1f6SMatthias Ringwald if (i == 1 && modulation_type == 0) { 267faa6c1f6SMatthias Ringwald hci_cmd_buffer[4+1] = 2 * get_max_power_for_modulation_type(modulation_type); 268faa6c1f6SMatthias Ringwald // as level 0 isn't set, we're done 269faa6c1f6SMatthias Ringwald continue; 270faa6c1f6SMatthias Ringwald } 271faa6c1f6SMatthias Ringwald #endif 272faa6c1f6SMatthias Ringwald hci_cmd_buffer[4+i] = 2 * power_db; 273faa6c1f6SMatthias Ringwald 274faa6c1f6SMatthias Ringwald if (dynamic_range + DB_PER_LEVEL > DB_DYNAMIC_RANGE) continue; // e) 275faa6c1f6SMatthias Ringwald 276faa6c1f6SMatthias Ringwald power_db -= DB_PER_LEVEL; // d) 277faa6c1f6SMatthias Ringwald dynamic_range += DB_PER_LEVEL; 278faa6c1f6SMatthias Ringwald 279faa6c1f6SMatthias Ringwald if (power_db > DB_MIN_LEVEL) continue; 280faa6c1f6SMatthias Ringwald 281faa6c1f6SMatthias Ringwald power_db = DB_MIN_LEVEL; // b) 282faa6c1f6SMatthias Ringwald } 283faa6c1f6SMatthias Ringwald } 284faa6c1f6SMatthias Ringwald 285faa6c1f6SMatthias Ringwald // max permitted power for class 2 devices: 4 dBm 286faa6c1f6SMatthias Ringwald static void update_set_class2_single_power(uint8_t * hci_cmd_buffer){ 287faa6c1f6SMatthias Ringwald const int max_power_class_2 = 4; 288faa6c1f6SMatthias Ringwald int i = 0; 289faa6c1f6SMatthias Ringwald for (i=0;i<3;i++){ 290faa6c1f6SMatthias Ringwald hci_cmd_buffer[3+i] = get_highest_level_for_given_power(get_max_power_for_modulation_type(i), max_power_class_2); 291faa6c1f6SMatthias Ringwald } 292faa6c1f6SMatthias Ringwald } 293faa6c1f6SMatthias Ringwald 294faa6c1f6SMatthias Ringwald // eHCILL activate from http://e2e.ti.com/support/low_power_rf/f/660/p/134855/484776.aspx 295faa6c1f6SMatthias Ringwald static void update_sleep_mode_configurations(uint8_t * hci_cmd_buffer){ 296f6a20ec9SMatthias Ringwald #ifdef ENABLE_EHCILL 297faa6c1f6SMatthias Ringwald hci_cmd_buffer[4] = 1; 298f6a20ec9SMatthias Ringwald #else 299faa6c1f6SMatthias Ringwald hci_cmd_buffer[4] = 0; 300f6a20ec9SMatthias Ringwald #endif 301faa6c1f6SMatthias Ringwald } 302faa6c1f6SMatthias Ringwald 303faa6c1f6SMatthias Ringwald static void update_init_script_command(uint8_t *hci_cmd_buffer){ 304faa6c1f6SMatthias Ringwald 305faa6c1f6SMatthias Ringwald uint16_t opcode = hci_cmd_buffer[0] | (hci_cmd_buffer[1] << 8); 306faa6c1f6SMatthias Ringwald 307faa6c1f6SMatthias Ringwald switch (opcode){ 308faa6c1f6SMatthias Ringwald case 0xFD87: 309faa6c1f6SMatthias Ringwald update_set_class2_single_power(hci_cmd_buffer); 310faa6c1f6SMatthias Ringwald break; 311faa6c1f6SMatthias Ringwald case 0xFD82: 312faa6c1f6SMatthias Ringwald update_set_power_vector(hci_cmd_buffer); 313faa6c1f6SMatthias Ringwald break; 314faa6c1f6SMatthias Ringwald case 0xFD0C: 315faa6c1f6SMatthias Ringwald update_sleep_mode_configurations(hci_cmd_buffer); 316faa6c1f6SMatthias Ringwald break; 317faa6c1f6SMatthias Ringwald default: 318faa6c1f6SMatthias Ringwald break; 319faa6c1f6SMatthias Ringwald } 320faa6c1f6SMatthias Ringwald } 321faa6c1f6SMatthias Ringwald 322faa6c1f6SMatthias Ringwald static btstack_chipset_result_t chipset_next_command(uint8_t * hci_cmd_buffer){ 323e2ee49eaSMatthias Ringwald if (init_script_offset >= init_script_size) { 324faa6c1f6SMatthias Ringwald 32571c4de7aSMatthias Ringwald #ifdef ENABLE_SCO_OVER_HCI 326faa6c1f6SMatthias Ringwald // append send route SCO over HCI if requested 327faa6c1f6SMatthias Ringwald if (init_send_route_sco_over_hci){ 328faa6c1f6SMatthias Ringwald init_send_route_sco_over_hci = 0; 329faa6c1f6SMatthias Ringwald memcpy(hci_cmd_buffer, hci_route_sco_over_hci, sizeof(hci_route_sco_over_hci)); 330faa6c1f6SMatthias Ringwald return BTSTACK_CHIPSET_VALID_COMMAND; 331faa6c1f6SMatthias Ringwald } 332faa6c1f6SMatthias Ringwald #endif 333faa6c1f6SMatthias Ringwald 334faa6c1f6SMatthias Ringwald return BTSTACK_CHIPSET_DONE; 335faa6c1f6SMatthias Ringwald } 336faa6c1f6SMatthias Ringwald 337faa6c1f6SMatthias Ringwald // extracted init script has 0x01 cmd packet type, but BTstack expects them without 338faa6c1f6SMatthias Ringwald init_script_offset++; 339faa6c1f6SMatthias Ringwald 340faa6c1f6SMatthias Ringwald #if defined(__GNUC__) && defined(__MSP430X__) && (__MSP430X__ > 0) 341faa6c1f6SMatthias Ringwald 342faa6c1f6SMatthias Ringwald // workaround: use FlashReadBlock with 32-bit integer and assume init script starts at 0x10000 343faa6c1f6SMatthias Ringwald uint32_t init_script_addr = 0x10000; 344faa6c1f6SMatthias Ringwald FlashReadBlock(&hci_cmd_buffer[0], init_script_addr + init_script_offset, 3); // cmd header 345faa6c1f6SMatthias Ringwald init_script_offset += 3; 346faa6c1f6SMatthias Ringwald int payload_len = hci_cmd_buffer[2]; 347faa6c1f6SMatthias Ringwald FlashReadBlock(&hci_cmd_buffer[3], init_script_addr + init_script_offset, payload_len); // cmd payload 348faa6c1f6SMatthias Ringwald 349faa6c1f6SMatthias Ringwald #elif defined (__AVR__) 350faa6c1f6SMatthias Ringwald 351faa6c1f6SMatthias Ringwald // workaround: use memcpy_P to access init script in lower 64 kB of flash 352e2ee49eaSMatthias Ringwald memcpy_P(&hci_cmd_buffer[0], &init_script[init_script_offset], 3); 353faa6c1f6SMatthias Ringwald init_script_offset += 3; 354faa6c1f6SMatthias Ringwald int payload_len = hci_cmd_buffer[2]; 355e2ee49eaSMatthias Ringwald memcpy_P(&hci_cmd_buffer[3], &init_script[init_script_offset], payload_len); 356faa6c1f6SMatthias Ringwald 357faa6c1f6SMatthias Ringwald #else 358faa6c1f6SMatthias Ringwald 359faa6c1f6SMatthias Ringwald // use memcpy with pointer 360e2ee49eaSMatthias Ringwald uint8_t * init_script_ptr = (uint8_t*) &init_script[0]; 361faa6c1f6SMatthias Ringwald memcpy(&hci_cmd_buffer[0], init_script_ptr + init_script_offset, 3); // cmd header 362faa6c1f6SMatthias Ringwald init_script_offset += 3; 363faa6c1f6SMatthias Ringwald int payload_len = hci_cmd_buffer[2]; 364faa6c1f6SMatthias Ringwald memcpy(&hci_cmd_buffer[3], init_script_ptr + init_script_offset, payload_len); // cmd payload 365faa6c1f6SMatthias Ringwald 366faa6c1f6SMatthias Ringwald #endif 367faa6c1f6SMatthias Ringwald 368faa6c1f6SMatthias Ringwald init_script_offset += payload_len; 369faa6c1f6SMatthias Ringwald 370faa6c1f6SMatthias Ringwald // control power commands and ehcill 371faa6c1f6SMatthias Ringwald update_init_script_command(hci_cmd_buffer); 372faa6c1f6SMatthias Ringwald 373faa6c1f6SMatthias Ringwald return BTSTACK_CHIPSET_VALID_COMMAND; 374faa6c1f6SMatthias Ringwald } 375faa6c1f6SMatthias Ringwald 376faa6c1f6SMatthias Ringwald 377faa6c1f6SMatthias Ringwald // MARK: public API 378faa6c1f6SMatthias Ringwald void btstack_chipset_cc256x_set_power(int16_t power_in_dB){ 379faa6c1f6SMatthias Ringwald init_power_in_dB = power_in_dB; 380faa6c1f6SMatthias Ringwald } 381faa6c1f6SMatthias Ringwald 382*63efc2edSMatthias Ringwald void btstack_chipset_cc256x_set_power_vector(uint8_t modulation_type, const uint8_t * power_vector){ 383*63efc2edSMatthias Ringwald btstack_assert(modulation_type <= 2); 384*63efc2edSMatthias Ringwald 385*63efc2edSMatthias Ringwald } 386*63efc2edSMatthias Ringwald 387e2ee49eaSMatthias Ringwald void btstack_chipset_cc256x_set_init_script(uint8_t * data, uint32_t size){ 388e2ee49eaSMatthias Ringwald custom_init_script = data; 389e2ee49eaSMatthias Ringwald custom_init_script_size = size; 390e2ee49eaSMatthias Ringwald } 391e2ee49eaSMatthias Ringwald 392faa6c1f6SMatthias Ringwald static const btstack_chipset_t btstack_chipset_cc256x = { 393faa6c1f6SMatthias Ringwald "CC256x", 394faa6c1f6SMatthias Ringwald chipset_init, 395faa6c1f6SMatthias Ringwald chipset_next_command, 396faa6c1f6SMatthias Ringwald chipset_set_baudrate_command, 397e63eef5dSMatthias Ringwald chipset_set_bd_addr_command, 398faa6c1f6SMatthias Ringwald }; 399faa6c1f6SMatthias Ringwald 400faa6c1f6SMatthias Ringwald const btstack_chipset_t * btstack_chipset_cc256x_instance(void){ 401faa6c1f6SMatthias Ringwald return &btstack_chipset_cc256x; 402faa6c1f6SMatthias Ringwald } 403faa6c1f6SMatthias Ringwald 404