1 //===-- Passes.h - Target independent code generation passes ----*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file defines interfaces to access the target independent code generation
10 // passes provided by the LLVM backend.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_CODEGEN_PASSES_H
15 #define LLVM_CODEGEN_PASSES_H
16 
17 #include "llvm/Support/CodeGen.h"
18 #include "llvm/Support/Discriminator.h"
19 #include "llvm/CodeGen/RegAllocCommon.h"
20 
21 #include <functional>
22 #include <string>
23 
24 namespace llvm {
25 
26 class FunctionPass;
27 class MachineFunction;
28 class MachineFunctionPass;
29 class ModulePass;
30 class Pass;
31 class TargetMachine;
32 class raw_ostream;
33 
34 template <typename T> class IntrusiveRefCntPtr;
35 namespace vfs {
36 class FileSystem;
37 } // namespace vfs
38 
39 } // End llvm namespace
40 
41 // List of target independent CodeGen pass IDs.
42 namespace llvm {
43 
44   /// AtomicExpandPass - At IR level this pass replace atomic instructions with
45   /// __atomic_* library calls, or target specific instruction which implement the
46   /// same semantics in a way which better fits the target backend.
47   FunctionPass *createAtomicExpandLegacyPass();
48 
49   /// createUnreachableBlockEliminationPass - The LLVM code generator does not
50   /// work well with unreachable basic blocks (what live ranges make sense for a
51   /// block that cannot be reached?).  As such, a code generator should either
52   /// not instruction select unreachable blocks, or run this pass as its
53   /// last LLVM modifying pass to clean up blocks that are not reachable from
54   /// the entry block.
55   FunctionPass *createUnreachableBlockEliminationPass();
56 
57   /// createGCEmptyBasicblocksPass - Empty basic blocks (basic blocks without
58   /// real code) appear as the result of optimization passes removing
59   /// instructions. These blocks confuscate profile analysis (e.g., basic block
60   /// sections) since they will share the address of their fallthrough blocks.
61   /// This pass garbage-collects such basic blocks.
62   MachineFunctionPass *createGCEmptyBasicBlocksPass();
63 
64   /// createBasicBlockSections Pass - This pass assigns sections to machine
65   /// basic blocks and is enabled with -fbasic-block-sections.
66   MachineFunctionPass *createBasicBlockSectionsPass();
67 
68   MachineFunctionPass *createBasicBlockPathCloningPass();
69 
70   /// createMachineFunctionSplitterPass - This pass splits machine functions
71   /// using profile information.
72   MachineFunctionPass *createMachineFunctionSplitterPass();
73 
74   /// MachineFunctionPrinter pass - This pass prints out the machine function to
75   /// the given stream as a debugging tool.
76   MachineFunctionPass *
77   createMachineFunctionPrinterPass(raw_ostream &OS,
78                                    const std::string &Banner ="");
79 
80   /// StackFramePrinter pass - This pass prints out the machine function's
81   /// stack frame to the given stream as a debugging tool.
82   MachineFunctionPass *createStackFrameLayoutAnalysisPass();
83 
84   /// MIRPrinting pass - this pass prints out the LLVM IR into the given stream
85   /// using the MIR serialization format.
86   MachineFunctionPass *createPrintMIRPass(raw_ostream &OS);
87 
88   /// This pass resets a MachineFunction when it has the FailedISel property
89   /// as if it was just created.
90   /// If EmitFallbackDiag is true, the pass will emit a
91   /// DiagnosticInfoISelFallback for every MachineFunction it resets.
92   /// If AbortOnFailedISel is true, abort compilation instead of resetting.
93   MachineFunctionPass *createResetMachineFunctionPass(bool EmitFallbackDiag,
94                                                       bool AbortOnFailedISel);
95 
96   /// createCodeGenPrepareLegacyPass - Transform the code to expose more pattern
97   /// matching during instruction selection.
98   FunctionPass *createCodeGenPrepareLegacyPass();
99 
100   /// This pass implements generation of target-specific intrinsics to support
101   /// handling of complex number arithmetic
102   FunctionPass *createComplexDeinterleavingPass(const TargetMachine *TM);
103 
104   /// AtomicExpandID -- Lowers atomic operations in terms of either cmpxchg
105   /// load-linked/store-conditional loops.
106   extern char &AtomicExpandID;
107 
108   /// MachineLoopInfo - This pass is a loop analysis pass.
109   extern char &MachineLoopInfoID;
110 
111   /// MachineDominators - This pass is a machine dominators analysis pass.
112   extern char &MachineDominatorsID;
113 
114   /// MachineDominanaceFrontier - This pass is a machine dominators analysis.
115   extern char &MachineDominanceFrontierID;
116 
117   /// MachineRegionInfo - This pass computes SESE regions for machine functions.
118   extern char &MachineRegionInfoPassID;
119 
120   /// EdgeBundles analysis - Bundle machine CFG edges.
121   extern char &EdgeBundlesID;
122 
123   /// LiveVariables pass - This pass computes the set of blocks in which each
124   /// variable is life and sets machine operand kill flags.
125   extern char &LiveVariablesID;
126 
127   /// PHIElimination - This pass eliminates machine instruction PHI nodes
128   /// by inserting copy instructions.  This destroys SSA information, but is the
129   /// desired input for some register allocators.  This pass is "required" by
130   /// these register allocator like this: AU.addRequiredID(PHIEliminationID);
131   extern char &PHIEliminationID;
132 
133   /// LiveIntervals - This analysis keeps track of the live ranges of virtual
134   /// and physical registers.
135   extern char &LiveIntervalsID;
136 
137   /// LiveStacks pass. An analysis keeping track of the liveness of stack slots.
138   extern char &LiveStacksID;
139 
140   /// TwoAddressInstruction - This pass reduces two-address instructions to
141   /// use two operands. This destroys SSA information but it is desired by
142   /// register allocators.
143   extern char &TwoAddressInstructionPassID;
144 
145   /// ProcessImpicitDefs pass - This pass removes IMPLICIT_DEFs.
146   extern char &ProcessImplicitDefsID;
147 
148   /// RegisterCoalescer - This pass merges live ranges to eliminate copies.
149   extern char &RegisterCoalescerID;
150 
151   /// MachineScheduler - This pass schedules machine instructions.
152   extern char &MachineSchedulerID;
153 
154   /// PostMachineScheduler - This pass schedules machine instructions postRA.
155   extern char &PostMachineSchedulerID;
156 
157   /// SpillPlacement analysis. Suggest optimal placement of spill code between
158   /// basic blocks.
159   extern char &SpillPlacementID;
160 
161   /// ShrinkWrap pass. Look for the best place to insert save and restore
162   // instruction and update the MachineFunctionInfo with that information.
163   extern char &ShrinkWrapID;
164 
165   /// LiveRangeShrink pass. Move instruction close to its definition to shrink
166   /// the definition's live range.
167   extern char &LiveRangeShrinkID;
168 
169   /// Greedy register allocator.
170   extern char &RAGreedyID;
171 
172   /// Basic register allocator.
173   extern char &RABasicID;
174 
175   /// VirtRegRewriter pass. Rewrite virtual registers to physical registers as
176   /// assigned in VirtRegMap.
177   extern char &VirtRegRewriterID;
178   FunctionPass *createVirtRegRewriter(bool ClearVirtRegs = true);
179 
180   /// UnreachableMachineBlockElimination - This pass removes unreachable
181   /// machine basic blocks.
182   extern char &UnreachableMachineBlockElimID;
183 
184   /// DeadMachineInstructionElim - This pass removes dead machine instructions.
185   extern char &DeadMachineInstructionElimID;
186 
187   /// This pass adds dead/undef flags after analyzing subregister lanes.
188   extern char &DetectDeadLanesID;
189 
190   /// This pass perform post-ra machine sink for COPY instructions.
191   extern char &PostRAMachineSinkingID;
192 
193   /// This pass adds flow sensitive discriminators.
194   extern char &MIRAddFSDiscriminatorsID;
195 
196   /// This pass reads flow sensitive profile.
197   extern char &MIRProfileLoaderPassID;
198 
199   // This pass gives undef values a Pseudo Instruction definition for
200   // Instructions to ensure early-clobber is followed when using the greedy
201   // register allocator.
202   extern char &InitUndefID;
203 
204   /// FastRegisterAllocation Pass - This pass register allocates as fast as
205   /// possible. It is best suited for debug code where live ranges are short.
206   ///
207   FunctionPass *createFastRegisterAllocator();
208   FunctionPass *createFastRegisterAllocator(RegClassFilterFunc F,
209                                             bool ClearVirtRegs);
210 
211   /// BasicRegisterAllocation Pass - This pass implements a degenerate global
212   /// register allocator using the basic regalloc framework.
213   ///
214   FunctionPass *createBasicRegisterAllocator();
215   FunctionPass *createBasicRegisterAllocator(RegClassFilterFunc F);
216 
217   /// Greedy register allocation pass - This pass implements a global register
218   /// allocator for optimized builds.
219   ///
220   FunctionPass *createGreedyRegisterAllocator();
221   FunctionPass *createGreedyRegisterAllocator(RegClassFilterFunc F);
222 
223   /// PBQPRegisterAllocation Pass - This pass implements the Partitioned Boolean
224   /// Quadratic Prograaming (PBQP) based register allocator.
225   ///
226   FunctionPass *createDefaultPBQPRegisterAllocator();
227 
228   /// PrologEpilogCodeInserter - This pass inserts prolog and epilog code,
229   /// and eliminates abstract frame references.
230   extern char &PrologEpilogCodeInserterID;
231   MachineFunctionPass *createPrologEpilogInserterPass();
232 
233   /// ExpandPostRAPseudos - This pass expands pseudo instructions after
234   /// register allocation.
235   extern char &ExpandPostRAPseudosID;
236 
237   /// PostRAHazardRecognizer - This pass runs the post-ra hazard
238   /// recognizer.
239   extern char &PostRAHazardRecognizerID;
240 
241   /// PostRAScheduler - This pass performs post register allocation
242   /// scheduling.
243   extern char &PostRASchedulerID;
244 
245   /// BranchFolding - This pass performs machine code CFG based
246   /// optimizations to delete branches to branches, eliminate branches to
247   /// successor blocks (creating fall throughs), and eliminating branches over
248   /// branches.
249   extern char &BranchFolderPassID;
250 
251   /// BranchRelaxation - This pass replaces branches that need to jump further
252   /// than is supported by a branch instruction.
253   extern char &BranchRelaxationPassID;
254 
255   /// MachineFunctionPrinterPass - This pass prints out MachineInstr's.
256   extern char &MachineFunctionPrinterPassID;
257 
258   /// MIRPrintingPass - this pass prints out the LLVM IR using the MIR
259   /// serialization format.
260   extern char &MIRPrintingPassID;
261 
262   /// TailDuplicate - Duplicate blocks with unconditional branches
263   /// into tails of their predecessors.
264   extern char &TailDuplicateID;
265 
266   /// Duplicate blocks with unconditional branches into tails of their
267   /// predecessors. Variant that works before register allocation.
268   extern char &EarlyTailDuplicateID;
269 
270   /// MachineTraceMetrics - This pass computes critical path and CPU resource
271   /// usage in an ensemble of traces.
272   extern char &MachineTraceMetricsID;
273 
274   /// EarlyIfConverter - This pass performs if-conversion on SSA form by
275   /// inserting cmov instructions.
276   extern char &EarlyIfConverterID;
277 
278   /// EarlyIfPredicator - This pass performs if-conversion on SSA form by
279   /// predicating if/else block and insert select at the join point.
280   extern char &EarlyIfPredicatorID;
281 
282   /// This pass performs instruction combining using trace metrics to estimate
283   /// critical-path and resource depth.
284   extern char &MachineCombinerID;
285 
286   /// StackSlotColoring - This pass performs stack coloring and merging.
287   /// It merges disjoint allocas to reduce the stack size.
288   extern char &StackColoringID;
289 
290   /// StackFramePrinter - This pass prints the stack frame layout and variable
291   /// mappings.
292   extern char &StackFrameLayoutAnalysisPassID;
293 
294   /// IfConverter - This pass performs machine code if conversion.
295   extern char &IfConverterID;
296 
297   FunctionPass *createIfConverter(
298       std::function<bool(const MachineFunction &)> Ftor);
299 
300   /// MachineBlockPlacement - This pass places basic blocks based on branch
301   /// probabilities.
302   extern char &MachineBlockPlacementID;
303 
304   /// MachineBlockPlacementStats - This pass collects statistics about the
305   /// basic block placement using branch probabilities and block frequency
306   /// information.
307   extern char &MachineBlockPlacementStatsID;
308 
309   /// GCLowering Pass - Used by gc.root to perform its default lowering
310   /// operations.
311   FunctionPass *createGCLoweringPass();
312 
313   /// GCLowering Pass - Used by gc.root to perform its default lowering
314   /// operations.
315   extern char &GCLoweringID;
316 
317   /// ShadowStackGCLowering - Implements the custom lowering mechanism
318   /// used by the shadow stack GC.  Only runs on functions which opt in to
319   /// the shadow stack collector.
320   FunctionPass *createShadowStackGCLoweringPass();
321 
322   /// ShadowStackGCLowering - Implements the custom lowering mechanism
323   /// used by the shadow stack GC.
324   extern char &ShadowStackGCLoweringID;
325 
326   /// GCMachineCodeAnalysis - Target-independent pass to mark safe points
327   /// in machine code. Must be added very late during code generation, just
328   /// prior to output, and importantly after all CFG transformations (such as
329   /// branch folding).
330   extern char &GCMachineCodeAnalysisID;
331 
332   /// MachineCSE - This pass performs global CSE on machine instructions.
333   extern char &MachineCSEID;
334 
335   /// MIRCanonicalizer - This pass canonicalizes MIR by renaming vregs
336   /// according to the semantics of the instruction as well as hoists
337   /// code.
338   extern char &MIRCanonicalizerID;
339 
340   /// ImplicitNullChecks - This pass folds null pointer checks into nearby
341   /// memory operations.
342   extern char &ImplicitNullChecksID;
343 
344   /// This pass performs loop invariant code motion on machine instructions.
345   extern char &MachineLICMID;
346 
347   /// This pass performs loop invariant code motion on machine instructions.
348   /// This variant works before register allocation. \see MachineLICMID.
349   extern char &EarlyMachineLICMID;
350 
351   /// MachineSinking - This pass performs sinking on machine instructions.
352   extern char &MachineSinkingID;
353 
354   /// MachineCopyPropagation - This pass performs copy propagation on
355   /// machine instructions.
356   extern char &MachineCopyPropagationID;
357 
358   MachineFunctionPass *createMachineCopyPropagationPass(bool UseCopyInstr);
359 
360   /// MachineLateInstrsCleanup - This pass removes redundant identical
361   /// instructions after register allocation and rematerialization.
362   extern char &MachineLateInstrsCleanupID;
363 
364   /// PeepholeOptimizer - This pass performs peephole optimizations -
365   /// like extension and comparison eliminations.
366   extern char &PeepholeOptimizerID;
367 
368   /// OptimizePHIs - This pass optimizes machine instruction PHIs
369   /// to take advantage of opportunities created during DAG legalization.
370   extern char &OptimizePHIsID;
371 
372   /// StackSlotColoring - This pass performs stack slot coloring.
373   extern char &StackSlotColoringID;
374 
375   /// This pass lays out funclets contiguously.
376   extern char &FuncletLayoutID;
377 
378   /// This pass inserts the XRay instrumentation sleds if they are supported by
379   /// the target platform.
380   extern char &XRayInstrumentationID;
381 
382   /// This pass inserts FEntry calls
383   extern char &FEntryInserterID;
384 
385   /// This pass implements the "patchable-function" attribute.
386   extern char &PatchableFunctionID;
387 
388   /// createStackProtectorPass - This pass adds stack protectors to functions.
389   ///
390   FunctionPass *createStackProtectorPass();
391 
392   /// createMachineVerifierPass - This pass verifies cenerated machine code
393   /// instructions for correctness.
394   ///
395   FunctionPass *createMachineVerifierPass(const std::string& Banner);
396 
397   /// createDwarfEHPass - This pass mulches exception handling code into a form
398   /// adapted to code generation.  Required if using dwarf exception handling.
399   FunctionPass *createDwarfEHPass(CodeGenOptLevel OptLevel);
400 
401   /// createWinEHPass - Prepares personality functions used by MSVC on Windows,
402   /// in addition to the Itanium LSDA based personalities.
403   FunctionPass *createWinEHPass(bool DemoteCatchSwitchPHIOnly = false);
404 
405   /// createSjLjEHPreparePass - This pass adapts exception handling code to use
406   /// the GCC-style builtin setjmp/longjmp (sjlj) to handling EH control flow.
407   ///
408   FunctionPass *createSjLjEHPreparePass(const TargetMachine *TM);
409 
410   /// createWasmEHPass - This pass adapts exception handling code to use
411   /// WebAssembly's exception handling scheme.
412   FunctionPass *createWasmEHPass();
413 
414   /// LocalStackSlotAllocation - This pass assigns local frame indices to stack
415   /// slots relative to one another and allocates base registers to access them
416   /// when it is estimated by the target to be out of range of normal frame
417   /// pointer or stack pointer index addressing.
418   extern char &LocalStackSlotAllocationID;
419 
420   /// This pass expands pseudo-instructions, reserves registers and adjusts
421   /// machine frame information.
422   extern char &FinalizeISelID;
423 
424   /// UnpackMachineBundles - This pass unpack machine instruction bundles.
425   extern char &UnpackMachineBundlesID;
426 
427   FunctionPass *
428   createUnpackMachineBundles(std::function<bool(const MachineFunction &)> Ftor);
429 
430   /// FinalizeMachineBundles - This pass finalize machine instruction
431   /// bundles (created earlier, e.g. during pre-RA scheduling).
432   extern char &FinalizeMachineBundlesID;
433 
434   /// StackMapLiveness - This pass analyses the register live-out set of
435   /// stackmap/patchpoint intrinsics and attaches the calculated information to
436   /// the intrinsic for later emission to the StackMap.
437   extern char &StackMapLivenessID;
438 
439   // MachineSanitizerBinaryMetadata - appends/finalizes sanitizer binary
440   // metadata after llvm SanitizerBinaryMetadata pass.
441   extern char &MachineSanitizerBinaryMetadataID;
442 
443   /// RemoveRedundantDebugValues pass.
444   extern char &RemoveRedundantDebugValuesID;
445 
446   /// MachineCFGPrinter pass.
447   extern char &MachineCFGPrinterID;
448 
449   /// LiveDebugValues pass
450   extern char &LiveDebugValuesID;
451 
452   /// InterleavedAccess Pass - This pass identifies and matches interleaved
453   /// memory accesses to target specific intrinsics.
454   ///
455   FunctionPass *createInterleavedAccessPass();
456 
457   /// InterleavedLoadCombines Pass - This pass identifies interleaved loads and
458   /// combines them into wide loads detectable by InterleavedAccessPass
459   ///
460   FunctionPass *createInterleavedLoadCombinePass();
461 
462   /// LowerEmuTLS - This pass generates __emutls_[vt].xyz variables for all
463   /// TLS variables for the emulated TLS model.
464   ///
465   ModulePass *createLowerEmuTLSPass();
466 
467   /// This pass lowers the \@llvm.load.relative and \@llvm.objc.* intrinsics to
468   /// instructions.  This is unsafe to do earlier because a pass may combine the
469   /// constant initializer into the load, which may result in an overflowing
470   /// evaluation.
471   ModulePass *createPreISelIntrinsicLoweringPass();
472 
473   /// GlobalMerge - This pass merges internal (by default) globals into structs
474   /// to enable reuse of a base pointer by indexed addressing modes.
475   /// It can also be configured to focus on size optimizations only.
476   ///
477   Pass *createGlobalMergePass(const TargetMachine *TM, unsigned MaximalOffset,
478                               bool OnlyOptimizeForSize = false,
479                               bool MergeExternalByDefault = false);
480 
481   /// This pass splits the stack into a safe stack and an unsafe stack to
482   /// protect against stack-based overflow vulnerabilities.
483   FunctionPass *createSafeStackPass();
484 
485   /// This pass detects subregister lanes in a virtual register that are used
486   /// independently of other lanes and splits them into separate virtual
487   /// registers.
488   extern char &RenameIndependentSubregsID;
489 
490   /// This pass is executed POST-RA to collect which physical registers are
491   /// preserved by given machine function.
492   FunctionPass *createRegUsageInfoCollector();
493 
494   /// Return a MachineFunction pass that identifies call sites
495   /// and propagates register usage information of callee to caller
496   /// if available with PysicalRegisterUsageInfo pass.
497   FunctionPass *createRegUsageInfoPropPass();
498 
499   /// This pass performs software pipelining on machine instructions.
500   extern char &MachinePipelinerID;
501 
502   /// This pass frees the memory occupied by the MachineFunction.
503   FunctionPass *createFreeMachineFunctionPass();
504 
505   /// This pass performs outlining on machine instructions directly before
506   /// printing assembly.
507   ModulePass *createMachineOutlinerPass(bool RunOnAllFunctions = true);
508 
509   /// This pass expands the reduction intrinsics into sequences of shuffles.
510   FunctionPass *createExpandReductionsPass();
511 
512   // This pass replaces intrinsics operating on vector operands with calls to
513   // the corresponding function in a vector library (e.g., SVML, libmvec).
514   FunctionPass *createReplaceWithVeclibLegacyPass();
515 
516   /// This pass expands the vector predication intrinsics into unpredicated
517   /// instructions with selects or just the explicit vector length into the
518   /// predicate mask.
519   FunctionPass *createExpandVectorPredicationPass();
520 
521   // Expands large div/rem instructions.
522   FunctionPass *createExpandLargeDivRemPass();
523 
524   // Expands large div/rem instructions.
525   FunctionPass *createExpandLargeFpConvertPass();
526 
527   // This pass expands memcmp() to load/stores.
528   FunctionPass *createExpandMemCmpLegacyPass();
529 
530   /// Creates Break False Dependencies pass. \see BreakFalseDeps.cpp
531   FunctionPass *createBreakFalseDeps();
532 
533   // This pass expands indirectbr instructions.
534   FunctionPass *createIndirectBrExpandPass();
535 
536   /// Creates CFI Fixup pass. \see CFIFixup.cpp
537   FunctionPass *createCFIFixup();
538 
539   /// Creates CFI Instruction Inserter pass. \see CFIInstrInserter.cpp
540   FunctionPass *createCFIInstrInserter();
541 
542   /// Creates CFGuard longjmp target identification pass.
543   /// \see CFGuardLongjmp.cpp
544   FunctionPass *createCFGuardLongjmpPass();
545 
546   /// Creates EHContGuard catchret target identification pass.
547   /// \see EHContGuardCatchret.cpp
548   FunctionPass *createEHContGuardCatchretPass();
549 
550   /// Create Hardware Loop pass. \see HardwareLoops.cpp
551   FunctionPass *createHardwareLoopsLegacyPass();
552 
553   /// This pass inserts pseudo probe annotation for callsite profiling.
554   FunctionPass *createPseudoProbeInserter();
555 
556   /// Create IR Type Promotion pass. \see TypePromotion.cpp
557   FunctionPass *createTypePromotionLegacyPass();
558 
559   /// Add Flow Sensitive Discriminators. PassNum specifies the
560   /// sequence number of this pass (starting from 1).
561   FunctionPass *
562   createMIRAddFSDiscriminatorsPass(sampleprof::FSDiscriminatorPass P);
563 
564   /// Read Flow Sensitive Profile.
565   FunctionPass *
566   createMIRProfileLoaderPass(std::string File, std::string RemappingFile,
567                              sampleprof::FSDiscriminatorPass P,
568                              IntrusiveRefCntPtr<vfs::FileSystem> FS);
569 
570   /// Creates MIR Debugify pass. \see MachineDebugify.cpp
571   ModulePass *createDebugifyMachineModulePass();
572 
573   /// Creates MIR Strip Debug pass. \see MachineStripDebug.cpp
574   /// If OnlyDebugified is true then it will only strip debug info if it was
575   /// added by a Debugify pass. The module will be left unchanged if the debug
576   /// info was generated by another source such as clang.
577   ModulePass *createStripDebugMachineModulePass(bool OnlyDebugified);
578 
579   /// Creates MIR Check Debug pass. \see MachineCheckDebugify.cpp
580   ModulePass *createCheckDebugMachineModulePass();
581 
582   /// The pass fixups statepoint machine instruction to replace usage of
583   /// caller saved registers with stack slots.
584   extern char &FixupStatepointCallerSavedID;
585 
586   /// The pass transforms load/store <256 x i32> to AMX load/store intrinsics
587   /// or split the data to two <128 x i32>.
588   FunctionPass *createX86LowerAMXTypePass();
589 
590   /// The pass transforms amx intrinsics to scalar operation if the function has
591   /// optnone attribute or it is O0.
592   FunctionPass *createX86LowerAMXIntrinsicsPass();
593 
594   /// When learning an eviction policy, extract score(reward) information,
595   /// otherwise this does nothing
596   FunctionPass *createRegAllocScoringPass();
597 
598   /// JMC instrument pass.
599   ModulePass *createJMCInstrumenterPass();
600 
601   /// This pass converts conditional moves to conditional jumps when profitable.
602   FunctionPass *createSelectOptimizePass();
603 
604   FunctionPass *createCallBrPass();
605 
606   /// Lowers KCFI operand bundles for indirect calls.
607   FunctionPass *createKCFIPass();
608 } // End llvm namespace
609 
610 #endif
611