1# See docs/devel/tracing.rst for syntax documentation. 2# 3# This file is processed by the tracetool script during the build. 4# 5# To add a new trace event: 6# 7# 1. Choose a name for the trace event. Declare its arguments and format 8# string. 9# 10# 2. Call the trace event from code using trace_##name, e.g. multiwrite_cb() -> 11# trace_multiwrite_cb(). The source file must #include "trace.h". 12# 13# Format of a trace event: 14# 15# [disable] <name>(<type1> <arg1>[, <type2> <arg2>] ...) "<format-string>" 16# 17# Example: g_malloc(size_t size) "size %zu" 18# 19# The "disable" keyword will build without the trace event. 20# 21# The <name> must be a valid as a C function name. 22# 23# Types should be standard C types. Use void * for pointers because the trace 24# system may not have the necessary headers included. 25# 26# The <format-string> should be a sprintf()-compatible format string. 27 28# cpu.c 29breakpoint_insert(int cpu_index, uint64_t pc, int flags) "cpu=%d pc=0x%" PRIx64 " flags=0x%x" 30breakpoint_remove(int cpu_index, uint64_t pc, int flags) "cpu=%d pc=0x%" PRIx64 " flags=0x%x" 31breakpoint_singlestep(int cpu_index, int enabled) "cpu=%d enable=%d" 32 33# dma-helpers.c 34dma_blk_io(void *dbs, void *bs, int64_t offset, bool to_dev) "dbs=%p bs=%p offset=%" PRId64 " to_dev=%d" 35dma_aio_cancel(void *dbs) "dbs=%p" 36dma_complete(void *dbs, int ret, void *cb) "dbs=%p ret=%d cb=%p" 37dma_blk_cb(void *dbs, int ret) "dbs=%p ret=%d" 38dma_map_wait(void *dbs) "dbs=%p" 39 40# exec.c 41find_ram_offset(uint64_t size, uint64_t offset) "size: 0x%" PRIx64 " @ 0x%" PRIx64 42find_ram_offset_loop(uint64_t size, uint64_t candidate, uint64_t offset, uint64_t next, uint64_t mingap) "trying size: 0x%" PRIx64 " @ 0x%" PRIx64 ", offset: 0x%" PRIx64" next: 0x%" PRIx64 " mingap: 0x%" PRIx64 43ram_block_discard_range(const char *rbname, void *hva, size_t length, bool need_madvise, bool need_fallocate, int ret) "%s@%p + 0x%zx: madvise: %d fallocate: %d ret: %d" 44 45# job.c 46job_state_transition(void *job, int ret, const char *legal, const char *s0, const char *s1) "job %p (ret: %d) attempting %s transition (%s-->%s)" 47job_apply_verb(void *job, const char *state, const char *verb, const char *legal) "job %p in state %s; applying verb %s (%s)" 48job_completed(void *job, int ret) "job %p ret %d" 49 50# job-qmp.c 51qmp_job_cancel(void *job) "job %p" 52qmp_job_pause(void *job) "job %p" 53qmp_job_resume(void *job) "job %p" 54qmp_job_complete(void *job) "job %p" 55qmp_job_finalize(void *job) "job %p" 56qmp_job_dismiss(void *job) "job %p" 57# See docs/devel/tracing.rst for syntax documentation. 58 59# tlscreds.c 60qcrypto_tls_creds_load_dh(void *creds, const char *filename) "TLS creds load DH creds=%p filename=%s" 61qcrypto_tls_creds_get_path(void *creds, const char *filename, const char *path) "TLS creds path creds=%p filename=%s path=%s" 62 63# tlscredsanon.c 64qcrypto_tls_creds_anon_load(void *creds, const char *dir) "TLS creds anon load creds=%p dir=%s" 65 66# tlscredspsk.c 67qcrypto_tls_creds_psk_load(void *creds, const char *dir) "TLS creds psk load creds=%p dir=%s" 68 69# tlscredsx509.c 70qcrypto_tls_creds_x509_load(void *creds, const char *dir) "TLS creds x509 load creds=%p dir=%s" 71qcrypto_tls_creds_x509_check_basic_constraints(void *creds, const char *file, int status) "TLS creds x509 check basic constraints creds=%p file=%s status=%d" 72qcrypto_tls_creds_x509_check_key_usage(void *creds, const char *file, int status, int usage, int critical) "TLS creds x509 check key usage creds=%p file=%s status=%d usage=%d critical=%d" 73qcrypto_tls_creds_x509_check_key_purpose(void *creds, const char *file, int status, const char *usage, int critical) "TLS creds x509 check key usage creds=%p file=%s status=%d usage=%s critical=%d" 74qcrypto_tls_creds_x509_load_cert(void *creds, int isServer, const char *file) "TLS creds x509 load cert creds=%p isServer=%d file=%s" 75qcrypto_tls_creds_x509_load_cert_list(void *creds, const char *file) "TLS creds x509 load cert list creds=%p file=%s" 76 77# tlssession.c 78qcrypto_tls_session_new(void *session, void *creds, const char *hostname, const char *authzid, int endpoint) "TLS session new session=%p creds=%p hostname=%s authzid=%s endpoint=%d" 79qcrypto_tls_session_check_creds(void *session, const char *status) "TLS session check creds session=%p status=%s" 80 81# tls-cipher-suites.c 82qcrypto_tls_cipher_suite_priority(const char *name) "priority: %s" 83qcrypto_tls_cipher_suite_info(uint8_t data0, uint8_t data1, const char *version, const char *name) "data=[0x%02x,0x%02x] version=%s name=%s" 84qcrypto_tls_cipher_suite_count(unsigned count) "count: %u" 85# See docs/devel/tracing.rst for syntax documentation. 86 87# qapi-visit-core.c 88visit_free(void *v) "v=%p" 89visit_complete(void *v, void *opaque) "v=%p opaque=%p" 90 91visit_start_struct(void *v, const char *name, void *obj, size_t size) "v=%p name=%s obj=%p size=%zu" 92visit_check_struct(void *v) "v=%p" 93visit_end_struct(void *v, void *obj) "v=%p obj=%p" 94 95visit_start_list(void *v, const char *name, void *obj, size_t size) "v=%p name=%s obj=%p size=%zu" 96visit_next_list(void *v, void *tail, size_t size) "v=%p tail=%p size=%zu" 97visit_check_list(void *v) "v=%p" 98visit_end_list(void *v, void *obj) "v=%p obj=%p" 99 100visit_start_alternate(void *v, const char *name, void *obj, size_t size) "v=%p name=%s obj=%p size=%zu" 101visit_end_alternate(void *v, void *obj) "v=%p obj=%p" 102 103visit_optional(void *v, const char *name, bool *present) "v=%p name=%s present=%p" 104visit_policy_reject(void *v, const char *name) "v=%p name=%s" 105visit_policy_skip(void *v, const char *name) "v=%p name=%s" 106 107visit_type_enum(void *v, const char *name, int *obj) "v=%p name=%s obj=%p" 108visit_type_int(void *v, const char *name, int64_t *obj) "v=%p name=%s obj=%p" 109visit_type_uint8(void *v, const char *name, uint8_t *obj) "v=%p name=%s obj=%p" 110visit_type_uint16(void *v, const char *name, uint16_t *obj) "v=%p name=%s obj=%p" 111visit_type_uint32(void *v, const char *name, uint32_t *obj) "v=%p name=%s obj=%p" 112visit_type_uint64(void *v, const char *name, uint64_t *obj) "v=%p name=%s obj=%p" 113visit_type_int8(void *v, const char *name, int8_t *obj) "v=%p name=%s obj=%p" 114visit_type_int16(void *v, const char *name, int16_t *obj) "v=%p name=%s obj=%p" 115visit_type_int32(void *v, const char *name, int32_t *obj) "v=%p name=%s obj=%p" 116visit_type_int64(void *v, const char *name, int64_t *obj) "v=%p name=%s obj=%p" 117visit_type_size(void *v, const char *name, uint64_t *obj) "v=%p name=%s obj=%p" 118visit_type_bool(void *v, const char *name, bool *obj) "v=%p name=%s obj=%p" 119visit_type_str(void *v, const char *name, char **obj) "v=%p name=%s obj=%p" 120visit_type_number(void *v, const char *name, void *obj) "v=%p name=%s obj=%p" 121visit_type_any(void *v, const char *name, void *obj) "v=%p name=%s obj=%p" 122visit_type_null(void *v, const char *name, void *obj) "v=%p name=%s obj=%p" 123# See docs/devel/tracing.rst for syntax documentation. 124 125# object.c 126object_dynamic_cast_assert(const char *type, const char *target, const char *file, int line, const char *func) "%s->%s (%s:%d:%s)" 127object_class_dynamic_cast_assert(const char *type, const char *target, const char *file, int line, const char *func) "%s->%s (%s:%d:%s)" 128# See docs/devel/tracing.rst for syntax documentation. 129 130# hmp.c 131handle_hmp_command(void *mon, const char *cmdline) "mon %p cmdline: %s" 132 133# monitor.c 134monitor_protocol_event_handler(uint32_t event, void *qdict) "event=%d data=%p" 135monitor_protocol_event_emit(uint32_t event, void *data) "event=%d data=%p" 136monitor_protocol_event_queue(uint32_t event, void *qdict, uint64_t rate) "event=%d data=%p rate=%" PRId64 137monitor_suspend(void *ptr, int cnt) "mon %p: %d" 138 139# qmp.c 140monitor_qmp_in_band_enqueue(void *req, void *mon, unsigned len) "%p mon %p len %u" 141monitor_qmp_in_band_dequeue(void *req, unsigned len) "%p len %u" 142monitor_qmp_cmd_in_band(const char *id) "%s" 143monitor_qmp_err_in_band(const char *desc) "%s" 144monitor_qmp_cmd_out_of_band(const char *id) "%s" 145monitor_qmp_respond(void *mon, const char *json) "mon %p resp: %s" 146handle_qmp_command(void *mon, const char *req) "mon %p req: %s" 147# See docs/devel/tracing.rst for syntax documentation. 148 149# aio-posix.c 150run_poll_handlers_begin(void *ctx, int64_t max_ns, int64_t timeout) "ctx %p max_ns %"PRId64 " timeout %"PRId64 151run_poll_handlers_end(void *ctx, bool progress, int64_t timeout) "ctx %p progress %d new timeout %"PRId64 152poll_shrink(void *ctx, int64_t old, int64_t new) "ctx %p old %"PRId64" new %"PRId64 153poll_grow(void *ctx, int64_t old, int64_t new) "ctx %p old %"PRId64" new %"PRId64 154poll_add(void *ctx, void *node, int fd, unsigned revents) "ctx %p node %p fd %d revents 0x%x" 155poll_remove(void *ctx, void *node, int fd) "ctx %p node %p fd %d" 156 157# async.c 158aio_co_schedule(void *ctx, void *co) "ctx %p co %p" 159aio_co_schedule_bh_cb(void *ctx, void *co) "ctx %p co %p" 160reentrant_aio(void *ctx, const char *name) "ctx %p name %s" 161 162# thread-pool.c 163thread_pool_submit(void *pool, void *req, void *opaque) "pool %p req %p opaque %p" 164thread_pool_complete(void *pool, void *req, void *opaque, int ret) "pool %p req %p opaque %p ret %d" 165thread_pool_cancel(void *req, void *opaque) "req %p opaque %p" 166 167# buffer.c 168buffer_resize(const char *buf, size_t olen, size_t len) "%s: old %zd, new %zd" 169buffer_move_empty(const char *buf, size_t len, const char *from) "%s: %zd bytes from %s" 170buffer_move(const char *buf, size_t len, const char *from) "%s: %zd bytes from %s" 171buffer_free(const char *buf, size_t len) "%s: capacity %zd" 172 173# filemonitor-inotify.c 174qemu_file_monitor_add_watch(void *mon, const char *dirpath, const char *filename, void *cb, void *opaque, int64_t id) "File monitor %p add watch dir='%s' file='%s' cb=%p opaque=%p id=%" PRId64 175qemu_file_monitor_remove_watch(void *mon, const char *dirpath, int64_t id) "File monitor %p remove watch dir='%s' id=%" PRId64 176qemu_file_monitor_new(void *mon, int fd) "File monitor %p created fd=%d" 177qemu_file_monitor_enable_watch(void *mon, const char *dirpath, int id) "File monitor %p enable watch dir='%s' id=%u" 178qemu_file_monitor_disable_watch(void *mon, const char *dirpath, int id) "File monitor %p disable watch dir='%s' id=%u" 179qemu_file_monitor_event(void *mon, const char *dirpath, const char *filename, int mask, unsigned int id) "File monitor %p event dir='%s' file='%s' mask=0x%x id=%u" 180qemu_file_monitor_dispatch(void *mon, const char *dirpath, const char *filename, int ev, void *cb, void *opaque, int64_t id) "File monitor %p dispatch dir='%s' file='%s' ev=%d cb=%p opaque=%p id=%" PRId64 181 182# qemu-coroutine.c 183qemu_aio_coroutine_enter(void *ctx, void *from, void *to, void *opaque) "ctx %p from %p to %p opaque %p" 184qemu_coroutine_yield(void *from, void *to) "from %p to %p" 185qemu_coroutine_terminate(void *co) "self %p" 186 187# qemu-coroutine-lock.c 188qemu_co_mutex_lock_uncontended(void *mutex, void *self) "mutex %p self %p" 189qemu_co_mutex_lock_entry(void *mutex, void *self) "mutex %p self %p" 190qemu_co_mutex_lock_return(void *mutex, void *self) "mutex %p self %p" 191qemu_co_mutex_unlock_entry(void *mutex, void *self) "mutex %p self %p" 192qemu_co_mutex_unlock_return(void *mutex, void *self) "mutex %p self %p" 193 194# oslib-posix.c 195# oslib-win32.c 196qemu_memalign(size_t alignment, size_t size, void *ptr) "alignment %zu size %zu ptr %p" 197qemu_anon_ram_alloc(size_t size, void *ptr) "size %zu ptr %p" 198qemu_vfree(void *ptr) "ptr %p" 199qemu_anon_ram_free(void *ptr, size_t size) "ptr %p size %zu" 200 201# oslib-win32.c 202win32_map_alloc(size_t size) "size:%zd" 203win32_map_free(void *ptr, void *h) "ptr:%p handle:%p" 204 205# hbitmap.c 206hbitmap_iter_skip_words(const void *hb, void *hbi, uint64_t pos, unsigned long cur) "hb %p hbi %p pos %"PRId64" cur 0x%lx" 207hbitmap_reset(void *hb, uint64_t start, uint64_t count, uint64_t sbit, uint64_t ebit) "hb %p items %"PRIu64",%"PRIu64" bits %"PRIu64"..%"PRIu64 208hbitmap_set(void *hb, uint64_t start, uint64_t count, uint64_t sbit, uint64_t ebit) "hb %p items %"PRIu64",%"PRIu64" bits %"PRIu64"..%"PRIu64 209 210# lockcnt.c 211lockcnt_fast_path_attempt(const void *lockcnt, int expected, int new) "lockcnt %p fast path %d->%d" 212lockcnt_fast_path_success(const void *lockcnt, int expected, int new) "lockcnt %p fast path %d->%d succeeded" 213lockcnt_unlock_attempt(const void *lockcnt, int expected, int new) "lockcnt %p unlock %d->%d" 214lockcnt_unlock_success(const void *lockcnt, int expected, int new) "lockcnt %p unlock %d->%d succeeded" 215lockcnt_futex_wait_prepare(const void *lockcnt, int expected, int new) "lockcnt %p preparing slow path %d->%d" 216lockcnt_futex_wait(const void *lockcnt, int val) "lockcnt %p waiting on %d" 217lockcnt_futex_wait_resume(const void *lockcnt, int new) "lockcnt %p after wait: %d" 218lockcnt_futex_wake(const void *lockcnt) "lockcnt %p waking up one waiter" 219 220# qemu-sockets.c 221socket_listen(int num) "backlog: %d" 222 223# qemu-thread-common.h 224# qemu-thread-posix.c 225# qemu-thread-win32.c 226qemu_mutex_lock(void *mutex, const char *file, const int line) "waiting on mutex %p (%s:%d)" 227qemu_mutex_locked(void *mutex, const char *file, const int line) "taken mutex %p (%s:%d)" 228qemu_mutex_unlock(void *mutex, const char *file, const int line) "released mutex %p (%s:%d)" 229 230# vfio-helpers.c 231qemu_vfio_dma_reset_temporary(void *s) "s %p" 232qemu_vfio_ram_block_added(void *s, void *p, size_t size) "s %p host %p size 0x%zx" 233qemu_vfio_ram_block_removed(void *s, void *p, size_t size) "s %p host %p size 0x%zx" 234qemu_vfio_dump_mapping(void *host, uint64_t iova, size_t size) "vfio mapping %p to iova 0x%08" PRIx64 " size 0x%zx" 235qemu_vfio_find_mapping(void *s, void *p) "s %p host %p" 236qemu_vfio_new_mapping(void *s, void *host, size_t size, int index, uint64_t iova) "s %p host %p size 0x%zx index %d iova 0x%"PRIx64 237qemu_vfio_do_mapping(void *s, void *host, uint64_t iova, size_t size) "s %p host %p <-> iova 0x%"PRIx64 " size 0x%zx" 238qemu_vfio_dma_map(void *s, void *host, size_t size, bool temporary, uint64_t *iova) "s %p host %p size 0x%zx temporary %d &iova %p" 239qemu_vfio_dma_mapped(void *s, void *host, uint64_t iova, size_t size) "s %p host %p <-> iova 0x%"PRIx64" size 0x%zx" 240qemu_vfio_dma_unmap(void *s, void *host) "s %p host %p" 241qemu_vfio_pci_read_config(void *buf, int ofs, int size, uint64_t region_ofs, uint64_t region_size) "read cfg ptr %p ofs 0x%x size 0x%x (region addr 0x%"PRIx64" size 0x%"PRIx64")" 242qemu_vfio_pci_write_config(void *buf, int ofs, int size, uint64_t region_ofs, uint64_t region_size) "write cfg ptr %p ofs 0x%x size 0x%x (region addr 0x%"PRIx64" size 0x%"PRIx64")" 243qemu_vfio_region_info(const char *desc, uint64_t region_ofs, uint64_t region_size, uint32_t cap_offset) "region '%s' addr 0x%"PRIx64" size 0x%"PRIx64" cap_ofs 0x%"PRIx32 244qemu_vfio_pci_map_bar(int index, uint64_t region_ofs, uint64_t region_size, int ofs, void *host) "map region bar#%d addr 0x%"PRIx64" size 0x%"PRIx64" ofs 0x%x host %p" 245 246#userfaultfd.c 247uffd_detect_open_mode(int mode) "%d" 248uffd_query_features_nosys(int err) "errno: %i" 249uffd_query_features_api_failed(int err) "errno: %i" 250uffd_create_fd_nosys(int err) "errno: %i" 251uffd_create_fd_api_failed(int err) "errno: %i" 252uffd_create_fd_api_noioctl(uint64_t ioctl_req, uint64_t ioctl_supp) "ioctl_req: 0x%" PRIx64 "ioctl_supp: 0x%" PRIx64 253uffd_register_memory_failed(void *addr, uint64_t length, uint64_t mode, int err) "addr: %p length: %" PRIu64 " mode: 0x%" PRIx64 " errno: %i" 254uffd_unregister_memory_failed(void *addr, uint64_t length, int err) "addr: %p length: %" PRIu64 " errno: %i" 255 256# module.c 257module_load_module(const char *name) "file %s" 258module_lookup_object_type(const char *name) "name %s" 259# See docs/devel/tracing.rst for syntax documentation. 260 261# gdbstub.c 262gdbstub_op_start(const char *device) "Starting gdbstub using device %s" 263gdbstub_op_exiting(uint8_t code) "notifying exit with code=0x%02x" 264gdbstub_op_continue(void) "Continuing all CPUs" 265gdbstub_op_continue_cpu(int cpu_index) "Continuing CPU %d" 266gdbstub_op_stepping(int cpu_index) "Stepping CPU %d" 267gdbstub_op_extra_info(const char *info) "Thread extra info: %s" 268gdbstub_hit_internal_error(void) "RUN_STATE_INTERNAL_ERROR" 269gdbstub_hit_break(void) "RUN_STATE_DEBUG" 270gdbstub_hit_paused(void) "RUN_STATE_PAUSED" 271gdbstub_hit_shutdown(void) "RUN_STATE_SHUTDOWN" 272gdbstub_hit_io_error(void) "RUN_STATE_IO_ERROR" 273gdbstub_hit_watchdog(void) "RUN_STATE_WATCHDOG" 274gdbstub_hit_unknown(int state) "Unknown run state=0x%x" 275gdbstub_io_reply(const char *message) "Sent: %s" 276gdbstub_io_binaryreply(size_t ofs, const char *line) "0x%04zx: %s" 277gdbstub_io_command(const char *command) "Received: %s" 278gdbstub_io_got_ack(void) "Got ACK" 279gdbstub_io_got_unexpected(uint8_t ch) "Got 0x%02x when expecting ACK/NACK" 280gdbstub_err_got_nack(void) "Got NACK, retransmitting" 281gdbstub_err_garbage(uint8_t ch) "received garbage between packets: 0x%02x" 282gdbstub_err_overrun(void) "command buffer overrun, dropping command" 283gdbstub_err_invalid_repeat(uint8_t ch) "got invalid RLE count: 0x%02x" 284gdbstub_err_invalid_rle(void) "got invalid RLE sequence" 285gdbstub_err_checksum_invalid(uint8_t ch) "got invalid command checksum digit: 0x%02x" 286gdbstub_err_checksum_incorrect(uint8_t expected, uint8_t got) "got command packet with incorrect checksum, expected=0x%02x, received=0x%02x" 287gdbstub_err_unexpected_runpkt(uint8_t ch) "unexpected packet (0x%02x) while target running" 288 289# system.c 290gdbstub_hit_watchpoint(const char *type, int cpu_gdb_index, uint64_t vaddr) "Watchpoint hit, type=\"%s\" cpu=%d, vaddr=0x%" PRIx64 "" 291# See docs/devel/tracing.rst for syntax documentation. 292 293# base.c 294qauthz_is_allowed(void *authz, const char *identity, bool allowed) "AuthZ %p check identity=%s allowed=%d" 295 296# simple.c 297qauthz_simple_is_allowed(void *authz, const char *wantidentity, const char *gotidentity) "AuthZ simple %p check want identity=%s got identity=%s" 298 299# list.c 300qauthz_list_check_rule(void *authz, const char *identity, const char *rule, int format, int policy) "AuthZ list %p check rule=%s identity=%s format=%d policy=%d" 301qauthz_list_default_policy(void *authz, const char *identity, int policy) "AuthZ list %p default identity=%s policy=%d" 302 303# listfile.c 304qauthz_list_file_load(void *authz, const char *filename) "AuthZ file %p load filename=%s" 305qauthz_list_file_refresh(void *authz, const char *filename, int success) "AuthZ file %p load filename=%s success=%d" 306 307# pamacct.c 308qauthz_pam_check(void *authz, const char *identity, const char *service) "AuthZ PAM %p identity=%s service=%s" 309# See docs/devel/tracing.rst for syntax documentation. 310 311# ../block.c 312bdrv_open_common(void *bs, const char *filename, int flags, const char *format_name) "bs %p filename \"%s\" flags 0x%x format_name \"%s\"" 313bdrv_lock_medium(void *bs, bool locked) "bs %p locked %d" 314 315# block-backend.c 316blk_co_preadv(void *blk, void *bs, int64_t offset, int64_t bytes, int flags) "blk %p bs %p offset %"PRId64" bytes %" PRId64 " flags 0x%x" 317blk_co_pwritev(void *blk, void *bs, int64_t offset, int64_t bytes, int flags) "blk %p bs %p offset %"PRId64" bytes %" PRId64 " flags 0x%x" 318blk_root_attach(void *child, void *blk, void *bs) "child %p blk %p bs %p" 319blk_root_detach(void *child, void *blk, void *bs) "child %p blk %p bs %p" 320 321# io.c 322bdrv_co_preadv_part(void *bs, int64_t offset, int64_t bytes, unsigned int flags) "bs %p offset %" PRId64 " bytes %" PRId64 " flags 0x%x" 323bdrv_co_pwritev_part(void *bs, int64_t offset, int64_t bytes, unsigned int flags) "bs %p offset %" PRId64 " bytes %" PRId64 " flags 0x%x" 324bdrv_co_pwrite_zeroes(void *bs, int64_t offset, int64_t bytes, int flags) "bs %p offset %" PRId64 " bytes %" PRId64 " flags 0x%x" 325bdrv_co_do_copy_on_readv(void *bs, int64_t offset, int64_t bytes, int64_t cluster_offset, int64_t cluster_bytes) "bs %p offset %" PRId64 " bytes %" PRId64 " cluster_offset %" PRId64 " cluster_bytes %" PRId64 326bdrv_co_copy_range_from(void *src, int64_t src_offset, void *dst, int64_t dst_offset, int64_t bytes, int read_flags, int write_flags) "src %p offset %" PRId64 " dst %p offset %" PRId64 " bytes %" PRId64 " rw flags 0x%x 0x%x" 327bdrv_co_copy_range_to(void *src, int64_t src_offset, void *dst, int64_t dst_offset, int64_t bytes, int read_flags, int write_flags) "src %p offset %" PRId64 " dst %p offset %" PRId64 " bytes %" PRId64 " rw flags 0x%x 0x%x" 328 329# stream.c 330stream_one_iteration(void *s, int64_t offset, uint64_t bytes, int is_allocated) "s %p offset %" PRId64 " bytes %" PRIu64 " is_allocated %d" 331stream_start(void *bs, void *base, void *s) "bs %p base %p s %p" 332 333# commit.c 334commit_one_iteration(void *s, int64_t offset, uint64_t bytes, int is_allocated) "s %p offset %" PRId64 " bytes %" PRIu64 " is_allocated %d" 335commit_start(void *bs, void *base, void *top, void *s) "bs %p base %p top %p s %p" 336 337# mirror.c 338mirror_start(void *bs, void *s, void *opaque) "bs %p s %p opaque %p" 339mirror_restart_iter(void *s, int64_t cnt) "s %p dirty count %"PRId64 340mirror_before_flush(void *s) "s %p" 341mirror_before_drain(void *s, int64_t cnt) "s %p dirty count %"PRId64 342mirror_before_sleep(void *s, int64_t cnt, int synced, uint64_t delay_ns) "s %p dirty count %"PRId64" synced %d delay %"PRIu64"ns" 343mirror_one_iteration(void *s, int64_t offset, uint64_t bytes) "s %p offset %" PRId64 " bytes %" PRIu64 344mirror_iteration_done(void *s, int64_t offset, uint64_t bytes, int ret) "s %p offset %" PRId64 " bytes %" PRIu64 " ret %d" 345mirror_yield(void *s, int64_t cnt, int buf_free_count, int in_flight) "s %p dirty count %"PRId64" free buffers %d in_flight %d" 346mirror_yield_in_flight(void *s, int64_t offset, int in_flight) "s %p offset %" PRId64 " in_flight %d" 347 348# backup.c 349backup_do_cow_enter(void *job, int64_t start, int64_t offset, uint64_t bytes) "job %p start %" PRId64 " offset %" PRId64 " bytes %" PRIu64 350backup_do_cow_return(void *job, int64_t offset, uint64_t bytes, int ret) "job %p offset %" PRId64 " bytes %" PRIu64 " ret %d" 351 352# block-copy.c 353block_copy_skip_range(void *bcs, int64_t start, uint64_t bytes) "bcs %p start %"PRId64" bytes %"PRId64 354block_copy_process(void *bcs, int64_t start) "bcs %p start %"PRId64 355block_copy_copy_range_fail(void *bcs, int64_t start, int ret) "bcs %p start %"PRId64" ret %d" 356block_copy_read_fail(void *bcs, int64_t start, int ret) "bcs %p start %"PRId64" ret %d" 357block_copy_write_fail(void *bcs, int64_t start, int ret) "bcs %p start %"PRId64" ret %d" 358block_copy_write_zeroes_fail(void *bcs, int64_t start, int ret) "bcs %p start %"PRId64" ret %d" 359 360# ../blockdev.c 361qmp_block_job_cancel(void *job) "job %p" 362qmp_block_job_pause(void *job) "job %p" 363qmp_block_job_resume(void *job) "job %p" 364qmp_block_job_complete(void *job) "job %p" 365qmp_block_job_finalize(void *job) "job %p" 366qmp_block_job_dismiss(void *job) "job %p" 367qmp_block_stream(void *bs) "bs %p" 368 369# file-win32.c 370file_paio_submit(void *acb, void *opaque, int64_t offset, int count, int type) "acb %p opaque %p offset %"PRId64" count %d type %d" 371 372# io_uring.c 373luring_init_state(void *s, size_t size) "s %p size %zu" 374luring_cleanup_state(void *s) "%p freed" 375luring_unplug_fn(void *s, int blocked, int queued, int inflight) "LuringState %p blocked %d queued %d inflight %d" 376luring_do_submit(void *s, int blocked, int queued, int inflight) "LuringState %p blocked %d queued %d inflight %d" 377luring_do_submit_done(void *s, int ret) "LuringState %p submitted to kernel %d" 378luring_co_submit(void *bs, void *s, void *luringcb, int fd, uint64_t offset, size_t nbytes, int type) "bs %p s %p luringcb %p fd %d offset %" PRId64 " nbytes %zd type %d" 379luring_process_completion(void *s, void *aiocb, int ret) "LuringState %p luringcb %p ret %d" 380luring_io_uring_submit(void *s, int ret) "LuringState %p ret %d" 381luring_resubmit_short_read(void *s, void *luringcb, int nread) "LuringState %p luringcb %p nread %d" 382 383# qcow2.c 384qcow2_add_task(void *co, void *bs, void *pool, const char *action, int cluster_type, uint64_t host_offset, uint64_t offset, uint64_t bytes, void *qiov, size_t qiov_offset) "co %p bs %p pool %p: %s: cluster_type %d file_cluster_offset %" PRIu64 " offset %" PRIu64 " bytes %" PRIu64 " qiov %p qiov_offset %zu" 385qcow2_writev_start_req(void *co, int64_t offset, int64_t bytes) "co %p offset 0x%" PRIx64 " bytes %" PRId64 386qcow2_writev_done_req(void *co, int ret) "co %p ret %d" 387qcow2_writev_start_part(void *co) "co %p" 388qcow2_writev_done_part(void *co, int cur_bytes) "co %p cur_bytes %d" 389qcow2_writev_data(void *co, uint64_t offset) "co %p offset 0x%" PRIx64 390qcow2_pwrite_zeroes_start_req(void *co, int64_t offset, int64_t bytes) "co %p offset 0x%" PRIx64 " bytes %" PRId64 391qcow2_pwrite_zeroes(void *co, int64_t offset, int64_t bytes) "co %p offset 0x%" PRIx64 " bytes %" PRId64 392qcow2_skip_cow(void *co, uint64_t offset, int nb_clusters) "co %p offset 0x%" PRIx64 " nb_clusters %d" 393 394# qcow2-cluster.c 395qcow2_alloc_clusters_offset(void *co, uint64_t offset, int bytes) "co %p offset 0x%" PRIx64 " bytes %d" 396qcow2_handle_copied(void *co, uint64_t guest_offset, uint64_t host_offset, uint64_t bytes) "co %p guest_offset 0x%" PRIx64 " host_offset 0x%" PRIx64 " bytes 0x%" PRIx64 397qcow2_handle_alloc(void *co, uint64_t guest_offset, uint64_t host_offset, uint64_t bytes) "co %p guest_offset 0x%" PRIx64 " host_offset 0x%" PRIx64 " bytes 0x%" PRIx64 398qcow2_do_alloc_clusters_offset(void *co, uint64_t guest_offset, uint64_t host_offset, int nb_clusters) "co %p guest_offset 0x%" PRIx64 " host_offset 0x%" PRIx64 " nb_clusters %d" 399qcow2_cluster_alloc_phys(void *co) "co %p" 400qcow2_cluster_link_l2(void *co, int nb_clusters) "co %p nb_clusters %d" 401 402qcow2_l2_allocate(void *bs, int l1_index) "bs %p l1_index %d" 403qcow2_l2_allocate_get_empty(void *bs, int l1_index) "bs %p l1_index %d" 404qcow2_l2_allocate_write_l2(void *bs, int l1_index) "bs %p l1_index %d" 405qcow2_l2_allocate_write_l1(void *bs, int l1_index) "bs %p l1_index %d" 406qcow2_l2_allocate_done(void *bs, int l1_index, int ret) "bs %p l1_index %d ret %d" 407 408# qcow2-cache.c 409qcow2_cache_get(void *co, int c, uint64_t offset, bool read_from_disk) "co %p is_l2_cache %d offset 0x%" PRIx64 " read_from_disk %d" 410qcow2_cache_get_replace_entry(void *co, int c, int i) "co %p is_l2_cache %d index %d" 411qcow2_cache_get_read(void *co, int c, int i) "co %p is_l2_cache %d index %d" 412qcow2_cache_get_done(void *co, int c, int i) "co %p is_l2_cache %d index %d" 413qcow2_cache_flush(void *co, int c) "co %p is_l2_cache %d" 414qcow2_cache_entry_flush(void *co, int c, int i) "co %p is_l2_cache %d index %d" 415 416# qcow2-refcount.c 417qcow2_process_discards_failed_region(uint64_t offset, uint64_t bytes, int ret) "offset 0x%" PRIx64 " bytes 0x%" PRIx64 " ret %d" 418 419# qed-l2-cache.c 420qed_alloc_l2_cache_entry(void *l2_cache, void *entry) "l2_cache %p entry %p" 421qed_unref_l2_cache_entry(void *entry, int ref) "entry %p ref %d" 422qed_find_l2_cache_entry(void *l2_cache, void *entry, uint64_t offset, int ref) "l2_cache %p entry %p offset %"PRIu64" ref %d" 423 424# qed-table.c 425qed_read_table(void *s, uint64_t offset, void *table) "s %p offset %"PRIu64" table %p" 426qed_read_table_cb(void *s, void *table, int ret) "s %p table %p ret %d" 427qed_write_table(void *s, uint64_t offset, void *table, unsigned int index, unsigned int n) "s %p offset %"PRIu64" table %p index %u n %u" 428qed_write_table_cb(void *s, void *table, int flush, int ret) "s %p table %p flush %d ret %d" 429 430# qed.c 431qed_need_check_timer_cb(void *s) "s %p" 432qed_start_need_check_timer(void *s) "s %p" 433qed_cancel_need_check_timer(void *s) "s %p" 434qed_aio_complete(void *s, void *acb, int ret) "s %p acb %p ret %d" 435qed_aio_setup(void *s, void *acb, int64_t sector_num, int nb_sectors, void *opaque, int flags) "s %p acb %p sector_num %"PRId64" nb_sectors %d opaque %p flags 0x%x" 436qed_aio_next_io(void *s, void *acb, int ret, uint64_t cur_pos) "s %p acb %p ret %d cur_pos %"PRIu64 437qed_aio_read_data(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu" 438qed_aio_write_data(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu" 439qed_aio_write_prefill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64 440qed_aio_write_postfill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64 441qed_aio_write_main(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu" 442 443# nvme.c 444nvme_controller_capability_raw(uint64_t value) "0x%08"PRIx64 445nvme_controller_capability(const char *desc, uint64_t value) "%s: %"PRIu64 446nvme_controller_spec_version(uint32_t mjr, uint32_t mnr, uint32_t ter) "Specification supported: %u.%u.%u" 447nvme_kick(void *s, unsigned q_index) "s %p q #%u" 448nvme_dma_flush_queue_wait(void *s) "s %p" 449nvme_error(int cmd_specific, int sq_head, int sqid, int cid, int status) "cmd_specific %d sq_head %d sqid %d cid %d status 0x%x" 450nvme_process_completion(void *s, unsigned q_index, int inflight) "s %p q #%u inflight %d" 451nvme_complete_command(void *s, unsigned q_index, int cid) "s %p q #%u cid %d" 452nvme_submit_command(void *s, unsigned q_index, int cid) "s %p q #%u cid %d" 453nvme_submit_command_raw(int c0, int c1, int c2, int c3, int c4, int c5, int c6, int c7) "%02x %02x %02x %02x %02x %02x %02x %02x" 454nvme_handle_event(void *s) "s %p" 455nvme_poll_queue(void *s, unsigned q_index) "s %p q #%u" 456nvme_prw_aligned(void *s, int is_write, uint64_t offset, uint64_t bytes, int flags, int niov) "s %p is_write %d offset 0x%"PRIx64" bytes %"PRId64" flags %d niov %d" 457nvme_write_zeroes(void *s, uint64_t offset, uint64_t bytes, int flags) "s %p offset 0x%"PRIx64" bytes %"PRId64" flags %d" 458nvme_qiov_unaligned(const void *qiov, int n, void *base, size_t size, int align) "qiov %p n %d base %p size 0x%zx align 0x%x" 459nvme_prw_buffered(void *s, uint64_t offset, uint64_t bytes, int niov, int is_write) "s %p offset 0x%"PRIx64" bytes %"PRId64" niov %d is_write %d" 460nvme_rw_done(void *s, int is_write, uint64_t offset, uint64_t bytes, int ret) "s %p is_write %d offset 0x%"PRIx64" bytes %"PRId64" ret %d" 461nvme_dsm(void *s, int64_t offset, int64_t bytes) "s %p offset 0x%"PRIx64" bytes %"PRId64"" 462nvme_dsm_done(void *s, int64_t offset, int64_t bytes, int ret) "s %p offset 0x%"PRIx64" bytes %"PRId64" ret %d" 463nvme_dma_map_flush(void *s) "s %p" 464nvme_free_req_queue_wait(void *s, unsigned q_index) "s %p q #%u" 465nvme_create_queue_pair(unsigned q_index, void *q, size_t size, void *aio_context, int fd) "index %u q %p size %zu aioctx %p fd %d" 466nvme_free_queue_pair(unsigned q_index, void *q, void *cq, void *sq) "index %u q %p cq %p sq %p" 467nvme_cmd_map_qiov(void *s, void *cmd, void *req, void *qiov, int entries) "s %p cmd %p req %p qiov %p entries %d" 468nvme_cmd_map_qiov_pages(void *s, int i, uint64_t page) "s %p page[%d] 0x%"PRIx64 469nvme_cmd_map_qiov_iov(void *s, int i, void *page, int pages) "s %p iov[%d] %p pages %d" 470 471# iscsi.c 472iscsi_xcopy(void *src_lun, uint64_t src_off, void *dst_lun, uint64_t dst_off, uint64_t bytes, int ret) "src_lun %p offset %"PRIu64" dst_lun %p offset %"PRIu64" bytes %"PRIu64" ret %d" 473 474# nbd.c 475nbd_parse_blockstatus_compliance(const char *err) "ignoring extra data from non-compliant server: %s" 476nbd_structured_read_compliance(const char *type) "server sent non-compliant unaligned read %s chunk" 477nbd_extended_headers_compliance(const char *type) "server sent non-compliant %s chunk not matching choice of extended headers" 478nbd_read_reply_entry_fail(int ret, const char *err) "ret = %d, err: %s" 479nbd_co_request_fail(uint64_t from, uint64_t len, uint64_t handle, uint16_t flags, uint16_t type, const char *name, int ret, const char *err) "Request failed { .from = %" PRIu64", .len = %" PRIu64 ", .handle = %" PRIu64 ", .flags = 0x%" PRIx16 ", .type = %" PRIu16 " (%s) } ret = %d, err: %s" 480nbd_client_handshake(const char *export_name) "export '%s'" 481nbd_client_handshake_success(const char *export_name) "export '%s'" 482nbd_reconnect_attempt(unsigned in_flight) "in_flight %u" 483nbd_reconnect_attempt_result(int ret, unsigned in_flight) "ret %d in_flight %u" 484 485# ssh.c 486ssh_restart_coroutine(void *co) "co=%p" 487ssh_flush(void) "fsync" 488ssh_check_host_key_knownhosts(void) "host key OK" 489ssh_connect_to_ssh(char *path, int flags, int mode) "opening file %s flags=0x%x creat_mode=0%o" 490ssh_co_yield(int sock, void *rd_handler, void *wr_handler) "s->sock=%d rd_handler=%p wr_handler=%p" 491ssh_co_yield_back(int sock) "s->sock=%d - back" 492ssh_getlength(int64_t length) "length=%" PRIi64 493ssh_co_create_opts(uint64_t size) "total_size=%" PRIu64 494ssh_read(int64_t offset, size_t size) "offset=%" PRIi64 " size=%zu" 495ssh_read_buf(void *buf, size_t size, size_t actual_size) "sftp_read buf=%p size=%zu (actual size=%zu)" 496ssh_read_return(ssize_t ret, int sftp_err) "sftp_read returned %zd (sftp error=%d)" 497ssh_write(int64_t offset, size_t size) "offset=%" PRIi64 " size=%zu" 498ssh_write_buf(void *buf, size_t size, size_t actual_size) "sftp_write buf=%p size=%zu (actual size=%zu)" 499ssh_write_return(ssize_t ret, int sftp_err) "sftp_write returned %zd (sftp error=%d)" 500ssh_seek(int64_t offset) "seeking to offset=%" PRIi64 501ssh_auth_methods(int methods) "auth methods=0x%x" 502ssh_server_status(int status) "server status=%d" 503 504# curl.c 505curl_timer_cb(long timeout_ms) "timer callback timeout_ms %ld" 506curl_sock_cb(int action, int fd) "sock action %d on fd %d" 507curl_read_cb(size_t realsize) "just reading %zu bytes" 508curl_open(const char *file) "opening %s" 509curl_open_size(uint64_t size) "size = %" PRIu64 510curl_setup_preadv(uint64_t bytes, uint64_t start, const char *range) "reading %" PRIu64 " at %" PRIu64 " (%s)" 511curl_close(void) "close" 512 513# file-posix.c 514file_copy_file_range(void *bs, int src, int64_t src_off, int dst, int64_t dst_off, int64_t bytes, int flags, int64_t ret) "bs %p src_fd %d offset %"PRIu64" dst_fd %d offset %"PRIu64" bytes %"PRIu64" flags %d ret %"PRId64 515file_FindEjectableOpticalMedia(const char *media) "Matching using %s" 516file_setup_cdrom(const char *partition) "Using %s as optical disc" 517file_hdev_is_sg(int type, int version) "SG device found: type=%d, version=%d" 518file_flush_fdatasync_failed(int err) "errno %d" 519zbd_zone_report(void *bs, unsigned int nr_zones, int64_t sector) "bs %p report %d zones starting at sector offset 0x%" PRIx64 "" 520zbd_zone_mgmt(void *bs, const char *op_name, int64_t sector, int64_t len) "bs %p %s starts at sector offset 0x%" PRIx64 " over a range of 0x%" PRIx64 " sectors" 521zbd_zone_append(void *bs, int64_t sector) "bs %p append at sector offset 0x%" PRIx64 "" 522zbd_zone_append_complete(void *bs, int64_t sector) "bs %p returns append sector 0x%" PRIx64 "" 523 524# ssh.c 525sftp_error(const char *op, const char *ssh_err, int ssh_err_code, int sftp_err_code) "%s failed: %s (libssh error code: %d, sftp error code: %d)" 526# See docs/devel/tracing.rst for syntax documentation. 527 528# task.c 529qio_task_new(void *task, void *source, void *func, void *opaque) "Task new task=%p source=%p func=%p opaque=%p" 530qio_task_complete(void *task) "Task complete task=%p" 531qio_task_thread_start(void *task, void *worker, void *opaque) "Task thread start task=%p worker=%p opaque=%p" 532qio_task_thread_run(void *task) "Task thread run task=%p" 533qio_task_thread_exit(void *task) "Task thread exit task=%p" 534qio_task_thread_result(void *task) "Task thread result task=%p" 535qio_task_thread_source_attach(void *task, void *source) "Task thread source attach task=%p source=%p" 536qio_task_thread_source_cancel(void *task, void *source) "Task thread source cancel task=%p source=%p" 537 538# channel-null.c 539qio_channel_null_new(void *ioc) "Null new ioc=%p" 540 541# channel-socket.c 542qio_channel_socket_new(void *ioc) "Socket new ioc=%p" 543qio_channel_socket_new_fd(void *ioc, int fd) "Socket new ioc=%p fd=%d" 544qio_channel_socket_connect_sync(void *ioc, void *addr) "Socket connect sync ioc=%p addr=%p" 545qio_channel_socket_connect_async(void *ioc, void *addr) "Socket connect async ioc=%p addr=%p" 546qio_channel_socket_connect_fail(void *ioc) "Socket connect fail ioc=%p" 547qio_channel_socket_connect_complete(void *ioc, int fd) "Socket connect complete ioc=%p fd=%d" 548qio_channel_socket_listen_sync(void *ioc, void *addr, int num) "Socket listen sync ioc=%p addr=%p num=%d" 549qio_channel_socket_listen_async(void *ioc, void *addr, int num) "Socket listen async ioc=%p addr=%p num=%d" 550qio_channel_socket_listen_fail(void *ioc) "Socket listen fail ioc=%p" 551qio_channel_socket_listen_complete(void *ioc, int fd) "Socket listen complete ioc=%p fd=%d" 552qio_channel_socket_dgram_sync(void *ioc, void *localAddr, void *remoteAddr) "Socket dgram sync ioc=%p localAddr=%p remoteAddr=%p" 553qio_channel_socket_dgram_async(void *ioc, void *localAddr, void *remoteAddr) "Socket dgram async ioc=%p localAddr=%p remoteAddr=%p" 554qio_channel_socket_dgram_fail(void *ioc) "Socket dgram fail ioc=%p" 555qio_channel_socket_dgram_complete(void *ioc, int fd) "Socket dgram complete ioc=%p fd=%d" 556qio_channel_socket_accept(void *ioc) "Socket accept start ioc=%p" 557qio_channel_socket_accept_fail(void *ioc) "Socket accept fail ioc=%p" 558qio_channel_socket_accept_complete(void *ioc, void *cioc, int fd) "Socket accept complete ioc=%p cioc=%p fd=%d" 559 560# channel-file.c 561qio_channel_file_new_fd(void *ioc, int fd) "File new fd ioc=%p fd=%d" 562qio_channel_file_new_path(void *ioc, const char *path, int flags, int mode, int fd) "File new fd ioc=%p path=%s flags=%d mode=%d fd=%d" 563 564# channel-tls.c 565qio_channel_tls_new_client(void *ioc, void *master, void *creds, const char *hostname) "TLS new client ioc=%p master=%p creds=%p hostname=%s" 566qio_channel_tls_new_server(void *ioc, void *master, void *creds, const char *aclname) "TLS new client ioc=%p master=%p creds=%p acltname=%s" 567qio_channel_tls_handshake_start(void *ioc) "TLS handshake start ioc=%p" 568qio_channel_tls_handshake_pending(void *ioc, int status) "TLS handshake pending ioc=%p status=%d" 569qio_channel_tls_handshake_fail(void *ioc) "TLS handshake fail ioc=%p" 570qio_channel_tls_handshake_complete(void *ioc) "TLS handshake complete ioc=%p" 571qio_channel_tls_credentials_allow(void *ioc) "TLS credentials allow ioc=%p" 572qio_channel_tls_credentials_deny(void *ioc) "TLS credentials deny ioc=%p" 573 574# channel-websock.c 575qio_channel_websock_new_server(void *ioc, void *master) "Websock new client ioc=%p master=%p" 576qio_channel_websock_handshake_start(void *ioc) "Websock handshake start ioc=%p" 577qio_channel_websock_handshake_pending(void *ioc, int status) "Websock handshake pending ioc=%p status=%d" 578qio_channel_websock_handshake_reply(void *ioc) "Websock handshake reply ioc=%p" 579qio_channel_websock_handshake_fail(void *ioc, const char *msg) "Websock handshake fail ioc=%p err=%s" 580qio_channel_websock_handshake_complete(void *ioc) "Websock handshake complete ioc=%p" 581qio_channel_websock_http_greeting(void *ioc, const char *greeting) "Websocket HTTP request ioc=%p greeting='%s'" 582qio_channel_websock_http_request(void *ioc, const char *protocols, const char *version, const char *host, const char *connection, const char *upgrade, const char *key) "Websocket HTTP request ioc=%p protocols='%s' version='%s' host='%s' connection='%s' upgrade='%s' key='%s'" 583qio_channel_websock_header_partial_decode(void *ioc, size_t payloadlen, unsigned char fin, unsigned char opcode, unsigned char has_mask) "Websocket header decoded ioc=%p payload-len=%zu fin=0x%x opcode=0x%x has_mask=0x%x" 584qio_channel_websock_header_full_decode(void *ioc, size_t headerlen, size_t payloadlen, uint32_t mask) "Websocket header decoded ioc=%p header-len=%zu payload-len=%zu mask=0x%x" 585qio_channel_websock_payload_decode(void *ioc, uint8_t opcode, size_t payload_remain) "Websocket header decoded ioc=%p opcode=0x%x payload-remain=%zu" 586qio_channel_websock_encode(void *ioc, uint8_t opcode, size_t payloadlen, size_t headerlen) "Websocket encoded ioc=%p opcode=0x%x header-len=%zu payload-len=%zu" 587qio_channel_websock_close(void *ioc) "Websocket close ioc=%p" 588 589# channel-command.c 590qio_channel_command_new_pid(void *ioc, int writefd, int readfd, int pid) "Command new pid ioc=%p writefd=%d readfd=%d pid=%d" 591qio_channel_command_new_spawn(void *ioc, const char *binary, int flags) "Command new spawn ioc=%p binary=%s flags=%d" 592qio_channel_command_abort(void *ioc, int pid) "Command abort ioc=%p pid=%d" 593qio_channel_command_wait(void *ioc, int pid, int ret, int status) "Command abort ioc=%p pid=%d ret=%d status=%d" 594# See docs/devel/tracing.rst for syntax documentation. 595 596# client.c 597nbd_send_option_request(uint32_t opt, const char *name, uint32_t len) "Sending option request %" PRIu32" (%s), len %" PRIu32 598nbd_receive_option_reply(uint32_t option, const char *optname, uint32_t type, const char *typename, uint32_t length) "Received option reply %" PRIu32" (%s), type %" PRIu32" (%s), len %" PRIu32 599nbd_server_error_msg(uint32_t err, const char *type, const char *msg) "server reported error 0x%" PRIx32 " (%s) with additional message: %s" 600nbd_reply_err_ignored(uint32_t option, const char *name, uint32_t reply, const char *reply_name) "server failed request %" PRIu32 " (%s) with error 0x%" PRIx32 " (%s), attempting fallback" 601nbd_receive_list(const char *name, const char *desc) "export list includes '%s', description '%s'" 602nbd_opt_info_go_start(const char *opt, const char *name) "Attempting %s for export '%s'" 603nbd_opt_info_go_success(const char *opt) "Export is ready after %s request" 604nbd_opt_info_unknown(int info, const char *name) "Ignoring unknown info %d (%s)" 605nbd_opt_info_block_size(uint32_t minimum, uint32_t preferred, uint32_t maximum) "Block sizes are 0x%" PRIx32 ", 0x%" PRIx32 ", 0x%" PRIx32 606nbd_receive_query_exports_start(const char *wantname) "Querying export list for '%s'" 607nbd_receive_query_exports_success(const char *wantname) "Found desired export name '%s'" 608nbd_receive_starttls_new_client(void) "Setting up TLS" 609nbd_receive_starttls_tls_handshake(void) "Starting TLS handshake" 610nbd_opt_meta_request(const char *optname, const char *context, const char *export) "Requesting %s %s for export %s" 611nbd_opt_meta_reply(const char *optname, const char *context, uint32_t id) "Received %s mapping of %s to id %" PRIu32 612nbd_start_negotiate(void *tlscreds, const char *hostname) "Receiving negotiation tlscreds=%p hostname=%s" 613nbd_receive_negotiate_magic(uint64_t magic) "Magic is 0x%" PRIx64 614nbd_receive_negotiate_server_flags(uint32_t globalflags) "Global flags are 0x%" PRIx32 615nbd_receive_negotiate_name(const char *name) "Requesting NBD export name '%s'" 616nbd_receive_negotiate_size_flags(uint64_t size, uint16_t flags) "Size is %" PRIu64 ", export flags 0x%" PRIx16 617nbd_init_set_socket(void) "Setting NBD socket" 618nbd_init_set_block_size(unsigned long block_size) "Setting block size to %lu" 619nbd_init_set_size(unsigned long sectors) "Setting size to %lu block(s)" 620nbd_init_trailing_bytes(int ignored_bytes) "Ignoring trailing %d bytes of export" 621nbd_init_set_readonly(void) "Setting readonly attribute" 622nbd_init_finish(void) "Negotiation ended" 623nbd_client_loop(void) "Doing NBD loop" 624nbd_client_loop_ret(int ret, const char *error) "NBD loop returned %d: %s" 625nbd_client_clear_queue(void) "Clearing NBD queue" 626nbd_client_clear_socket(void) "Clearing NBD socket" 627nbd_send_request(uint64_t from, uint64_t len, uint64_t cookie, uint16_t flags, uint16_t type, const char *name) "Sending request to server: { .from = %" PRIu64", .len = %" PRIu64 ", .cookie = %" PRIu64 ", .flags = 0x%" PRIx16 ", .type = %" PRIu16 " (%s) }" 628nbd_receive_simple_reply(int32_t error, const char *errname, uint64_t cookie) "Got simple reply: { .error = %" PRId32 " (%s), cookie = %" PRIu64" }" 629nbd_receive_reply_chunk_header(uint16_t flags, uint16_t type, const char *name, uint64_t cookie, uint32_t length) "Got reply chunk header: { flags = 0x%" PRIx16 ", type = %" PRIu16 " (%s), cookie = %" PRIu64 ", length = %" PRIu32 " }" 630nbd_receive_wrong_header(uint32_t magic, const char *mode) "Server sent unexpected magic 0x%" PRIx32 " for negotiated mode %s" 631 632# common.c 633nbd_unknown_error(int err) "Squashing unexpected error %d to EINVAL" 634 635# server.c 636nbd_negotiate_send_rep_len(uint32_t opt, const char *optname, uint32_t type, const char *typename, uint32_t len) "Reply opt=%" PRIu32 " (%s), type=%" PRIu32 " (%s), len=%" PRIu32 637nbd_negotiate_send_rep_err(const char *msg) "sending error message \"%s\"" 638nbd_negotiate_send_rep_list(const char *name, const char *desc) "Advertising export name '%s' description '%s'" 639nbd_negotiate_handle_export_name(void) "Checking length" 640nbd_negotiate_handle_export_name_request(const char *name) "Client requested export '%s'" 641nbd_negotiate_send_info(int info, const char *name, uint32_t length) "Sending NBD_REP_INFO type %d (%s) with remaining length %" PRIu32 642nbd_negotiate_handle_info_requests(int requests) "Client requested %d items of info" 643nbd_negotiate_handle_info_request(int request, const char *name) "Client requested info %d (%s)" 644nbd_negotiate_handle_info_block_size(uint32_t minimum, uint32_t preferred, uint32_t maximum) "advertising minimum 0x%" PRIx32 ", preferred 0x%" PRIx32 ", maximum 0x%" PRIx32 645nbd_negotiate_handle_starttls(void) "Setting up TLS" 646nbd_negotiate_handle_starttls_handshake(void) "Starting TLS handshake" 647nbd_negotiate_meta_context(const char *optname, const char *export, uint32_t queries) "Client requested %s for export %s, with %" PRIu32 " queries" 648nbd_negotiate_meta_query_skip(const char *reason) "Skipping meta query: %s" 649nbd_negotiate_meta_query_parse(const char *query) "Parsed meta query '%s'" 650nbd_negotiate_meta_query_reply(const char *context, uint32_t id) "Replying with meta context '%s' id %" PRIu32 651nbd_negotiate_options_flags(uint32_t flags) "Received client flags 0x%" PRIx32 652nbd_negotiate_options_check_magic(uint64_t magic) "Checking opts magic 0x%" PRIx64 653nbd_negotiate_options_check_option(uint32_t option, const char *name) "Checking option %" PRIu32 " (%s)" 654nbd_negotiate_begin(void) "Beginning negotiation" 655nbd_negotiate_new_style_size_flags(uint64_t size, unsigned flags) "advertising size %" PRIu64 " and flags 0x%x" 656nbd_negotiate_success(void) "Negotiation succeeded" 657nbd_receive_request(uint32_t magic, uint16_t flags, uint16_t type, uint64_t from, uint64_t len) "Got request: { magic = 0x%" PRIx32 ", .flags = 0x%" PRIx16 ", .type = 0x%" PRIx16 ", from = %" PRIu64 ", len = %" PRIu64 " }" 658nbd_blk_aio_attached(const char *name, void *ctx) "Export %s: Attaching clients to AIO context %p" 659nbd_blk_aio_detach(const char *name, void *ctx) "Export %s: Detaching clients from AIO context %p" 660nbd_co_send_simple_reply(uint64_t cookie, uint32_t error, const char *errname, uint64_t len) "Send simple reply: cookie = %" PRIu64 ", error = %" PRIu32 " (%s), len = %" PRIu64 661nbd_co_send_chunk_done(uint64_t cookie) "Send structured reply done: cookie = %" PRIu64 662nbd_co_send_chunk_read(uint64_t cookie, uint64_t offset, void *data, uint64_t size) "Send structured read data reply: cookie = %" PRIu64 ", offset = %" PRIu64 ", data = %p, len = %" PRIu64 663nbd_co_send_chunk_read_hole(uint64_t cookie, uint64_t offset, uint64_t size) "Send structured read hole reply: cookie = %" PRIu64 ", offset = %" PRIu64 ", len = %" PRIu64 664nbd_co_send_extents(uint64_t cookie, unsigned int extents, uint32_t id, uint64_t length, int last) "Send block status reply: cookie = %" PRIu64 ", extents = %u, context = %d (extents cover %" PRIu64 " bytes, last chunk = %d)" 665nbd_co_send_chunk_error(uint64_t cookie, int err, const char *errname, const char *msg) "Send structured error reply: cookie = %" PRIu64 ", error = %d (%s), msg = '%s'" 666nbd_co_receive_block_status_payload_compliance(uint64_t from, uint64_t len) "client sent unusable block status payload: from=0x%" PRIx64 ", len=0x%" PRIx64 667nbd_co_receive_request_decode_type(uint64_t cookie, uint16_t type, const char *name) "Decoding type: cookie = %" PRIu64 ", type = %" PRIu16 " (%s)" 668nbd_co_receive_request_payload_received(uint64_t cookie, uint64_t len) "Payload received: cookie = %" PRIu64 ", len = %" PRIu64 669nbd_co_receive_ext_payload_compliance(uint64_t from, uint64_t len) "client sent non-compliant write without payload flag: from=0x%" PRIx64 ", len=0x%" PRIx64 670nbd_co_receive_align_compliance(const char *op, uint64_t from, uint64_t len, uint32_t align) "client sent non-compliant unaligned %s request: from=0x%" PRIx64 ", len=0x%" PRIx64 ", align=0x%" PRIx32 671nbd_trip(void) "Reading request" 672 673# client-connection.c 674nbd_connect_thread_sleep(uint64_t timeout) "timeout %" PRIu64 675# See docs/devel/tracing.rst for syntax documentation. 676 677# pr-manager.c 678pr_manager_execute(int fd, int cmd, int sa) "fd=%d cmd=0x%02x service action=0x%02x" 679pr_manager_run(int fd, int cmd, int sa) "fd=%d cmd=0x%02x service action=0x%02x" 680# See docs/devel/tracing.rst for syntax documentation. 681 682# kvm-all.c 683kvm_ioctl(int type, void *arg) "type 0x%x, arg %p" 684kvm_vm_ioctl(int type, void *arg) "type 0x%x, arg %p" 685kvm_vcpu_ioctl(int cpu_index, int type, void *arg) "cpu_index %d, type 0x%x, arg %p" 686kvm_run_exit(int cpu_index, uint32_t reason) "cpu_index %d, reason %d" 687kvm_device_ioctl(int fd, int type, void *arg) "dev fd %d, type 0x%x, arg %p" 688kvm_failed_reg_get(uint64_t id, const char *msg) "Warning: Unable to retrieve ONEREG %" PRIu64 " from KVM: %s" 689kvm_failed_reg_set(uint64_t id, const char *msg) "Warning: Unable to set ONEREG %" PRIu64 " to KVM: %s" 690kvm_init_vcpu(int cpu_index, unsigned long arch_cpu_id) "index: %d id: %lu" 691kvm_irqchip_commit_routes(void) "" 692kvm_irqchip_add_msi_route(char *name, int vector, int virq) "dev %s vector %d virq %d" 693kvm_irqchip_update_msi_route(int virq) "Updating MSI route virq=%d" 694kvm_irqchip_release_virq(int virq) "virq %d" 695kvm_set_ioeventfd_mmio(int fd, uint64_t addr, uint32_t val, bool assign, uint32_t size, bool datamatch) "fd: %d @0x%" PRIx64 " val=0x%x assign: %d size: %d match: %d" 696kvm_set_ioeventfd_pio(int fd, uint16_t addr, uint32_t val, bool assign, uint32_t size, bool datamatch) "fd: %d @0x%x val=0x%x assign: %d size: %d match: %d" 697kvm_set_user_memory(uint32_t slot, uint32_t flags, uint64_t guest_phys_addr, uint64_t memory_size, uint64_t userspace_addr, int ret) "Slot#%d flags=0x%x gpa=0x%"PRIx64 " size=0x%"PRIx64 " ua=0x%"PRIx64 " ret=%d" 698kvm_clear_dirty_log(uint32_t slot, uint64_t start, uint32_t size) "slot#%"PRId32" start 0x%"PRIx64" size 0x%"PRIx32 699kvm_resample_fd_notify(int gsi) "gsi %d" 700kvm_dirty_ring_full(int id) "vcpu %d" 701kvm_dirty_ring_reap_vcpu(int id) "vcpu %d" 702kvm_dirty_ring_page(int vcpu, uint32_t slot, uint64_t offset) "vcpu %d fetch %"PRIu32" offset 0x%"PRIx64 703kvm_dirty_ring_reaper(const char *s) "%s" 704kvm_dirty_ring_reap(uint64_t count, int64_t t) "reaped %"PRIu64" pages (took %"PRIi64" us)" 705kvm_dirty_ring_reaper_kick(const char *reason) "%s" 706kvm_dirty_ring_flush(int finished) "%d" 707 708# See docs/devel/tracing.rst for syntax documentation. 709 710# alsaaudio.c 711alsa_revents(int revents) "revents = %d" 712alsa_pollout(int i, int fd) "i = %d fd = %d" 713alsa_set_handler(int events, int index, int fd, int err) "events=0x%x index=%d fd=%d err=%d" 714alsa_wrote_zero(int len) "Failed to write %d frames (wrote zero)" 715alsa_read_zero(long len) "Failed to read %ld frames (read zero)" 716alsa_xrun_out(void) "Recovering from playback xrun" 717alsa_xrun_in(void) "Recovering from capture xrun" 718alsa_resume_out(void) "Resuming suspended output stream" 719 720# ossaudio.c 721oss_version(int version) "OSS version = 0x%x" 722 723# dbusaudio.c 724dbus_audio_register(const char *s, const char *dir) "sender = %s, dir = %s" 725dbus_audio_put_buffer_out(size_t len) "len = %zu" 726dbus_audio_read(size_t len) "len = %zu" 727 728# pwaudio.c 729pw_state_changed(int nodeid, const char *s) "node id: %d stream state: %s" 730pw_read(int32_t avail, uint32_t index, size_t len) "avail=%d index=%u len=%zu" 731pw_write(int32_t filled, int32_t avail, uint32_t index, size_t len) "filled=%d avail=%d index=%u len=%zu" 732pw_vol(const char *ret) "set volume: %s" 733pw_period(uint64_t quantum, uint32_t rate) "period =%" PRIu64 "/%u" 734pw_audio_init(void) "Initialize PipeWire context" 735 736# audio.c 737audio_timer_start(int interval) "interval %d ms" 738audio_timer_stop(void) "" 739audio_timer_delayed(int interval) "interval %d ms" 740# See docs/devel/tracing.rst for syntax documentation. 741 742# dbus-vmstate.c 743dbus_vmstate_pre_save(void) 744dbus_vmstate_post_load(int version_id) "version_id: %d" 745dbus_vmstate_loading(const char *id) "id: %s" 746dbus_vmstate_saving(const char *id) "id: %s" 747# See docs/devel/tracing.rst for syntax documentation. 748 749# tpm_passthrough.c 750tpm_passthrough_handle_request(void *cmd) "processing command %p" 751tpm_passthrough_reset(void) "reset" 752 753# tpm_util.c 754tpm_util_get_buffer_size_hdr_len(uint32_t len, size_t expected) "tpm_resp->hdr.len = %u, expected = %zu" 755tpm_util_get_buffer_size_len(uint32_t len, size_t expected) "tpm_resp->len = %u, expected = %zu" 756tpm_util_get_buffer_size_hdr_len2(uint32_t len, size_t expected) "tpm2_resp->hdr.len = %u, expected = %zu" 757tpm_util_get_buffer_size_len2(uint32_t len, size_t expected) "tpm2_resp->len = %u, expected = %zu" 758tpm_util_get_buffer_size(size_t len) "buffersize of device: %zu" 759tpm_util_show_buffer(const char *direction, size_t len, const char *buf) "direction: %s len: %zu\n%s" 760 761# tpm_emulator.c 762tpm_emulator_set_locality(uint8_t locty) "setting locality to %d" 763tpm_emulator_handle_request(void) "processing TPM command" 764tpm_emulator_probe_caps(uint64_t caps) "capabilities: 0x%"PRIx64 765tpm_emulator_set_buffer_size(uint32_t buffersize, uint32_t minsize, uint32_t maxsize) "buffer size: %u, min: %u, max: %u" 766tpm_emulator_startup_tpm_resume(bool is_resume, size_t buffersize) "is_resume: %d, buffer size: %zu" 767tpm_emulator_get_tpm_established_flag(uint8_t flag) "got established flag: %d" 768tpm_emulator_cancel_cmd_not_supt(void) "Backend does not support CANCEL_TPM_CMD" 769tpm_emulator_lock_storage_cmd_not_supt(void) "Backend does not support LOCK_STORAGE" 770tpm_emulator_vm_state_change(int running, int state) "state change to running %d state %d" 771tpm_emulator_handle_device_opts_tpm12(void) "TPM Version 1.2" 772tpm_emulator_handle_device_opts_tpm2(void) "TPM Version 2" 773tpm_emulator_handle_device_opts_unspec(void) "TPM Version Unspecified" 774tpm_emulator_handle_device_opts_startup_error(void) "Startup error" 775tpm_emulator_get_state_blob(uint8_t type, uint32_t size, uint32_t flags) "got state blob type %d, %u bytes, flags 0x%08x" 776tpm_emulator_set_state_blob(uint8_t type, uint32_t size, uint32_t flags) "set state blob type %d, %u bytes, flags 0x%08x" 777tpm_emulator_set_state_blobs(void) "setting state blobs" 778tpm_emulator_set_state_blobs_error(const char *msg) "error while setting state blobs: %s" 779tpm_emulator_set_state_blobs_done(void) "Done setting state blobs" 780tpm_emulator_pre_save(void) "" 781tpm_emulator_inst_init(void) "" 782# See docs/devel/tracing.rst for syntax documentation. 783 784# wctablet.c 785wct_init(void) "" 786wct_cmd_re(void) "" 787wct_cmd_st(void) "" 788wct_cmd_sp(void) "" 789wct_cmd_ts(int input) "0x%02x" 790wct_cmd_other(const char *cmd) "%s" 791wct_speed(int speed) "%d" 792 793# spice.c 794spice_chr_discard_write(int len) "spice chr write discarded %d" 795spice_vmc_write(ssize_t out, int len) "spice wrote %zd of requested %d" 796spice_vmc_read(int bytes, int len) "spice read %d of requested %d" 797spice_vmc_register_interface(void *scd) "spice vmc registered interface %p" 798spice_vmc_unregister_interface(void *scd) "spice vmc unregistered interface %p" 799spice_vmc_event(int event) "spice vmc event %d" 800 801# See docs/devel/tracing.rst for syntax documentation. 802 803# ebpf-rss.c 804ebpf_error(const char *s1, const char *s2) "error in %s: %s" 805# See docs/devel/tracing.rst for syntax documentation. 806 807# 9p.c 808v9fs_rcancel(uint16_t tag, uint8_t id) "tag %d id %d" 809v9fs_rerror(uint16_t tag, uint8_t id, int err) "tag %d id %d err %d" 810v9fs_version(uint16_t tag, uint8_t id, int32_t msize, char* version) "tag %d id %d msize %d version %s" 811v9fs_version_return(uint16_t tag, uint8_t id, int32_t msize, char* version) "tag %d id %d msize %d version %s" 812v9fs_attach(uint16_t tag, uint8_t id, int32_t fid, int32_t afid, char* uname, char* aname) "tag %u id %u fid %d afid %d uname %s aname %s" 813v9fs_attach_return(uint16_t tag, uint8_t id, uint8_t type, uint32_t version, uint64_t path) "tag %u id %u type %u version %u path %"PRIu64 814v9fs_stat(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d" 815v9fs_stat_return(uint16_t tag, uint8_t id, int32_t mode, int32_t atime, int32_t mtime, int64_t length) "tag %d id %d stat={mode %d atime %d mtime %d length %"PRId64"}" 816v9fs_getattr(uint16_t tag, uint8_t id, int32_t fid, uint64_t request_mask) "tag %d id %d fid %d request_mask %"PRIu64 817v9fs_getattr_return(uint16_t tag, uint8_t id, uint64_t result_mask, uint32_t mode, uint32_t uid, uint32_t gid) "tag %d id %d getattr={result_mask %"PRId64" mode %u uid %u gid %u}" 818v9fs_walk(uint16_t tag, uint8_t id, int32_t fid, int32_t newfid, uint16_t nwnames) "tag %d id %d fid %d newfid %d nwnames %d" 819v9fs_walk_return(uint16_t tag, uint8_t id, uint16_t nwnames, void* qids) "tag %d id %d nwnames %d qids %p" 820v9fs_open(uint16_t tag, uint8_t id, int32_t fid, int32_t mode) "tag %d id %d fid %d mode %d" 821v9fs_open_return(uint16_t tag, uint8_t id, uint8_t type, uint32_t version, uint64_t path, int iounit) "tag %u id %u qid={type %u version %u path %"PRIu64"} iounit %d" 822v9fs_lcreate(uint16_t tag, uint8_t id, int32_t dfid, int32_t flags, int32_t mode, uint32_t gid) "tag %d id %d dfid %d flags %d mode %d gid %u" 823v9fs_lcreate_return(uint16_t tag, uint8_t id, uint8_t type, uint32_t version, uint64_t path, int32_t iounit) "tag %u id %u qid={type %u version %u path %"PRIu64"} iounit %d" 824v9fs_fsync(uint16_t tag, uint8_t id, int32_t fid, int datasync) "tag %d id %d fid %d datasync %d" 825v9fs_clunk(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d" 826v9fs_read(uint16_t tag, uint8_t id, int32_t fid, uint64_t off, uint32_t max_count) "tag %d id %d fid %d off %"PRIu64" max_count %u" 827v9fs_read_return(uint16_t tag, uint8_t id, int32_t count, ssize_t err) "tag %d id %d count %d err %zd" 828v9fs_readdir(uint16_t tag, uint8_t id, int32_t fid, uint64_t offset, uint32_t max_count) "tag %d id %d fid %d offset %"PRIu64" max_count %u" 829v9fs_readdir_return(uint16_t tag, uint8_t id, uint32_t count, ssize_t retval) "tag %d id %d count %u retval %zd" 830v9fs_write(uint16_t tag, uint8_t id, int32_t fid, uint64_t off, uint32_t count, int cnt) "tag %d id %d fid %d off %"PRIu64" count %u cnt %d" 831v9fs_write_return(uint16_t tag, uint8_t id, int32_t total, ssize_t err) "tag %d id %d total %d err %zd" 832v9fs_create(uint16_t tag, uint8_t id, int32_t fid, char* name, int32_t perm, int8_t mode) "tag %d id %d fid %d name %s perm %d mode %d" 833v9fs_create_return(uint16_t tag, uint8_t id, uint8_t type, uint32_t version, uint64_t path, int iounit) "tag %u id %u qid={type %u version %u path %"PRIu64"} iounit %d" 834v9fs_symlink(uint16_t tag, uint8_t id, int32_t fid, char* name, char* symname, uint32_t gid) "tag %d id %d fid %d name %s symname %s gid %u" 835v9fs_symlink_return(uint16_t tag, uint8_t id, uint8_t type, uint32_t version, uint64_t path) "tag %u id %u qid={type %u version %u path %"PRIu64"}" 836v9fs_flush(uint16_t tag, uint8_t id, int16_t flush_tag) "tag %d id %d flush_tag %d" 837v9fs_link(uint16_t tag, uint8_t id, int32_t dfid, int32_t oldfid, char* name) "tag %d id %d dfid %d oldfid %d name %s" 838v9fs_remove(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d" 839v9fs_wstat(uint16_t tag, uint8_t id, int32_t fid, int32_t mode, int32_t atime, int32_t mtime) "tag %u id %u fid %d stat={mode %d atime %d mtime %d}" 840v9fs_mknod(uint16_t tag, uint8_t id, int32_t fid, int mode, int major, int minor) "tag %d id %d fid %d mode %d major %d minor %d" 841v9fs_mknod_return(uint16_t tag, uint8_t id, uint8_t type, uint32_t version, uint64_t path) "tag %u id %u qid={type %u version %u path %"PRIu64"}" 842v9fs_lock(uint16_t tag, uint8_t id, int32_t fid, uint8_t type, uint64_t start, uint64_t length) "tag %d id %d fid %d type %d start %"PRIu64" length %"PRIu64 843v9fs_lock_return(uint16_t tag, uint8_t id, int8_t status) "tag %d id %d status %d" 844v9fs_getlock(uint16_t tag, uint8_t id, int32_t fid, uint8_t type, uint64_t start, uint64_t length)"tag %d id %d fid %d type %d start %"PRIu64" length %"PRIu64 845v9fs_getlock_return(uint16_t tag, uint8_t id, uint8_t type, uint64_t start, uint64_t length, uint32_t proc_id) "tag %d id %d type %d start %"PRIu64" length %"PRIu64" proc_id %u" 846v9fs_mkdir(uint16_t tag, uint8_t id, int32_t fid, char* name, int mode, uint32_t gid) "tag %u id %u fid %d name %s mode %d gid %u" 847v9fs_mkdir_return(uint16_t tag, uint8_t id, uint8_t type, uint32_t version, uint64_t path, int err) "tag %u id %u qid={type %u version %u path %"PRIu64"} err %d" 848v9fs_xattrwalk(uint16_t tag, uint8_t id, int32_t fid, int32_t newfid, char* name) "tag %d id %d fid %d newfid %d name %s" 849v9fs_xattrwalk_return(uint16_t tag, uint8_t id, int64_t size) "tag %d id %d size %"PRId64 850v9fs_xattrcreate(uint16_t tag, uint8_t id, int32_t fid, char* name, uint64_t size, int flags) "tag %d id %d fid %d name %s size %"PRIu64" flags %d" 851v9fs_readlink(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d" 852v9fs_readlink_return(uint16_t tag, uint8_t id, char* target) "tag %d id %d name %s" 853v9fs_setattr(uint16_t tag, uint8_t id, int32_t fid, int32_t valid, int32_t mode, int32_t uid, int32_t gid, int64_t size, int64_t atime_sec, int64_t mtime_sec) "tag %u id %u fid %d iattr={valid %d mode %d uid %d gid %d size %"PRId64" atime=%"PRId64" mtime=%"PRId64" }" 854v9fs_setattr_return(uint16_t tag, uint8_t id) "tag %u id %u" 855 856# xen-9p-backend.c 857xen_9pfs_alloc(char *name) "name %s" 858xen_9pfs_connect(char *name) "name %s" 859xen_9pfs_disconnect(char *name) "name %s" 860xen_9pfs_free(char *name) "name %s" 861# See docs/devel/tracing.rst for syntax documentation. 862 863# memory_hotplug.c 864mhp_acpi_invalid_slot_selected(uint32_t slot) "0x%"PRIx32 865mhp_acpi_ejecting_invalid_slot(uint32_t slot) "0x%"PRIx32 866mhp_acpi_read_addr_lo(uint32_t slot, uint32_t addr) "slot[0x%"PRIx32"] addr lo: 0x%"PRIx32 867mhp_acpi_read_addr_hi(uint32_t slot, uint32_t addr) "slot[0x%"PRIx32"] addr hi: 0x%"PRIx32 868mhp_acpi_read_size_lo(uint32_t slot, uint32_t size) "slot[0x%"PRIx32"] size lo: 0x%"PRIx32 869mhp_acpi_read_size_hi(uint32_t slot, uint32_t size) "slot[0x%"PRIx32"] size hi: 0x%"PRIx32 870mhp_acpi_read_pxm(uint32_t slot, uint32_t pxm) "slot[0x%"PRIx32"] proximity: 0x%"PRIx32 871mhp_acpi_read_flags(uint32_t slot, uint32_t flags) "slot[0x%"PRIx32"] flags: 0x%"PRIx32 872mhp_acpi_write_slot(uint32_t slot) "set active slot: 0x%"PRIx32 873mhp_acpi_write_ost_ev(uint32_t slot, uint32_t ev) "slot[0x%"PRIx32"] OST EVENT: 0x%"PRIx32 874mhp_acpi_write_ost_status(uint32_t slot, uint32_t st) "slot[0x%"PRIx32"] OST STATUS: 0x%"PRIx32 875mhp_acpi_clear_insert_evt(uint32_t slot) "slot[0x%"PRIx32"] clear insert event" 876mhp_acpi_clear_remove_evt(uint32_t slot) "slot[0x%"PRIx32"] clear remove event" 877mhp_acpi_pc_dimm_deleted(uint32_t slot) "slot[0x%"PRIx32"] pc-dimm deleted" 878mhp_acpi_pc_dimm_delete_failed(uint32_t slot) "slot[0x%"PRIx32"] pc-dimm delete failed" 879 880# core.c 881acpi_gpe_en_ioport_readb(uint32_t addr, uint8_t val) "addr: 0x%" PRIx32 " ==> 0x%02" PRIx8 882acpi_gpe_en_ioport_writeb(uint32_t addr, uint8_t val) "addr: 0x%" PRIx32 " <== 0x%02" PRIx8 883acpi_gpe_sts_ioport_readb(uint32_t addr, uint8_t val) "addr: 0x%" PRIx32 " ==> 0x%02" PRIx8 884acpi_gpe_sts_ioport_writeb(uint32_t addr, uint8_t val) "addr: 0x%" PRIx32 " <== 0x%02" PRIx8 885 886# cpu.c 887cpuhp_acpi_invalid_idx_selected(uint32_t idx) "0x%"PRIx32 888cpuhp_acpi_read_flags(uint32_t idx, uint8_t flags) "idx[0x%"PRIx32"] flags: 0x%"PRIx8 889cpuhp_acpi_write_idx(uint32_t idx) "set active cpu idx: 0x%"PRIx32 890cpuhp_acpi_write_cmd(uint32_t idx, uint8_t cmd) "idx[0x%"PRIx32"] cmd: 0x%"PRIx8 891cpuhp_acpi_read_cmd_data(uint32_t idx, uint32_t data) "idx[0x%"PRIx32"] data: 0x%"PRIx32 892cpuhp_acpi_read_cmd_data2(uint32_t idx, uint32_t data) "idx[0x%"PRIx32"] data: 0x%"PRIx32 893cpuhp_acpi_cpu_has_events(uint32_t idx, bool ins, bool rm) "idx[0x%"PRIx32"] inserting: %d, removing: %d" 894cpuhp_acpi_clear_inserting_evt(uint32_t idx) "idx[0x%"PRIx32"]" 895cpuhp_acpi_clear_remove_evt(uint32_t idx) "idx[0x%"PRIx32"]" 896cpuhp_acpi_ejecting_invalid_cpu(uint32_t idx) "0x%"PRIx32 897cpuhp_acpi_ejecting_cpu(uint32_t idx) "0x%"PRIx32 898cpuhp_acpi_fw_remove_invalid_cpu(uint32_t idx) "0x%"PRIx32 899cpuhp_acpi_fw_remove_cpu(uint32_t idx) "0x%"PRIx32 900cpuhp_acpi_write_ost_ev(uint32_t slot, uint32_t ev) "idx[0x%"PRIx32"] OST EVENT: 0x%"PRIx32 901cpuhp_acpi_write_ost_status(uint32_t slot, uint32_t st) "idx[0x%"PRIx32"] OST STATUS: 0x%"PRIx32 902 903# pcihp.c 904acpi_pci_eject_slot(unsigned bsel, unsigned slot) "bsel: %u slot: %u" 905acpi_pci_unplug(int bsel, int slot) "bsel: %d slot: %d" 906acpi_pci_unplug_request(int bsel, int slot) "bsel: %d slot: %d" 907acpi_pci_up_read(uint32_t val) "%" PRIu32 908acpi_pci_down_read(uint32_t val) "%" PRIu32 909acpi_pci_features_read(uint32_t val) "%" PRIu32 910acpi_pci_acpi_index_read(uint32_t val) "%" PRIu32 911acpi_pci_acpi_index_write(unsigned bsel, unsigned slot, uint32_t aidx) "bsel: %u slot: %u aidx: %" PRIu32 912acpi_pci_rmv_read(uint32_t val) "%" PRIu32 913acpi_pci_sel_read(uint32_t val) "%" PRIu32 914acpi_pci_ej_write(uint64_t addr, uint64_t data) "0x%" PRIx64 " <== %" PRIu64 915acpi_pci_sel_write(uint64_t addr, uint64_t data) "0x%" PRIx64 " <== %" PRIu64 916 917# tco.c 918tco_timer_reload(int ticks, int msec) "ticks=%d (%d ms)" 919tco_timer_expired(int timeouts_no, bool strap, bool no_reboot) "timeouts_no=%d no_reboot=%d/%d" 920tco_io_write(uint64_t addr, uint32_t val) "addr=0x%" PRIx64 " val=0x%" PRIx32 921tco_io_read(uint64_t addr, uint32_t val) "addr=0x%" PRIx64 " val=0x%" PRIx32 922 923# erst.c 924acpi_erst_reg_write(uint64_t addr, uint64_t val, unsigned size) "addr: 0x%04" PRIx64 " <== 0x%016" PRIx64 " (size: %u)" 925acpi_erst_reg_read(uint64_t addr, uint64_t val, unsigned size) " addr: 0x%04" PRIx64 " ==> 0x%016" PRIx64 " (size: %u)" 926acpi_erst_mem_write(uint64_t addr, uint64_t val, unsigned size) "addr: 0x%06" PRIx64 " <== 0x%016" PRIx64 " (size: %u)" 927acpi_erst_mem_read(uint64_t addr, uint64_t val, unsigned size) " addr: 0x%06" PRIx64 " ==> 0x%016" PRIx64 " (size: %u)" 928acpi_erst_pci_bar_0(uint64_t addr) "BAR0: 0x%016" PRIx64 929acpi_erst_pci_bar_1(uint64_t addr) "BAR1: 0x%016" PRIx64 930acpi_erst_realizefn_in(void) 931acpi_erst_realizefn_out(unsigned size) "total nvram size %u bytes" 932acpi_erst_reset_in(unsigned record_count) "record_count %u" 933acpi_erst_reset_out(unsigned record_count) "record_count %u" 934acpi_erst_post_load(void *header, unsigned slot_size) "header: 0x%p slot_size %u" 935acpi_erst_class_init_in(void) 936acpi_erst_class_init_out(void) 937 938# nvdimm.c 939acpi_nvdimm_read_fit(uint32_t offset, uint32_t len, const char *dirty) "Read FIT: offset 0x%" PRIx32 " FIT size 0x%" PRIx32 " Dirty %s" 940acpi_nvdimm_label_info(uint32_t label_size, uint32_t mxfer) "label_size 0x%" PRIx32 ", max_xfer 0x%" PRIx32 941acpi_nvdimm_label_overflow(uint32_t offset, uint32_t length) "offset 0x%" PRIx32 " + length 0x%" PRIx32 " is overflow" 942acpi_nvdimm_label_oversize(uint32_t pos, uint64_t size) "position 0x%" PRIx32 " is beyond label data (len = %" PRIu64 ")" 943acpi_nvdimm_label_xfer_exceed(uint32_t length, uint32_t max_xfer) "length (0x%" PRIx32 ") is larger than max_xfer (0x%" PRIx32 ")" 944acpi_nvdimm_read_label(uint32_t offset, uint32_t length) "Read Label Data: offset 0x%" PRIx32 " length 0x%" PRIx32 945acpi_nvdimm_write_label(uint32_t offset, uint32_t length) "Write Label Data: offset 0x%" PRIx32 " length 0x%" PRIx32 946acpi_nvdimm_read_io_port(void) "Alert: we never read _DSM IO Port" 947acpi_nvdimm_dsm_mem_addr(uint64_t dsm_mem_addr) "dsm memory address 0x%" PRIx64 948acpi_nvdimm_dsm_info(uint32_t revision, uint32_t handle, uint32_t function) "Revision 0x%" PRIx32 " Handle 0x%" PRIx32 " Function 0x%" PRIx32 949acpi_nvdimm_invalid_revision(uint32_t revision) "Revision 0x%" PRIx32 " is not supported, expect 0x1" 950# See docs/devel/tracing.rst for syntax documentation. 951 952# npcm7xx_adc.c 953npcm7xx_adc_read(const char *id, uint64_t offset, uint32_t value) " %s offset: 0x%04" PRIx64 " value 0x%04" PRIx32 954npcm7xx_adc_write(const char *id, uint64_t offset, uint32_t value) "%s offset: 0x%04" PRIx64 " value 0x%04" PRIx32 955 956aspeed_adc_engine_read(uint32_t engine_id, uint64_t addr, uint64_t value) "engine[%u] 0x%" PRIx64 " 0x%" PRIx64 957aspeed_adc_engine_write(uint32_t engine_id, uint64_t addr, uint64_t value) "engine[%u] 0x%" PRIx64 " 0x%" PRIx64 958# See docs/devel/tracing.rst for syntax documentation. 959 960# pci.c 961alpha_pci_iack_write(void) "" 962# See docs/devel/tracing.rst for syntax documentation. 963 964# virt-acpi-build.c 965virt_acpi_setup(void) "No fw cfg or ACPI disabled. Bailing out." 966 967# smmu-common.c 968smmu_add_mr(const char *name) "%s" 969smmu_ptw_level(int stage, int level, uint64_t iova, size_t subpage_size, uint64_t baseaddr, uint32_t offset, uint64_t pte) "stage=%d level=%d iova=0x%"PRIx64" subpage_sz=0x%zx baseaddr=0x%"PRIx64" offset=%d => pte=0x%"PRIx64 970smmu_ptw_invalid_pte(int stage, int level, uint64_t baseaddr, uint64_t pteaddr, uint32_t offset, uint64_t pte) "stage=%d level=%d base@=0x%"PRIx64" pte@=0x%"PRIx64" offset=%d pte=0x%"PRIx64 971smmu_ptw_page_pte(int stage, int level, uint64_t iova, uint64_t baseaddr, uint64_t pteaddr, uint64_t pte, uint64_t address) "stage=%d level=%d iova=0x%"PRIx64" base@=0x%"PRIx64" pte@=0x%"PRIx64" pte=0x%"PRIx64" page address = 0x%"PRIx64 972smmu_ptw_block_pte(int stage, int level, uint64_t baseaddr, uint64_t pteaddr, uint64_t pte, uint64_t iova, uint64_t gpa, int bsize_mb) "stage=%d level=%d base@=0x%"PRIx64" pte@=0x%"PRIx64" pte=0x%"PRIx64" iova=0x%"PRIx64" block address = 0x%"PRIx64" block size = %d MiB" 973smmu_get_pte(uint64_t baseaddr, int index, uint64_t pteaddr, uint64_t pte) "baseaddr=0x%"PRIx64" index=0x%x, pteaddr=0x%"PRIx64", pte=0x%"PRIx64 974smmu_iotlb_inv_all(void) "IOTLB invalidate all" 975smmu_iotlb_inv_asid(uint16_t asid) "IOTLB invalidate asid=%d" 976smmu_iotlb_inv_vmid(uint16_t vmid) "IOTLB invalidate vmid=%d" 977smmu_iotlb_inv_iova(uint16_t asid, uint64_t addr) "IOTLB invalidate asid=%d addr=0x%"PRIx64 978smmu_inv_notifiers_mr(const char *name) "iommu mr=%s" 979smmu_iotlb_lookup_hit(uint16_t asid, uint16_t vmid, uint64_t addr, uint32_t hit, uint32_t miss, uint32_t p) "IOTLB cache HIT asid=%d vmid=%d addr=0x%"PRIx64" hit=%d miss=%d hit rate=%d" 980smmu_iotlb_lookup_miss(uint16_t asid, uint16_t vmid, uint64_t addr, uint32_t hit, uint32_t miss, uint32_t p) "IOTLB cache MISS asid=%d vmid=%d addr=0x%"PRIx64" hit=%d miss=%d hit rate=%d" 981smmu_iotlb_insert(uint16_t asid, uint16_t vmid, uint64_t addr, uint8_t tg, uint8_t level) "IOTLB ++ asid=%d vmid=%d addr=0x%"PRIx64" tg=%d level=%d" 982 983# smmuv3.c 984smmuv3_read_mmio(uint64_t addr, uint64_t val, unsigned size, uint32_t r) "addr: 0x%"PRIx64" val:0x%"PRIx64" size: 0x%x(%d)" 985smmuv3_trigger_irq(int irq) "irq=%d" 986smmuv3_write_gerror(uint32_t toggled, uint32_t gerror) "toggled=0x%x, new GERROR=0x%x" 987smmuv3_write_gerrorn(uint32_t acked, uint32_t gerrorn) "acked=0x%x, new GERRORN=0x%x" 988smmuv3_unhandled_cmd(uint32_t type) "Unhandled command type=%d" 989smmuv3_cmdq_consume(uint32_t prod, uint32_t cons, uint8_t prod_wrap, uint8_t cons_wrap) "prod=%d cons=%d prod.wrap=%d cons.wrap=%d" 990smmuv3_cmdq_opcode(const char *opcode) "<--- %s" 991smmuv3_cmdq_consume_out(uint32_t prod, uint32_t cons, uint8_t prod_wrap, uint8_t cons_wrap) "prod:%d, cons:%d, prod_wrap:%d, cons_wrap:%d " 992smmuv3_cmdq_consume_error(const char *cmd_name, uint8_t cmd_error) "Error on %s command execution: %d" 993smmuv3_write_mmio(uint64_t addr, uint64_t val, unsigned size, uint32_t r) "addr: 0x%"PRIx64" val:0x%"PRIx64" size: 0x%x(%d)" 994smmuv3_record_event(const char *type, uint32_t sid) "%s sid=0x%x" 995smmuv3_find_ste(uint16_t sid, uint32_t features, uint16_t sid_split) "sid=0x%x features:0x%x, sid_split:0x%x" 996smmuv3_find_ste_2lvl(uint64_t strtab_base, uint64_t l1ptr, int l1_ste_offset, uint64_t l2ptr, int l2_ste_offset, int max_l2_ste) "strtab_base:0x%"PRIx64" l1ptr:0x%"PRIx64" l1_off:0x%x, l2ptr:0x%"PRIx64" l2_off:0x%x max_l2_ste:%d" 997smmuv3_get_ste(uint64_t addr) "STE addr: 0x%"PRIx64 998smmuv3_translate_disable(const char *n, uint16_t sid, uint64_t addr, bool is_write) "%s sid=0x%x bypass (smmu disabled) iova:0x%"PRIx64" is_write=%d" 999smmuv3_translate_bypass(const char *n, uint16_t sid, uint64_t addr, bool is_write) "%s sid=0x%x STE bypass iova:0x%"PRIx64" is_write=%d" 1000smmuv3_translate_abort(const char *n, uint16_t sid, uint64_t addr, bool is_write) "%s sid=0x%x abort on iova:0x%"PRIx64" is_write=%d" 1001smmuv3_translate_success(const char *n, uint16_t sid, uint64_t iova, uint64_t translated, int perm) "%s sid=0x%x iova=0x%"PRIx64" translated=0x%"PRIx64" perm=0x%x" 1002smmuv3_get_cd(uint64_t addr) "CD addr: 0x%"PRIx64 1003smmuv3_decode_cd(uint32_t oas) "oas=%d" 1004smmuv3_decode_cd_tt(int i, uint32_t tsz, uint64_t ttb, uint32_t granule_sz, bool had) "TT[%d]:tsz:%d ttb:0x%"PRIx64" granule_sz:%d had:%d" 1005smmuv3_cmdq_cfgi_ste(int streamid) "streamid= 0x%x" 1006smmuv3_cmdq_cfgi_ste_range(int start, int end) "start=0x%x - end=0x%x" 1007smmuv3_cmdq_cfgi_cd(uint32_t sid) "sid=0x%x" 1008smmuv3_config_cache_hit(uint32_t sid, uint32_t hits, uint32_t misses, uint32_t perc) "Config cache HIT for sid=0x%x (hits=%d, misses=%d, hit rate=%d)" 1009smmuv3_config_cache_miss(uint32_t sid, uint32_t hits, uint32_t misses, uint32_t perc) "Config cache MISS for sid=0x%x (hits=%d, misses=%d, hit rate=%d)" 1010smmuv3_range_inval(int vmid, int asid, uint64_t addr, uint8_t tg, uint64_t num_pages, uint8_t ttl, bool leaf) "vmid=%d asid=%d addr=0x%"PRIx64" tg=%d num_pages=0x%"PRIx64" ttl=%d leaf=%d" 1011smmuv3_cmdq_tlbi_nh(void) "" 1012smmuv3_cmdq_tlbi_nh_asid(uint16_t asid) "asid=%d" 1013smmuv3_cmdq_tlbi_s12_vmid(uint16_t vmid) "vmid=%d" 1014smmuv3_config_cache_inv(uint32_t sid) "Config cache INV for sid=0x%x" 1015smmuv3_notify_flag_add(const char *iommu) "ADD SMMUNotifier node for iommu mr=%s" 1016smmuv3_notify_flag_del(const char *iommu) "DEL SMMUNotifier node for iommu mr=%s" 1017smmuv3_inv_notifiers_iova(const char *name, uint16_t asid, uint16_t vmid, uint64_t iova, uint8_t tg, uint64_t num_pages) "iommu mr=%s asid=%d vmid=%d iova=0x%"PRIx64" tg=%d num_pages=0x%"PRIx64 1018 1019# See docs/devel/tracing.rst for syntax documentation. 1020 1021# cs4231.c 1022cs4231_mem_readl_dreg(uint32_t reg, uint32_t ret) "read dreg %d: 0x%02x" 1023cs4231_mem_readl_reg(uint32_t reg, uint32_t ret) "read reg %d: 0x%08x" 1024cs4231_mem_writel_reg(uint32_t reg, uint32_t old, uint32_t val) "write reg %d: 0x%08x -> 0x%08x" 1025cs4231_mem_writel_dreg(uint32_t reg, uint32_t old, uint32_t val) "write dreg %d: 0x%02x -> 0x%02x" 1026 1027# es1370.c 1028es1370_frame_address_rd(int ch, uint32_t addr) "ch=%d addr=0x%08x" 1029es1370_frame_address_wr(int ch, uint32_t addr) "ch=%d addr=0x%08x" 1030es1370_frame_count_rd(int ch, uint32_t curr, uint32_t size) "ch=%d CURR_CT=%u BUF_SIZE=%u" 1031es1370_frame_count_wr(int ch, uint32_t curr, uint32_t size) "ch=%d CURR_CT=%u BUF_SIZE=%u" 1032es1370_lost_interrupt(int ch) "ch=%d lost interrupt" 1033es1370_sample_count_rd(int ch, uint32_t curr, uint32_t num) "ch=%d CURR_SAMP_CT=%u SAMP_CT=%u" 1034es1370_sample_count_wr(int ch, uint32_t curr, uint32_t num) "ch=%d CURR_SAMP_CT=%u SAMP_CT=%u" 1035es1370_stream_format(int ch, uint32_t freq, const char *fmt, const char *mode, uint32_t shift) "ch=%d fmt=%u:%s:%s shift=%u" 1036es1370_transfer_audio(int ch, uint32_t f_curr, uint32_t f_size, uint32_t s_curr, uint32_t s_num, uint32_t leftover, bool irq) "ch=%d CURR_CT=%u BUF_SIZE=%u CURR_SAMP_CT=%u SAMP_CT=%u leftover=%u irq=%d" 1037 1038# hda-codec.c 1039hda_audio_running(const char *stream, int nr, bool running) "st %s, nr %d, run %d" 1040hda_audio_format(const char *stream, int chan, const char *fmt, int freq) "st %s, %d x %s @ %d Hz" 1041hda_audio_adjust(const char *stream, int pos) "st %s, pos %d" 1042hda_audio_overrun(const char *stream) "st %s" 1043 1044#via-ac97.c 1045via_ac97_codec_write(uint8_t addr, uint16_t val) "0x%x <- 0x%x" 1046via_ac97_sgd_fetch(uint32_t curr, uint32_t addr, char stop, char eol, char flag, uint32_t len) "curr=0x%x addr=0x%x %c%c%c len=%d" 1047via_ac97_sgd_read(uint64_t addr, unsigned size, uint64_t val) "0x%"PRIx64" %d -> 0x%"PRIx64 1048via_ac97_sgd_write(uint64_t addr, unsigned size, uint64_t val) "0x%"PRIx64" %d <- 0x%"PRIx64 1049 1050# asc.c 1051asc_read_fifo(const char fifo, int reg, unsigned size, uint64_t value) "fifo %c reg=0x%03x size=%u value=0x%"PRIx64 1052asc_read_reg(int reg, unsigned size, uint64_t value) "reg=0x%03x size=%u value=0x%"PRIx64 1053asc_read_extreg(const char fifo, int reg, unsigned size, uint64_t value) "fifo %c reg=0x%03x size=%u value=0x%"PRIx64 1054asc_fifo_get(const char fifo, int rptr, int cnt, uint64_t value) "fifo %c rptr=0x%x cnt=0x%x value=0x%"PRIx64 1055asc_write_fifo(const char fifo, int reg, unsigned size, int wrptr, int cnt, uint64_t value) "fifo %c reg=0x%03x size=%u wptr=0x%x cnt=0x%x value=0x%"PRIx64 1056asc_write_reg(int reg, unsigned size, uint64_t value) "reg=0x%03x size=%u value=0x%"PRIx64 1057asc_write_extreg(const char fifo, int reg, unsigned size, uint64_t value) "fifo %c reg=0x%03x size=%u value=0x%"PRIx64 1058asc_update_irq(int irq, int a, int b) "set IRQ to %d (A: 0x%x B: 0x%x)" 1059 1060#virtio-snd.c 1061virtio_snd_get_config(void *vdev, uint32_t jacks, uint32_t streams, uint32_t chmaps) "snd %p: get_config jacks=%"PRIu32" streams=%"PRIu32" chmaps=%"PRIu32"" 1062virtio_snd_set_config(void *vdev, uint32_t jacks, uint32_t new_jacks, uint32_t streams, uint32_t new_streams, uint32_t chmaps, uint32_t new_chmaps) "snd %p: set_config jacks from %"PRIu32"->%"PRIu32", streams from %"PRIu32"->%"PRIu32", chmaps from %"PRIu32"->%"PRIu32 1063virtio_snd_get_features(void *vdev, uint64_t features) "snd %p: get_features 0x%"PRIx64 1064virtio_snd_vm_state_running(void) "vm state running" 1065virtio_snd_vm_state_stopped(void) "vm state stopped" 1066virtio_snd_realize(void *snd) "snd %p: realize" 1067virtio_snd_unrealize(void *snd) "snd %p: unrealize" 1068virtio_snd_handle_pcm_set_params(uint32_t stream) "VIRTIO_SND_PCM_SET_PARAMS called for stream %"PRIu32 1069virtio_snd_handle_ctrl(void *vdev, void *vq) "snd %p: handle ctrl event for queue %p" 1070virtio_snd_handle_pcm_info(uint32_t stream) "VIRTIO_SND_R_PCM_INFO called for stream %"PRIu32 1071virtio_snd_handle_pcm_start_stop(const char *code, uint32_t stream) "%s called for stream %"PRIu32 1072virtio_snd_handle_pcm_release(uint32_t stream) "VIRTIO_SND_PCM_RELEASE called for stream %"PRIu32 1073virtio_snd_handle_code(uint32_t val, const char *code) "ctrl code msg val = %"PRIu32" == %s" 1074virtio_snd_handle_chmap_info(void) "VIRTIO_SND_CHMAP_INFO called" 1075virtio_snd_handle_event(void) "event queue callback called" 1076virtio_snd_pcm_stream_flush(uint32_t stream) "flushing stream %"PRIu32 1077virtio_snd_handle_tx_xfer(void) "tx queue callback called" 1078virtio_snd_handle_rx_xfer(void) "rx queue callback called" 1079# See docs/devel/tracing.rst for syntax documentation. 1080 1081# fdc.c 1082fdc_ioport_read(uint8_t reg, uint8_t value) "read reg 0x%02x val 0x%02x" 1083fdc_ioport_write(uint8_t reg, uint8_t value) "write reg 0x%02x val 0x%02x" 1084 1085# fdc-sysbus.c 1086fdctrl_tc_pulse(int level) "TC pulse: %u" 1087 1088# pflash_cfi01.c 1089# pflash_cfi02.c 1090pflash_chip_erase_invalid(const char *name, uint64_t offset) "%s: chip erase: invalid address 0x%" PRIx64 1091pflash_chip_erase_start(const char *name) "%s: start chip erase" 1092pflash_data_read(const char *name, uint64_t offset, unsigned size, uint32_t value) "%s: data offset:0x%04"PRIx64" size:%u value:0x%04x" 1093pflash_data_write(const char *name, uint64_t offset, unsigned size, uint32_t value, uint64_t counter) "%s: data offset:0x%04"PRIx64" size:%u value:0x%04x counter:0x%016"PRIx64 1094pflash_device_id(const char *name, uint16_t id) "%s: read device ID: 0x%04x" 1095pflash_device_info(const char *name, uint64_t offset) "%s: read device information offset:0x%04" PRIx64 1096pflash_erase_complete(const char *name) "%s: sector erase complete" 1097pflash_erase_timeout(const char *name, int count) "%s: erase timeout fired; erasing %d sectors" 1098pflash_io_read(const char *name, uint64_t offset, unsigned int size, uint32_t value, uint8_t cmd, uint8_t wcycle) "%s: offset:0x%04" PRIx64 " size:%u value:0x%04x cmd:0x%02x wcycle:%u" 1099pflash_io_write(const char *name, uint64_t offset, unsigned int size, uint32_t value, uint8_t wcycle) "%s: offset:0x%04"PRIx64" size:%u value:0x%04x wcycle:%u" 1100pflash_manufacturer_id(const char *name, uint16_t id) "%s: read manufacturer ID: 0x%04x" 1101pflash_mode_read_array(const char *name) "%s: read array mode" 1102pflash_postload_cb(const char *name) "%s: updating bdrv" 1103pflash_read_done(const char *name, uint64_t offset, uint64_t ret) "%s: ID:0x%" PRIx64 " ret:0x%" PRIx64 1104pflash_read_status(const char *name, uint32_t ret) "%s: status:0x%x" 1105pflash_read_unknown_state(const char *name, uint8_t cmd) "%s: unknown command state:0x%x" 1106pflash_reset(const char *name) "%s: reset" 1107pflash_sector_erase_start(const char *name, int width1, uint64_t start, int width2, uint64_t end) "%s: start sector erase at: 0x%0*" PRIx64 "-0x%0*" PRIx64 1108pflash_timer_expired(const char *name, uint8_t cmd) "%s: command 0x%02x done" 1109pflash_unlock0_failed(const char *name, uint64_t offset, uint8_t cmd, uint16_t addr0) "%s: unlock0 failed 0x%" PRIx64 " 0x%02x 0x%04x" 1110pflash_unlock1_failed(const char *name, uint64_t offset, uint8_t cmd) "%s: unlock0 failed 0x%" PRIx64 " 0x%02x" 1111pflash_unsupported_device_configuration(const char *name, uint8_t width, uint8_t max) "%s: unsupported device configuration: device_width:%d max_device_width:%d" 1112pflash_write(const char *name, const char *str) "%s: %s" 1113pflash_write_block(const char *name, uint32_t value) "%s: block write: bytes:0x%x" 1114pflash_write_block_erase(const char *name, uint64_t offset, uint64_t len) "%s: block erase offset:0x%" PRIx64 " bytes:0x%" PRIx64 1115pflash_write_failed(const char *name, uint64_t offset, uint8_t cmd) "%s: command failed 0x%" PRIx64 " 0x%02x" 1116pflash_write_invalid(const char *name, uint8_t cmd) "%s: invalid write for command 0x%02x" 1117pflash_write_invalid_command(const char *name, uint8_t cmd) "%s: invalid command 0x%02x (wc 5)" 1118pflash_write_invalid_state(const char *name, uint8_t cmd, int wc) "%s: invalid command state 0x%02x (wc %d)" 1119pflash_write_start(const char *name, uint8_t cmd) "%s: starting command 0x%02x" 1120pflash_write_unknown(const char *name, uint8_t cmd) "%s: unknown command 0x%02x" 1121 1122# virtio-blk.c 1123virtio_blk_req_complete(void *vdev, void *req, int status) "vdev %p req %p status %d" 1124virtio_blk_rw_complete(void *vdev, void *req, int ret) "vdev %p req %p ret %d" 1125virtio_blk_zone_report_complete(void *vdev, void *req, unsigned int nr_zones, int ret) "vdev %p req %p nr_zones %u ret %d" 1126virtio_blk_zone_mgmt_complete(void *vdev, void *req, int ret) "vdev %p req %p ret %d" 1127virtio_blk_zone_append_complete(void *vdev, void *req, int64_t sector, int ret) "vdev %p req %p, append sector 0x%" PRIx64 " ret %d" 1128virtio_blk_handle_write(void *vdev, void *req, uint64_t sector, size_t nsectors) "vdev %p req %p sector %"PRIu64" nsectors %zu" 1129virtio_blk_handle_read(void *vdev, void *req, uint64_t sector, size_t nsectors) "vdev %p req %p sector %"PRIu64" nsectors %zu" 1130virtio_blk_submit_multireq(void *vdev, void *mrb, int start, int num_reqs, uint64_t offset, size_t size, bool is_write) "vdev %p mrb %p start %d num_reqs %d offset %"PRIu64" size %zu is_write %d" 1131virtio_blk_handle_zone_report(void *vdev, void *req, int64_t sector, unsigned int nr_zones) "vdev %p req %p sector 0x%" PRIx64 " nr_zones %u" 1132virtio_blk_handle_zone_mgmt(void *vdev, void *req, uint8_t op, int64_t sector, int64_t len) "vdev %p req %p op 0x%x sector 0x%" PRIx64 " len 0x%" PRIx64 "" 1133virtio_blk_handle_zone_reset_all(void *vdev, void *req, int64_t sector, int64_t len) "vdev %p req %p sector 0x%" PRIx64 " cap 0x%" PRIx64 "" 1134virtio_blk_handle_zone_append(void *vdev, void *req, int64_t sector) "vdev %p req %p, append sector 0x%" PRIx64 "" 1135 1136# hd-geometry.c 1137hd_geometry_lchs_guess(void *blk, int cyls, int heads, int secs) "blk %p LCHS %d %d %d" 1138hd_geometry_guess(void *blk, uint32_t cyls, uint32_t heads, uint32_t secs, int trans) "blk %p CHS %u %u %u trans %d" 1139 1140# xen-block.c 1141xen_block_realize(const char *type, uint32_t disk, uint32_t partition) "%s d%up%u" 1142xen_block_connect(const char *type, uint32_t disk, uint32_t partition) "%s d%up%u" 1143xen_block_disconnect(const char *type, uint32_t disk, uint32_t partition) "%s d%up%u" 1144xen_block_unrealize(const char *type, uint32_t disk, uint32_t partition) "%s d%up%u" 1145xen_block_size(const char *type, uint32_t disk, uint32_t partition, int64_t sectors) "%s d%up%u %"PRIi64 1146xen_disk_realize(void) "" 1147xen_disk_unrealize(void) "" 1148xen_cdrom_realize(void) "" 1149xen_cdrom_unrealize(void) "" 1150xen_block_blockdev_add(char *str) "%s" 1151xen_block_blockdev_del(const char *node_name) "%s" 1152xen_block_device_create(unsigned int number) "%u" 1153xen_block_device_destroy(unsigned int number) "%u" 1154 1155# m25p80.c 1156m25p80_flash_erase(void *s, int offset, uint32_t len) "[%p] offset = 0x%"PRIx32", len = %u" 1157m25p80_programming_zero_to_one(void *s, uint32_t addr, uint8_t prev, uint8_t data) "[%p] programming zero to one! addr=0x%"PRIx32" 0x%"PRIx8" -> 0x%"PRIx8 1158m25p80_reset_done(void *s) "[%p] Reset done." 1159m25p80_command_decoded(void *s, uint32_t cmd) "[%p] new command:0x%"PRIx32 1160m25p80_complete_collecting(void *s, uint32_t cmd, int n, uint8_t ear, uint32_t cur_addr) "[%p] decode cmd: 0x%"PRIx32" len %d ear 0x%"PRIx8" addr 0x%"PRIx32 1161m25p80_populated_jedec(void *s) "[%p] populated jedec code" 1162m25p80_chip_erase(void *s) "[%p] chip erase" 1163m25p80_select(void *s, const char *what) "[%p] %sselect" 1164m25p80_page_program(void *s, uint32_t addr, uint8_t tx) "[%p] page program cur_addr=0x%"PRIx32" data=0x%"PRIx8 1165m25p80_transfer(void *s, uint8_t state, uint32_t len, uint8_t needed, uint32_t pos, uint32_t cur_addr, uint8_t t) "[%p] Transfer state 0x%"PRIx8" len 0x%"PRIx32" needed 0x%"PRIx8" pos 0x%"PRIx32" addr 0x%"PRIx32" tx 0x%"PRIx8 1166m25p80_read_byte(void *s, uint32_t addr, uint8_t v) "[%p] Read byte 0x%"PRIx32"=0x%"PRIx8 1167m25p80_read_data(void *s, uint32_t pos, uint8_t v) "[%p] Read data 0x%"PRIx32"=0x%"PRIx8 1168m25p80_read_sfdp(void *s, uint32_t addr, uint8_t v) "[%p] Read SFDP 0x%"PRIx32"=0x%"PRIx8 1169m25p80_binding(void *s) "[%p] Binding to IF_MTD drive" 1170m25p80_binding_no_bdrv(void *s) "[%p] No BDRV - binding to RAM" 1171 1172# swim.c 1173swim_ismctrl_read(int reg, const char *name, unsigned size, uint64_t value) "reg=%d [%s] size=%u value=0x%"PRIx64 1174swim_ismctrl_write(int reg, const char *name, unsigned size, uint64_t value) "reg=%d [%s] size=%u value=0x%"PRIx64 1175swim_iwmctrl_read(int reg, const char *name, unsigned size, uint64_t value) "reg=%d [%s] size=%u value=0x%"PRIx64 1176swim_iwmctrl_write(int reg, const char *name, unsigned size, uint64_t value) "reg=%d [%s] size=%u value=0x%"PRIx64 1177swim_switch_to_ism(void) "switch from IWM to ISM mode" 1178swim_switch_to_iwm(void) "switch from ISM to IWM mode" 1179# See docs/devel/tracing.rst for syntax documentation. 1180 1181# virtio-blk.c 1182virtio_blk_data_plane_start(void *s) "dataplane %p" 1183virtio_blk_data_plane_stop(void *s) "dataplane %p" 1184# See docs/devel/tracing.rst for syntax documentation. 1185 1186# parallel.c 1187parallel_ioport_read(const char *desc, uint16_t addr, uint8_t value) "read [%s] addr 0x%02x val 0x%02x" 1188parallel_ioport_write(const char *desc, uint16_t addr, uint8_t value) "write [%s] addr 0x%02x val 0x%02x" 1189 1190# serial.c 1191serial_read(uint16_t addr, uint8_t value) "read addr 0x%02x val 0x%02x" 1192serial_write(uint16_t addr, uint8_t value) "write addr 0x%02x val 0x%02x" 1193serial_update_parameters(uint64_t baudrate, char parity, int data_bits, int stop_bits) "baudrate=%"PRIu64" parity='%c' data=%d stop=%d" 1194 1195# virtio-serial-bus.c 1196virtio_serial_send_control_event(unsigned int port, uint16_t event, uint16_t value) "port %u, event %u, value %u" 1197virtio_serial_throttle_port(unsigned int port, bool throttle) "port %u, throttle %d" 1198virtio_serial_handle_control_message(uint16_t event, uint16_t value) "event %u, value %u" 1199virtio_serial_handle_control_message_port(unsigned int port) "port %u" 1200 1201# virtio-console.c 1202virtio_console_flush_buf(unsigned int port, size_t len, ssize_t ret) "port %u, in_len %zu, out_len %zd" 1203virtio_console_chr_read(unsigned int port, int size) "port %u, size %d" 1204virtio_console_chr_event(unsigned int port, int event) "port %u, event %d" 1205 1206# goldfish_tty.c 1207goldfish_tty_read(void *dev, unsigned int addr, unsigned int size, uint64_t value) "tty: %p reg: 0x%02x size: %d value: 0x%"PRIx64 1208goldfish_tty_write(void *dev, unsigned int addr, unsigned int size, uint64_t value) "tty: %p reg: 0x%02x size: %d value: 0x%"PRIx64 1209goldfish_tty_can_receive(void *dev, unsigned int available) "tty: %p available: %u" 1210goldfish_tty_receive(void *dev, unsigned int size) "tty: %p size: %u" 1211goldfish_tty_reset(void *dev) "tty: %p" 1212goldfish_tty_realize(void *dev) "tty: %p" 1213goldfish_tty_unrealize(void *dev) "tty: %p" 1214goldfish_tty_instance_init(void *dev) "tty: %p" 1215 1216# grlib_apbuart.c 1217grlib_apbuart_event(int event) "event:%d" 1218grlib_apbuart_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x" 1219grlib_apbuart_readl_unknown(uint64_t addr) "addr 0x%"PRIx64 1220 1221# escc.c 1222escc_hard_reset(void) "hard reset" 1223escc_soft_reset_chn(char channel) "soft reset channel %c" 1224escc_put_queue(char channel, int b) "channel %c put: 0x%02x" 1225escc_get_queue(char channel, int val) "channel %c get 0x%02x" 1226escc_update_irq(int irq) "IRQ = %d" 1227escc_update_parameters(char channel, int speed, int parity, int data_bits, int stop_bits) "channel %c: speed=%d parity=%c data=%d stop=%d" 1228escc_mem_writeb_ctrl(char channel, uint32_t reg, uint32_t val) "Write channel %c, reg[%d] = 0x%2.2x" 1229escc_mem_writeb_data(char channel, uint32_t val) "Write channel %c, ch %d" 1230escc_mem_readb_ctrl(char channel, uint32_t reg, uint8_t val) "Read channel %c, reg[%d] = 0x%2.2x" 1231escc_mem_readb_data(char channel, uint32_t ret) "Read channel %c, ch %d" 1232escc_serial_receive_byte(char channel, int ch) "channel %c put ch %d" 1233escc_sunkbd_event_in(int ch, const char *name, int down) "QKeyCode 0x%2.2x [%s], down %d" 1234escc_sunkbd_event_out(int ch) "Translated keycode 0x%2.2x" 1235escc_kbd_command(int val) "Command %d" 1236escc_sunmouse_event(int dx, int dy, int buttons_state) "dx=%d dy=%d buttons=0x%01x" 1237 1238# pl011.c 1239pl011_irq_state(int level) "irq state %d" 1240pl011_read(uint32_t addr, uint32_t value, const char *regname) "addr 0x%03x value 0x%08x reg %s" 1241pl011_read_fifo(int read_count) "FIFO read, read_count now %d" 1242pl011_write(uint32_t addr, uint32_t value, const char *regname) "addr 0x%03x value 0x%08x reg %s" 1243pl011_can_receive(uint32_t lcr, int read_count, int r) "LCR 0x%08x read_count %d returning %d" 1244pl011_put_fifo(uint32_t c, int read_count) "new char 0x%x read_count now %d" 1245pl011_put_fifo_full(void) "FIFO now full, RXFF set" 1246pl011_baudrate_change(unsigned int baudrate, uint64_t clock, uint32_t ibrd, uint32_t fbrd) "new baudrate %u (clk: %" PRIu64 "hz, ibrd: %" PRIu32 ", fbrd: %" PRIu32 ")" 1247 1248# cmsdk-apb-uart.c 1249cmsdk_apb_uart_read(uint64_t offset, uint64_t data, unsigned size) "CMSDK APB UART read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" 1250cmsdk_apb_uart_write(uint64_t offset, uint64_t data, unsigned size) "CMSDK APB UART write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" 1251cmsdk_apb_uart_reset(void) "CMSDK APB UART: reset" 1252cmsdk_apb_uart_receive(uint8_t c) "CMSDK APB UART: got character 0x%x from backend" 1253cmsdk_apb_uart_tx_pending(void) "CMSDK APB UART: character send to backend pending" 1254cmsdk_apb_uart_tx(uint8_t c) "CMSDK APB UART: character 0x%x sent to backend" 1255cmsdk_apb_uart_set_params(int speed) "CMSDK APB UART: params set to %d 8N1" 1256 1257# nrf51_uart.c 1258nrf51_uart_read(uint64_t addr, uint64_t r, unsigned int size) "addr 0x%" PRIx64 " value 0x%" PRIx64 " size %u" 1259nrf51_uart_write(uint64_t addr, uint64_t value, unsigned int size) "addr 0x%" PRIx64 " value 0x%" PRIx64 " size %u" 1260 1261# shakti_uart.c 1262shakti_uart_read(uint64_t addr, uint16_t r, unsigned int size) "addr 0x%" PRIx64 " value 0x%" PRIx16 " size %u" 1263shakti_uart_write(uint64_t addr, uint64_t value, unsigned int size) "addr 0x%" PRIx64 " value 0x%" PRIx64 " size %u" 1264 1265# exynos4210_uart.c 1266exynos_uart_dmabusy(uint32_t channel) "UART%d: DMA busy (Rx buffer empty)" 1267exynos_uart_dmaready(uint32_t channel) "UART%d: DMA ready" 1268exynos_uart_irq_raised(uint32_t channel, uint32_t reg) "UART%d: IRQ raised: 0x%08"PRIx32 1269exynos_uart_irq_lowered(uint32_t channel) "UART%d: IRQ lowered" 1270exynos_uart_update_params(uint32_t channel, int speed, uint8_t parity, int data, int stop, uint64_t wordtime) "UART%d: speed: %d, parity: %c, data bits: %d, stop bits: %d wordtime: %"PRId64"ns" 1271exynos_uart_write(uint32_t channel, uint32_t offset, const char *name, uint64_t val) "UART%d: <0x%04x> %s <- 0x%" PRIx64 1272exynos_uart_read(uint32_t channel, uint32_t offset, const char *name, uint64_t val) "UART%d: <0x%04x> %s -> 0x%" PRIx64 1273exynos_uart_rx_fifo_reset(uint32_t channel) "UART%d: Rx FIFO Reset" 1274exynos_uart_tx_fifo_reset(uint32_t channel) "UART%d: Tx FIFO Reset" 1275exynos_uart_tx(uint32_t channel, uint8_t ch) "UART%d: Tx 0x%02"PRIx32 1276exynos_uart_intclr(uint32_t channel, uint32_t reg) "UART%d: interrupts cleared: 0x%08"PRIx32 1277exynos_uart_ro_write(uint32_t channel, const char *name, uint32_t reg) "UART%d: Trying to write into RO register: %s [0x%04"PRIx32"]" 1278exynos_uart_rx(uint32_t channel, uint8_t ch) "UART%d: Rx 0x%02"PRIx32 1279exynos_uart_rx_error(uint32_t channel) "UART%d: Rx error" 1280exynos_uart_wo_read(uint32_t channel, const char *name, uint32_t reg) "UART%d: Trying to read from WO register: %s [0x%04"PRIx32"]" 1281exynos_uart_rxsize(uint32_t channel, uint32_t size) "UART%d: Rx FIFO size: %d" 1282exynos_uart_channel_error(uint32_t channel) "Wrong UART channel number: %d" 1283exynos_uart_rx_timeout(uint32_t channel, uint32_t stat, uint32_t intsp) "UART%d: Rx timeout stat=0x%x intsp=0x%x" 1284 1285# cadence_uart.c 1286cadence_uart_baudrate(unsigned baudrate) "baudrate %u" 1287 1288# sh_serial.c 1289sh_serial_read(char *id, unsigned size, uint64_t offs, uint64_t val) " %s size %d offs 0x%02" PRIx64 " -> 0x%02" PRIx64 1290sh_serial_write(char *id, unsigned size, uint64_t offs, uint64_t val) "%s size %d offs 0x%02" PRIx64 " <- 0x%02" PRIx64 1291 1292# xen_console.c 1293xen_console_connect(unsigned int idx, unsigned int ring_ref, unsigned int port, unsigned int limit) "idx %u ring_ref %u port %u limit %u" 1294xen_console_disconnect(unsigned int idx) "idx %u" 1295xen_console_unrealize(unsigned int idx) "idx %u" 1296xen_console_realize(unsigned int idx, const char *chrdev) "idx %u chrdev %s" 1297xen_console_device_create(unsigned int idx) "idx %u" 1298xen_console_device_destroy(unsigned int idx) "idx %u" 1299# See docs/devel/tracing.rst for syntax documentation. 1300 1301# jazz_led.c 1302jazz_led_read(uint64_t addr, uint8_t val) "read addr=0x%"PRIx64": 0x%x" 1303jazz_led_write(uint64_t addr, uint8_t new) "write addr=0x%"PRIx64": 0x%x" 1304 1305# xenfb.c 1306xenfb_mouse_event(void *opaque, int dx, int dy, int dz, int button_state, int abs_pointer_wanted) "%p x %d y %d z %d bs 0x%x abs %d" 1307xenfb_key_event(void *opaque, int scancode, int button_state) "%p scancode %d bs 0x%x" 1308xenfb_input_connected(void *xendev, int abs_pointer_wanted) "%p abs %d" 1309 1310# g364fb.c 1311g364fb_read(uint64_t addr, uint32_t val) "read addr=0x%"PRIx64": 0x%x" 1312g364fb_write(uint64_t addr, uint32_t new) "write addr=0x%"PRIx64": 0x%x" 1313 1314# vmware_vga.c 1315vmware_value_read(uint32_t index, uint32_t value) "index %d, value 0x%x" 1316vmware_value_write(uint32_t index, uint32_t value) "index %d, value 0x%x" 1317vmware_palette_read(uint32_t index, uint32_t value) "index %d, value 0x%x" 1318vmware_palette_write(uint32_t index, uint32_t value) "index %d, value 0x%x" 1319vmware_scratch_read(uint32_t index, uint32_t value) "index %d, value 0x%x" 1320vmware_scratch_write(uint32_t index, uint32_t value) "index %d, value 0x%x" 1321vmware_setmode(uint32_t w, uint32_t h, uint32_t bpp) "%dx%d @ %d bpp" 1322vmware_verify_rect_less_than_zero(const char *name, const char *param, int x) "%s: %s was < 0 (%d)" 1323vmware_verify_rect_greater_than_bound(const char *name, const char *param, int bound, int x) "%s: %s was > %d (%d)" 1324vmware_verify_rect_surface_bound_exceeded(const char *name, const char *component, int bound, const char *param1, int value1, const char *param2, int value2) "%s: %s > %d (%s: %d, %s: %d)" 1325vmware_update_rect_delayed_flush(void) "display update FIFO full - forcing flush" 1326 1327# virtio-gpu-base.c 1328virtio_gpu_features(bool virgl) "virgl %d" 1329 1330# virtio-gpu-3d.c 1331# virtio-gpu.c 1332virtio_gpu_cmd_get_display_info(void) "" 1333virtio_gpu_cmd_get_edid(uint32_t scanout) "scanout %d" 1334virtio_gpu_cmd_set_scanout(uint32_t id, uint32_t res, uint32_t w, uint32_t h, uint32_t x, uint32_t y) "id %d, res 0x%x, w %d, h %d, x %d, y %d" 1335virtio_gpu_cmd_set_scanout_blob(uint32_t id, uint32_t res, uint32_t w, uint32_t h, uint32_t x, uint32_t y) "id %d, res 0x%x, w %d, h %d, x %d, y %d" 1336virtio_gpu_cmd_res_create_2d(uint32_t res, uint32_t fmt, uint32_t w, uint32_t h) "res 0x%x, fmt 0x%x, w %d, h %d" 1337virtio_gpu_cmd_res_create_3d(uint32_t res, uint32_t fmt, uint32_t w, uint32_t h, uint32_t d) "res 0x%x, fmt 0x%x, w %d, h %d, d %d" 1338virtio_gpu_cmd_res_create_blob(uint32_t res, uint64_t size) "res 0x%x, size %" PRId64 1339virtio_gpu_cmd_res_unref(uint32_t res) "res 0x%x" 1340virtio_gpu_cmd_res_back_attach(uint32_t res) "res 0x%x" 1341virtio_gpu_cmd_res_back_detach(uint32_t res) "res 0x%x" 1342virtio_gpu_cmd_res_xfer_toh_2d(uint32_t res) "res 0x%x" 1343virtio_gpu_cmd_res_xfer_toh_3d(uint32_t res) "res 0x%x" 1344virtio_gpu_cmd_res_xfer_fromh_3d(uint32_t res) "res 0x%x" 1345virtio_gpu_cmd_res_flush(uint32_t res, uint32_t w, uint32_t h, uint32_t x, uint32_t y) "res 0x%x, w %d, h %d, x %d, y %d" 1346virtio_gpu_cmd_ctx_create(uint32_t ctx, const char *name) "ctx 0x%x, name %s" 1347virtio_gpu_cmd_ctx_destroy(uint32_t ctx) "ctx 0x%x" 1348virtio_gpu_cmd_ctx_res_attach(uint32_t ctx, uint32_t res) "ctx 0x%x, res 0x%x" 1349virtio_gpu_cmd_ctx_res_detach(uint32_t ctx, uint32_t res) "ctx 0x%x, res 0x%x" 1350virtio_gpu_cmd_ctx_submit(uint32_t ctx, uint32_t size) "ctx 0x%x, size %d" 1351virtio_gpu_update_cursor(uint32_t scanout, uint32_t x, uint32_t y, const char *type, uint32_t res) "scanout %d, x %d, y %d, %s, res 0x%x" 1352virtio_gpu_fence_ctrl(uint64_t fence, uint32_t type) "fence 0x%" PRIx64 ", type 0x%x" 1353virtio_gpu_fence_resp(uint64_t fence) "fence 0x%" PRIx64 1354 1355# qxl.c 1356disable qxl_io_write_vga(int qid, const char *mode, uint32_t addr, uint32_t val) "%d %s addr=%u val=%u" 1357qxl_create_guest_primary(int qid, uint32_t width, uint32_t height, uint64_t mem, uint32_t format, uint32_t position) "%d %ux%u mem=0x%" PRIx64 " %u,%u" 1358qxl_create_guest_primary_rest(int qid, int32_t stride, uint32_t type, uint32_t flags) "%d %d,%d,%d" 1359qxl_destroy_primary(int qid) "%d" 1360qxl_enter_vga_mode(int qid) "%d" 1361qxl_exit_vga_mode(int qid) "%d" 1362qxl_hard_reset(int qid, int64_t loadvm) "%d loadvm=%"PRId64 1363qxl_interface_async_complete_io(int qid, uint32_t current_async, void *cookie) "%d current=%d cookie=%p" 1364qxl_interface_attach_worker(int qid) "%d" 1365qxl_interface_get_init_info(int qid) "%d" 1366qxl_interface_set_compression_level(int qid, int64_t level) "%d %"PRId64 1367qxl_interface_update_area_complete(int qid, uint32_t surface_id, uint32_t dirty_left, uint32_t dirty_right, uint32_t dirty_top, uint32_t dirty_bottom) "%d surface=%d [%d,%d,%d,%d]" 1368qxl_interface_update_area_complete_rest(int qid, uint32_t num_updated_rects) "%d #=%d" 1369qxl_interface_update_area_complete_overflow(int qid, int max) "%d max=%d" 1370qxl_interface_update_area_complete_schedule_bh(int qid, uint32_t num_dirty) "%d #dirty=%d" 1371qxl_io_destroy_primary_ignored(int qid, const char *mode) "%d %s" 1372qxl_io_log(int qid, const char *log_buf) "%d %s" 1373qxl_io_read_unexpected(int qid) "%d" 1374qxl_io_unexpected_vga_mode(int qid, uint64_t addr, uint64_t val, const char *desc) "%d 0x%"PRIx64"=%"PRIu64" (%s)" 1375qxl_io_write(int qid, const char *mode, uint64_t addr, const char *aname, uint64_t val, unsigned size, int async) "%d %s addr=%"PRIu64 " (%s) val=%"PRIu64" size=%u async=%d" 1376qxl_memslot_add_guest(int qid, uint32_t slot_id, uint64_t guest_start, uint64_t guest_end) "%d %u: guest phys 0x%"PRIx64 " - 0x%" PRIx64 1377qxl_post_load(int qid, const char *mode) "%d %s" 1378qxl_pre_load(int qid) "%d" 1379qxl_pre_save(int qid) "%d" 1380qxl_reset_surfaces(int qid) "%d" 1381qxl_ring_command_check(int qid, const char *mode) "%d %s" 1382qxl_ring_command_get(int qid, const char *mode) "%d %s" 1383qxl_ring_command_req_notification(int qid) "%d" 1384qxl_ring_cursor_check(int qid, const char *mode) "%d %s" 1385qxl_ring_cursor_get(int qid, const char *mode) "%d %s" 1386qxl_ring_cursor_req_notification(int qid) "%d" 1387qxl_ring_res_push(int qid, const char *mode, uint32_t surface_count, uint32_t free_res, void *last_release, const char *notify) "%d %s s#=%d res#=%d last=%p notify=%s" 1388qxl_ring_res_push_rest(int qid, uint32_t ring_has, uint32_t ring_size, uint32_t prod, uint32_t cons) "%d ring %d/%d [%d,%d]" 1389qxl_ring_res_put(int qid, uint32_t free_res) "%d #res=%d" 1390qxl_set_mode(int qid, int modenr, uint32_t x_res, uint32_t y_res, uint32_t bits, uint64_t devmem) "%d mode=%d [ x=%d y=%d @ bpp=%d devmem=0x%" PRIx64 " ]" 1391qxl_soft_reset(int qid) "%d" 1392qxl_spice_destroy_surfaces_complete(int qid) "%d" 1393qxl_spice_destroy_surfaces(int qid, int async) "%d async=%d" 1394qxl_spice_destroy_surface_wait_complete(int qid, uint32_t id) "%d sid=%d" 1395qxl_spice_destroy_surface_wait(int qid, uint32_t id, int async) "%d sid=%d async=%d" 1396qxl_spice_flush_surfaces_async(int qid, uint32_t surface_count, uint32_t num_free_res) "%d s#=%d, res#=%d" 1397qxl_spice_monitors_config(int qid) "%d" 1398qxl_spice_loadvm_commands(int qid, void *ext, uint32_t count) "%d ext=%p count=%d" 1399qxl_spice_oom(int qid) "%d" 1400qxl_spice_reset_cursor(int qid) "%d" 1401qxl_spice_reset_image_cache(int qid) "%d" 1402qxl_spice_reset_memslots(int qid) "%d" 1403qxl_spice_update_area(int qid, uint32_t surface_id, uint32_t left, uint32_t right, uint32_t top, uint32_t bottom) "%d sid=%d [%d,%d,%d,%d]" 1404qxl_spice_update_area_rest(int qid, uint32_t num_dirty_rects, uint32_t clear_dirty_region) "%d #d=%d clear=%d" 1405qxl_surfaces_dirty(int qid, uint64_t offset, uint64_t size) "%d offset=0x%"PRIx64" size=0x%"PRIx64 1406qxl_send_events(int qid, uint32_t events) "%d %d" 1407qxl_send_events_vm_stopped(int qid, uint32_t events) "%d %d" 1408qxl_set_guest_bug(int qid) "%d" 1409qxl_interrupt_client_monitors_config(int qid, int num_heads, void *heads) "%d %d %p" 1410qxl_client_monitors_config_unsupported_by_guest(int qid, uint32_t int_mask, void *client_monitors_config) "%d 0x%X %p" 1411qxl_client_monitors_config_unsupported_by_device(int qid, int revision) "%d revision=%d" 1412qxl_client_monitors_config_capped(int qid, int requested, int limit) "%d %d %d" 1413qxl_client_monitors_config_crc(int qid, unsigned size, uint32_t crc32) "%d %u %u" 1414qxl_set_client_capabilities_unsupported_by_revision(int qid, int revision) "%d revision=%d" 1415 1416# qxl-render.c 1417qxl_render_blit(int32_t stride, int32_t left, int32_t right, int32_t top, int32_t bottom) "stride=%d [%d, %d, %d, %d]" 1418qxl_render_guest_primary_resized(int32_t width, int32_t height, int32_t stride, int32_t bytes_pp, int32_t bits_pp) "%dx%d, stride %d, bpp %d, depth %d" 1419qxl_render_update_area_done(void *cookie) "%p" 1420 1421# vga.c 1422vga_std_read_io(uint32_t addr, uint32_t val) "addr 0x%x, val 0x%x" 1423vga_std_write_io(uint32_t addr, uint32_t val) "addr 0x%x, val 0x%x" 1424vga_vbe_read(uint32_t index, uint32_t val) "index 0x%x, val 0x%x" 1425vga_vbe_write(uint32_t index, uint32_t val) "index 0x%x, val 0x%x" 1426 1427# cirrus_vga.c 1428vga_cirrus_read_io(uint32_t addr, uint32_t val) "addr 0x%x, val 0x%x" 1429vga_cirrus_write_io(uint32_t addr, uint32_t val) "addr 0x%x, val 0x%x" 1430vga_cirrus_write_blt(uint32_t offset, uint32_t val) "offset 0x%x, val 0x%x" 1431vga_cirrus_write_gr(uint8_t index, uint8_t val) "GR addr 0x%02x, val 0x%02x" 1432vga_cirrus_bitblt_start(uint8_t blt_rop, uint8_t blt_mode, uint8_t blt_modeext, int blt_width, int blt_height, int blt_dstpitch, int blt_srcpitch, uint32_t blt_dstaddr, uint32_t blt_srcaddr, uint8_t gr_val) "rop=0x%02x mode=0x%02x modeext=0x%02x w=%d h=%d dpitch=%d spitch=%d daddr=0x%08"PRIx32" saddr=0x%08"PRIx32" writemask=0x%02x" 1433 1434# sii9022.c 1435sii9022_read_reg(uint8_t addr, uint8_t val) "addr 0x%02x, val 0x%02x" 1436sii9022_write_reg(uint8_t addr, uint8_t val) "addr 0x%02x, val 0x%02x" 1437sii9022_switch_mode(const char *mode) "mode: %s" 1438 1439# ati.c 1440ati_mm_read(unsigned int size, uint64_t addr, const char *name, uint64_t val) "%u 0x%"PRIx64 " %s -> 0x%"PRIx64 1441ati_mm_write(unsigned int size, uint64_t addr, const char *name, uint64_t val) "%u 0x%"PRIx64 " %s <- 0x%"PRIx64 1442 1443# artist.c 1444artist_reg_read(unsigned int size, uint64_t addr, const char *name, uint64_t val) "%u 0x%"PRIx64 "%s -> 0x%08"PRIx64 1445artist_reg_write(unsigned int size, uint64_t addr, const char *name, uint64_t val) "%u 0x%"PRIx64 "%s <- 0x%08"PRIx64 1446artist_vram_read(unsigned int size, uint64_t addr, uint64_t val) "%u 0x%08"PRIx64 " -> 0x%08"PRIx64 1447artist_vram_write(unsigned int size, uint64_t addr, uint64_t val) "%u 0x%08"PRIx64 " <- 0x%08"PRIx64 1448artist_fill_window(unsigned int start_x, unsigned int start_y, unsigned int width, unsigned int height, uint32_t op, uint32_t ctlpln) "start=%ux%u length=%ux%u op=0x%08x ctlpln=0x%08x" 1449artist_block_move(unsigned int start_x, unsigned int start_y, unsigned int dest_x, unsigned int dest_y, unsigned int width, unsigned int height) "source %ux%u -> dest %ux%u size %ux%u" 1450artist_draw_line(unsigned int start_x, unsigned int start_y, unsigned int end_x, unsigned int end_y) "%ux%u %ux%u" 1451 1452# cg3.c 1453cg3_read(uint32_t addr, uint32_t val, unsigned size) "read addr:0x%06"PRIx32" val:0x%08"PRIx32" size:%u" 1454cg3_write(uint32_t addr, uint32_t val, unsigned size) "write addr:0x%06"PRIx32" val:0x%08"PRIx32" size:%u" 1455 1456# dpcd.c 1457dpcd_read(uint32_t addr, uint8_t val) "read addr:0x%"PRIx32" val:0x%02x" 1458dpcd_write(uint32_t addr, uint8_t val) "write addr:0x%"PRIx32" val:0x%02x" 1459 1460# sm501.c 1461sm501_system_config_read(uint32_t addr, uint32_t val) "addr=0x%x, val=0x%x" 1462sm501_system_config_write(uint32_t addr, uint32_t val) "addr=0x%x, val=0x%x" 1463sm501_i2c_read(uint32_t addr, uint8_t val) "addr=0x%x, val=0x%x" 1464sm501_i2c_write(uint32_t addr, uint32_t val) "addr=0x%x, val=0x%x" 1465sm501_palette_read(uint32_t addr) "addr=0x%x" 1466sm501_palette_write(uint32_t addr, uint32_t val) "addr=0x%x, val=0x%x" 1467sm501_disp_ctrl_read(uint32_t addr, uint32_t val) "addr=0x%x, val=0x%x" 1468sm501_disp_ctrl_write(uint32_t addr, uint32_t val) "addr=0x%x, val=0x%x" 1469sm501_2d_engine_read(uint32_t addr, uint32_t val) "addr=0x%x, val=0x%x" 1470sm501_2d_engine_write(uint32_t addr, uint32_t val) "addr=0x%x, val=0x%x" 1471 1472# macfb.c 1473macfb_ctrl_read(uint64_t addr, uint64_t value, unsigned int size) "addr 0x%"PRIx64 " value 0x%"PRIx64 " size %u" 1474macfb_ctrl_write(uint64_t addr, uint64_t value, unsigned int size) "addr 0x%"PRIx64 " value 0x%"PRIx64 " size %u" 1475macfb_sense_read(uint32_t value) "video sense: 0x%"PRIx32 1476macfb_sense_write(uint32_t value) "video sense: 0x%"PRIx32 1477macfb_update_mode(uint32_t width, uint32_t height, uint8_t depth) "setting mode to width %"PRId32 " height %"PRId32 " size %d" 1478# See docs/devel/tracing.rst for syntax documentation. 1479 1480# rc4030.c 1481jazzio_read(uint64_t addr, uint32_t ret) "read reg[0x%"PRIx64"] = 0x%x" 1482jazzio_write(uint64_t addr, uint32_t val) "write reg[0x%"PRIx64"] = 0x%x" 1483rc4030_read(uint64_t addr, uint32_t ret) "read reg[0x%"PRIx64"] = 0x%x" 1484rc4030_write(uint64_t addr, uint32_t val) "write reg[0x%"PRIx64"] = 0x%x" 1485 1486# sparc32_dma.c 1487ledma_memory_read(uint64_t addr, int len) "DMA read addr 0x%"PRIx64 " len %d" 1488ledma_memory_write(uint64_t addr, int len) "DMA write addr 0x%"PRIx64 " len %d" 1489sparc32_dma_set_irq_raise(void) "Raise IRQ" 1490sparc32_dma_set_irq_lower(void) "Lower IRQ" 1491espdma_memory_read(uint32_t addr, int len) "DMA read addr 0x%08x len %d" 1492espdma_memory_write(uint32_t addr, int len) "DMA write addr 0x%08x len %d" 1493sparc32_dma_mem_readl(uint64_t addr, uint32_t ret) "read dmareg 0x%"PRIx64": 0x%08x" 1494sparc32_dma_mem_writel(uint64_t addr, uint32_t old, uint32_t val) "write dmareg 0x%"PRIx64": 0x%08x -> 0x%08x" 1495sparc32_dma_enable_raise(void) "Raise DMA enable" 1496sparc32_dma_enable_lower(void) "Lower DMA enable" 1497 1498# i8257.c 1499i8257_unregistered_dma(int nchan, int dma_pos, int dma_len) "unregistered DMA channel used nchan=%d dma_pos=%d dma_len=%d" 1500 1501# pl330.c 1502pl330_fault(void *ptr, uint32_t flags) "ch: %p, flags: 0x%"PRIx32 1503pl330_fault_abort(void) "abort interrupt raised" 1504pl330_dmaend(void) "DMA ending" 1505pl330_dmago(void) "DMA run" 1506pl330_dmald(uint8_t chan, uint32_t addr, uint32_t size, uint32_t num, char ch) "channel:%"PRId8" address:0x%08"PRIx32" size:0x%"PRIx32" num:%"PRId32"%c" 1507pl330_dmakill(void) "abort interrupt lowered" 1508pl330_dmalpend(uint8_t nf, uint8_t bs, uint8_t lc, uint8_t ch, uint8_t flag) "nf=0x%02x bs=0x%02x lc=0x%02x ch=0x%02x flag=0x%02x" 1509pl330_dmalpiter(void) "loop reiteration" 1510pl330_dmalpfallthrough(void) "loop fallthrough" 1511pl330_dmasev_evirq(uint8_t ev_id) "event interrupt raised %"PRId8 1512pl330_dmasev_event(uint8_t ev_id) "event raised %"PRId8 1513pl330_dmast(uint8_t chan, uint32_t addr, uint32_t sz, uint32_t num, char ch) "channel:%"PRId8" address:0x%08"PRIx32" size:0x%"PRIx32" num:%"PRId32" %c" 1514pl330_dmawfe(uint8_t ev_id) "event lowered 0x%"PRIx8 1515pl330_chan_exec_undef(void) "undefined instruction" 1516pl330_exec_cycle(uint32_t addr, uint32_t size) "PL330 read from memory @0x%08"PRIx32" (size = 0x%08"PRIx32")" 1517pl330_hexdump(uint32_t offset, char *str) " 0x%04"PRIx32":%s" 1518pl330_exec(void) "pl330_exec" 1519pl330_debug_exec(uint8_t ch) "chan id: 0x%"PRIx8 1520pl330_debug_exec_stall(void) "stall of debug instruction not implemented" 1521pl330_iomem_write(uint32_t offset, uint32_t value) "addr: 0x%08"PRIx32" data: 0x%08"PRIx32 1522pl330_iomem_write_clr(int i) "event interrupt lowered %d" 1523pl330_iomem_read(uint32_t addr, uint32_t data) "addr: 0x%08"PRIx32" data: 0x%08"PRIx32 1524# vmbus.c 1525vmbus_recv_message(uint32_t type, uint32_t size) "type %d size %d" 1526vmbus_signal_event(void) "" 1527vmbus_channel_notify_guest(uint32_t chan_id) "channel #%d" 1528vmbus_post_msg(uint32_t type, uint32_t size) "type %d size %d" 1529vmbus_msg_cb(int status) "message status %d" 1530vmbus_process_incoming_message(uint32_t message_type) "type %d" 1531vmbus_initiate_contact(uint16_t major, uint16_t minor, uint32_t vcpu, uint64_t monitor_page1, uint64_t monitor_page2, uint64_t interrupt_page) "version %d.%d target vp %d mon pages 0x%"PRIx64",0x%"PRIx64" int page 0x%"PRIx64 1532vmbus_send_offer(uint32_t chan_id, void *dev) "channel #%d dev %p" 1533vmbus_terminate_offers(void) "" 1534vmbus_gpadl_header(uint32_t gpadl_id, uint16_t num_gfns) "gpadl #%d gfns %d" 1535vmbus_gpadl_body(uint32_t gpadl_id) "gpadl #%d" 1536vmbus_gpadl_created(uint32_t gpadl_id) "gpadl #%d" 1537vmbus_gpadl_teardown(uint32_t gpadl_id) "gpadl #%d" 1538vmbus_gpadl_torndown(uint32_t gpadl_id) "gpadl #%d" 1539vmbus_open_channel(uint32_t chan_id, uint32_t gpadl_id, uint32_t target_vp) "channel #%d gpadl #%d target vp %d" 1540vmbus_channel_open(uint32_t chan_id, uint32_t status) "channel #%d status %d" 1541vmbus_close_channel(uint32_t chan_id) "channel #%d" 1542 1543# hv-balloon 1544hv_balloon_state_change(const char *tostr) "-> %s" 1545hv_balloon_incoming_version(uint16_t major, uint16_t minor) "incoming proto version %u.%u" 1546hv_balloon_incoming_caps(uint32_t caps) "incoming caps 0x%x" 1547hv_balloon_outgoing_unballoon(uint32_t trans_id, uint64_t count, uint64_t start, uint64_t rempages) "posting unballoon %"PRIu32" for %"PRIu64" @ 0x%"PRIx64", remaining %"PRIu64 1548hv_balloon_incoming_unballoon(uint32_t trans_id) "incoming unballoon response %"PRIu32 1549hv_balloon_outgoing_hot_add(uint32_t trans_id, uint64_t count, uint64_t start) "posting hot add %"PRIu32" for %"PRIu64" @ 0x%"PRIx64 1550hv_balloon_incoming_hot_add(uint32_t trans_id, uint32_t result, uint32_t count) "incoming hot add response %"PRIu32", result %"PRIu32", count %"PRIu32 1551hv_balloon_outgoing_balloon(uint32_t trans_id, uint64_t count, uint64_t rempages) "posting balloon %"PRIu32" for %"PRIu64", remaining %"PRIu64 1552hv_balloon_incoming_balloon(uint32_t trans_id, uint32_t range_count, uint32_t more_pages) "incoming balloon response %"PRIu32", ranges %"PRIu32", more %"PRIu32 1553hv_balloon_our_range_add(uint64_t count, uint64_t start) "adding our range %"PRIu64" @ 0x%"PRIx64 1554hv_balloon_remove_response(uint64_t count, uint64_t start, unsigned int both) "processing remove response range %"PRIu64" @ 0x%"PRIx64", both %u" 1555hv_balloon_remove_response_hole(uint64_t counthole, uint64_t starthole, uint64_t countrange, uint64_t startrange, uint64_t starthpr, unsigned int both) "response range hole %"PRIu64" @ 0x%"PRIx64" from range %"PRIu64" @ 0x%"PRIx64", before our start 0x%"PRIx64", both %u" 1556hv_balloon_remove_response_common(uint64_t countcommon, uint64_t startcommon, uint64_t countrange, uint64_t startrange, uint64_t counthpr, uint64_t starthpr, uint64_t removed, unsigned int both) "response common range %"PRIu64" @ 0x%"PRIx64" from range %"PRIu64" @ 0x%"PRIx64" with our %"PRIu64" @ 0x%"PRIx64", removed %"PRIu64", both %u" 1557hv_balloon_remove_response_remainder(uint64_t count, uint64_t start, unsigned int both) "remove response remaining range %"PRIu64" @ 0x%"PRIx64", both %u" 1558hv_balloon_map_slot(unsigned int idx, unsigned int total_slots, uint64_t offset) "mapping memslot %u / %u @ 0x%"PRIx64 1559hv_balloon_unmap_slot(unsigned int idx, unsigned int total_slots, uint64_t offset) "unmapping memslot %u / %u @ 0x%"PRIx64 1560# See docs/devel/tracing.rst for syntax documentation. 1561 1562# bitbang_i2c.c 1563bitbang_i2c_state(const char *old_state, const char *new_state) "state %s -> %s" 1564bitbang_i2c_addr(uint8_t addr) "Address 0x%02x" 1565bitbang_i2c_send(uint8_t byte) "TX byte 0x%02x" 1566bitbang_i2c_recv(uint8_t byte) "RX byte 0x%02x" 1567bitbang_i2c_data(unsigned clk, unsigned dat, unsigned old_out, unsigned new_out) "clk %u dat %u out %u -> %u" 1568 1569# core.c 1570 1571i2c_event(const char *event, uint8_t address) "%s(addr:0x%02x)" 1572i2c_send(uint8_t address, uint8_t data) "send(addr:0x%02x) data:0x%02x" 1573i2c_send_async(uint8_t address, uint8_t data) "send_async(addr:0x%02x) data:0x%02x" 1574i2c_recv(uint8_t address, uint8_t data) "recv(addr:0x%02x) data:0x%02x" 1575i2c_ack(void) "" 1576 1577# pm_smbus.c 1578 1579smbus_ioport_readb(uint16_t addr, uint8_t data) "[0x%04" PRIx16 "] -> val=0x%02x" 1580smbus_ioport_writeb(uint16_t addr, uint8_t data) "[0x%04" PRIx16 "] <- val=0x%02x" 1581smbus_transaction(uint8_t addr, uint8_t prot) "addr=0x%02x prot=0x%02x" 1582 1583# allwinner_i2c.c 1584 1585allwinner_i2c_read(const char* reg_name, uint64_t offset, uint64_t value) "read %s [0x%" PRIx64 "]: -> 0x%" PRIx64 1586allwinner_i2c_write(const char* reg_name, uint64_t offset, uint64_t value) "write %s [0x%" PRIx64 "]: <- 0x%" PRIx64 1587 1588# aspeed_i2c.c 1589 1590aspeed_i2c_bus_cmd(uint32_t cmd, const char *cmd_flags, uint32_t count, uint32_t intr_status) "handling cmd=0x%x %s count=%d intr=0x%x" 1591aspeed_i2c_bus_raise_interrupt(uint32_t intr_status, const char *s) "handled intr=0x%x %s" 1592aspeed_i2c_bus_read(uint32_t busid, uint64_t offset, unsigned size, uint64_t value) "bus[%d]: To 0x%" PRIx64 " of size %u: 0x%" PRIx64 1593aspeed_i2c_bus_write(uint32_t busid, uint64_t offset, unsigned size, uint64_t value) "bus[%d]: To 0x%" PRIx64 " of size %u: 0x%" PRIx64 1594aspeed_i2c_bus_send(const char *mode, int i, int count, uint8_t byte) "%s send %d/%d 0x%02x" 1595aspeed_i2c_bus_recv(const char *mode, int i, int count, uint8_t byte) "%s recv %d/%d 0x%02x" 1596 1597# npcm7xx_smbus.c 1598 1599npcm7xx_smbus_read(const char *id, uint64_t offset, uint64_t value, unsigned size) "%s offset: 0x%04" PRIx64 " value: 0x%02" PRIx64 " size: %u" 1600npcm7xx_smbus_write(const char *id, uint64_t offset, uint64_t value, unsigned size) "%s offset: 0x%04" PRIx64 " value: 0x%02" PRIx64 " size: %u" 1601npcm7xx_smbus_start(const char *id, int success) "%s starting, success: %d" 1602npcm7xx_smbus_send_address(const char *id, uint8_t addr, int recv, int success) "%s sending address: 0x%02x, recv: %d, success: %d" 1603npcm7xx_smbus_send_byte(const char *id, uint8_t value, int success) "%s send byte: 0x%02x, success: %d" 1604npcm7xx_smbus_recv_byte(const char *id, uint8_t value) "%s recv byte: 0x%02x" 1605npcm7xx_smbus_stop(const char *id) "%s stopping" 1606npcm7xx_smbus_nack(const char *id) "%s nacking" 1607npcm7xx_smbus_recv_fifo(const char *id, uint8_t received, uint8_t expected) "%s recv fifo: received %u, expected %u" 1608 1609# i2c-mux-pca954x.c 1610 1611pca954x_write_bytes(uint8_t value) "PCA954X write data: 0x%02x" 1612pca954x_read_data(uint8_t value) "PCA954X read data: 0x%02x" 1613# See docs/devel/tracing.rst for syntax documentation. 1614 1615# x86-iommu.c 1616x86_iommu_iec_notify(bool global, uint32_t index, uint32_t mask) "Notify IEC invalidation: global=%d index=%" PRIu32 " mask=%" PRIu32 1617 1618# intel_iommu.c 1619vtd_inv_desc(const char *type, uint64_t hi, uint64_t lo) "invalidate desc type %s high 0x%"PRIx64" low 0x%"PRIx64 1620vtd_inv_desc_cc_domain(uint16_t domain) "context invalidate domain 0x%"PRIx16 1621vtd_inv_desc_cc_global(void) "context invalidate globally" 1622vtd_inv_desc_cc_device(uint8_t bus, uint8_t dev, uint8_t fn) "context invalidate device %02"PRIx8":%02"PRIx8".%02"PRIx8 1623vtd_inv_desc_cc_devices(uint16_t sid, uint16_t fmask) "context invalidate devices sid 0x%"PRIx16" fmask 0x%"PRIx16 1624vtd_inv_desc_iotlb_global(void) "iotlb invalidate global" 1625vtd_inv_desc_iotlb_domain(uint16_t domain) "iotlb invalidate whole domain 0x%"PRIx16 1626vtd_inv_desc_iotlb_pages(uint16_t domain, uint64_t addr, uint8_t mask) "iotlb invalidate domain 0x%"PRIx16" addr 0x%"PRIx64" mask 0x%"PRIx8 1627vtd_inv_desc_iotlb_pasid_pages(uint16_t domain, uint64_t addr, uint8_t mask, uint32_t pasid) "iotlb invalidate domain 0x%"PRIx16" addr 0x%"PRIx64" mask 0x%"PRIx8" pasid 0x%"PRIx32 1628vtd_inv_desc_iotlb_pasid(uint16_t domain, uint32_t pasid) "iotlb invalidate domain 0x%"PRIx16" pasid 0x%"PRIx32 1629vtd_inv_desc_wait_sw(uint64_t addr, uint32_t data) "wait invalidate status write addr 0x%"PRIx64" data 0x%"PRIx32 1630vtd_inv_desc_wait_irq(const char *msg) "%s" 1631vtd_inv_desc_wait_write_fail(uint64_t hi, uint64_t lo) "write fail for wait desc hi 0x%"PRIx64" lo 0x%"PRIx64 1632vtd_inv_desc_iec(uint32_t granularity, uint32_t index, uint32_t mask) "granularity 0x%"PRIx32" index 0x%"PRIx32" mask 0x%"PRIx32 1633vtd_inv_qi_enable(bool enable) "enabled %d" 1634vtd_inv_qi_setup(uint64_t addr, int size) "addr 0x%"PRIx64" size %d" 1635vtd_inv_qi_head(uint16_t head) "read head %d" 1636vtd_inv_qi_tail(uint16_t head) "write tail %d" 1637vtd_inv_qi_fetch(void) "" 1638vtd_context_cache_reset(void) "" 1639vtd_re_not_present(uint8_t bus) "Root entry bus %"PRIu8" not present" 1640vtd_ce_not_present(uint8_t bus, uint8_t devfn) "Context entry bus %"PRIu8" devfn %"PRIu8" not present" 1641vtd_iotlb_page_hit(uint16_t sid, uint64_t addr, uint64_t slpte, uint16_t domain) "IOTLB page hit sid 0x%"PRIx16" iova 0x%"PRIx64" slpte 0x%"PRIx64" domain 0x%"PRIx16 1642vtd_iotlb_page_update(uint16_t sid, uint64_t addr, uint64_t slpte, uint16_t domain) "IOTLB page update sid 0x%"PRIx16" iova 0x%"PRIx64" slpte 0x%"PRIx64" domain 0x%"PRIx16 1643vtd_iotlb_cc_hit(uint8_t bus, uint8_t devfn, uint64_t high, uint64_t low, uint32_t gen) "IOTLB context hit bus 0x%"PRIx8" devfn 0x%"PRIx8" high 0x%"PRIx64" low 0x%"PRIx64" gen %"PRIu32 1644vtd_iotlb_cc_update(uint8_t bus, uint8_t devfn, uint64_t high, uint64_t low, uint32_t gen1, uint32_t gen2) "IOTLB context update bus 0x%"PRIx8" devfn 0x%"PRIx8" high 0x%"PRIx64" low 0x%"PRIx64" gen %"PRIu32" -> gen %"PRIu32 1645vtd_iotlb_reset(const char *reason) "IOTLB reset (reason: %s)" 1646vtd_fault_disabled(void) "Fault processing disabled for context entry" 1647vtd_replay_ce_valid(const char *mode, uint8_t bus, uint8_t dev, uint8_t fn, uint16_t domain, uint64_t hi, uint64_t lo) "%s: replay valid context device %02"PRIx8":%02"PRIx8".%02"PRIx8" domain 0x%"PRIx16" hi 0x%"PRIx64" lo 0x%"PRIx64 1648vtd_replay_ce_invalid(uint8_t bus, uint8_t dev, uint8_t fn) "replay invalid context device %02"PRIx8":%02"PRIx8".%02"PRIx8 1649vtd_page_walk_level(uint64_t addr, uint32_t level, uint64_t start, uint64_t end) "walk (base=0x%"PRIx64", level=%"PRIu32") iova range 0x%"PRIx64" - 0x%"PRIx64 1650vtd_page_walk_one(uint16_t domain, uint64_t iova, uint64_t gpa, uint64_t mask, int perm) "domain 0x%"PRIx16" iova 0x%"PRIx64" -> gpa 0x%"PRIx64" mask 0x%"PRIx64" perm %d" 1651vtd_page_walk_one_skip_map(uint64_t iova, uint64_t mask, uint64_t translated) "iova 0x%"PRIx64" mask 0x%"PRIx64" translated 0x%"PRIx64 1652vtd_page_walk_one_skip_unmap(uint64_t iova, uint64_t mask) "iova 0x%"PRIx64" mask 0x%"PRIx64 1653vtd_page_walk_skip_read(uint64_t iova, uint64_t next) "Page walk skip iova 0x%"PRIx64" - 0x%"PRIx64" due to unable to read" 1654vtd_page_walk_skip_reserve(uint64_t iova, uint64_t next) "Page walk skip iova 0x%"PRIx64" - 0x%"PRIx64" due to rsrv set" 1655vtd_switch_address_space(uint8_t bus, uint8_t slot, uint8_t fn, bool on) "Device %02x:%02x.%x switching address space (iommu enabled=%d)" 1656vtd_as_unmap_whole(uint8_t bus, uint8_t slot, uint8_t fn, uint64_t iova, uint64_t size) "Device %02x:%02x.%x start 0x%"PRIx64" size 0x%"PRIx64 1657vtd_translate_pt(uint16_t sid, uint64_t addr) "source id 0x%"PRIx16", iova 0x%"PRIx64 1658vtd_pt_enable_fast_path(uint16_t sid, bool success) "sid 0x%"PRIx16" %d" 1659vtd_irq_generate(uint64_t addr, uint64_t data) "addr 0x%"PRIx64" data 0x%"PRIx64 1660vtd_reg_read(uint64_t addr, uint64_t size) "addr 0x%"PRIx64" size 0x%"PRIx64 1661vtd_reg_write(uint64_t addr, uint64_t size, uint64_t val) "addr 0x%"PRIx64" size 0x%"PRIx64" value 0x%"PRIx64 1662vtd_reg_dmar_root(uint64_t addr, bool scalable) "addr 0x%"PRIx64" scalable %d" 1663vtd_reg_ir_root(uint64_t addr, uint32_t size) "addr 0x%"PRIx64" size 0x%"PRIx32 1664vtd_reg_write_gcmd(uint32_t status, uint32_t val) "status 0x%"PRIx32" value 0x%"PRIx32 1665vtd_reg_write_fectl(uint32_t value) "value 0x%"PRIx32 1666vtd_reg_write_iectl(uint32_t value) "value 0x%"PRIx32 1667vtd_reg_ics_clear_ip(void) "" 1668vtd_dmar_translate(uint8_t bus, uint8_t slot, uint8_t func, uint64_t iova, uint64_t gpa, uint64_t mask) "dev %02x:%02x.%02x iova 0x%"PRIx64" -> gpa 0x%"PRIx64" mask 0x%"PRIx64 1669vtd_dmar_enable(bool en) "enable %d" 1670vtd_dmar_fault(uint16_t sid, int fault, uint64_t addr, bool is_write) "sid 0x%"PRIx16" fault %d addr 0x%"PRIx64" write %d" 1671vtd_ir_enable(bool en) "enable %d" 1672vtd_ir_irte_get(int index, uint64_t lo, uint64_t hi) "index %d low 0x%"PRIx64" high 0x%"PRIx64 1673vtd_ir_remap(int index, int tri, int vec, int deliver, uint32_t dest, int dest_mode) "index %d trigger %d vector %d deliver %d dest 0x%"PRIx32" mode %d" 1674vtd_ir_remap_type(const char *type) "%s" 1675vtd_ir_remap_msi(uint64_t addr, uint64_t data, uint64_t addr2, uint64_t data2) "(addr 0x%"PRIx64", data 0x%"PRIx64") -> (addr 0x%"PRIx64", data 0x%"PRIx64")" 1676vtd_ir_remap_msi_req(uint64_t addr, uint64_t data) "addr 0x%"PRIx64" data 0x%"PRIx64 1677vtd_fsts_ppf(bool set) "FSTS PPF bit set to %d" 1678vtd_fsts_clear_ip(void) "" 1679vtd_frr_new(int index, uint64_t hi, uint64_t lo) "index %d high 0x%"PRIx64" low 0x%"PRIx64 1680vtd_warn_invalid_qi_tail(uint16_t tail) "tail 0x%"PRIx16 1681vtd_warn_ir_vector(uint16_t sid, int index, int vec, int target) "sid 0x%"PRIx16" index %d vec %d (should be: %d)" 1682vtd_warn_ir_trigger(uint16_t sid, int index, int trig, int target) "sid 0x%"PRIx16" index %d trigger %d (should be: %d)" 1683 1684# amd_iommu.c 1685amdvi_evntlog_fail(uint64_t addr, uint32_t head) "error: fail to write at addr 0x%"PRIx64" + offset 0x%"PRIx32 1686amdvi_cache_update(uint16_t domid, uint8_t bus, uint8_t slot, uint8_t func, uint64_t gpa, uint64_t txaddr) " update iotlb domid 0x%"PRIx16" devid: %02x:%02x.%x gpa 0x%"PRIx64" hpa 0x%"PRIx64 1687amdvi_completion_wait_fail(uint64_t addr) "error: fail to write at address 0x%"PRIx64 1688amdvi_mmio_write(const char *reg, uint64_t addr, unsigned size, uint64_t val, uint64_t offset) "%s write addr 0x%"PRIx64", size %u, val 0x%"PRIx64", offset 0x%"PRIx64 1689amdvi_mmio_read(const char *reg, uint64_t addr, unsigned size, uint64_t offset) "%s read addr 0x%"PRIx64", size %u offset 0x%"PRIx64 1690amdvi_mmio_read_invalid(int max, uint64_t addr, unsigned size) "error: addr outside region (max 0x%x): read addr 0x%" PRIx64 ", size %u" 1691amdvi_command_error(uint64_t status) "error: Executing commands with command buffer disabled 0x%"PRIx64 1692amdvi_command_read_fail(uint64_t addr, uint32_t head) "error: fail to access memory at 0x%"PRIx64" + 0x%"PRIx32 1693amdvi_command_exec(uint32_t head, uint32_t tail, uint64_t buf) "command buffer head at 0x%"PRIx32" command buffer tail at 0x%"PRIx32" command buffer base at 0x%"PRIx64 1694amdvi_unhandled_command(uint8_t type) "unhandled command 0x%"PRIx8 1695amdvi_intr_inval(void) "Interrupt table invalidated" 1696amdvi_iotlb_inval(void) "IOTLB pages invalidated" 1697amdvi_prefetch_pages(void) "Pre-fetch of AMD-Vi pages requested" 1698amdvi_pages_inval(uint16_t domid) "AMD-Vi pages for domain 0x%"PRIx16 " invalidated" 1699amdvi_all_inval(void) "Invalidation of all AMD-Vi cache requested " 1700amdvi_ppr_exec(void) "Execution of PPR queue requested " 1701amdvi_devtab_inval(uint8_t bus, uint8_t slot, uint8_t func) "device table entry for devid: %02x:%02x.%x invalidated" 1702amdvi_completion_wait(uint64_t addr, uint64_t data) "completion wait requested with store address 0x%"PRIx64" and store data 0x%"PRIx64 1703amdvi_control_status(uint64_t val) "MMIO_STATUS state 0x%"PRIx64 1704amdvi_iotlb_reset(void) "IOTLB exceed size limit - reset " 1705amdvi_dte_get_fail(uint64_t addr, uint32_t offset) "error: failed to access Device Entry devtab 0x%"PRIx64" offset 0x%"PRIx32 1706amdvi_invalid_dte(uint64_t addr) "PTE entry at 0x%"PRIx64" is invalid " 1707amdvi_get_pte_hwerror(uint64_t addr) "hardware error eccessing PTE at addr 0x%"PRIx64 1708amdvi_mode_invalid(uint8_t level, uint64_t addr)"error: translation level 0x%"PRIx8" translating addr 0x%"PRIx64 1709amdvi_page_fault(uint64_t addr) "error: page fault accessing guest physical address 0x%"PRIx64 1710amdvi_iotlb_hit(uint8_t bus, uint8_t slot, uint8_t func, uint64_t addr, uint64_t txaddr) "hit iotlb devid %02x:%02x.%x gpa 0x%"PRIx64" hpa 0x%"PRIx64 1711amdvi_translation_result(uint8_t bus, uint8_t slot, uint8_t func, uint64_t addr, uint64_t txaddr) "devid: %02x:%02x.%x gpa 0x%"PRIx64" hpa 0x%"PRIx64 1712amdvi_mem_ir_write_req(uint64_t addr, uint64_t val, uint32_t size) "addr 0x%"PRIx64" data 0x%"PRIx64" size 0x%"PRIx32 1713amdvi_mem_ir_write(uint64_t addr, uint64_t val) "addr 0x%"PRIx64" data 0x%"PRIx64 1714amdvi_ir_remap_msi_req(uint64_t addr, uint64_t data, uint8_t devid) "addr 0x%"PRIx64" data 0x%"PRIx64" devid 0x%"PRIx8 1715amdvi_ir_remap_msi(uint64_t addr, uint64_t data, uint64_t addr2, uint64_t data2) "(addr 0x%"PRIx64", data 0x%"PRIx64") -> (addr 0x%"PRIx64", data 0x%"PRIx64")" 1716amdvi_err(const char *str) "%s" 1717amdvi_ir_irte(uint64_t addr, uint64_t data) "addr 0x%"PRIx64" offset 0x%"PRIx64 1718amdvi_ir_irte_val(uint32_t data) "data 0x%"PRIx32 1719amdvi_ir_err(const char *str) "%s" 1720amdvi_ir_intctl(uint8_t val) "int_ctl 0x%"PRIx8 1721amdvi_ir_target_abort(const char *str) "%s" 1722amdvi_ir_delivery_mode(const char *str) "%s" 1723amdvi_ir_irte_ga_val(uint64_t hi, uint64_t lo) "hi 0x%"PRIx64" lo 0x%"PRIx64 1724 1725# vmport.c 1726vmport_register(unsigned char command, void *func, void *opaque) "command: 0x%02x func: %p opaque: %p" 1727vmport_command(unsigned char command) "command: 0x%02x" 1728 1729# x86.c 1730x86_gsi_interrupt(int irqn, int level) "GSI interrupt #%d level:%d" 1731x86_pic_interrupt(int irqn, int level) "PIC interrupt #%d level:%d" 1732 1733# port92.c 1734port92_read(uint8_t val) "port92: read 0x%02x" 1735port92_write(uint8_t val) "port92: write 0x%02x" 1736 1737# vmmouse.c 1738vmmouse_get_status(void) "" 1739vmmouse_mouse_event(int x, int y, int dz, int buttons_state) "event: x=%d y=%d dz=%d state=%d" 1740vmmouse_init(void) "" 1741vmmouse_read_id(void) "" 1742vmmouse_request_relative(void) "" 1743vmmouse_request_absolute(void) "" 1744vmmouse_disable(void) "" 1745vmmouse_data(uint32_t size) "data: size=%" PRIu32 1746# See docs/devel/tracing.rst for syntax documentation. 1747 1748# xen_platform.c 1749xen_platform_log(char *s) "xen platform: %s" 1750 1751# xen_pvdevice.c 1752xen_pv_mmio_read(uint64_t addr) "WARNING: read from Xen PV Device MMIO space (address 0x%"PRIx64")" 1753xen_pv_mmio_write(uint64_t addr) "WARNING: write to Xen PV Device MMIO space (address 0x%"PRIx64")" 1754 1755kvm_xen_map_pirq(int pirq, int gsi) "pirq %d gsi %d" 1756kvm_xen_unmap_pirq(int pirq, int gsi) "pirq %d gsi %d" 1757kvm_xen_get_free_pirq(int pirq, int type) "pirq %d type %d" 1758kvm_xen_bind_pirq(int pirq, int port) "pirq %d port %d" 1759kvm_xen_unmask_pirq(int pirq, char *dev, int vector) "pirq %d dev %s vector %d" 1760xenstore_error(unsigned int id, unsigned int tx_id, const char *err) "req %u tx %u err %s" 1761xenstore_read(unsigned int tx_id, const char *path) "tx %u path %s" 1762xenstore_write(unsigned int tx_id, const char *path) "tx %u path %s" 1763xenstore_mkdir(unsigned int tx_id, const char *path) "tx %u path %s" 1764xenstore_directory(unsigned int tx_id, const char *path) "tx %u path %s" 1765xenstore_directory_part(unsigned int tx_id, const char *path, unsigned int offset) "tx %u path %s offset %u" 1766xenstore_transaction_start(unsigned int new_tx) "new_tx %u" 1767xenstore_transaction_end(unsigned int tx_id, bool commit) "tx %u commit %d" 1768xenstore_rm(unsigned int tx_id, const char *path) "tx %u path %s" 1769xenstore_get_perms(unsigned int tx_id, const char *path) "tx %u path %s" 1770xenstore_set_perms(unsigned int tx_id, const char *path) "tx %u path %s" 1771xenstore_watch(const char *path, const char *token) "path %s token %s" 1772xenstore_unwatch(const char *path, const char *token) "path %s token %s" 1773xenstore_reset_watches(void) "" 1774xenstore_watch_event(const char *path, const char *token) "path %s token %s" 1775xen_primary_console_create(void) "" 1776xen_primary_console_reset(int port) "port %u" 1777# See docs/devel/tracing.rst for syntax documentation. 1778 1779# core.c 1780# portio 1781ide_ioport_read(uint32_t addr, const char *reg, uint32_t val, void *bus, void *s) "IDE PIO rd @ 0x%"PRIx32" (%s); val 0x%02"PRIx32"; bus %p IDEState %p" 1782ide_ioport_write(uint32_t addr, const char *reg, uint32_t val, void *bus, void *s) "IDE PIO wr @ 0x%"PRIx32" (%s); val 0x%02"PRIx32"; bus %p IDEState %p" 1783ide_status_read(uint32_t addr, uint32_t val, void *bus, void *s) "IDE PIO rd @ 0x%"PRIx32" (Alt Status); val 0x%02"PRIx32"; bus %p; IDEState %p" 1784ide_ctrl_write(uint32_t addr, uint32_t val, void *bus) "IDE PIO wr @ 0x%"PRIx32" (Device Control); val 0x%02"PRIx32"; bus %p" 1785# Warning: verbose 1786ide_data_readw(uint32_t addr, uint32_t val, void *bus, void *s) "IDE PIO rd @ 0x%"PRIx32" (Data: Word); val 0x%04"PRIx32"; bus %p; IDEState %p" 1787ide_data_writew(uint32_t addr, uint32_t val, void *bus, void *s) "IDE PIO wr @ 0x%"PRIx32" (Data: Word); val 0x%04"PRIx32"; bus %p; IDEState %p" 1788ide_data_readl(uint32_t addr, uint32_t val, void *bus, void *s) "IDE PIO rd @ 0x%"PRIx32" (Data: Long); val 0x%08"PRIx32"; bus %p; IDEState %p" 1789ide_data_writel(uint32_t addr, uint32_t val, void *bus, void *s) "IDE PIO wr @ 0x%"PRIx32" (Data: Long); val 0x%08"PRIx32"; bus %p; IDEState %p" 1790# misc 1791ide_bus_exec_cmd(void *bus, void *state, uint32_t cmd) "IDE exec cmd: bus %p; state %p; cmd 0x%02x" 1792ide_cancel_dma_sync_buffered(void *fn, void *req) "invoking cb %p of buffered request %p with -ECANCELED" 1793ide_cancel_dma_sync_remaining(void) "draining all remaining requests" 1794ide_sector_read(int64_t sector_num, int nsectors) "sector=%"PRId64" nsectors=%d" 1795ide_sector_write(int64_t sector_num, int nsectors) "sector=%"PRId64" nsectors=%d" 1796ide_reset(void *s) "IDEstate %p" 1797ide_bus_reset_aio(void) "aio_cancel" 1798ide_dma_cb(void *s, int64_t sector_num, int n, const char *dma) "IDEState %p; sector_num=%"PRId64" n=%d cmd=%s" 1799 1800# BMDMA HBAs: 1801 1802# cmd646.c 1803bmdma_read_cmd646(uint64_t addr, uint32_t val) "bmdma: readb 0x%"PRIx64" : 0x%02x" 1804bmdma_write_cmd646(uint64_t addr, uint64_t val) "bmdma: writeb 0x%"PRIx64" : 0x%02"PRIx64 1805 1806# pci.c 1807bmdma_reset(void) "" 1808bmdma_cmd_writeb(uint32_t val) "val: 0x%08x" 1809bmdma_addr_read(uint64_t data) "data: 0x%016"PRIx64 1810bmdma_addr_write(uint64_t data) "data: 0x%016"PRIx64 1811 1812# piix.c 1813bmdma_read(uint64_t addr, uint8_t val) "bmdma: readb 0x%"PRIx64" : 0x%02x" 1814bmdma_write(uint64_t addr, uint64_t val) "bmdma: writeb 0x%"PRIx64" : 0x%02"PRIx64 1815 1816# sii3112.c 1817sii3112_read(int size, uint64_t addr, uint64_t val) "bmdma: read (size %d) 0x%"PRIx64" : 0x%02"PRIx64 1818sii3112_write(int size, uint64_t addr, uint64_t val) "bmdma: write (size %d) 0x%"PRIx64" : 0x%02"PRIx64 1819sii3112_set_irq(int channel, int level) "channel %d level %d" 1820 1821# via.c 1822bmdma_read_via(uint64_t addr, uint32_t val) "bmdma: readb 0x%"PRIx64" : 0x%02x" 1823bmdma_write_via(uint64_t addr, uint64_t val) "bmdma: writeb 0x%"PRIx64" : 0x%02"PRIx64 1824 1825# atapi.c 1826cd_read_sector_sync(int lba) "lba=%d" 1827cd_read_sector_cb(int lba, int ret) "lba=%d ret=%d" 1828cd_read_sector(int lba) "lba=%d" 1829ide_atapi_cmd_error(void *s, int sense_key, int asc) "IDEState: %p; sense=0x%x asc=0x%x" 1830ide_atapi_cmd_reply_end(void *s, int tx_size, int elem_tx_size, int32_t index) "IDEState %p; reply: tx_size=%d elem_tx_size=%d index=%"PRId32 1831ide_atapi_cmd_reply_end_eot(void *s, int status) "IDEState: %p; end of transfer, status=0x%x" 1832ide_atapi_cmd_reply_end_bcl(void *s, int bcl) "IDEState: %p; byte_count_limit=%d" 1833ide_atapi_cmd_reply_end_new(void *s, int status) "IDEState: %p; new transfer started, status=0x%x" 1834ide_atapi_cmd_check_status(void *s) "IDEState: %p" 1835ide_atapi_cmd_read(void *s, const char *method, int lba, int nb_sectors) "IDEState: %p; read %s: LBA=%d nb_sectors=%d" 1836ide_atapi_cmd(void *s, uint8_t cmd) "IDEState: %p; cmd: 0x%02x" 1837ide_atapi_cmd_read_dma_cb_aio(void *s, int lba, int n) "IDEState: %p; aio read: lba=%d n=%d" 1838# Warning: Verbose 1839ide_atapi_cmd_packet(void *s, uint16_t limit, const char *packet) "IDEState: %p; limit=0x%x packet: %s" 1840 1841# ahci.c 1842ahci_port_read(void *s, int port, const char *reg, int offset, uint32_t ret) "ahci(%p)[%d]: port read [reg:%s] @ 0x%x: 0x%08x" 1843ahci_port_read_default(void *s, int port, const char *reg, int offset) "ahci(%p)[%d]: unimplemented port read [reg:%s] @ 0x%x" 1844ahci_irq_raise(void *s) "ahci(%p): raise irq" 1845ahci_irq_lower(void *s) "ahci(%p): lower irq" 1846ahci_check_irq(void *s, uint32_t old, uint32_t new) "ahci(%p): check irq 0x%08x --> 0x%08x" 1847ahci_trigger_irq(void *s, int port, const char *name, uint32_t val, uint32_t old, uint32_t new, uint32_t effective) "ahci(%p)[%d]: trigger irq +%s (0x%08x); irqstat: 0x%08x --> 0x%08x; effective: 0x%08x" 1848ahci_port_write(void *s, int port, const char *reg, int offset, uint32_t val) "ahci(%p)[%d]: port write [reg:%s] @ 0x%x: 0x%08x" 1849ahci_port_write_unimpl(void *s, int port, const char *reg, int offset, uint32_t val) "ahci(%p)[%d]: unimplemented port write [reg:%s] @ 0x%x: 0x%08x" 1850ahci_mem_read_32(void *s, uint64_t addr, uint32_t val) "ahci(%p): mem read @ 0x%"PRIx64": 0x%08x" 1851ahci_mem_read_32_default(void *s, uint64_t addr, uint32_t val) "ahci(%p): mem read @ 0x%"PRIx64": 0x%08x" 1852ahci_mem_read_32_host(void *s, const char *reg, uint64_t addr, uint32_t val) "ahci(%p): mem read [reg:%s] @ 0x%"PRIx64": 0x%08x" 1853ahci_mem_read_32_host_default(void *s, const char *reg, uint64_t addr) "ahci(%p): unimplemented mem read [reg:%s] @ 0x%"PRIx64 1854ahci_mem_read(void *s, unsigned size, uint64_t addr, uint64_t val) "ahci(%p): read%u @ 0x%"PRIx64": 0x%016"PRIx64 1855ahci_mem_write(void *s, unsigned size, uint64_t addr, uint64_t val) "ahci(%p): write%u @ 0x%"PRIx64": 0x%016"PRIx64 1856ahci_mem_write_host_unimpl(void *s, unsigned size, const char *reg, uint64_t addr) "ahci(%p) unimplemented write%u [reg:%s] @ 0x%"PRIx64 1857ahci_mem_write_host(void *s, unsigned size, const char *reg, uint64_t addr, uint64_t val) "ahci(%p) write%u [reg:%s] @ 0x%"PRIx64": 0x%016"PRIx64 1858ahci_mem_write_unimpl(void *s, unsigned size, uint64_t addr, uint64_t val) "ahci(%p): write%u to unknown register 0x%"PRIx64": 0x%016"PRIx64 1859ahci_set_signature(void *s, int port, uint8_t nsector, uint8_t sector, uint8_t lcyl, uint8_t hcyl, uint32_t sig) "ahci(%p)[%d]: set signature sector:0x%02x nsector:0x%02x lcyl:0x%02x hcyl:0x%02x (cumulatively: 0x%08x)" 1860ahci_reset_port(void *s, int port) "ahci(%p)[%d]: reset port" 1861ahci_unmap_fis_address_null(void *s, int port) "ahci(%p)[%d]: Attempt to unmap NULL FIS address" 1862ahci_unmap_clb_address_null(void *s, int port) "ahci(%p)[%d]: Attempt to unmap NULL CLB address" 1863ahci_populate_sglist(void *s, int port) "ahci(%p)[%d]" 1864ahci_populate_sglist_no_prdtl(void *s, int port, uint16_t opts) "ahci(%p)[%d]: no sg list given by guest: 0x%04x" 1865ahci_populate_sglist_no_map(void *s, int port) "ahci(%p)[%d]: DMA mapping failed" 1866ahci_populate_sglist_short_map(void *s, int port) "ahci(%p)[%d]: mapped less than expected" 1867ahci_populate_sglist_bad_offset(void *s, int port, int off_idx, int64_t off_pos) "ahci(%p)[%d]: Incorrect offset! off_idx: %d, off_pos: %"PRId64 1868ncq_finish(void *s, int port, uint8_t tag) "ahci(%p)[%d][tag:%d]: NCQ transfer finished" 1869execute_ncq_command_read(void *s, int port, uint8_t tag, int count, int64_t lba) "ahci(%p)[%d][tag:%d]: NCQ reading %d sectors from LBA %"PRId64 1870execute_ncq_command_write(void *s, int port, uint8_t tag, int count, int64_t lba) "ahci(%p)[%d][tag:%d]: NCQ writing %d sectors to LBA %"PRId64 1871execute_ncq_command_unsup(void *s, int port, uint8_t tag, uint8_t cmd) "ahci(%p)[%d][tag:%d]: error: unsupported NCQ command (0x%02x) received" 1872process_ncq_command_mismatch(void *s, int port, uint8_t tag, uint8_t slot) "ahci(%p)[%d][tag:%d]: Warning: NCQ slot (%d) did not match the given tag" 1873process_ncq_command_aux(void *s, int port, uint8_t tag) "ahci(%p)[%d][tag:%d]: Warn: Attempt to use NCQ auxiliary fields" 1874process_ncq_command_prioicc(void *s, int port, uint8_t tag) "ahci(%p)[%d][tag:%d]: Warn: Unsupported attempt to use PRIO/ICC fields" 1875process_ncq_command_fua(void *s, int port, uint8_t tag) "ahci(%p)[%d][tag:%d]: Warn: Unsupported attempt to use Force Unit Access" 1876process_ncq_command_rarc(void *s, int port, uint8_t tag) "ahci(%p)[%d][tag:%d]: Warn: Unsupported attempt to use Rebuild Assist" 1877process_ncq_command_large(void *s, int port, uint8_t tag, size_t prdtl, size_t size) "ahci(%p)[%d][tag:%d]: Warn: PRDTL (0x%zx) does not match requested size (0x%zx)" 1878process_ncq_command(void *s, int port, uint8_t tag, uint8_t cmd, uint64_t lba, uint64_t end) "ahci(%p)[%d][tag:%d]: NCQ op 0x%02x on sectors [%"PRId64",%"PRId64"]" 1879handle_reg_h2d_fis_pmp(void *s, int port, char b0, char b1, char b2) "ahci(%p)[%d]: Port Multiplier not supported, FIS: 0x%02x-%02x-%02x" 1880handle_reg_h2d_fis_res(void *s, int port, char b0, char b1, char b2) "ahci(%p)[%d]: Reserved flags set in H2D Register FIS, FIS: 0x%02x-%02x-%02x" 1881handle_cmd_busy(void *s, int port) "ahci(%p)[%d]: engine busy" 1882handle_cmd_nolist(void *s, int port) "ahci(%p)[%d]: handle_cmd called without s->dev[port].lst" 1883handle_cmd_badport(void *s, int port) "ahci(%p)[%d]: guest accessed unused port" 1884handle_cmd_badfis(void *s, int port) "ahci(%p)[%d]: guest provided an invalid cmd FIS" 1885handle_cmd_badmap(void *s, int port, uint64_t len) "ahci(%p)[%d]: dma_memory_map failed, 0x%02"PRIx64" != 0x80" 1886handle_cmd_unhandled_fis(void *s, int port, uint8_t b0, uint8_t b1, uint8_t b2) "ahci(%p)[%d]: unhandled FIS type. cmd_fis: 0x%02x-%02x-%02x" 1887ahci_pio_transfer(void *s, int port, const char *rw, uint32_t size, const char *tgt, const char *sgl) "ahci(%p)[%d]: %sing %d bytes on %s w/%s sglist" 1888ahci_start_dma(void *s, int port) "ahci(%p)[%d]: start dma" 1889ahci_dma_prepare_buf(void *s, int port, int32_t io_buffer_size, int32_t limit) "ahci(%p)[%d]: prepare buf limit=%"PRId32" prepared=%"PRId32 1890ahci_dma_prepare_buf_fail(void *s, int port) "ahci(%p)[%d]: sglist population failed" 1891ahci_dma_rw_buf(void *s, int port, int l) "ahci(%p)[%d] len=0x%x" 1892ahci_cmd_done(void *s, int port) "ahci(%p)[%d]: cmd done" 1893ahci_reset(void *s) "ahci(%p): HBA reset" 1894 1895# Warning: Verbose 1896handle_reg_h2d_fis_dump(void *s, int port, const char *fis) "ahci(%p)[%d]: %s" 1897handle_cmd_fis_dump(void *s, int port, const char *fis) "ahci(%p)[%d]: %s" 1898 1899# ahci-allwinner.c 1900allwinner_ahci_mem_read(void *s, void *a, uint64_t addr, uint64_t val, unsigned size) "ahci(%p): read a=%p addr=0x%"PRIx64" val=0x%"PRIx64", size=%d" 1901allwinner_ahci_mem_write(void *s, void *a, uint64_t addr, uint64_t val, unsigned size) "ahci(%p): write a=%p addr=0x%"PRIx64" val=0x%"PRIx64", size=%d" 1902# See docs/devel/tracing.rst for syntax documentation. 1903 1904# adb-kbd.c 1905adb_device_kbd_no_key(void) "Ignoring NO_KEY" 1906adb_device_kbd_writereg(int reg, uint8_t val) "reg %d val 0x%2.2x" 1907adb_device_kbd_readreg(int reg, uint8_t val0, uint8_t val1) "reg %d obuf[0] 0x%2.2x obuf[1] 0x%2.2x" 1908adb_device_kbd_request_change_addr(int devaddr) "change addr to 0x%x" 1909adb_device_kbd_request_change_addr_and_handler(int devaddr, int handler) "change addr and handler to 0x%x, 0x%x" 1910 1911# adb-mouse.c 1912adb_device_mouse_flush(void) "flush" 1913adb_device_mouse_writereg(int reg, uint8_t val) "reg %d val 0x%2.2x" 1914adb_device_mouse_readreg(int reg, uint8_t val0, uint8_t val1) "reg %d obuf[0] 0x%2.2x obuf[1] 0x%2.2x" 1915adb_device_mouse_request_change_addr(int devaddr) "change addr to 0x%x" 1916adb_device_mouse_request_change_addr_and_handler(int devaddr, int handler) "change addr and handler to 0x%x, 0x%x" 1917 1918# adb.c 1919adb_bus_request(uint8_t addr, const char *cmd, int size) "device 0x%x %s cmdsize=%d" 1920adb_bus_request_done(uint8_t addr, const char *cmd, int size) "device 0x%x %s replysize=%d" 1921adb_bus_autopoll_block(bool blocked) "blocked: %d" 1922adb_bus_autopoll_cb(uint16_t mask) "executing autopoll_cb with autopoll mask 0x%x" 1923adb_bus_autopoll_cb_done(uint16_t mask) "done executing autopoll_cb with autopoll mask 0x%x" 1924 1925# pckbd.c 1926pckbd_kbd_read_data(uint32_t val) "0x%02x" 1927pckbd_kbd_read_status(int status) "0x%02x" 1928pckbd_outport_write(uint32_t val) "0x%02x" 1929pckbd_kbd_write_command(uint64_t val) "0x%02"PRIx64 1930pckbd_kbd_write_data(uint64_t val) "0x%02"PRIx64 1931 1932# ps2.c 1933ps2_put_keycode(void *opaque, int keycode) "%p keycode 0x%02x" 1934ps2_keyboard_event(void *opaque, int qcode, int down, unsigned int modifier, unsigned int modifiers, int set, int xlate) "%p qcode %d down %d modifier 0x%x modifiers 0x%x set %d xlate %d" 1935ps2_read_data(void *opaque) "%p" 1936ps2_set_ledstate(void *s, int ledstate) "%p ledstate %d" 1937ps2_reset_keyboard(void *s) "%p" 1938ps2_write_keyboard(void *opaque, int val) "%p val %d" 1939ps2_keyboard_set_translation(void *opaque, int mode) "%p mode %d" 1940ps2_mouse_send_packet(void *s, int dx1, int dy1, int dz1, int b) "%p x %d y %d z %d bs 0x%x" 1941ps2_mouse_fake_event(void *opaque) "%p" 1942ps2_write_mouse(void *opaque, int val) "%p val %d" 1943ps2_kbd_reset(void *opaque) "%p" 1944ps2_mouse_reset(void *opaque) "%p" 1945 1946# hid.c 1947hid_kbd_queue_full(void) "queue full" 1948hid_kbd_queue_empty(void) "queue empty" 1949 1950# tsc2005.c 1951tsc2005_sense(const char *state) "touchscreen sense %s" 1952 1953# virtio-input.c 1954virtio_input_queue_full(void) "queue full" 1955 1956# lasips2.c 1957lasips2_reg_read(unsigned int size, int id, uint64_t addr, const char *name, uint64_t val) "%u %d addr 0x%"PRIx64 "%s -> 0x%"PRIx64 1958lasips2_reg_write(unsigned int size, int id, uint64_t addr, const char *name, uint64_t val) "%u %d addr 0x%"PRIx64 "%s <- 0x%"PRIx64 1959lasips2_intr(unsigned int val) "%d" 1960# See docs/devel/tracing.rst for syntax documentation. 1961 1962# i8259.c 1963pic_update_irq(bool master, uint8_t imr, uint8_t irr, uint8_t padd) "master %d imr %"PRIu8" irr %"PRIu8" padd %"PRIu8 1964pic_set_irq(bool master, int irq, int level) "master %d irq %d level %d" 1965pic_interrupt(int irq, int intno) "irq %d intno %d" 1966pic_ioport_write(bool master, uint64_t addr, uint64_t val) "master %d addr 0x%"PRIx64" val 0x%"PRIx64 1967pic_ioport_read(bool master, uint64_t addr, int val) "master %d addr 0x%"PRIx64" val 0x%x" 1968 1969# apic_common.c 1970cpu_set_apic_base(uint64_t val) "0x%016"PRIx64 1971cpu_get_apic_base(uint64_t val) "0x%016"PRIx64 1972 1973# apic.c 1974apic_local_deliver(int vector, uint32_t lvt) "vector %d delivery mode %d" 1975apic_deliver_irq(uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode, uint8_t vector_num, uint8_t trigger_mode) "dest %d dest_mode %d delivery_mode %d vector %d trigger_mode %d" 1976apic_mem_readl(uint64_t addr, uint32_t val) "0x%"PRIx64" = 0x%08x" 1977apic_mem_writel(uint64_t addr, uint32_t val) "0x%"PRIx64" = 0x%08x" 1978 1979# ioapic.c 1980ioapic_set_remote_irr(int n) "set remote irr for pin %d" 1981ioapic_clear_remote_irr(int n, int vector) "clear remote irr for pin %d vector %d" 1982ioapic_eoi_broadcast(int vector) "EOI broadcast for vector %d" 1983ioapic_eoi_delayed_reassert(int vector) "delayed reassert on EOI broadcast for vector %d" 1984ioapic_mem_read(uint8_t addr, uint8_t regsel, uint8_t size, uint32_t val) "ioapic mem read addr 0x%"PRIx8" regsel: 0x%"PRIx8" size 0x%"PRIx8" retval 0x%"PRIx32 1985ioapic_mem_write(uint8_t addr, uint8_t regsel, uint8_t size, uint32_t val) "ioapic mem write addr 0x%"PRIx8" regsel: 0x%"PRIx8" size 0x%"PRIx8" val 0x%"PRIx32 1986ioapic_set_irq(int vector, int level) "vector: %d level: %d" 1987 1988# kvm_irqcount.c 1989kvm_report_irq_delivered(int irq_delivered) "coalescing %d" 1990kvm_reset_irq_delivered(int irq_delivered) "old coalescing %d" 1991kvm_get_irq_delivered(int irq_delivered) "returning coalescing %d" 1992 1993# slavio_intctl.c 1994slavio_intctl_mem_readl(uint32_t cpu, uint64_t addr, uint32_t ret) "read cpu %d reg 0x%"PRIx64" = 0x%x" 1995slavio_intctl_mem_writel(uint32_t cpu, uint64_t addr, uint32_t val) "write cpu %d reg 0x%"PRIx64" = 0x%x" 1996slavio_intctl_mem_writel_clear(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Cleared cpu %d irq mask 0x%x, curmask 0x%x" 1997slavio_intctl_mem_writel_set(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Set cpu %d irq mask 0x%x, curmask 0x%x" 1998slavio_intctlm_mem_readl(uint64_t addr, uint32_t ret) "read system reg 0x%"PRIx64" = 0x%x" 1999slavio_intctlm_mem_writel(uint64_t addr, uint32_t val) "write system reg 0x%"PRIx64" = 0x%x" 2000slavio_intctlm_mem_writel_enable(uint32_t val, uint32_t intregm_disabled) "Enabled master irq mask 0x%x, curmask 0x%x" 2001slavio_intctlm_mem_writel_disable(uint32_t val, uint32_t intregm_disabled) "Disabled master irq mask 0x%x, curmask 0x%x" 2002slavio_intctlm_mem_writel_target(uint32_t cpu) "Set master irq cpu %d" 2003slavio_check_interrupts(uint32_t pending, uint32_t intregm_disabled) "pending 0x%x disabled 0x%x" 2004slavio_set_irq(uint32_t target_cpu, int irq, uint32_t pil, int level) "Set cpu %d irq %d -> pil %d level %d" 2005slavio_set_timer_irq_cpu(int cpu, int level) "Set cpu %d local timer level %d" 2006 2007# grlib_irqmp.c 2008grlib_irqmp_check_irqs(uint32_t pend, uint32_t force, uint32_t mask, uint32_t lvl1, uint32_t lvl2) "pend:0x%04x force:0x%04x mask:0x%04x lvl1:0x%04x lvl0:0x%04x" 2009grlib_irqmp_ack(int intno) "interrupt:%d" 2010grlib_irqmp_set_irq(int irq) "Raise CPU IRQ %d" 2011grlib_irqmp_readl_unknown(uint64_t addr) "addr 0x%"PRIx64 2012grlib_irqmp_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x" 2013 2014# xics.c 2015xics_icp_check_ipi(int server, uint8_t mfrr) "CPU %d can take IPI mfrr=0x%x" 2016xics_icp_accept(uint32_t old_xirr, uint32_t new_xirr) "icp_accept: XIRR 0x%"PRIx32"->0x%"PRIx32 2017xics_icp_eoi(int server, uint32_t xirr, uint32_t new_xirr) "icp_eoi: server %d given XIRR 0x%"PRIx32" new XIRR 0x%"PRIx32 2018xics_icp_irq(int server, int nr, uint8_t priority) "cpu %d trying to deliver irq 0x%"PRIx32" priority 0x%x" 2019xics_icp_raise(uint32_t xirr, uint8_t pending_priority) "raising IRQ new XIRR=0x%x new pending priority=0x%x" 2020xics_ics_set_irq_msi(int srcno, int nr) "set_irq_msi: srcno %d [irq 0x%x]" 2021xics_masked_pending(void) "set_irq_msi: masked pending" 2022xics_ics_set_irq_lsi(int srcno, int nr) "set_irq_lsi: srcno %d [irq 0x%x]" 2023xics_ics_write_xive(int nr, int srcno, int server, uint8_t priority) "ics_write_xive: irq 0x%x [src %d] server 0x%x prio 0x%x" 2024xics_ics_reject(int nr, int srcno) "reject irq 0x%x [src %d]" 2025xics_ics_eoi(int nr) "ics_eoi: irq 0x%x" 2026 2027# s390_flic_kvm.c 2028flic_create_device(int err) "flic: create device failed %d" 2029flic_reset_failed(int err) "flic: reset failed %d" 2030 2031# s390_flic.c 2032qemu_s390_airq_suppressed(uint8_t type, uint8_t isc) "flic: adapter I/O interrupt suppressed (type 0x%x isc 0x%x)" 2033qemu_s390_suppress_airq(uint8_t isc, const char *from, const char *to) "flic: for isc 0x%x, suppress airq by modifying ais mode from %s to %s" 2034 2035# aspeed_vic.c 2036aspeed_vic_set_irq(int irq, int level) "Enabling IRQ %d: %d" 2037aspeed_vic_update_fiq(int flags) "Raising FIQ: %d" 2038aspeed_vic_update_irq(int flags) "Raising IRQ: %d" 2039aspeed_vic_read(uint64_t offset, unsigned size, uint32_t value) "From 0x%" PRIx64 " of size %u: 0x%" PRIx32 2040aspeed_vic_write(uint64_t offset, unsigned size, uint32_t data) "To 0x%" PRIx64 " of size %u: 0x%" PRIx32 2041 2042# arm_gic.c 2043gic_enable_irq(int irq) "irq %d enabled" 2044gic_disable_irq(int irq) "irq %d disabled" 2045gic_set_irq(int irq, int level, int cpumask, int target) "irq %d level %d cpumask 0x%x target 0x%x" 2046gic_update_bestirq(const char *s, int cpu, int irq, int prio, int priority_mask, int running_priority) "%s %d irq %d priority %d cpu priority mask %d cpu running priority %d" 2047gic_update_set_irq(int cpu, const char *name, int level) "cpu[%d]: %s = %d" 2048gic_acknowledge_irq(const char *s, int cpu, int irq) "%s %d acknowledged irq %d" 2049gic_cpu_write(const char *s, int cpu, int addr, uint32_t val) "%s %d iface write at 0x%08x 0x%08" PRIx32 2050gic_cpu_read(const char *s, int cpu, int addr, uint32_t val) "%s %d iface read at 0x%08x: 0x%08" PRIx32 2051gic_hyp_read(int addr, uint32_t val) "hyp read at 0x%08x: 0x%08" PRIx32 2052gic_hyp_write(int addr, uint32_t val) "hyp write at 0x%08x: 0x%08" PRIx32 2053gic_dist_read(int addr, unsigned int size, uint32_t val) "dist read at 0x%08x size %u: 0x%08" PRIx32 2054gic_dist_write(int addr, unsigned int size, uint32_t val) "dist write at 0x%08x size %u: 0x%08" PRIx32 2055gic_lr_entry(int cpu, int entry, uint32_t val) "cpu %d: new lr entry %d: 0x%08" PRIx32 2056gic_update_maintenance_irq(int cpu, int val) "cpu %d: maintenance = %d" 2057 2058# arm_gicv3_cpuif.c 2059gicv3_icc_pmr_read(uint32_t cpu, uint64_t val) "GICv3 ICC_PMR read cpu 0x%x value 0x%" PRIx64 2060gicv3_icc_pmr_write(uint32_t cpu, uint64_t val) "GICv3 ICC_PMR write cpu 0x%x value 0x%" PRIx64 2061gicv3_icc_bpr_read(int grp, uint32_t cpu, uint64_t val) "GICv3 ICC_BPR%d read cpu 0x%x value 0x%" PRIx64 2062gicv3_icc_bpr_write(int grp, uint32_t cpu, uint64_t val) "GICv3 ICC_BPR%d write cpu 0x%x value 0x%" PRIx64 2063gicv3_icc_ap_read(int grp, int regno, uint32_t cpu, uint64_t val) "GICv3 ICC_AP%dR%d read cpu 0x%x value 0x%" PRIx64 2064gicv3_icc_ap_write(int grp, int regno, uint32_t cpu, uint64_t val) "GICv3 ICC_AP%dR%d write cpu 0x%x value 0x%" PRIx64 2065gicv3_icc_igrpen_read(int grp, uint32_t cpu, uint64_t val) "GICv3 ICC_IGRPEN%d read cpu 0x%x value 0x%" PRIx64 2066gicv3_icc_igrpen_write(int grp, uint32_t cpu, uint64_t val) "GICv3 ICC_IGRPEN%d write cpu 0x%x value 0x%" PRIx64 2067gicv3_icc_igrpen1_el3_read(uint32_t cpu, uint64_t val) "GICv3 ICC_IGRPEN1_EL3 read cpu 0x%x value 0x%" PRIx64 2068gicv3_icc_igrpen1_el3_write(uint32_t cpu, uint64_t val) "GICv3 ICC_IGRPEN1_EL3 write cpu 0x%x value 0x%" PRIx64 2069gicv3_icc_ctlr_read(uint32_t cpu, uint64_t val) "GICv3 ICC_CTLR read cpu 0x%x value 0x%" PRIx64 2070gicv3_icc_ctlr_write(uint32_t cpu, uint64_t val) "GICv3 ICC_CTLR write cpu 0x%x value 0x%" PRIx64 2071gicv3_icc_ctlr_el3_read(uint32_t cpu, uint64_t val) "GICv3 ICC_CTLR_EL3 read cpu 0x%x value 0x%" PRIx64 2072gicv3_icc_ctlr_el3_write(uint32_t cpu, uint64_t val) "GICv3 ICC_CTLR_EL3 write cpu 0x%x value 0x%" PRIx64 2073gicv3_cpuif_update(uint32_t cpuid, int irq, int grp, int prio) "GICv3 CPU i/f 0x%x HPPI update: irq %d group %d prio %d" 2074gicv3_cpuif_set_irqs(uint32_t cpuid, int fiqlevel, int irqlevel) "GICv3 CPU i/f 0x%x HPPI update: setting FIQ %d IRQ %d" 2075gicv3_icc_generate_sgi(uint32_t cpuid, int irq, int irm, uint32_t aff, uint32_t targetlist) "GICv3 CPU i/f 0x%x generating SGI %d IRM %d target affinity 0x%xxx targetlist 0x%x" 2076gicv3_icc_iar0_read(uint32_t cpu, uint64_t val) "GICv3 ICC_IAR0 read cpu 0x%x value 0x%" PRIx64 2077gicv3_icc_iar1_read(uint32_t cpu, uint64_t val) "GICv3 ICC_IAR1 read cpu 0x%x value 0x%" PRIx64 2078gicv3_icc_eoir_write(int grp, uint32_t cpu, uint64_t val) "GICv3 ICC_EOIR%d write cpu 0x%x value 0x%" PRIx64 2079gicv3_icc_hppir0_read(uint32_t cpu, uint64_t val) "GICv3 ICC_HPPIR0 read cpu 0x%x value 0x%" PRIx64 2080gicv3_icc_hppir1_read(uint32_t cpu, uint64_t val) "GICv3 ICC_HPPIR1 read cpu 0x%x value 0x%" PRIx64 2081gicv3_icc_dir_write(uint32_t cpu, uint64_t val) "GICv3 ICC_DIR write cpu 0x%x value 0x%" PRIx64 2082gicv3_icc_rpr_read(uint32_t cpu, uint64_t val) "GICv3 ICC_RPR read cpu 0x%x value 0x%" PRIx64 2083gicv3_ich_ap_read(int grp, int regno, uint32_t cpu, uint64_t val) "GICv3 ICH_AP%dR%d read cpu 0x%x value 0x%" PRIx64 2084gicv3_ich_ap_write(int grp, int regno, uint32_t cpu, uint64_t val) "GICv3 ICH_AP%dR%d write cpu 0x%x value 0x%" PRIx64 2085gicv3_ich_hcr_read(uint32_t cpu, uint64_t val) "GICv3 ICH_HCR_EL2 read cpu 0x%x value 0x%" PRIx64 2086gicv3_ich_hcr_write(uint32_t cpu, uint64_t val) "GICv3 ICH_HCR_EL2 write cpu 0x%x value 0x%" PRIx64 2087gicv3_ich_vmcr_read(uint32_t cpu, uint64_t val) "GICv3 ICH_VMCR_EL2 read cpu 0x%x value 0x%" PRIx64 2088gicv3_ich_vmcr_write(uint32_t cpu, uint64_t val) "GICv3 ICH_VMCR_EL2 write cpu 0x%x value 0x%" PRIx64 2089gicv3_ich_lr_read(int regno, uint32_t cpu, uint64_t val) "GICv3 ICH_LR%d_EL2 read cpu 0x%x value 0x%" PRIx64 2090gicv3_ich_lr32_read(int regno, uint32_t cpu, uint32_t val) "GICv3 ICH_LR%d read cpu 0x%x value 0x%" PRIx32 2091gicv3_ich_lrc_read(int regno, uint32_t cpu, uint32_t val) "GICv3 ICH_LRC%d read cpu 0x%x value 0x%" PRIx32 2092gicv3_ich_lr_write(int regno, uint32_t cpu, uint64_t val) "GICv3 ICH_LR%d_EL2 write cpu 0x%x value 0x%" PRIx64 2093gicv3_ich_lr32_write(int regno, uint32_t cpu, uint32_t val) "GICv3 ICH_LR%d write cpu 0x%x value 0x%" PRIx32 2094gicv3_ich_lrc_write(int regno, uint32_t cpu, uint32_t val) "GICv3 ICH_LRC%d write cpu 0x%x value 0x%" PRIx32 2095gicv3_ich_vtr_read(uint32_t cpu, uint64_t val) "GICv3 ICH_VTR read cpu 0x%x value 0x%" PRIx64 2096gicv3_ich_misr_read(uint32_t cpu, uint64_t val) "GICv3 ICH_MISR read cpu 0x%x value 0x%" PRIx64 2097gicv3_ich_eisr_read(uint32_t cpu, uint64_t val) "GICv3 ICH_EISR read cpu 0x%x value 0x%" PRIx64 2098gicv3_ich_elrsr_read(uint32_t cpu, uint64_t val) "GICv3 ICH_ELRSR read cpu 0x%x value 0x%" PRIx64 2099gicv3_icv_ap_read(int grp, int regno, uint32_t cpu, uint64_t val) "GICv3 ICV_AP%dR%d read cpu 0x%x value 0x%" PRIx64 2100gicv3_icv_ap_write(int grp, int regno, uint32_t cpu, uint64_t val) "GICv3 ICV_AP%dR%d write cpu 0x%x value 0x%" PRIx64 2101gicv3_icv_bpr_read(int grp, uint32_t cpu, uint64_t val) "GICv3 ICV_BPR%d read cpu 0x%x value 0x%" PRIx64 2102gicv3_icv_bpr_write(int grp, uint32_t cpu, uint64_t val) "GICv3 ICV_BPR%d write cpu 0x%x value 0x%" PRIx64 2103gicv3_icv_pmr_read(uint32_t cpu, uint64_t val) "GICv3 ICV_PMR read cpu 0x%x value 0x%" PRIx64 2104gicv3_icv_pmr_write(uint32_t cpu, uint64_t val) "GICv3 ICV_PMR write cpu 0x%x value 0x%" PRIx64 2105gicv3_icv_igrpen_read(int grp, uint32_t cpu, uint64_t val) "GICv3 ICV_IGRPEN%d read cpu 0x%x value 0x%" PRIx64 2106gicv3_icv_igrpen_write(int grp, uint32_t cpu, uint64_t val) "GICv3 ICV_IGRPEN%d write cpu 0x%x value 0x%" PRIx64 2107gicv3_icv_ctlr_read(uint32_t cpu, uint64_t val) "GICv3 ICV_CTLR read cpu 0x%x value 0x%" PRIx64 2108gicv3_icv_ctlr_write(uint32_t cpu, uint64_t val) "GICv3 ICV_CTLR write cpu 0x%x value 0x%" PRIx64 2109gicv3_icv_rpr_read(uint32_t cpu, uint64_t val) "GICv3 ICV_RPR read cpu 0x%x value 0x%" PRIx64 2110gicv3_icv_hppir_read(int grp, uint32_t cpu, uint64_t val) "GICv3 ICV_HPPIR%d read cpu 0x%x value 0x%" PRIx64 2111gicv3_icv_dir_write(uint32_t cpu, uint64_t val) "GICv3 ICV_DIR write cpu 0x%x value 0x%" PRIx64 2112gicv3_icv_iar_read(int grp, uint32_t cpu, uint64_t val) "GICv3 ICV_IAR%d read cpu 0x%x value 0x%" PRIx64 2113gicv3_icv_eoir_write(int grp, uint32_t cpu, uint64_t val) "GICv3 ICV_EOIR%d write cpu 0x%x value 0x%" PRIx64 2114gicv3_cpuif_virt_update(uint32_t cpuid, int idx, int hppvlpi, int grp, int prio) "GICv3 CPU i/f 0x%x virt HPPI update LR index %d HPPVLPI %d grp %d prio %d" 2115gicv3_cpuif_virt_set_irqs(uint32_t cpuid, int fiqlevel, int irqlevel) "GICv3 CPU i/f 0x%x virt HPPI update: setting FIQ %d IRQ %d" 2116gicv3_cpuif_virt_set_maint_irq(uint32_t cpuid, int maintlevel) "GICv3 CPU i/f 0x%x virt HPPI update: setting maintenance-irq %d" 2117 2118# arm_gicv3_dist.c 2119gicv3_dist_read(uint64_t offset, uint64_t data, unsigned size, bool secure) "GICv3 distributor read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u secure %d" 2120gicv3_dist_badread(uint64_t offset, unsigned size, bool secure) "GICv3 distributor read: offset 0x%" PRIx64 " size %u secure %d: error" 2121gicv3_dist_write(uint64_t offset, uint64_t data, unsigned size, bool secure) "GICv3 distributor write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u secure %d" 2122gicv3_dist_badwrite(uint64_t offset, uint64_t data, unsigned size, bool secure) "GICv3 distributor write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u secure %d: error" 2123gicv3_dist_set_irq(int irq, int level) "GICv3 distributor interrupt %d level changed to %d" 2124 2125# arm_gicv3_redist.c 2126gicv3_redist_read(uint32_t cpu, uint64_t offset, uint64_t data, unsigned size, bool secure) "GICv3 redistributor 0x%x read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u secure %d" 2127gicv3_redist_badread(uint32_t cpu, uint64_t offset, unsigned size, bool secure) "GICv3 redistributor 0x%x read: offset 0x%" PRIx64 " size %u secure %d: error" 2128gicv3_redist_write(uint32_t cpu, uint64_t offset, uint64_t data, unsigned size, bool secure) "GICv3 redistributor 0x%x write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u secure %d" 2129gicv3_redist_badwrite(uint32_t cpu, uint64_t offset, uint64_t data, unsigned size, bool secure) "GICv3 redistributor 0x%x write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u secure %d: error" 2130gicv3_redist_set_irq(uint32_t cpu, int irq, int level) "GICv3 redistributor 0x%x interrupt %d level changed to %d" 2131gicv3_redist_send_sgi(uint32_t cpu, int irq) "GICv3 redistributor 0x%x pending SGI %d" 2132 2133# arm_gicv3_its.c 2134gicv3_its_read(uint64_t offset, uint64_t data, unsigned size) "GICv3 ITS read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" 2135gicv3_its_badread(uint64_t offset, unsigned size) "GICv3 ITS read: offset 0x%" PRIx64 " size %u: error" 2136gicv3_its_write(uint64_t offset, uint64_t data, unsigned size) "GICv3 ITS write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" 2137gicv3_its_badwrite(uint64_t offset, uint64_t data, unsigned size) "GICv3 ITS write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u: error" 2138gicv3_its_translation_write(uint64_t offset, uint64_t data, unsigned size, uint32_t requester_id) "GICv3 ITS TRANSLATER write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u requester_id 0x%x" 2139gicv3_its_process_command(uint32_t rd_offset, uint8_t cmd) "GICv3 ITS: processing command at offset 0x%x: 0x%x" 2140gicv3_its_cmd_int(uint32_t devid, uint32_t eventid) "GICv3 ITS: command INT DeviceID 0x%x EventID 0x%x" 2141gicv3_its_cmd_clear(uint32_t devid, uint32_t eventid) "GICv3 ITS: command CLEAR DeviceID 0x%x EventID 0x%x" 2142gicv3_its_cmd_discard(uint32_t devid, uint32_t eventid) "GICv3 ITS: command DISCARD DeviceID 0x%x EventID 0x%x" 2143gicv3_its_cmd_sync(void) "GICv3 ITS: command SYNC" 2144gicv3_its_cmd_mapd(uint32_t devid, uint32_t size, uint64_t ittaddr, int valid) "GICv3 ITS: command MAPD DeviceID 0x%x Size 0x%x ITT_addr 0x%" PRIx64 " V %d" 2145gicv3_its_cmd_mapc(uint32_t icid, uint64_t rdbase, int valid) "GICv3 ITS: command MAPC ICID 0x%x RDbase 0x%" PRIx64 " V %d" 2146gicv3_its_cmd_mapi(uint32_t devid, uint32_t eventid, uint32_t icid) "GICv3 ITS: command MAPI DeviceID 0x%x EventID 0x%x ICID 0x%x" 2147gicv3_its_cmd_mapti(uint32_t devid, uint32_t eventid, uint32_t icid, uint32_t intid) "GICv3 ITS: command MAPTI DeviceID 0x%x EventID 0x%x ICID 0x%x pINTID 0x%x" 2148gicv3_its_cmd_inv(uint32_t devid, uint32_t eventid) "GICv3 ITS: command INV DeviceID 0x%x EventID 0x%x" 2149gicv3_its_cmd_invall(void) "GICv3 ITS: command INVALL" 2150gicv3_its_cmd_movall(uint64_t rd1, uint64_t rd2) "GICv3 ITS: command MOVALL RDbase1 0x%" PRIx64 " RDbase2 0x%" PRIx64 2151gicv3_its_cmd_movi(uint32_t devid, uint32_t eventid, uint32_t icid) "GICv3 ITS: command MOVI DeviceID 0x%x EventID 0x%x ICID 0x%x" 2152gicv3_its_cmd_vmapi(uint32_t devid, uint32_t eventid, uint32_t vpeid, uint32_t doorbell) "GICv3 ITS: command VMAPI DeviceID 0x%x EventID 0x%x vPEID 0x%x Dbell_pINTID 0x%x" 2153gicv3_its_cmd_vmapti(uint32_t devid, uint32_t eventid, uint32_t vpeid, uint32_t vintid, uint32_t doorbell) "GICv3 ITS: command VMAPI DeviceID 0x%x EventID 0x%x vPEID 0x%x vINTID 0x%x Dbell_pINTID 0x%x" 2154gicv3_its_cmd_vmapp(uint32_t vpeid, uint64_t rdbase, int valid, uint64_t vptaddr, uint32_t vptsize) "GICv3 ITS: command VMAPP vPEID 0x%x RDbase 0x%" PRIx64 " V %d VPT_addr 0x%" PRIx64 " VPT_size 0x%x" 2155gicv3_its_cmd_vmovp(uint32_t vpeid, uint64_t rdbase) "GICv3 ITS: command VMOVP vPEID 0x%x RDbase 0x%" PRIx64 2156gicv3_its_cmd_vsync(void) "GICv3 ITS: command VSYNC" 2157gicv3_its_cmd_vmovi(uint32_t devid, uint32_t eventid, uint32_t vpeid, int dbvalid, uint32_t doorbell) "GICv3 ITS: command VMOVI DeviceID 0x%x EventID 0x%x vPEID 0x%x D %d Dbell_pINTID 0x%x" 2158gicv3_its_cmd_vinvall(uint32_t vpeid) "GICv3 ITS: command VINVALL vPEID 0x%x" 2159gicv3_its_cmd_unknown(unsigned cmd) "GICv3 ITS: unknown command 0x%x" 2160gicv3_its_cte_read(uint32_t icid, int valid, uint32_t rdbase) "GICv3 ITS: Collection Table read for ICID 0x%x: valid %d RDBase 0x%x" 2161gicv3_its_cte_write(uint32_t icid, int valid, uint32_t rdbase) "GICv3 ITS: Collection Table write for ICID 0x%x: valid %d RDBase 0x%x" 2162gicv3_its_cte_read_fault(uint32_t icid) "GICv3 ITS: Collection Table read for ICID 0x%x: faulted" 2163gicv3_its_ite_read(uint64_t ittaddr, uint32_t eventid, int valid, int inttype, uint32_t intid, uint32_t icid, uint32_t vpeid, uint32_t doorbell) "GICv3 ITS: Interrupt Table read for ITTaddr 0x%" PRIx64 " EventID 0x%x: valid %d inttype %d intid 0x%x ICID 0x%x vPEID 0x%x doorbell 0x%x" 2164gicv3_its_ite_read_fault(uint64_t ittaddr, uint32_t eventid) "GICv3 ITS: Interrupt Table read for ITTaddr 0x%" PRIx64 " EventID 0x%x: faulted" 2165gicv3_its_ite_write(uint64_t ittaddr, uint32_t eventid, int valid, int inttype, uint32_t intid, uint32_t icid, uint32_t vpeid, uint32_t doorbell) "GICv3 ITS: Interrupt Table write for ITTaddr 0x%" PRIx64 " EventID 0x%x: valid %d inttype %d intid 0x%x ICID 0x%x vPEID 0x%x doorbell 0x%x" 2166gicv3_its_dte_read(uint32_t devid, int valid, uint32_t size, uint64_t ittaddr) "GICv3 ITS: Device Table read for DeviceID 0x%x: valid %d size 0x%x ITTaddr 0x%" PRIx64 2167gicv3_its_dte_write(uint32_t devid, int valid, uint32_t size, uint64_t ittaddr) "GICv3 ITS: Device Table write for DeviceID 0x%x: valid %d size 0x%x ITTaddr 0x%" PRIx64 2168gicv3_its_dte_read_fault(uint32_t devid) "GICv3 ITS: Device Table read for DeviceID 0x%x: faulted" 2169gicv3_its_vte_read(uint32_t vpeid, int valid, uint32_t vptsize, uint64_t vptaddr, uint32_t rdbase) "GICv3 ITS: vPE Table read for vPEID 0x%x: valid %d VPTsize 0x%x VPTaddr 0x%" PRIx64 " RDbase 0x%x" 2170gicv3_its_vte_read_fault(uint32_t vpeid) "GICv3 ITS: vPE Table read for vPEID 0x%x: faulted" 2171gicv3_its_vte_write(uint32_t vpeid, int valid, uint32_t vptsize, uint64_t vptaddr, uint32_t rdbase) "GICv3 ITS: vPE Table write for vPEID 0x%x: valid %d VPTsize 0x%x VPTaddr 0x%" PRIx64 " RDbase 0x%x" 2172 2173# armv7m_nvic.c 2174nvic_recompute_state(int vectpending, int vectpending_prio, int exception_prio) "NVIC state recomputed: vectpending %d vectpending_prio %d exception_prio %d" 2175nvic_recompute_state_secure(int vectpending, bool vectpending_is_s_banked, int vectpending_prio, int exception_prio) "NVIC state recomputed: vectpending %d is_s_banked %d vectpending_prio %d exception_prio %d" 2176nvic_set_prio(int irq, bool secure, uint8_t prio) "NVIC set irq %d secure-bank %d priority %d" 2177nvic_irq_update(int vectpending, int pendprio, int exception_prio, int level) "NVIC vectpending %d pending prio %d exception_prio %d: setting irq line to %d" 2178nvic_escalate_prio(int irq, int irqprio, int runprio) "NVIC escalating irq %d to HardFault: insufficient priority %d >= %d" 2179nvic_escalate_disabled(int irq) "NVIC escalating irq %d to HardFault: disabled" 2180nvic_set_pending(int irq, bool secure, bool targets_secure, bool derived, int en, int prio) "NVIC set pending irq %d secure-bank %d targets_secure %d derived %d (enabled: %d priority %d)" 2181nvic_clear_pending(int irq, bool secure, int en, int prio) "NVIC clear pending irq %d secure-bank %d (enabled: %d priority %d)" 2182nvic_acknowledge_irq(int irq, int prio) "NVIC acknowledge IRQ: %d now active (prio %d)" 2183nvic_get_pending_irq_info(int irq, bool secure) "NVIC next IRQ %d: targets_secure: %d" 2184nvic_complete_irq(int irq, bool secure) "NVIC complete IRQ %d (secure %d)" 2185nvic_set_irq_level(int irq, int level) "NVIC external irq %d level set to %d" 2186nvic_set_nmi_level(int level) "NVIC external NMI level set to %d" 2187nvic_sysreg_read(uint64_t addr, uint32_t value, unsigned size) "NVIC sysreg read addr 0x%" PRIx64 " data 0x%" PRIx32 " size %u" 2188nvic_sysreg_write(uint64_t addr, uint32_t value, unsigned size) "NVIC sysreg write addr 0x%" PRIx64 " data 0x%" PRIx32 " size %u" 2189 2190# heathrow_pic.c 2191heathrow_write(uint64_t addr, unsigned int n, uint64_t value) "0x%"PRIx64" %u: 0x%"PRIx64 2192heathrow_read(uint64_t addr, unsigned int n, uint64_t value) "0x%"PRIx64" %u: 0x%"PRIx64 2193heathrow_set_irq(int num, int level) "set_irq: num=0x%02x level=%d" 2194 2195# bcm2835_ic.c 2196bcm2835_ic_set_gpu_irq(int irq, int level) "GPU irq #%d level %d" 2197bcm2835_ic_set_cpu_irq(int irq, int level) "CPU irq #%d level %d" 2198 2199# spapr_xive.c 2200spapr_xive_claim_irq(uint32_t lisn, bool lsi) "lisn=0x%x lsi=%d" 2201spapr_xive_free_irq(uint32_t lisn) "lisn=0x%x" 2202spapr_xive_set_irq(uint32_t lisn, uint32_t val) "lisn=0x%x val=%d" 2203spapr_xive_get_source_info(uint64_t flags, uint64_t lisn) "flags=0x%"PRIx64" lisn=0x%"PRIx64 2204spapr_xive_set_source_config(uint64_t flags, uint64_t lisn, uint64_t target, uint64_t priority, uint64_t eisn) "flags=0x%"PRIx64" lisn=0x%"PRIx64" target=0x%"PRIx64" priority=0x%"PRIx64" eisn=0x%"PRIx64 2205spapr_xive_get_source_config(uint64_t flags, uint64_t lisn) "flags=0x%"PRIx64" lisn=0x%"PRIx64 2206spapr_xive_get_queue_info(uint64_t flags, uint64_t target, uint64_t priority) "flags=0x%"PRIx64" target=0x%"PRIx64" priority=0x%"PRIx64 2207spapr_xive_set_queue_config(uint64_t flags, uint64_t target, uint64_t priority, uint64_t qpage, uint64_t qsize) "flags=0x%"PRIx64" target=0x%"PRIx64" priority=0x%"PRIx64" qpage=0x%"PRIx64" qsize=0x%"PRIx64 2208spapr_xive_get_queue_config(uint64_t flags, uint64_t target, uint64_t priority) "flags=0x%"PRIx64" target=0x%"PRIx64" priority=0x%"PRIx64 2209spapr_xive_set_os_reporting_line(uint64_t flags) "flags=0x%"PRIx64 2210spapr_xive_get_os_reporting_line(uint64_t flags) "flags=0x%"PRIx64 2211spapr_xive_esb(uint64_t flags, uint64_t lisn, uint64_t offset, uint64_t data) "flags=0x%"PRIx64" lisn=0x%"PRIx64" offset=0x%"PRIx64" data=0x%"PRIx64 2212spapr_xive_sync(uint64_t flags, uint64_t lisn) "flags=0x%"PRIx64" lisn=0x%"PRIx64 2213spapr_xive_reset(uint64_t flags) "flags=0x%"PRIx64 2214 2215# spapr_xive_kvm.c 2216kvm_xive_cpu_connect(uint32_t id) "connect CPU%d to KVM device" 2217kvm_xive_source_reset(uint32_t srcno) "IRQ 0x%x" 2218 2219# xive.c 2220xive_tctx_accept(uint32_t index, uint8_t ring, uint8_t ipb, uint8_t pipr, uint8_t cppr, uint8_t nsr) "target=%d ring=0x%x IBP=0x%02x PIPR=0x%02x CPPR=0x%02x NSR=0x%02x ACK" 2221xive_tctx_notify(uint32_t index, uint8_t ring, uint8_t ipb, uint8_t pipr, uint8_t cppr, uint8_t nsr) "target=%d ring=0x%x IBP=0x%02x PIPR=0x%02x CPPR=0x%02x NSR=0x%02x raise !" 2222xive_tctx_set_cppr(uint32_t index, uint8_t ring, uint8_t ipb, uint8_t pipr, uint8_t cppr, uint8_t nsr) "target=%d ring=0x%x IBP=0x%02x PIPR=0x%02x new CPPR=0x%02x NSR=0x%02x" 2223xive_source_esb_read(uint64_t addr, uint32_t srcno, uint64_t value) "@0x%"PRIx64" IRQ 0x%x val=0x%"PRIx64 2224xive_source_esb_write(uint64_t addr, uint32_t srcno, uint64_t value) "@0x%"PRIx64" IRQ 0x%x val=0x%"PRIx64 2225xive_router_end_notify(uint8_t end_blk, uint32_t end_idx, uint32_t end_data) "END 0x%02x/0x%04x -> enqueue 0x%08x" 2226xive_router_end_escalate(uint8_t end_blk, uint32_t end_idx, uint8_t esc_blk, uint32_t esc_idx, uint32_t end_data) "END 0x%02x/0x%04x -> escalate END 0x%02x/0x%04x data 0x%08x" 2227xive_tctx_tm_write(uint32_t index, uint64_t offset, unsigned int size, uint64_t value) "target=%d @0x%"PRIx64" sz=%d val=0x%" PRIx64 2228xive_tctx_tm_read(uint32_t index, uint64_t offset, unsigned int size, uint64_t value) "target=%d @0x%"PRIx64" sz=%d val=0x%" PRIx64 2229xive_presenter_notify(uint8_t nvt_blk, uint32_t nvt_idx, uint8_t ring) "found NVT 0x%x/0x%x ring=0x%x" 2230xive_end_source_read(uint8_t end_blk, uint32_t end_idx, uint64_t addr) "END 0x%x/0x%x @0x%"PRIx64 2231 2232# pnv_xive.c 2233pnv_xive_ic_hw_trigger(uint64_t addr, uint64_t val) "@0x%"PRIx64" val=0x%"PRIx64 2234 2235# goldfish_pic.c 2236goldfish_irq_request(void *dev, int idx, int irq, int level) "pic: %p goldfish-irq.%d irq: %d level: %d" 2237goldfish_pic_read(void *dev, int idx, unsigned int addr, unsigned int size, uint64_t value) "pic: %p goldfish-irq.%d reg: 0x%02x size: %d value: 0x%"PRIx64 2238goldfish_pic_write(void *dev, int idx, unsigned int addr, unsigned int size, uint64_t value) "pic: %p goldfish-irq.%d reg: 0x%02x size: %d value: 0x%"PRIx64 2239goldfish_pic_reset(void *dev, int idx) "pic: %p goldfish-irq.%d" 2240goldfish_pic_realize(void *dev, int idx) "pic: %p goldfish-irq.%d" 2241goldfish_pic_instance_init(void *dev) "pic: %p goldfish-irq" 2242 2243# sh_intc.c 2244sh_intc_sources(int p, int a, int c, int m, unsigned short v, const char *s1, const char *s2, const char *s3) "(%d/%d/%d/%d) interrupt source 0x%x %s%s%s" 2245sh_intc_pending(int p, unsigned short v) "(%d) returning interrupt source 0x%x" 2246sh_intc_register(const char *s, int id, unsigned short v, int c, int m) "%s %u -> 0x%04x (%d/%d)" 2247sh_intc_read(unsigned size, uint64_t offset, unsigned long val) "size %u 0x%" PRIx64 " -> 0x%lx" 2248sh_intc_write(unsigned size, uint64_t offset, unsigned long val) "size %u 0x%" PRIx64 " <- 0x%lx" 2249sh_intc_set(int id, int enable) "setting interrupt group %d to %d" 2250 2251# loongarch_ipi.c 2252loongarch_ipi_read(unsigned size, uint64_t addr, uint64_t val) "size: %u addr: 0x%"PRIx64 "val: 0x%"PRIx64 2253loongarch_ipi_write(unsigned size, uint64_t addr, uint64_t val) "size: %u addr: 0x%"PRIx64 "val: 0x%"PRIx64 2254loongarch_ipi_unsupported_cpuid(const char *s, uint32_t cpuid) "%s unsupported cpuid 0x%" PRIx32 2255 2256# loongarch_pch_pic.c 2257loongarch_pch_pic_irq_handler(int irq, int level) "irq %d level %d" 2258loongarch_pch_pic_low_readw(unsigned size, uint64_t addr, uint64_t val) "size: %u addr: 0x%"PRIx64 "val: 0x%" PRIx64 2259loongarch_pch_pic_low_writew(unsigned size, uint64_t addr, uint64_t val) "size: %u addr: 0x%"PRIx64 "val: 0x%" PRIx64 2260loongarch_pch_pic_high_readw(unsigned size, uint64_t addr, uint64_t val) "size: %u addr: 0x%"PRIx64 "val: 0x%" PRIx64 2261loongarch_pch_pic_high_writew(unsigned size, uint64_t addr, uint64_t val) "size: %u addr: 0x%"PRIx64 "val: 0x%" PRIx64 2262loongarch_pch_pic_readb(unsigned size, uint64_t addr, uint64_t val) "size: %u addr: 0x%"PRIx64 "val: 0x%" PRIx64 2263loongarch_pch_pic_writeb(unsigned size, uint64_t addr, uint64_t val) "size: %u addr: 0x%"PRIx64 "val: 0x%" PRIx64 2264 2265# loongarch_pch_msi.c 2266loongarch_msi_set_irq(int irq_num) "set msi irq %d" 2267 2268# loongarch_extioi.c 2269loongarch_extioi_setirq(int irq, int level) "set extirq irq %d level %d" 2270loongarch_extioi_readw(uint64_t addr, uint64_t val) "addr: 0x%"PRIx64 "val: 0x%" PRIx64 2271loongarch_extioi_writew(uint64_t addr, uint64_t val) "addr: 0x%"PRIx64 "val: 0x%" PRIx64 2272# See docs/devel/tracing.rst for syntax documentation. 2273 2274# isa-superio.c 2275superio_create_parallel(int id, uint16_t base, unsigned int irq) "id=%d, base 0x%03x, irq %u" 2276superio_create_serial(int id, uint16_t base, unsigned int irq) "id=%d, base 0x%03x, irq %u" 2277superio_create_floppy(int id, uint16_t base, unsigned int irq) "id=%d, base 0x%03x, irq %u" 2278superio_create_ide(int id, uint16_t base, unsigned int irq) "id=%d, base 0x%03x, irq %u" 2279 2280# pc87312.c 2281pc87312_io_read(uint32_t addr, uint32_t val) "read addr=0x%x val=0x%x" 2282pc87312_io_write(uint32_t addr, uint32_t val) "write addr=0x%x val=0x%x" 2283 2284# apm.c 2285apm_io_read(uint8_t addr, uint8_t val) "read addr=0x%x val=0x%02x" 2286apm_io_write(uint8_t addr, uint8_t val) "write addr=0x%x val=0x%02x" 2287 2288# vt82c686.c 2289via_isa_write(uint32_t addr, uint32_t val, int len) "addr 0x%x val 0x%x len 0x%x" 2290via_pm_read(uint32_t addr, uint32_t val, int len) "addr 0x%x val 0x%x len 0x%x" 2291via_pm_write(uint32_t addr, uint32_t val, int len) "addr 0x%x val 0x%x len 0x%x" 2292via_pm_io_read(uint32_t addr, uint32_t val, int len) "addr 0x%x val 0x%x len 0x%x" 2293via_pm_io_write(uint32_t addr, uint32_t val, int len) "addr 0x%x val 0x%x len 0x%x" 2294via_superio_read(uint8_t addr, uint8_t val) "addr 0x%x val 0x%x" 2295via_superio_write(uint8_t addr, uint32_t val) "addr 0x%x val 0x%x" 2296 2297# lpc_ich9.c 2298ich9_cc_write(uint64_t addr, uint64_t val, unsigned len) "addr=0x%"PRIx64 " val=0x%"PRIx64 " len=%u" 2299ich9_cc_read(uint64_t addr, uint64_t val, unsigned len) "addr=0x%"PRIx64 " val=0x%"PRIx64 " len=%u" 2300# See docs/devel/tracing.rst for syntax documentation. 2301 2302# pc-dimm.c 2303mhp_pc_dimm_assigned_slot(int slot) "%d" 2304# memory-device.c 2305memory_device_pre_plug(const char *id, uint64_t addr) "id=%s addr=0x%"PRIx64 2306memory_device_plug(const char *id, uint64_t addr) "id=%s addr=0x%"PRIx64 2307memory_device_unplug(const char *id, uint64_t addr) "id=%s addr=0x%"PRIx64 2308# malta.c 2309malta_fpga_leds(const char *text) "LEDs %s" 2310malta_fpga_display(const char *text) "ASCII '%s'" 2311# See docs/devel/tracing.rst for syntax documentation. 2312 2313# allwinner-cpucfg.c 2314allwinner_cpucfg_cpu_reset(uint8_t cpu_id, uint32_t reset_addr) "id %u, reset_addr 0x%" PRIx32 2315allwinner_cpucfg_read(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32 2316allwinner_cpucfg_write(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32 2317 2318# allwinner-h3-dramc.c 2319allwinner_h3_dramc_rowmirror_disable(void) "Disable row mirror" 2320allwinner_h3_dramc_rowmirror_enable(uint64_t addr) "Enable row mirror: addr 0x%" PRIx64 2321allwinner_h3_dramcom_read(uint64_t offset, uint64_t data, unsigned size) "Read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32 2322allwinner_h3_dramcom_write(uint64_t offset, uint64_t data, unsigned size) "Write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32 2323allwinner_h3_dramctl_read(uint64_t offset, uint64_t data, unsigned size) "Read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32 2324allwinner_h3_dramctl_write(uint64_t offset, uint64_t data, unsigned size) "Write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32 2325allwinner_h3_dramphy_read(uint64_t offset, uint64_t data, unsigned size) "Read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32 2326allwinner_h3_dramphy_write(uint64_t offset, uint64_t data, unsigned size) "write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32 2327 2328# allwinner-r40-dramc.c 2329allwinner_r40_dramc_detect_cells_disable(void) "Disable detect cells" 2330allwinner_r40_dramc_detect_cells_enable(void) "Enable detect cells" 2331allwinner_r40_dramc_map_rows(uint8_t row_bits, uint8_t bank_bits, uint8_t col_bits) "DRAM layout: row_bits %d, bank_bits %d, col_bits %d" 2332allwinner_r40_dramc_offset_to_cell(uint64_t offset, int row, int bank, int col) "offset 0x%" PRIx64 " row %d bank %d col %d" 2333allwinner_r40_dramc_detect_cell_write(uint64_t offset, uint64_t data) "offset 0x%" PRIx64 " data 0x%" PRIx64 "" 2334allwinner_r40_dramc_detect_cell_read(uint64_t offset, uint64_t data) "offset 0x%" PRIx64 " data 0x%" PRIx64 "" 2335allwinner_r40_dramcom_read(uint64_t offset, uint64_t data, unsigned size) "Read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32 2336allwinner_r40_dramcom_write(uint64_t offset, uint64_t data, unsigned size) "Write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32 2337allwinner_r40_dramctl_read(uint64_t offset, uint64_t data, unsigned size) "Read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32 2338allwinner_r40_dramctl_write(uint64_t offset, uint64_t data, unsigned size) "Write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32 2339allwinner_r40_dramphy_read(uint64_t offset, uint64_t data, unsigned size) "Read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32 2340allwinner_r40_dramphy_write(uint64_t offset, uint64_t data, unsigned size) "write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32 2341 2342# allwinner-sid.c 2343allwinner_sid_read(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32 2344allwinner_sid_write(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32 2345 2346# allwinner-sramc.c 2347allwinner_sramc_read(uint64_t offset, uint64_t data) "offset 0x%" PRIx64 " data 0x%" PRIx64 2348allwinner_sramc_write(uint64_t offset, uint64_t data) "offset 0x%" PRIx64 " data 0x%" PRIx64 2349 2350# avr_power.c 2351avr_power_read(uint8_t value) "power_reduc read value:%u" 2352avr_power_write(uint8_t value) "power_reduc write value:%u" 2353 2354# axp2xx 2355axp2xx_rx(uint8_t reg, uint8_t data) "Read reg 0x%" PRIx8 " : 0x%" PRIx8 2356axp2xx_select(uint8_t reg) "Accessing reg 0x%" PRIx8 2357axp2xx_tx(uint8_t reg, uint8_t data) "Write reg 0x%" PRIx8 " : 0x%" PRIx8 2358 2359# eccmemctl.c 2360ecc_mem_writel_mer(uint32_t val) "Write memory enable 0x%08x" 2361ecc_mem_writel_mdr(uint32_t val) "Write memory delay 0x%08x" 2362ecc_mem_writel_mfsr(uint32_t val) "Write memory fault status 0x%08x" 2363ecc_mem_writel_vcr(uint32_t val) "Write slot configuration 0x%08x" 2364ecc_mem_writel_dr(uint32_t val) "Write diagnostic 0x%08x" 2365ecc_mem_writel_ecr0(uint32_t val) "Write event count 1 0x%08x" 2366ecc_mem_writel_ecr1(uint32_t val) "Write event count 2 0x%08x" 2367ecc_mem_readl_mer(uint32_t ret) "Read memory enable 0x%08x" 2368ecc_mem_readl_mdr(uint32_t ret) "Read memory delay 0x%08x" 2369ecc_mem_readl_mfsr(uint32_t ret) "Read memory fault status 0x%08x" 2370ecc_mem_readl_vcr(uint32_t ret) "Read slot configuration 0x%08x" 2371ecc_mem_readl_mfar0(uint32_t ret) "Read memory fault address 0 0x%08x" 2372ecc_mem_readl_mfar1(uint32_t ret) "Read memory fault address 1 0x%08x" 2373ecc_mem_readl_dr(uint32_t ret) "Read diagnostic 0x%08x" 2374ecc_mem_readl_ecr0(uint32_t ret) "Read event count 1 0x%08x" 2375ecc_mem_readl_ecr1(uint32_t ret) "Read event count 2 0x%08x" 2376ecc_diag_mem_writeb(uint64_t addr, uint32_t val) "Write diagnostic %"PRId64" = 0x%02x" 2377ecc_diag_mem_readb(uint64_t addr, uint32_t ret) "Read diagnostic %"PRId64"= 0x%02x" 2378 2379# empty_slot.c 2380empty_slot_write(uint64_t addr, unsigned width, uint64_t value, unsigned size, const char *name) "wr addr:0x%04"PRIx64" data:0x%0*"PRIx64" size %u [%s]" 2381 2382# slavio_misc.c 2383slavio_misc_update_irq_raise(void) "Raise IRQ" 2384slavio_misc_update_irq_lower(void) "Lower IRQ" 2385slavio_set_power_fail(int power_failing, uint8_t config) "Power fail: %d, config: %d" 2386slavio_cfg_mem_writeb(uint32_t val) "Write config 0x%02x" 2387slavio_cfg_mem_readb(uint32_t ret) "Read config 0x%02x" 2388slavio_diag_mem_writeb(uint32_t val) "Write diag 0x%02x" 2389slavio_diag_mem_readb(uint32_t ret) "Read diag 0x%02x" 2390slavio_mdm_mem_writeb(uint32_t val) "Write modem control 0x%02x" 2391slavio_mdm_mem_readb(uint32_t ret) "Read modem control 0x%02x" 2392slavio_aux1_mem_writeb(uint32_t val) "Write aux1 0x%02x" 2393slavio_aux1_mem_readb(uint32_t ret) "Read aux1 0x%02x" 2394slavio_aux2_mem_writeb(uint32_t val) "Write aux2 0x%02x" 2395slavio_aux2_mem_readb(uint32_t ret) "Read aux2 0x%02x" 2396apc_mem_writeb(uint32_t val) "Write power management 0x%02x" 2397apc_mem_readb(uint32_t ret) "Read power management 0x%02x" 2398slavio_sysctrl_mem_writel(uint32_t val) "Write system control 0x%08x" 2399slavio_sysctrl_mem_readl(uint32_t ret) "Read system control 0x%08x" 2400slavio_led_mem_writew(uint32_t val) "Write diagnostic LED 0x%04x" 2401slavio_led_mem_readw(uint32_t ret) "Read diagnostic LED 0x%04x" 2402 2403# aspeed_scu.c 2404aspeed_scu_write(uint64_t offset, unsigned size, uint32_t data) "To 0x%" PRIx64 " of size %u: 0x%" PRIx32 2405aspeed_scu_read(uint64_t offset, unsigned size, uint32_t data) "To 0x%" PRIx64 " of size %u: 0x%" PRIx32 2406 2407# mps2-scc.c 2408mps2_scc_read(uint64_t offset, uint64_t data, unsigned size) "MPS2 SCC read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" 2409mps2_scc_write(uint64_t offset, uint64_t data, unsigned size) "MPS2 SCC write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" 2410mps2_scc_reset(void) "MPS2 SCC: reset" 2411mps2_scc_cfg_write(unsigned function, unsigned device, uint32_t value) "MPS2 SCC config write: function %d device %d data 0x%" PRIx32 2412mps2_scc_cfg_read(unsigned function, unsigned device, uint32_t value) "MPS2 SCC config read: function %d device %d data 0x%" PRIx32 2413 2414# mps2-fpgaio.c 2415mps2_fpgaio_read(uint64_t offset, uint64_t data, unsigned size) "MPS2 FPGAIO read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" 2416mps2_fpgaio_write(uint64_t offset, uint64_t data, unsigned size) "MPS2 FPGAIO write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" 2417mps2_fpgaio_reset(void) "MPS2 FPGAIO: reset" 2418 2419# msf2-sysreg.c 2420msf2_sysreg_write(uint64_t offset, uint32_t val, uint32_t prev) "msf2-sysreg write: addr 0x%08" PRIx64 " data 0x%" PRIx32 " prev 0x%" PRIx32 2421msf2_sysreg_read(uint64_t offset, uint32_t val) "msf2-sysreg read: addr 0x%08" PRIx64 " data 0x%08" PRIx32 2422msf2_sysreg_write_pll_status(void) "Invalid write to read only PLL status register" 2423 2424# imx7_gpr.c 2425imx7_gpr_read(uint64_t offset) "addr 0x%08" PRIx64 2426imx7_gpr_write(uint64_t offset, uint64_t value) "addr 0x%08" PRIx64 "value 0x%08" PRIx64 2427 2428# imx7_snvs.c 2429imx7_snvs_read(uint64_t offset, uint32_t value) "addr 0x%08" PRIx64 "value 0x%08" PRIx32 2430imx7_snvs_write(uint64_t offset, uint32_t value) "addr 0x%08" PRIx64 "value 0x%08" PRIx32 2431 2432# mos6522.c 2433mos6522_set_counter(int index, unsigned int val) "T%d.counter=%d" 2434mos6522_get_next_irq_time(uint16_t latch, int64_t d, int64_t delta) "latch=%d counter=0x%"PRIx64 " delta_next=0x%"PRIx64 2435mos6522_set_sr_int(void) "set sr_int" 2436mos6522_write(uint64_t addr, const char *name, uint64_t val) "reg=0x%"PRIx64 " [%s] val=0x%"PRIx64 2437mos6522_read(uint64_t addr, const char *name, unsigned val) "reg=0x%"PRIx64 " [%s] val=0x%x" 2438 2439# npcm7xx_clk.c 2440npcm7xx_clk_read(uint64_t offset, uint32_t value) " offset: 0x%04" PRIx64 " value: 0x%08" PRIx32 2441npcm7xx_clk_write(uint64_t offset, uint32_t value) "offset: 0x%04" PRIx64 " value: 0x%08" PRIx32 2442 2443# npcm7xx_gcr.c 2444npcm7xx_gcr_read(uint64_t offset, uint32_t value) " offset: 0x%04" PRIx64 " value: 0x%08" PRIx32 2445npcm7xx_gcr_write(uint64_t offset, uint32_t value) "offset: 0x%04" PRIx64 " value: 0x%08" PRIx32 2446 2447# npcm7xx_mft.c 2448npcm7xx_mft_read(const char *name, uint64_t offset, uint16_t value) "%s: offset: 0x%04" PRIx64 " value: 0x%04" PRIx16 2449npcm7xx_mft_write(const char *name, uint64_t offset, uint16_t value) "%s: offset: 0x%04" PRIx64 " value: 0x%04" PRIx16 2450npcm7xx_mft_rpm(const char *clock, uint32_t clock_hz, int state, int32_t cnt, uint32_t rpm, uint32_t duty) " fan clk: %s clock_hz: %" PRIu32 ", state: %d, cnt: %" PRIi32 ", rpm: %" PRIu32 ", duty: %" PRIu32 2451npcm7xx_mft_capture(const char *name, int irq_level) "%s: level: %d" 2452npcm7xx_mft_update_clock(const char *name, uint16_t sel, uint64_t clock_period, uint64_t prescaled_clock_period) "%s: sel: 0x%02" PRIx16 ", period: %" PRIu64 ", prescaled: %" PRIu64 2453npcm7xx_mft_set_duty(const char *name, int n, int value) "%s[%d]: %d" 2454 2455# npcm7xx_rng.c 2456npcm7xx_rng_read(uint64_t offset, uint64_t value, unsigned size) "offset: 0x%04" PRIx64 " value: 0x%02" PRIx64 " size: %u" 2457npcm7xx_rng_write(uint64_t offset, uint64_t value, unsigned size) "offset: 0x%04" PRIx64 " value: 0x%02" PRIx64 " size: %u" 2458 2459# npcm7xx_pwm.c 2460npcm7xx_pwm_read(const char *id, uint64_t offset, uint32_t value) "%s offset: 0x%04" PRIx64 " value: 0x%08" PRIx32 2461npcm7xx_pwm_write(const char *id, uint64_t offset, uint32_t value) "%s offset: 0x%04" PRIx64 " value: 0x%08" PRIx32 2462npcm7xx_pwm_update_freq(const char *id, uint8_t index, uint32_t old_value, uint32_t new_value) "%s pwm[%u] Update Freq: old_freq: %u, new_freq: %u" 2463npcm7xx_pwm_update_duty(const char *id, uint8_t index, uint32_t old_value, uint32_t new_value) "%s pwm[%u] Update Duty: old_duty: %u, new_duty: %u" 2464 2465# npcm7xx_pci_mbox.c 2466npcm7xx_pci_mbox_read(const char *id, uint64_t offset, uint64_t value, unsigned size) "%s offset: 0x%04" PRIx64 " value: 0x%02" PRIx64 " size: %u" 2467npcm7xx_pci_mbox_write(const char *id, uint64_t offset, uint64_t value, unsigned size) "%s offset: 0x%04" PRIx64 " value: 0x%02" PRIx64 " size: %u" 2468npcm7xx_pci_mbox_irq(int irq_level) "irq level: %d" 2469 2470# stm32f4xx_syscfg.c 2471stm32f4xx_syscfg_set_irq(int gpio, int line, int level) "Interrupt: GPIO: %d, Line: %d; Level: %d" 2472stm32f4xx_pulse_exti(int irq) "Pulse EXTI: %d" 2473stm32f4xx_syscfg_read(uint64_t addr) "reg read: addr: 0x%" PRIx64 " " 2474stm32f4xx_syscfg_write(uint64_t addr, uint64_t data) "reg write: addr: 0x%" PRIx64 " val: 0x%" PRIx64 "" 2475 2476# stm32f4xx_exti.c 2477stm32f4xx_exti_set_irq(int irq, int level) "Set EXTI: %d to %d" 2478stm32f4xx_exti_read(uint64_t addr) "reg read: addr: 0x%" PRIx64 " " 2479stm32f4xx_exti_write(uint64_t addr, uint64_t data) "reg write: addr: 0x%" PRIx64 " val: 0x%" PRIx64 "" 2480 2481# tz-mpc.c 2482tz_mpc_reg_read(uint32_t offset, uint64_t data, unsigned size) "TZ MPC regs read: offset 0x%x data 0x%" PRIx64 " size %u" 2483tz_mpc_reg_write(uint32_t offset, uint64_t data, unsigned size) "TZ MPC regs write: offset 0x%x data 0x%" PRIx64 " size %u" 2484tz_mpc_mem_blocked_read(uint64_t addr, unsigned size, bool secure) "TZ MPC blocked read: offset 0x%" PRIx64 " size %u secure %d" 2485tz_mpc_mem_blocked_write(uint64_t addr, uint64_t data, unsigned size, bool secure) "TZ MPC blocked write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u secure %d" 2486tz_mpc_translate(uint64_t addr, int flags, const char *idx, const char *res) "TZ MPC translate: addr 0x%" PRIx64 " flags 0x%x iommu_idx %s: %s" 2487tz_mpc_iommu_notify(uint64_t addr) "TZ MPC iommu: notifying UNMAP/MAP for 0x%" PRIx64 2488 2489# tz-msc.c 2490tz_msc_reset(void) "TZ MSC: reset" 2491tz_msc_cfg_nonsec(int level) "TZ MSC: cfg_nonsec = %d" 2492tz_msc_cfg_sec_resp(int level) "TZ MSC: cfg_sec_resp = %d" 2493tz_msc_irq_clear(int level) "TZ MSC: int_clear = %d" 2494tz_msc_update_irq(int level) "TZ MSC: setting irq line to %d" 2495tz_msc_access_blocked(uint64_t offset) "TZ MSC: offset 0x%" PRIx64 " access blocked" 2496 2497# tz-ppc.c 2498tz_ppc_reset(void) "TZ PPC: reset" 2499tz_ppc_cfg_nonsec(int n, int level) "TZ PPC: cfg_nonsec[%d] = %d" 2500tz_ppc_cfg_ap(int n, int level) "TZ PPC: cfg_ap[%d] = %d" 2501tz_ppc_cfg_sec_resp(int level) "TZ PPC: cfg_sec_resp = %d" 2502tz_ppc_irq_enable(int level) "TZ PPC: int_enable = %d" 2503tz_ppc_irq_clear(int level) "TZ PPC: int_clear = %d" 2504tz_ppc_update_irq(int level) "TZ PPC: setting irq line to %d" 2505tz_ppc_read_blocked(int n, uint64_t offset, bool secure, bool user) "TZ PPC: port %d offset 0x%" PRIx64 " read (secure %d user %d) blocked" 2506tz_ppc_write_blocked(int n, uint64_t offset, bool secure, bool user) "TZ PPC: port %d offset 0x%" PRIx64 " write (secure %d user %d) blocked" 2507 2508# iotkit-secctl.c 2509iotkit_secctl_s_read(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl S regs read: offset 0x%x data 0x%" PRIx64 " size %u" 2510iotkit_secctl_s_write(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl S regs write: offset 0x%x data 0x%" PRIx64 " size %u" 2511iotkit_secctl_ns_read(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl NS regs read: offset 0x%x data 0x%" PRIx64 " size %u" 2512iotkit_secctl_ns_write(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl NS regs write: offset 0x%x data 0x%" PRIx64 " size %u" 2513 2514# imx6_ccm.c 2515imx6_analog_get_periph_clk(uint32_t freq) "freq = %u Hz" 2516imx6_analog_get_pll2_clk(uint32_t freq) "freq = %u Hz" 2517imx6_analog_get_pll2_pfd0_clk(uint32_t freq) "freq = %u Hz" 2518imx6_analog_get_pll2_pfd2_clk(uint32_t freq) "freq = %u Hz" 2519imx6_analog_read(const char *reg, uint32_t value) "reg[%s] => 0x%" PRIx32 2520imx6_analog_write(const char *reg, uint32_t value) "reg[%s] <= 0x%" PRIx32 2521imx6_ccm_get_ahb_clk(uint32_t freq) "freq = %u Hz" 2522imx6_ccm_get_ipg_clk(uint32_t freq) "freq = %u Hz" 2523imx6_ccm_get_per_clk(uint32_t freq) "freq = %u Hz" 2524imx6_ccm_get_clock_frequency(unsigned clock, uint32_t freq) "(Clock = %d) = %u" 2525imx6_ccm_read(const char *reg, uint32_t value) "reg[%s] => 0x%" PRIx32 2526imx6_ccm_reset(void) "" 2527imx6_ccm_write(const char *reg, uint32_t value) "reg[%s] <= 0x%" PRIx32 2528 2529# imx6ul_ccm.c 2530ccm_entry(void) "" 2531ccm_freq(uint32_t freq) "freq = %d" 2532ccm_clock_freq(uint32_t clock, uint32_t freq) "(Clock = %d) = %d" 2533ccm_read_reg(const char *reg_name, uint32_t value) "reg[%s] <= 0x%" PRIx32 2534ccm_write_reg(const char *reg_name, uint32_t value) "reg[%s] => 0x%" PRIx32 2535 2536# imx7_src.c 2537imx7_src_read(const char *reg_name, uint32_t value) "reg[%s] => 0x%" PRIx32 2538imx7_src_write(const char *reg_name, uint32_t value) "reg[%s] <= 0x%" PRIx32 2539 2540# iotkit-sysinfo.c 2541iotkit_sysinfo_read(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysInfo read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" 2542iotkit_sysinfo_write(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysInfo write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" 2543 2544# iotkit-sysctl.c 2545iotkit_sysctl_read(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysCtl read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" 2546iotkit_sysctl_write(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysCtl write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" 2547iotkit_sysctl_reset(void) "IoTKit SysCtl: reset" 2548 2549# armsse-cpu-pwrctrl.c 2550armsse_cpu_pwrctrl_read(uint64_t offset, uint64_t data, unsigned size) "SSE-300 CPU_PWRCTRL read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" 2551armsse_cpu_pwrctrl_write(uint64_t offset, uint64_t data, unsigned size) "SSE-300 CPU_PWRCTRL write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" 2552 2553# armsse-cpuid.c 2554armsse_cpuid_read(uint64_t offset, uint64_t data, unsigned size) "SSE-200 CPU_IDENTITY read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" 2555armsse_cpuid_write(uint64_t offset, uint64_t data, unsigned size) "SSE-200 CPU_IDENTITY write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" 2556 2557# armsse-mhu.c 2558armsse_mhu_read(uint64_t offset, uint64_t data, unsigned size) "SSE-200 MHU read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" 2559armsse_mhu_write(uint64_t offset, uint64_t data, unsigned size) "SSE-200 MHU write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" 2560 2561# aspeed_xdma.c 2562aspeed_xdma_write(uint64_t offset, uint64_t data) "XDMA write: offset 0x%" PRIx64 " data 0x%" PRIx64 2563 2564# aspeed_i3c.c 2565aspeed_i3c_read(uint64_t offset, uint64_t data) "I3C read: offset 0x%" PRIx64 " data 0x%" PRIx64 2566aspeed_i3c_write(uint64_t offset, uint64_t data) "I3C write: offset 0x%" PRIx64 " data 0x%" PRIx64 2567aspeed_i3c_device_read(uint32_t deviceid, uint64_t offset, uint64_t data) "I3C Dev[%u] read: offset 0x%" PRIx64 " data 0x%" PRIx64 2568aspeed_i3c_device_write(uint32_t deviceid, uint64_t offset, uint64_t data) "I3C Dev[%u] write: offset 0x%" PRIx64 " data 0x%" PRIx64 2569 2570# aspeed_sdmc.c 2571aspeed_sdmc_write(uint64_t reg, uint64_t data) "reg @0x%" PRIx64 " data: 0x%" PRIx64 2572aspeed_sdmc_read(uint64_t reg, uint64_t data) "reg @0x%" PRIx64 " data: 0x%" PRIx64 2573 2574# aspeed_peci.c 2575aspeed_peci_read(uint64_t offset, uint64_t data) "offset 0x%" PRIx64 " data 0x%" PRIx64 2576aspeed_peci_write(uint64_t offset, uint64_t data) "offset 0x%" PRIx64 " data 0x%" PRIx64 2577aspeed_peci_raise_interrupt(uint32_t ctrl, uint32_t status) "ctrl 0x%" PRIx32 " status 0x%" PRIx32 2578 2579# bcm2835_property.c 2580bcm2835_mbox_property(uint32_t tag, uint32_t bufsize, size_t resplen) "mbox property tag:0x%08x in_sz:%u out_sz:%zu" 2581 2582# bcm2835_mbox.c 2583bcm2835_mbox_write(unsigned int size, uint64_t addr, uint64_t value) "mbox write sz:%u addr:0x%"PRIx64" data:0x%"PRIx64 2584bcm2835_mbox_read(unsigned int size, uint64_t addr, uint64_t value) "mbox read sz:%u addr:0x%"PRIx64" data:0x%"PRIx64 2585bcm2835_mbox_irq(unsigned level) "mbox irq:ARM level:%u" 2586 2587# mac_via.c 2588via1_rtc_update_data_out(int count, int value) "count=%d value=0x%02x" 2589via1_rtc_update_data_in(int count, int value) "count=%d value=0x%02x" 2590via1_rtc_internal_status(int cmd, int alt, int value) "cmd=0x%02x alt=0x%02x value=0x%02x" 2591via1_rtc_internal_cmd(int cmd) "cmd=0x%02x" 2592via1_rtc_cmd_invalid(int value) "value=0x%02x" 2593via1_rtc_internal_time(uint32_t time) "time=0x%08x" 2594via1_rtc_internal_set_cmd(int cmd) "cmd=0x%02x" 2595via1_rtc_internal_ignore_cmd(int cmd) "cmd=0x%02x" 2596via1_rtc_internal_set_alt(int alt, int sector, int offset) "alt=0x%02x sector=%u offset=%u" 2597via1_rtc_cmd_seconds_read(int reg, int value) "reg=%d value=0x%02x" 2598via1_rtc_cmd_seconds_write(int reg, int value) "reg=%d value=0x%02x" 2599via1_rtc_cmd_test_write(int value) "value=0x%02x" 2600via1_rtc_cmd_wprotect_write(int value) "value=0x%02x" 2601via1_rtc_cmd_pram_read(int addr, int value) "addr=%u value=0x%02x" 2602via1_rtc_cmd_pram_write(int addr, int value) "addr=%u value=0x%02x" 2603via1_rtc_cmd_pram_sect_read(int sector, int offset, int addr, int value) "sector=%u offset=%u addr=0x%x value=0x%02x" 2604via1_rtc_cmd_pram_sect_write(int sector, int offset, int addr, int value) "sector=%u offset=%u addr=0x%x value=0x%02x" 2605via1_adb_send(const char *state, uint8_t data, const char *vadbint) "state %s data=0x%02x vADBInt=%s" 2606via1_adb_receive(const char *state, uint8_t data, const char *vadbint, int status, int index, int size) "state %s data=0x%02x vADBInt=%s status=0x%x index=%d size=%d" 2607via1_adb_poll(uint8_t data, const char *vadbint, int status, int index, int size) "data=0x%02x vADBInt=%s status=0x%x index=%d size=%d" 2608via1_adb_netbsd_enum_hack(void) "using NetBSD enum hack" 2609via1_auxmode(int mode) "setting auxmode to %d" 2610via1_timer_hack_state(int state) "setting timer_hack_state to %d" 2611 2612# grlib_ahb_apb_pnp.c 2613grlib_ahb_pnp_read(uint64_t addr, unsigned size, uint32_t value) "AHB PnP read addr:0x%03"PRIx64" size:%u data:0x%08x" 2614grlib_apb_pnp_read(uint64_t addr, unsigned size, uint32_t value) "APB PnP read addr:0x%03"PRIx64" size:%u data:0x%08x" 2615 2616# led.c 2617led_set_intensity(const char *color, const char *desc, uint8_t intensity_percent) "LED desc:'%s' color:%s intensity: %u%%" 2618led_change_intensity(const char *color, const char *desc, uint8_t old_intensity_percent, uint8_t new_intensity_percent) "LED desc:'%s' color:%s intensity %u%% -> %u%%" 2619 2620# pca9552.c 2621pca955x_gpio_status(const char *description, const char *buf) "%s GPIOs 0-15 [%s]" 2622pca955x_gpio_change(const char *description, unsigned id, unsigned prev_state, unsigned current_state) "%s GPIO id:%u status: %u -> %u" 2623 2624# bcm2835_cprman.c 2625bcm2835_cprman_read(uint64_t offset, uint64_t value) "offset:0x%" PRIx64 " value:0x%" PRIx64 2626bcm2835_cprman_write(uint64_t offset, uint64_t value) "offset:0x%" PRIx64 " value:0x%" PRIx64 2627bcm2835_cprman_write_invalid_magic(uint64_t offset, uint64_t value) "offset:0x%" PRIx64 " value:0x%" PRIx64 2628 2629# virt_ctrl.c 2630virt_ctrl_read(void *dev, unsigned int addr, unsigned int size, uint64_t value) "ctrl: %p reg: 0x%02x size: %d value: 0x%"PRIx64 2631virt_ctrl_write(void *dev, unsigned int addr, unsigned int size, uint64_t value) "ctrl: %p reg: 0x%02x size: %d value: 0x%"PRIx64 2632virt_ctrl_reset(void *dev) "ctrl: %p" 2633virt_ctrl_realize(void *dev) "ctrl: %p" 2634virt_ctrl_instance_init(void *dev) "ctrl: %p" 2635 2636# lasi.c 2637lasi_chip_mem_valid(uint64_t addr, uint32_t val) "access to addr 0x%"PRIx64" is %d" 2638lasi_chip_read(uint64_t addr, uint32_t val) "addr 0x%"PRIx64" val 0x%08x" 2639lasi_chip_write(uint64_t addr, uint32_t val) "addr 0x%"PRIx64" val 0x%08x" 2640 2641# djmemc.c 2642djmemc_read(int reg, uint64_t value, unsigned int size) "reg=0x%x value=0x%"PRIx64" size=%u" 2643djmemc_write(int reg, uint64_t value, unsigned int size) "reg=0x%x value=0x%"PRIx64" size=%u" 2644 2645# iosb.c 2646iosb_read(int reg, uint64_t value, unsigned int size) "reg=0x%x value=0x%"PRIx64" size=%u" 2647iosb_write(int reg, uint64_t value, unsigned int size) "reg=0x%x value=0x%"PRIx64" size=%u" 2648# See docs/devel/tracing.rst for syntax documentation. 2649 2650# cuda.c 2651cuda_delay_set_sr_int(void) "" 2652cuda_data_send(uint8_t data) "send: 0x%02x" 2653cuda_data_recv(uint8_t data) "recv: 0x%02x" 2654cuda_receive_packet_cmd(const char *cmd) "handling command %s" 2655cuda_packet_receive(int len) "length %d" 2656cuda_packet_receive_data(int i, const uint8_t data) "[%d] 0x%02x" 2657cuda_packet_send(int len) "length %d" 2658cuda_packet_send_data(int i, const uint8_t data) "[%d] 0x%02x" 2659 2660# macio.c 2661macio_timer_write(uint64_t addr, unsigned len, uint64_t val) "write addr 0x%"PRIx64 " len %d val 0x%"PRIx64 2662macio_timer_read(uint64_t addr, unsigned len, uint32_t val) "read addr 0x%"PRIx64 " len %d val 0x%"PRIx32 2663 2664# gpio.c 2665macio_set_gpio(int gpio, bool state) "setting GPIO %d to %d" 2666macio_gpio_irq_assert(int gpio) "asserting GPIO %d" 2667macio_gpio_irq_deassert(int gpio) "deasserting GPIO %d" 2668macio_gpio_write(uint64_t addr, uint64_t val) "addr: 0x%"PRIx64" value: 0x%"PRIx64 2669 2670# pmu.c 2671pmu_adb_poll(int olen) "ADB autopoll, olen=%d" 2672pmu_one_sec_timer(void) "PMU one sec..." 2673pmu_cmd_set_int_mask(int intmask) "Setting PMU int mask to 0x%02x" 2674pmu_cmd_set_adb_autopoll(int mask) "ADB set autopoll, mask=0x%04x" 2675pmu_cmd_adb_nobus(void) "ADB PACKET with no ADB bus!" 2676pmu_cmd_adb_request(int inlen, int indata0, int indata1, int indata2, int indata3, int indata4) "ADB request: len=%d, cmd=0x%02x, pflags=0x%02x, adblen=%d: 0x%02x 0x%02x..." 2677pmu_cmd_adb_reply(int len) "ADB reply is %d bytes" 2678pmu_dispatch_cmd(const char *name) "handling command %s" 2679pmu_dispatch_unknown_cmd(int cmd) "Unknown PMU command 0x%02x" 2680pmu_debug_protocol_string(const char *str) "%s" 2681pmu_debug_protocol_resp_size(int size) "sending %d resp bytes" 2682pmu_debug_protocol_error(int portB) "protocol error! portB=0x%02x" 2683pmu_debug_protocol_clear_treq(int state) "TREQ cleared, clearing TACK, state: %d" 2684pmu_debug_protocol_cmd(int cmd, int cmdlen, int rsplen) "Got command byte 0x%02x, clen=%d, rlen=%d" 2685pmu_debug_protocol_cmdlen(int len) "got cmd length byte: %d" 2686pmu_debug_protocol_cmd_toobig(int len) "command too big (%d bytes)" 2687pmu_debug_protocol_cmd_send_resp_size(int len) "sending length byte: %d" 2688pmu_debug_protocol_cmd_send_resp(int pos, int len) "sending byte: %d/%d" 2689pmu_debug_protocol_cmd_resp_complete(int ier) "Response send complete. IER=0x%02x" 2690# See docs/devel/tracing.rst for syntax documentation. 2691 2692# allwinner-sun8i-emac.c 2693allwinner_sun8i_emac_mii_write_reg(uint32_t reg, uint32_t value) "MII write: reg=0x%" PRIx32 " value=0x%" PRIx32 2694allwinner_sun8i_emac_mii_read_reg(uint32_t reg, uint32_t value) "MII read: reg=0x%" PRIx32 " value=0x%" PRIx32 2695allwinner_sun8i_emac_receive(uint32_t desc, uint32_t paddr, uint32_t bytes) "RX packet: desc=0x%" PRIx32 " paddr=0x%" PRIx32 " bytes=%" PRIu32 2696allwinner_sun8i_emac_transmit(uint32_t desc, uint32_t paddr, uint32_t bytes) "TX packet: desc=0x%" PRIx32 " paddr=0x%" PRIx32 " bytes=%" PRIu32 2697allwinner_sun8i_emac_reset(void) "HW reset" 2698allwinner_sun8i_emac_set_link(bool active) "Set link: active=%u" 2699allwinner_sun8i_emac_read(uint64_t offset, uint64_t val) "MMIO read: offset=0x%" PRIx64 " value=0x%" PRIx64 2700allwinner_sun8i_emac_write(uint64_t offset, uint64_t val) "MMIO write: offset=0x%" PRIx64 " value=0x%" PRIx64 2701 2702# etraxfs_eth.c 2703mdio_phy_read(int regnum, uint16_t value) "read phy_reg:%d value:0x%04x" 2704mdio_phy_write(int regnum, uint16_t value) "write phy_reg:%d value:0x%04x" 2705mdio_bitbang(bool mdc, bool mdio, int state, uint16_t cnt, unsigned int drive) "bitbang mdc=%u mdio=%u state=%d cnt=%u drv=%d" 2706 2707# lance.c 2708lance_mem_readw(uint64_t addr, uint32_t ret) "addr=0x%"PRIx64"val=0x%04x" 2709lance_mem_writew(uint64_t addr, uint32_t val) "addr=0x%"PRIx64"val=0x%04x" 2710 2711# mipsnet.c 2712mipsnet_send(uint32_t size) "sending len=%u" 2713mipsnet_receive(uint32_t size) "receiving len=%u" 2714mipsnet_read(uint64_t addr, uint32_t val) "read addr=0x%" PRIx64 " val=0x%x" 2715mipsnet_write(uint64_t addr, uint64_t val) "write addr=0x%" PRIx64 " val=0x%" PRIx64 2716mipsnet_irq(uint32_t isr, uint32_t intctl) "set irq to %d (0x%02x)" 2717 2718# ne2000.c 2719ne2000_read(uint64_t addr, uint64_t val) "read addr=0x%" PRIx64 " val=0x%" PRIx64 2720ne2000_write(uint64_t addr, uint64_t val) "write addr=0x%" PRIx64 " val=0x%" PRIx64 2721ne2000_ioport_read(uint64_t addr, uint64_t val) "io read addr=0x%02" PRIx64 " val=0x%02" PRIx64 2722ne2000_ioport_write(uint64_t addr, uint64_t val) "io write addr=0x%02" PRIx64 " val=0x%02" PRIx64 2723 2724# opencores_eth.c 2725open_eth_mii_write(unsigned idx, uint16_t v) "MII[0x%02x] <- 0x%04x" 2726open_eth_mii_read(unsigned idx, uint16_t v) "MII[0x%02x] -> 0x%04x" 2727open_eth_update_irq(uint32_t v) "IRQ <- 0x%x" 2728open_eth_receive(unsigned len) "RX: len: %u" 2729open_eth_receive_mcast(unsigned idx, uint32_t h0, uint32_t h1) "MCAST: idx = %u, hash: %08x:%08x" 2730open_eth_receive_reject(void) "RX: rejected" 2731open_eth_receive_desc(uint32_t addr, uint32_t len_flags) "RX: 0x%08x, len_flags: 0x%08x" 2732open_eth_start_xmit(uint32_t addr, unsigned len, unsigned tx_len) "TX: 0x%08x, len: %u, tx_len: %u" 2733open_eth_reg_read(uint32_t addr, uint32_t v) "MAC[0x%02x] -> 0x%08x" 2734open_eth_reg_write(uint32_t addr, uint32_t v) "MAC[0x%02x] <- 0x%08x" 2735open_eth_desc_read(uint32_t addr, uint32_t v) "DESC[0x%04x] -> 0x%08x" 2736open_eth_desc_write(uint32_t addr, uint32_t v) "DESC[0x%04x] <- 0x%08x" 2737 2738# pcnet.c 2739pcnet_s_reset(void *s) "s=%p" 2740pcnet_user_int(void *s) "s=%p" 2741pcnet_isr_change(void *s, uint32_t isr, uint32_t isr_old) "s=%p INTA=%d<=%d" 2742pcnet_init(void *s, uint64_t init_addr) "s=%p init_addr=0x%"PRIx64 2743pcnet_rlen_tlen(void *s, uint32_t rlen, uint32_t tlen) "s=%p rlen=%d tlen=%d" 2744pcnet_ss32_rdra_tdra(void *s, uint32_t ss32, uint32_t rdra, uint32_t rcvrl, uint32_t tdra, uint32_t xmtrl) "s=%p ss32=%d rdra=0x%08x[%d] tdra=0x%08x[%d]" 2745 2746# pcnet-pci.c 2747pcnet_aprom_writeb(void *opaque, uint32_t addr, uint32_t val) "opaque=%p addr=0x%08x val=0x%02x" 2748pcnet_aprom_readb(void *opaque, uint32_t addr, uint32_t val) "opaque=%p addr=0x%08x val=0x%02x" 2749pcnet_ioport_read(void *opaque, uint64_t addr, unsigned size) "opaque=%p addr=0x%"PRIx64" size=%d" 2750pcnet_ioport_write(void *opaque, uint64_t addr, uint64_t data, unsigned size) "opaque=%p addr=0x%"PRIx64" data=0x%"PRIx64" size=%d" 2751 2752# net_rx_pkt.c 2753net_rx_pkt_parsed(bool ip4, bool ip6, int l4proto, size_t l3o, size_t l4o, size_t l5o) "RX packet parsed: ip4: %d, ip6: %d, l4 protocol: %d, l3 offset: %zu, l4 offset: %zu, l5 offset: %zu" 2754net_rx_pkt_l4_csum_validate_entry(void) "Starting L4 checksum validation" 2755net_rx_pkt_l4_csum_validate_not_xxp(void) "Not a TCP/UDP packet" 2756net_rx_pkt_l4_csum_validate_udp_with_no_checksum(void) "UDP packet without checksum" 2757net_rx_pkt_l4_csum_validate_ip4_fragment(void) "IP4 fragment" 2758net_rx_pkt_l4_csum_validate_csum(bool csum_valid) "Checksum valid: %d" 2759 2760net_rx_pkt_l4_csum_calc_entry(void) "Starting L4 checksum calculation" 2761net_rx_pkt_l4_csum_calc_ip4_udp(void) "IP4/UDP packet" 2762net_rx_pkt_l4_csum_calc_ip4_tcp(void) "IP4/TCP packet" 2763net_rx_pkt_l4_csum_calc_ip6_udp(void) "IP6/UDP packet" 2764net_rx_pkt_l4_csum_calc_ip6_tcp(void) "IP6/TCP packet" 2765net_rx_pkt_l4_csum_calc_ph_csum(uint32_t cntr, uint16_t csl) "Pseudo-header: checksum counter %u, length %u" 2766net_rx_pkt_l4_csum_calc_csum(size_t l4hdr_off, uint16_t csl, uint32_t cntr, uint16_t csum) "L4 Checksum: L4 header offset: %zu, length: %u, counter: 0x%X, final checksum: 0x%X" 2767 2768net_rx_pkt_l4_csum_fix_entry(void) "Starting L4 checksum correction" 2769net_rx_pkt_l4_csum_fix_tcp(uint32_t l4_cso) "TCP packet, L4 cso: %u" 2770net_rx_pkt_l4_csum_fix_udp(uint32_t l4_cso) "UDP packet, L4 cso: %u" 2771net_rx_pkt_l4_csum_fix_not_xxp(void) "Not an IP4 packet" 2772net_rx_pkt_l4_csum_fix_ip4_fragment(void) "IP4 fragment" 2773net_rx_pkt_l4_csum_fix_udp_with_no_checksum(void) "UDP packet without checksum" 2774net_rx_pkt_l4_csum_fix_csum(uint32_t cso, uint16_t csum) "L4 Checksum: Offset: %u, value 0x%X" 2775 2776net_rx_pkt_l3_csum_validate_entry(void) "Starting L3 checksum validation" 2777net_rx_pkt_l3_csum_validate_not_ip4(void) "Not an IP4 packet" 2778net_rx_pkt_l3_csum_validate_csum(size_t l3hdr_off, uint32_t csl, uint32_t cntr, uint16_t csum, bool csum_valid) "L3 Checksum: L3 header offset: %zu, length: %u, counter: 0x%X, final checksum: 0x%X, valid: %d" 2779 2780net_rx_pkt_rss_ip4(void) "Calculating IPv4 RSS hash" 2781net_rx_pkt_rss_ip4_tcp(void) "Calculating IPv4/TCP RSS hash" 2782net_rx_pkt_rss_ip4_udp(void) "Calculating IPv4/UDP RSS hash" 2783net_rx_pkt_rss_ip6_tcp(void) "Calculating IPv6/TCP RSS hash" 2784net_rx_pkt_rss_ip6_udp(void) "Calculating IPv6/UDP RSS hash" 2785net_rx_pkt_rss_ip6(void) "Calculating IPv6 RSS hash" 2786net_rx_pkt_rss_ip6_ex(void) "Calculating IPv6/EX RSS hash" 2787net_rx_pkt_rss_ip6_ex_tcp(void) "Calculating IPv6/EX/TCP RSS hash" 2788net_rx_pkt_rss_ip6_ex_udp(void) "Calculating IPv6/EX/UDP RSS hash" 2789net_rx_pkt_rss_hash(size_t rss_length, uint32_t rss_hash) "RSS hash for %zu bytes: 0x%X" 2790net_rx_pkt_rss_add_chunk(void* ptr, size_t size, size_t input_offset) "Add RSS chunk %p, %zu bytes, RSS input offset %zu bytes" 2791 2792# e1000.c 2793e1000_receiver_overrun(size_t s, uint32_t rdh, uint32_t rdt) "Receiver overrun: dropped packet of %zu bytes, RDH=%u, RDT=%u" 2794 2795# e1000x_common.c 2796e1000x_rx_can_recv_disabled(bool link_up, bool rx_enabled, bool pci_master) "link_up: %d, rx_enabled %d, pci_master %d" 2797e1000x_vlan_is_vlan_pkt(bool is_vlan_pkt, uint16_t eth_proto, uint16_t vet) "Is VLAN packet: %d, ETH proto: 0x%X, VET: 0x%X" 2798e1000x_rx_flt_vlan_mismatch(uint16_t vid) "VID mismatch: 0x%X" 2799e1000x_rx_flt_vlan_match(uint16_t vid) "VID match: 0x%X" 2800e1000x_rx_flt_ucast_match(uint32_t idx, uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) "unicast match[%d]: %02x:%02x:%02x:%02x:%02x:%02x" 2801e1000x_rx_flt_ucast_mismatch(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) "unicast mismatch: %02x:%02x:%02x:%02x:%02x:%02x" 2802e1000x_rx_flt_inexact_mismatch(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5, uint32_t mo, uint32_t mta, uint32_t mta_val) "inexact mismatch: %02x:%02x:%02x:%02x:%02x:%02x MO %d MTA[%d] 0x%x" 2803e1000x_rx_link_down(uint32_t status_reg) "Received packet dropped because the link is down STATUS = %u" 2804e1000x_rx_disabled(uint32_t rctl_reg) "Received packet dropped because receive is disabled RCTL = %u" 2805e1000x_rx_oversized(size_t size) "Received packet dropped because it was oversized (%zu bytes)" 2806e1000x_mac_indicate(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) "Indicating MAC to guest: %02x:%02x:%02x:%02x:%02x:%02x" 2807e1000x_link_negotiation_start(void) "Start link auto negotiation" 2808e1000x_link_negotiation_done(void) "Auto negotiation is completed" 2809 2810# e1000e_core.c 2811e1000e_core_write(uint64_t index, uint32_t size, uint64_t val) "Write to register 0x%"PRIx64", %d byte(s), value: 0x%"PRIx64 2812e1000e_core_read(uint64_t index, uint32_t size, uint64_t val) "Read from register 0x%"PRIx64", %d byte(s), value: 0x%"PRIx64 2813e1000e_core_mdic_read(uint8_t page, uint32_t addr, uint32_t data) "MDIC READ: PHY[%u][%u] = 0x%x" 2814e1000e_core_mdic_read_unhandled(uint8_t page, uint32_t addr) "MDIC READ: PHY[%u][%u] UNHANDLED" 2815e1000e_core_mdic_write(uint8_t page, uint32_t addr, uint32_t data) "MDIC WRITE: PHY[%u][%u] = 0x%x" 2816e1000e_core_mdic_write_unhandled(uint8_t page, uint32_t addr) "MDIC WRITE: PHY[%u][%u] UNHANDLED" 2817e1000e_core_ctrl_write(uint64_t index, uint32_t val) "Write CTRL register 0x%"PRIx64", value: 0x%X" 2818e1000e_core_ctrl_sw_reset(void) "Doing SW reset" 2819e1000e_core_ctrl_phy_reset(void) "Doing PHY reset" 2820 2821e1000e_link_autoneg_flowctl(bool enabled) "Auto-negotiated flow control state is %d" 2822e1000e_link_set_params(bool autodetect, uint32_t speed, bool force_spd, bool force_dplx, bool rx_fctl, bool tx_fctl) "Set link params: Autodetect: %d, Speed: %d, Force speed: %d, Force duplex: %d, RX flow control %d, TX flow control %d" 2823e1000e_link_read_params(bool autodetect, uint32_t speed, bool force_spd, bool force_dplx, bool rx_fctl, bool tx_fctl) "Get link params: Autodetect: %d, Speed: %d, Force speed: %d, Force duplex: %d, RX flow control %d, TX flow control %d" 2824e1000e_link_set_ext_params(bool asd_check, bool speed_select_bypass) "Set extended link params: ASD check: %d, Speed select bypass: %d" 2825e1000e_link_status(bool link_up, bool full_dplx, uint32_t speed, uint32_t asdv) "Link up: %d, Duplex: %d, Speed: %d, ASDV: %d" 2826e1000e_link_status_changed(bool status) "New link status: %d" 2827 2828e1000e_wrn_regs_write_ro(uint64_t index, uint32_t size, uint64_t val) "WARNING: Write to RO register 0x%"PRIx64", %d byte(s), value: 0x%"PRIx64 2829e1000e_wrn_regs_write_unknown(uint64_t index, uint32_t size, uint64_t val) "WARNING: Write to unknown register 0x%"PRIx64", %d byte(s), value: 0x%"PRIx64 2830e1000e_wrn_regs_read_unknown(uint64_t index, uint32_t size) "WARNING: Read from unknown register 0x%"PRIx64", %d byte(s)" 2831e1000e_wrn_regs_read_trivial(uint32_t index) "WARNING: Reading register at offset: 0x%05x. It is not fully implemented." 2832e1000e_wrn_regs_write_trivial(uint32_t index) "WARNING: Writing to register at offset: 0x%05x. It is not fully implemented." 2833e1000e_wrn_no_ts_support(void) "WARNING: Guest requested TX timestamping which is not supported" 2834e1000e_wrn_no_snap_support(void) "WARNING: Guest requested TX SNAP header update which is not supported" 2835e1000e_wrn_iscsi_filtering_not_supported(void) "WARNING: Guest requested iSCSI filtering which is not supported" 2836e1000e_wrn_nfsw_filtering_not_supported(void) "WARNING: Guest requested NFS write filtering which is not supported" 2837e1000e_wrn_nfsr_filtering_not_supported(void) "WARNING: Guest requested NFS read filtering which is not supported" 2838 2839e1000e_tx_disabled(void) "TX Disabled" 2840e1000e_tx_descr(void *addr, uint32_t lower, uint32_t upper) "%p : %x %x" 2841 2842e1000e_ring_free_space(int ridx, uint32_t rdlen, uint32_t rdh, uint32_t rdt) "ring #%d: LEN: %u, DH: %u, DT: %u" 2843 2844e1000e_rx_can_recv_rings_full(void) "Cannot receive: all rings are full" 2845e1000e_rx_can_recv(void) "Can receive" 2846e1000e_rx_has_buffers(int ridx, uint32_t free_desc, size_t total_size, uint32_t desc_buf_size) "ring #%d: free descr: %u, packet size %zu, descr buffer size %u" 2847e1000e_rx_null_descriptor(void) "Null RX descriptor!!" 2848e1000e_rx_desc_ps_read(uint64_t a0, uint64_t a1, uint64_t a2, uint64_t a3) "buffers: [0x%"PRIx64", 0x%"PRIx64", 0x%"PRIx64", 0x%"PRIx64"]" 2849e1000e_rx_desc_ps_write(uint16_t a0, uint16_t a1, uint16_t a2, uint16_t a3) "bytes written: [%u, %u, %u, %u]" 2850e1000e_rx_desc_buff_sizes(uint32_t b0, uint32_t b1, uint32_t b2, uint32_t b3) "buffer sizes: [%u, %u, %u, %u]" 2851e1000e_rx_desc_len(uint8_t rx_desc_len) "RX descriptor length: %u" 2852e1000e_rx_desc_buff_write(uint8_t idx, uint64_t addr, uint16_t offset, const void* source, uint32_t len) "buffer #%u, addr: 0x%"PRIx64", offset: %u, from: %p, length: %u" 2853e1000e_rx_descr(int ridx, uint64_t base, uint8_t len) "Next RX descriptor: ring #%d, PA: 0x%"PRIx64", length: %u" 2854e1000e_rx_set_rctl(uint32_t rctl) "RCTL = 0x%x" 2855e1000e_rx_receive_iov(int iovcnt) "Received vector of %d fragments" 2856e1000e_rx_flt_dropped(void) "Received packet dropped by RX filter" 2857e1000e_rx_written_to_guest(int queue_idx) "Received packet written to guest (queue %d)" 2858e1000e_rx_not_written_to_guest(int queue_idx) "Received packet NOT written to guest (queue %d)" 2859e1000e_rx_interrupt_set(uint32_t causes) "Receive interrupt set (ICR causes %u)" 2860e1000e_rx_interrupt_delayed(uint32_t causes) "Receive interrupt delayed (ICR causes %u)" 2861e1000e_rx_set_cso(int cso_state) "RX CSO state set to %d" 2862e1000e_rx_set_rdt(int queue_idx, uint32_t val) "Setting RDT[%d] = %u" 2863e1000e_rx_set_rfctl(uint32_t val) "Setting RFCTL = 0x%X" 2864e1000e_rx_start_recv(void) 2865 2866e1000e_rx_rss_started(void) "Starting RSS processing" 2867e1000e_rx_rss_disabled(void) "RSS is disabled" 2868e1000e_rx_rss_type(uint32_t type) "RSS type is %u" 2869e1000e_rx_rss_ip4(int l4hdr_proto, uint32_t mrqc, bool tcpipv4_enabled, bool ipv4_enabled) "RSS IPv4: L4 header protocol %d, mrqc 0x%X, tcpipv4 enabled %d, ipv4 enabled %d" 2870e1000e_rx_rss_ip6_rfctl(uint32_t rfctl) "RSS IPv6: rfctl 0x%X" 2871e1000e_rx_rss_ip6(bool ex_dis, bool new_ex_dis, int l4hdr_proto, bool has_ext_headers, bool ex_dst_valid, bool ex_src_valid, uint32_t mrqc, bool tcpipv6ex_enabled, bool ipv6ex_enabled, bool ipv6_enabled) "RSS IPv6: ex_dis: %d, new_ex_dis: %d, L4 header protocol %d, has_ext_headers %d, ex_dst_valid %d, ex_src_valid %d, mrqc 0x%X, tcpipv6ex enabled %d, ipv6ex enabled %d, ipv6 enabled %d" 2872 2873e1000e_rx_metadata_protocols(bool hasip4, bool hasip6, int l4hdr_protocol) "protocols: ip4: %d, ip6: %d, l4hdr: %d" 2874e1000e_rx_metadata_vlan(uint16_t vlan_tag) "VLAN tag is 0x%X" 2875e1000e_rx_metadata_rss(uint32_t rss, uint32_t mrq) "RSS data: rss: 0x%X, mrq: 0x%X" 2876e1000e_rx_metadata_ip_id(uint16_t ip_id) "the IPv4 ID is 0x%X" 2877e1000e_rx_metadata_ack(void) "the packet is TCP ACK" 2878e1000e_rx_metadata_pkt_type(uint32_t pkt_type) "the packet type is %u" 2879e1000e_rx_metadata_virthdr_no_csum_info(void) "virt-header does not contain checksum info" 2880e1000e_rx_metadata_l3_cso_disabled(void) "IP4 CSO is disabled" 2881e1000e_rx_metadata_l4_cso_disabled(void) "TCP/UDP CSO is disabled" 2882e1000e_rx_metadata_l3_csum_validation_failed(void) "Cannot validate L3 checksum" 2883e1000e_rx_metadata_l4_csum_validation_failed(void) "Cannot validate L4 checksum" 2884e1000e_rx_metadata_status_flags(uint32_t status_flags) "status_flags is 0x%X" 2885e1000e_rx_metadata_ipv6_sum_disabled(void) "IPv6 RX checksummimg disabled by RFCTL" 2886e1000e_rx_metadata_ipv6_filtering_disabled(void) "IPv6 RX filtering disabled by RFCTL" 2887 2888e1000e_vlan_vet(uint16_t vet) "Setting VLAN ethernet type 0x%X" 2889 2890e1000e_irq_msi_notify(uint32_t cause) "MSI notify 0x%x" 2891e1000e_irq_msi_notify_postponed(void) "Sending MSI postponed by ITR" 2892e1000e_irq_legacy_notify_postponed(void) "Raising legacy IRQ postponed by ITR" 2893e1000e_irq_msix_notify_postponed_vec(int idx) "Sending MSI-X postponed by EITR[%d]" 2894e1000e_irq_legacy_notify(bool level) "IRQ line state: %d" 2895e1000e_irq_msix_notify_vec(uint32_t vector) "MSI-X notify vector 0x%x" 2896e1000e_irq_postponed_by_xitr(uint32_t reg) "Interrupt postponed by [E]ITR register 0x%x" 2897e1000e_irq_clear(uint32_t offset, uint32_t old, uint32_t new) "Clearing interrupt register 0x%x: 0x%x --> 0x%x" 2898e1000e_irq_set(uint32_t offset, uint32_t old, uint32_t new) "Setting interrupt register 0x%x: 0x%x --> 0x%x" 2899e1000e_irq_fix_icr_asserted(uint32_t new_val) "ICR_ASSERTED bit fixed: 0x%x" 2900e1000e_irq_add_msi_other(uint32_t new_val) "ICR_OTHER bit added: 0x%x" 2901e1000e_irq_pending_interrupts(uint32_t pending, uint32_t icr, uint32_t ims) "ICR PENDING: 0x%x (ICR: 0x%x, IMS: 0x%x)" 2902e1000e_irq_write_ics(uint32_t val) "Adding ICR bits 0x%x" 2903e1000e_irq_icr_process_iame(void) "Clearing IMS bits due to IAME" 2904e1000e_irq_read_ics(uint32_t ics) "Current ICS: 0x%x" 2905e1000e_irq_read_ims(uint32_t ims) "Current IMS: 0x%x" 2906e1000e_irq_icr_clear_nonmsix_icr_read(void) "Clearing ICR on read due to non MSI-X int" 2907e1000e_irq_icr_clear_zero_ims(void) "Clearing ICR on read due to zero IMS" 2908e1000e_irq_icr_clear_iame(void) "Clearing ICR on read due to IAME" 2909e1000e_irq_icr_clear_icr_bit_ims(uint32_t icr, uint32_t ims) "Clearing ICR on read due corresponding IMS bit: 0x%x & 0x%x" 2910e1000e_irq_iam_clear_eiame(uint32_t iam, uint32_t cause) "Clearing IMS due to EIAME, IAM: 0x%X, cause: 0x%X" 2911e1000e_irq_icr_clear_eiac(uint32_t icr, uint32_t eiac) "Clearing ICR bits due to EIAC, ICR: 0x%X, EIAC: 0x%X" 2912e1000e_irq_ims_clear_set_imc(uint32_t val) "Clearing IMS bits due to IMC write 0x%x" 2913e1000e_irq_fire_delayed_interrupts(void) "Firing delayed interrupts" 2914e1000e_irq_rearm_timer(uint32_t reg, int64_t delay_ns) "Mitigation timer armed for register 0x%X, delay %"PRId64" ns" 2915e1000e_irq_throttling_timer(uint32_t reg) "Mitigation timer shot for register 0x%X" 2916e1000e_irq_rdtr_fpd_running(void) "FPD written while RDTR was running" 2917e1000e_irq_rdtr_fpd_not_running(void) "FPD written while RDTR was not running" 2918e1000e_irq_tidv_fpd_running(void) "FPD written while TIDV was running" 2919e1000e_irq_tidv_fpd_not_running(void) "FPD written while TIDV was not running" 2920e1000e_irq_eitr_set(uint32_t eitr_num, uint32_t val) "EITR[%u] = %u" 2921e1000e_irq_itr_set(uint32_t val) "ITR = %u" 2922e1000e_irq_fire_all_timers(uint32_t val) "Firing all delay/throttling timers on all interrupts enable (0x%X written to IMS)" 2923e1000e_irq_msix_pending_clearing(uint32_t cause, uint32_t int_cfg, uint32_t vec) "Clearing MSI-X pending bit for cause 0x%x, IVAR config 0x%x, vector %u" 2924 2925e1000e_wrn_msix_vec_wrong(uint32_t cause, uint32_t cfg) "Invalid configuration for cause 0x%x: 0x%x" 2926e1000e_wrn_msix_invalid(uint32_t cause, uint32_t cfg) "Invalid entry for cause 0x%x: 0x%x" 2927 2928e1000e_mac_set_sw(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) "Set SW MAC: %02x:%02x:%02x:%02x:%02x:%02x" 2929 2930e1000e_vm_state_running(void) "VM state is running" 2931e1000e_vm_state_stopped(void) "VM state is stopped" 2932 2933# e1000e.c 2934e1000e_cb_pci_realize(void) "E1000E PCI realize entry" 2935e1000e_cb_pci_uninit(void) "E1000E PCI unit entry" 2936e1000e_cb_qdev_reset_hold(void) "E1000E qdev reset hold" 2937e1000e_cb_pre_save(void) "E1000E pre save entry" 2938e1000e_cb_post_load(void) "E1000E post load entry" 2939 2940e1000e_io_write_addr(uint64_t addr) "IOADDR write 0x%"PRIx64 2941e1000e_io_write_data(uint64_t addr, uint64_t val) "IODATA write 0x%"PRIx64", value: 0x%"PRIx64 2942e1000e_io_read_addr(uint64_t addr) "IOADDR read 0x%"PRIx64 2943e1000e_io_read_data(uint64_t addr, uint64_t val) "IODATA read 0x%"PRIx64", value: 0x%"PRIx64 2944e1000e_wrn_io_write_unknown(uint64_t addr) "IO write unknown address 0x%"PRIx64 2945e1000e_wrn_io_read_unknown(uint64_t addr) "IO read unknown address 0x%"PRIx64 2946e1000e_wrn_io_addr_undefined(uint64_t addr) "IO undefined register 0x%"PRIx64 2947e1000e_wrn_io_addr_flash(uint64_t addr) "IO flash access (0x%"PRIx64") not implemented" 2948e1000e_wrn_io_addr_unknown(uint64_t addr) "IO unknown register 0x%"PRIx64 2949 2950e1000e_msi_init_fail(int32_t res) "Failed to initialize MSI, error %d" 2951e1000e_msix_init_fail(int32_t res) "Failed to initialize MSI-X, error %d" 2952e1000e_msix_use_vector_fail(uint32_t vec, int32_t res) "Failed to use MSI-X vector %d, error %d" 2953 2954e1000e_mac_set_permanent(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) "Set permanent MAC: %02x:%02x:%02x:%02x:%02x:%02x" 2955e1000e_cfg_support_virtio(bool support) "Virtio header supported: %d" 2956 2957# igb.c 2958igb_write_config(uint32_t address, uint32_t val, int len) "CONFIG write 0x%"PRIx32", value: 0x%"PRIx32", len: %"PRId32 2959igbvf_write_config(uint32_t address, uint32_t val, int len) "CONFIG write 0x%"PRIx32", value: 0x%"PRIx32", len: %"PRId32 2960 2961# igb_core.c 2962igb_core_mdic_read(uint32_t addr, uint32_t data) "MDIC READ: PHY[%u] = 0x%x" 2963igb_core_mdic_read_unhandled(uint32_t addr) "MDIC READ: PHY[%u] UNHANDLED" 2964igb_core_mdic_write(uint32_t addr, uint32_t data) "MDIC WRITE: PHY[%u] = 0x%x" 2965igb_core_mdic_write_unhandled(uint32_t addr) "MDIC WRITE: PHY[%u] UNHANDLED" 2966igb_core_vf_reset(uint16_t vfn) "VF%d" 2967 2968igb_link_set_ext_params(bool asd_check, bool speed_select_bypass, bool pfrstd) "Set extended link params: ASD check: %d, Speed select bypass: %d, PF reset done: %d" 2969 2970igb_rx_desc_buff_size(uint32_t b) "buffer size: %u" 2971igb_rx_desc_buff_write(uint8_t idx, uint64_t addr, uint16_t offset, const void* source, uint32_t len) "buffer %u, addr: 0x%"PRIx64", offset: %u, from: %p, length: %u" 2972 2973igb_rx_metadata_rss(uint32_t rss, uint16_t rss_pkt_type) "RSS data: rss: 0x%X, rss_pkt_type: 0x%X" 2974 2975igb_irq_icr_clear_gpie_nsicr(void) "Clearing ICR on read due to GPIE.NSICR enabled" 2976igb_irq_set_iam(uint32_t icr) "Update IAM: 0x%x" 2977igb_irq_read_iam(uint32_t icr) "Current IAM: 0x%x" 2978igb_irq_write_eics(uint32_t val, bool msix) "Update EICS: 0x%x MSI-X: %d" 2979igb_irq_write_eims(uint32_t val, bool msix) "Update EIMS: 0x%x MSI-X: %d" 2980igb_irq_write_eimc(uint32_t val, bool msix) "Update EIMC: 0x%x MSI-X: %d" 2981igb_irq_write_eiac(uint32_t val) "Update EIAC: 0x%x" 2982igb_irq_write_eiam(uint32_t val, bool msix) "Update EIAM: 0x%x MSI-X: %d" 2983igb_irq_write_eicr(uint32_t val, bool msix) "Update EICR: 0x%x MSI-X: %d" 2984igb_irq_eitr_set(uint32_t eitr_num, uint32_t val) "EITR[%u] = 0x%x" 2985igb_set_pfmailbox(uint32_t vf_num, uint32_t val) "PFMailbox[%d]: 0x%x" 2986igb_set_vfmailbox(uint32_t vf_num, uint32_t val) "VFMailbox[%d]: 0x%x" 2987 2988igb_wrn_rx_desc_modes_not_supp(int desc_type) "Not supported descriptor type: %d" 2989 2990# igbvf.c 2991igbvf_wrn_io_addr_unknown(uint64_t addr) "IO unknown register 0x%"PRIx64 2992 2993# spapr_llan.c 2994spapr_vlan_get_rx_bd_from_pool_found(int pool, int32_t count, uint32_t rx_bufs) "pool=%d count=%"PRId32" rxbufs=%"PRIu32 2995spapr_vlan_get_rx_bd_from_page(int buf_ptr, uint64_t bd) "use_buf_ptr=%d bd=0x%016"PRIx64 2996spapr_vlan_get_rx_bd_from_page_found(uint32_t use_buf_ptr, uint32_t rx_bufs) "ptr=%"PRIu32" rxbufs=%"PRIu32 2997spapr_vlan_receive(const char *id, uint32_t rx_bufs) "[%s] rx_bufs=%"PRIu32 2998spapr_vlan_receive_dma_completed(void) "DMA write completed" 2999spapr_vlan_receive_wrote(uint64_t ptr, uint64_t hi, uint64_t lo) "rxq entry (ptr=0x%"PRIx64"): 0x%016"PRIx64" 0x%016"PRIx64 3000spapr_vlan_add_rxbuf_to_pool_create(int pool, uint64_t len) "created RX pool %d for size %"PRIu64 3001spapr_vlan_add_rxbuf_to_pool(int pool, uint64_t len, int32_t count) "add buf using pool %d (size %"PRIu64", count=%"PRId32")" 3002spapr_vlan_add_rxbuf_to_page(uint32_t ptr, uint32_t rx_bufs, uint64_t bd) "added buf ptr=%"PRIu32" rx_bufs=%"PRIu32" bd=0x%016"PRIx64 3003spapr_vlan_h_add_logical_lan_buffer(uint64_t reg, uint64_t buf) "H_ADD_LOGICAL_LAN_BUFFER(0x%"PRIx64", 0x%"PRIx64")" 3004spapr_vlan_h_send_logical_lan(uint64_t reg, uint64_t continue_token) "H_SEND_LOGICAL_LAN(0x%"PRIx64", <bufs>, 0x%"PRIx64")" 3005spapr_vlan_h_send_logical_lan_rxbufs(uint32_t rx_bufs) "rxbufs = %"PRIu32 3006spapr_vlan_h_send_logical_lan_buf_desc(uint64_t buf) " buf desc: 0x%"PRIx64 3007spapr_vlan_h_send_logical_lan_total(int nbufs, unsigned total_len) "%d buffers, total length 0x%x" 3008 3009# sungem.c 3010sungem_tx_checksum(uint16_t start, uint16_t off) "TX checksumming from byte %d, inserting at %d" 3011sungem_tx_checksum_oob(void) "TX checksum out of packet bounds" 3012sungem_tx_unfinished(void) "TX packet started without finishing the previous one" 3013sungem_tx_overflow(void) "TX packet queue overflow" 3014sungem_tx_finished(uint32_t size) "TX completing %"PRIu32 " bytes packet" 3015sungem_tx_kick(void) "TX Kick..." 3016sungem_tx_disabled(void) "TX not enabled" 3017sungem_tx_process(uint32_t comp, uint32_t kick, uint32_t size) "TX processing comp=%"PRIu32", kick=%"PRIu32" out of %"PRIu32 3018sungem_tx_desc(uint32_t comp, uint64_t control, uint64_t buffer) "TX desc %"PRIu32 ": 0x%"PRIx64" 0x%"PRIx64 3019sungem_tx_reset(void) "TX reset" 3020sungem_rx_mac_disabled(void) "Check RX MAC disabled" 3021sungem_rx_txdma_disabled(void) "Check RX TXDMA disabled" 3022sungem_rx_check(bool full, uint32_t kick, uint32_t done) "Check RX %d (kick=%"PRIu32", done=%"PRIu32")" 3023sungem_rx_mac_check(uint32_t mac0, uint32_t mac1, uint32_t mac2) "Word MAC: 0x%"PRIx32" 0x%"PRIx32" 0x%"PRIx32 3024sungem_rx_mac_multicast(void) "Multicast" 3025sungem_rx_mac_compare(uint32_t mac0, uint32_t mac1, uint32_t mac2) "Compare MAC to 0x%"PRIx32" 0x%"PRIx32" 0x%"PRIx32".." 3026sungem_rx_packet(size_t size) "RX got %zu bytes packet" 3027sungem_rx_disabled(void) "RX not enabled" 3028sungem_rx_bad_frame_size(size_t size) "RX bad frame size %zu, dropped" 3029sungem_rx_unmatched(void) "No match, dropped" 3030sungem_rx_process(uint32_t done, uint32_t kick, uint32_t size) "RX processing done=%"PRIu32", kick=%"PRIu32" out of %"PRIu32 3031sungem_rx_ringfull(void) "RX ring full" 3032sungem_rx_desc(uint64_t control, uint64_t buffer) "RX desc: 0x%"PRIx64" 0x%"PRIx64 3033sungem_rx_reset(void) "RX reset" 3034sungem_rx_kick(uint64_t val) "RXDMA_KICK written to %"PRIu64 3035sungem_reset(bool pci_reset) "Full reset (PCI:%d)" 3036sungem_mii_write(uint8_t phy_addr, uint8_t reg_addr, uint16_t val) "MII write addr 0x%x reg 0x%02x val 0x%04x" 3037sungem_mii_read(uint8_t phy_addr, uint8_t reg_addr, uint16_t val) "MII read addr 0x%x reg 0x%02x val 0x%04x" 3038sungem_mii_invalid_sof(uint32_t val) "MII op, invalid SOF field 0x%"PRIx32 3039sungem_mii_invalid_op(uint8_t op) "MII op, invalid op field 0x%x" 3040sungem_mmio_greg_write(uint64_t addr, uint64_t val) "MMIO greg write to 0x%"PRIx64" val=0x%"PRIx64 3041sungem_mmio_greg_read(uint64_t addr, uint64_t val) "MMIO greg read from 0x%"PRIx64" val=0x%"PRIx64 3042sungem_mmio_txdma_write(uint64_t addr, uint64_t val) "MMIO txdma write to 0x%"PRIx64" val=0x%"PRIx64 3043sungem_mmio_txdma_read(uint64_t addr, uint64_t val) "MMIO txdma read from 0x%"PRIx64" val=0x%"PRIx64 3044sungem_mmio_rxdma_write(uint64_t addr, uint64_t val) "MMIO rxdma write to 0x%"PRIx64" val=0x%"PRIx64 3045sungem_mmio_rxdma_read(uint64_t addr, uint64_t val) "MMIO rxdma read from 0x%"PRIx64" val=0x%"PRIx64 3046sungem_mmio_wol_write(uint64_t addr, uint64_t val) "MMIO wol write to 0x%"PRIx64" val=0x%"PRIx64 3047sungem_mmio_wol_read(uint64_t addr, uint64_t val) "MMIO wol read from 0x%"PRIx64" val=0x%"PRIx64 3048sungem_mmio_mac_write(uint64_t addr, uint64_t val) "MMIO mac write to 0x%"PRIx64" val=0x%"PRIx64 3049sungem_mmio_mac_read(uint64_t addr, uint64_t val) "MMIO mac read from 0x%"PRIx64" val=0x%"PRIx64 3050sungem_mmio_mif_write(uint64_t addr, uint64_t val) "MMIO mif write to 0x%"PRIx64" val=0x%"PRIx64 3051sungem_mmio_mif_read(uint64_t addr, uint64_t val) "MMIO mif read from 0x%"PRIx64" val=0x%"PRIx64 3052sungem_mmio_pcs_write(uint64_t addr, uint64_t val) "MMIO pcs write to 0x%"PRIx64" val=0x%"PRIx64 3053sungem_mmio_pcs_read(uint64_t addr, uint64_t val) "MMIO pcs read from 0x%"PRIx64" val=0x%"PRIx64 3054 3055# sunhme.c 3056sunhme_seb_write(uint64_t addr, uint64_t value) "addr 0x%"PRIx64" value 0x%"PRIx64 3057sunhme_seb_read(uint64_t addr, uint64_t value) "addr 0x%"PRIx64" value 0x%"PRIx64 3058sunhme_etx_write(uint64_t addr, uint64_t value) "addr 0x%"PRIx64" value 0x%"PRIx64 3059sunhme_etx_read(uint64_t addr, uint64_t value) "addr 0x%"PRIx64" value 0x%"PRIx64 3060sunhme_erx_write(uint64_t addr, uint64_t value) "addr 0x%"PRIx64" value 0x%"PRIx64 3061sunhme_erx_read(uint64_t addr, uint64_t value) "addr 0x%"PRIx64" value 0x%"PRIx64 3062sunhme_mac_write(uint64_t addr, uint64_t value) "addr 0x%"PRIx64" value 0x%"PRIx64 3063sunhme_mac_read(uint64_t addr, uint64_t value) "addr 0x%"PRIx64" value 0x%"PRIx64 3064sunhme_mii_write(uint64_t addr, uint64_t value) "addr 0x%"PRIx64" value 0x%"PRIx64 3065sunhme_mii_read(uint8_t addr, uint16_t value) "addr 0x%x value 0x%x" 3066sunhme_mif_write(uint8_t addr, uint16_t value) "addr 0x%x value 0x%x" 3067sunhme_mif_read(uint64_t addr, uint64_t value) "addr 0x%"PRIx64" value 0x%"PRIx64 3068sunhme_tx_desc(uint64_t buffer, uint32_t status, int cr, int nr) "addr 0x%"PRIx64" status 0x%"PRIx32 " (ring %d/%d)" 3069sunhme_tx_xsum_add(int offset, int len) "adding xsum at offset %d, len %d" 3070sunhme_tx_xsum_stuff(uint16_t xsum, int offset) "stuffing xsum 0x%x at offset %d" 3071sunhme_tx_done(int len) "successfully transmitted frame with len %d" 3072sunhme_rx_incoming(size_t len) "received incoming frame with len %zu" 3073sunhme_rx_filter_destmac(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) "received frame for MAC: %02x:%02x:%02x:%02x:%02x:%02x" 3074sunhme_rx_filter_local_match(void) "incoming frame matches local MAC address" 3075sunhme_rx_filter_bcast_match(void) "incoming frame matches broadcast MAC address" 3076sunhme_rx_filter_hash_nomatch(void) "incoming MAC address not in hash table" 3077sunhme_rx_filter_hash_match(void) "incoming MAC address found in hash table" 3078sunhme_rx_filter_promisc_match(void) "incoming frame accepted due to promiscuous mode" 3079sunhme_rx_filter_reject(void) "rejecting incoming frame" 3080sunhme_rx_filter_accept(void) "accepting incoming frame" 3081sunhme_rx_desc(uint32_t addr, int offset, uint32_t status, int len, int cr, int nr) "addr 0x%"PRIx32"(+0x%x) status 0x%"PRIx32 " len %d (ring %d/%d)" 3082sunhme_rx_xsum_calc(uint16_t xsum) "calculated incoming xsum as 0x%x" 3083sunhme_rx_norxd(void) "no free rx descriptors available" 3084sunhme_update_irq(uint32_t mifmask, uint32_t mif, uint32_t sebmask, uint32_t seb, int level) "mifmask: 0x%x mif: 0x%x sebmask: 0x%x seb: 0x%x level: %d" 3085 3086# virtio-net.c 3087virtio_net_announce_notify(void) "" 3088virtio_net_announce_timer(int round) "%d" 3089virtio_net_handle_announce(int round) "%d" 3090virtio_net_post_load_device(void) 3091virtio_net_rss_disable(void) 3092virtio_net_rss_error(const char *msg, uint32_t value) "%s, value 0x%08x" 3093virtio_net_rss_enable(uint32_t p1, uint16_t p2, uint8_t p3) "hashes 0x%x, table of %d, key of %d" 3094 3095# tulip.c 3096tulip_reg_write(uint64_t addr, const char *name, int size, uint64_t val) "addr 0x%02"PRIx64" (%s) size %d value 0x%08"PRIx64 3097tulip_reg_read(uint64_t addr, const char *name, int size, uint64_t val) "addr 0x%02"PRIx64" (%s) size %d value 0x%08"PRIx64 3098tulip_receive(const uint8_t *buf, size_t len) "buf %p size %zu" 3099tulip_descriptor(const char *prefix, uint32_t addr, uint32_t status, uint32_t control, uint32_t len1, uint32_t len2, uint32_t buf1, uint32_t buf2) "%s 0x%08x: status 0x%08x control 0x%03x len1 %4d len2 %4d buf1 0x%08x buf2 0x%08x" 3100tulip_rx_state(const char *state) "RX %s" 3101tulip_tx_state(const char *state) "TX %s" 3102tulip_irq(uint32_t mask, uint32_t en, const char *state) "mask 0x%08x ie 0x%08x %s" 3103tulip_mii_write(int phy, int reg, uint16_t data) "phy 0x%x reg 0x%x data 0x%04x" 3104tulip_mii_read(int phy, int reg, uint16_t data) "phy 0x%x, reg 0x%x data 0x%04x" 3105tulip_reset(void) "" 3106tulip_setup_frame(void) "" 3107tulip_setup_filter(int n, uint8_t a, uint8_t b, uint8_t c, uint8_t d, uint8_t e, uint8_t f) "%d: %02x:%02x:%02x:%02x:%02x:%02x" 3108 3109# lasi_i82596.c 3110lasi_82596_mem_readw(uint64_t addr, uint32_t ret) "addr=0x%"PRIx64" val=0x%04x" 3111lasi_82596_mem_writew(uint64_t addr, uint32_t val) "addr=0x%"PRIx64" val=0x%04x" 3112 3113# i82596.c 3114i82596_s_reset(void *s) "%p Reset chip" 3115i82596_transmit(uint32_t size, uint32_t addr) "size %u from addr 0x%04x" 3116i82596_receive_analysis(const char *s) "%s" 3117i82596_receive_packet(size_t sz) "len=%zu" 3118i82596_new_mac(const char *id_with_mac) "New MAC for: %s" 3119i82596_set_multicast(uint16_t count) "Added %d multicast entries" 3120i82596_channel_attention(void *s) "%p: Received CHANNEL ATTENTION" 3121 3122# imx_fec.c 3123imx_phy_read(uint32_t val, int phy, int reg) "0x%04"PRIx32" <= phy[%d].reg[%d]" 3124imx_phy_read_num(int phy, int configured) "read request from unconfigured phy %d (configured %d)" 3125imx_phy_write(uint32_t val, int phy, int reg) "0x%04"PRIx32" => phy[%d].reg[%d]" 3126imx_phy_write_num(int phy, int configured) "write request to unconfigured phy %d (configured %d)" 3127imx_phy_update_link(const char *s) "%s" 3128imx_phy_reset(void) "" 3129imx_fec_read_bd(uint64_t addr, int flags, int len, int data) "tx_bd 0x%"PRIx64" flags 0x%04x len %d data 0x%08x" 3130imx_enet_read_bd(uint64_t addr, int flags, int len, int data, int options, int status) "tx_bd 0x%"PRIx64" flags 0x%04x len %d data 0x%08x option 0x%04x status 0x%04x" 3131imx_eth_tx_bd_busy(void) "tx_bd ran out of descriptors to transmit" 3132imx_eth_rx_bd_full(void) "RX buffer is full" 3133imx_eth_read(int reg, const char *reg_name, uint32_t value) "reg[%d:%s] => 0x%08"PRIx32 3134imx_eth_write(int reg, const char *reg_name, uint64_t value) "reg[%d:%s] <= 0x%08"PRIx64 3135imx_fec_receive(size_t size) "len %zu" 3136imx_fec_receive_len(uint64_t addr, int len) "rx_bd 0x%"PRIx64" length %d" 3137imx_fec_receive_last(int last) "rx frame flags 0x%04x" 3138imx_enet_receive(size_t size) "len %zu" 3139imx_enet_receive_len(uint64_t addr, int len) "rx_bd 0x%"PRIx64" length %d" 3140imx_enet_receive_last(int last) "rx frame flags 0x%04x" 3141 3142# npcm7xx_emc.c 3143npcm7xx_emc_reset(int emc_num) "Resetting emc%d" 3144npcm7xx_emc_update_tx_irq(int level) "Setting tx irq to %d" 3145npcm7xx_emc_update_rx_irq(int level) "Setting rx irq to %d" 3146npcm7xx_emc_set_mista(uint32_t flags) "ORing 0x%x into MISTA" 3147npcm7xx_emc_cpu_owned_desc(uint32_t addr) "Can't process cpu-owned descriptor @0x%x" 3148npcm7xx_emc_sent_packet(uint32_t len) "Sent %u byte packet" 3149npcm7xx_emc_tx_done(uint32_t ctxdsa) "TX done, CTXDSA=0x%x" 3150npcm7xx_emc_can_receive(int can_receive) "Can receive: %d" 3151npcm7xx_emc_packet_filtered_out(const char* fail_reason) "Packet filtered out: %s" 3152npcm7xx_emc_packet_dropped(uint32_t len) "%u byte packet dropped" 3153npcm7xx_emc_receiving_packet(uint32_t len) "Receiving %u byte packet" 3154npcm7xx_emc_received_packet(uint32_t len) "Received %u byte packet" 3155npcm7xx_emc_rx_done(uint32_t crxdsa) "RX done, CRXDSA=0x%x" 3156npcm7xx_emc_reg_read(int emc_num, uint32_t result, const char *name, int regno) "emc%d: 0x%x = reg[%s/%d]" 3157npcm7xx_emc_reg_write(int emc_num, const char *name, int regno, uint32_t value) "emc%d: reg[%s/%d] = 0x%x" 3158 3159# dp8398x.c 3160dp8393x_raise_irq(int isr) "raise irq, isr is 0x%04x" 3161dp8393x_lower_irq(void) "lower irq" 3162dp8393x_load_cam(int idx, int cam0, int cam1, int cam2, int cam3, int cam4, int cam5) "load cam[%d] with 0x%02x0x%02x0x%02x0x%02x0x%02x0x%02x" 3163dp8393x_load_cam_done(int cen) "load cam done. cam enable mask 0x%04x" 3164dp8393x_read_rra_regs(int crba0, int crba1, int rbwc0, int rbwc1) "CRBA0/1: 0x%04x/0x%04x, RBWC0/1: 0x%04x/0x%04x" 3165dp8393x_transmit_packet(int ttda) "Transmit packet at 0x%"PRIx32 3166dp8393x_transmit_txlen_error(int len) "tx_len is %d" 3167dp8393x_read(int reg, const char *name, int val, int size) "reg=0x%x [%s] val=0x%04x size=%d" 3168dp8393x_write(int reg, const char *name, int val, int size) "reg=0x%x [%s] val=0x%04x size=%d" 3169dp8393x_write_invalid(int reg) "writing to reg %d invalid" 3170dp8393x_write_invalid_dcr(const char *name) "writing to %s invalid" 3171dp8393x_receive_oversize(int size) "oversize packet, pkt_size is %d" 3172dp8393x_receive_not_netcard(void) "packet not for netcard" 3173dp8393x_receive_packet(int crba) "Receive packet at 0x%"PRIx32 3174dp8393x_receive_write_status(int crba) "Write status at 0x%"PRIx32 3175 3176# xen_nic.c 3177xen_netdev_realize(int dev, const char *info, const char *peer) "vif%u info '%s' peer '%s'" 3178xen_netdev_unrealize(int dev) "vif%u" 3179xen_netdev_create(int dev) "vif%u" 3180xen_netdev_destroy(int dev) "vif%u" 3181xen_netdev_disconnect(int dev) "vif%u" 3182xen_netdev_connect(int dev, unsigned int tx, unsigned int rx, int port) "vif%u tx %u rx %u port %u" 3183xen_netdev_frontend_changed(const char *dev, int state) "vif%s state %d" 3184xen_netdev_tx(int dev, int ref, int off, int len, unsigned int flags, const char *c, const char *d, const char *m, const char *e) "vif%u ref %u off %u len %u flags 0x%x%s%s%s%s" 3185xen_netdev_rx(int dev, int idx, int status, int flags) "vif%u idx %d status %d flags 0x%x" 3186# xlnx-zynqmp-can.c 3187xlnx_can_update_irq(uint32_t isr, uint32_t ier, uint32_t irq) "ISR: 0x%08x IER: 0x%08x IRQ: 0x%08x" 3188xlnx_can_reset(uint32_t val) "Resetting controller with value = 0x%08x" 3189xlnx_can_rx_fifo_filter_reject(uint32_t id, uint8_t dlc) "Frame: ID: 0x%08x DLC: 0x%02x" 3190xlnx_can_filter_id_pre_write(uint8_t filter_num, uint32_t value) "Filter%d ID: 0x%08x" 3191xlnx_can_filter_mask_pre_write(uint8_t filter_num, uint32_t value) "Filter%d MASK: 0x%08x" 3192xlnx_can_tx_data(uint32_t id, uint8_t dlc, uint8_t db0, uint8_t db1, uint8_t db2, uint8_t db3, uint8_t db4, uint8_t db5, uint8_t db6, uint8_t db7) "Frame: ID: 0x%08x DLC: 0x%02x DATA: 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x" 3193xlnx_can_rx_data(uint32_t id, uint32_t dlc, uint8_t db0, uint8_t db1, uint8_t db2, uint8_t db3, uint8_t db4, uint8_t db5, uint8_t db6, uint8_t db7) "Frame: ID: 0x%08x DLC: 0x%02x DATA: 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x" 3194xlnx_can_rx_discard(uint32_t status) "Controller is not enabled for bus communication. Status Register: 0x%08x" 3195 3196# xlnx-versal-canfd.c 3197xlnx_canfd_update_irq(char *path, uint32_t isr, uint32_t ier, uint32_t irq) "%s: ISR: 0x%08x IER: 0x%08x IRQ: 0x%08x" 3198xlnx_canfd_rx_fifo_filter_reject(char *path, uint32_t id, uint8_t dlc) "%s: Frame: ID: 0x%08x DLC: 0x%02x" 3199xlnx_canfd_rx_data(char *path, uint32_t id, uint8_t dlc, uint8_t flags) "%s: Frame: ID: 0x%08x DLC: 0x%02x CANFD Flag: 0x%02x" 3200xlnx_canfd_tx_data(char *path, uint32_t id, uint8_t dlc, uint8_t flgas) "%s: Frame: ID: 0x%08x DLC: 0x%02x CANFD Flag: 0x%02x" 3201xlnx_canfd_reset(char *path, uint32_t val) "%s: Resetting controller with value = 0x%08x" 3202# See docs/devel/tracing.rst for syntax documentation. 3203 3204# nubus-bus.c 3205nubus_slot_read(uint64_t addr, int size) "reading unassigned addr 0x%"PRIx64 " size %d" 3206nubus_slot_write(uint64_t addr, uint64_t val, int size) "writing unassigned addr 0x%"PRIx64 " value 0x%"PRIx64 " size %d" 3207nubus_super_slot_read(uint64_t addr, int size) "reading unassigned addr 0x%"PRIx64 " size %d" 3208nubus_super_slot_write(uint64_t addr, uint64_t val, int size) "writing unassigned addr 0x%"PRIx64 " value 0x%"PRIx64 " size %d" 3209# successful events 3210pci_nvme_irq_msix(uint32_t vector) "raising MSI-X IRQ vector %u" 3211pci_nvme_irq_pin(void) "pulsing IRQ pin" 3212pci_nvme_irq_masked(void) "IRQ is masked" 3213pci_nvme_dma_read(uint64_t prp1, uint64_t prp2) "DMA read, prp1=0x%"PRIx64" prp2=0x%"PRIx64"" 3214pci_nvme_dbbuf_config(uint64_t dbs_addr, uint64_t eis_addr) "dbs_addr=0x%"PRIx64" eis_addr=0x%"PRIx64"" 3215pci_nvme_map_addr(uint64_t addr, uint64_t len) "addr 0x%"PRIx64" len %"PRIu64"" 3216pci_nvme_map_addr_cmb(uint64_t addr, uint64_t len) "addr 0x%"PRIx64" len %"PRIu64"" 3217pci_nvme_map_prp(uint64_t trans_len, uint32_t len, uint64_t prp1, uint64_t prp2, int num_prps) "trans_len %"PRIu64" len %"PRIu32" prp1 0x%"PRIx64" prp2 0x%"PRIx64" num_prps %d" 3218pci_nvme_map_sgl(uint8_t typ, uint64_t len) "type 0x%"PRIx8" len %"PRIu64"" 3219pci_nvme_io_cmd(uint16_t cid, uint32_t nsid, uint16_t sqid, uint8_t opcode, const char *opname) "cid %"PRIu16" nsid 0x%"PRIx32" sqid %"PRIu16" opc 0x%"PRIx8" opname '%s'" 3220pci_nvme_admin_cmd(uint16_t cid, uint16_t sqid, uint8_t opcode, const char *opname) "cid %"PRIu16" sqid %"PRIu16" opc 0x%"PRIx8" opname '%s'" 3221pci_nvme_flush_ns(uint32_t nsid) "nsid 0x%"PRIx32"" 3222pci_nvme_format_set(uint32_t nsid, uint8_t lbaf, uint8_t mset, uint8_t pi, uint8_t pil) "nsid %"PRIu32" lbaf %"PRIu8" mset %"PRIu8" pi %"PRIu8" pil %"PRIu8"" 3223pci_nvme_read(uint16_t cid, uint32_t nsid, uint32_t nlb, uint64_t count, uint64_t lba) "cid %"PRIu16" nsid %"PRIu32" nlb %"PRIu32" count %"PRIu64" lba 0x%"PRIx64"" 3224pci_nvme_write(uint16_t cid, const char *verb, uint32_t nsid, uint32_t nlb, uint64_t count, uint64_t lba) "cid %"PRIu16" opname '%s' nsid %"PRIu32" nlb %"PRIu32" count %"PRIu64" lba 0x%"PRIx64"" 3225pci_nvme_rw_cb(uint16_t cid, const char *blkname) "cid %"PRIu16" blk '%s'" 3226pci_nvme_misc_cb(uint16_t cid) "cid %"PRIu16"" 3227pci_nvme_dif_rw(uint8_t pract, uint8_t prinfo) "pract 0x%"PRIx8" prinfo 0x%"PRIx8"" 3228pci_nvme_dif_rw_cb(uint16_t cid, const char *blkname) "cid %"PRIu16" blk '%s'" 3229pci_nvme_dif_rw_mdata_in_cb(uint16_t cid, const char *blkname) "cid %"PRIu16" blk '%s'" 3230pci_nvme_dif_rw_mdata_out_cb(uint16_t cid, const char *blkname) "cid %"PRIu16" blk '%s'" 3231pci_nvme_dif_rw_check_cb(uint16_t cid, uint8_t prinfo, uint16_t apptag, uint16_t appmask, uint32_t reftag) "cid %"PRIu16" prinfo 0x%"PRIx8" apptag 0x%"PRIx16" appmask 0x%"PRIx16" reftag 0x%"PRIx32"" 3232pci_nvme_dif_pract_generate_dif_crc16(size_t len, size_t lba_size, size_t chksum_len, uint16_t apptag, uint32_t reftag) "len %zu lba_size %zu chksum_len %zu apptag 0x%"PRIx16" reftag 0x%"PRIx32"" 3233pci_nvme_dif_pract_generate_dif_crc64(size_t len, size_t lba_size, size_t chksum_len, uint16_t apptag, uint64_t reftag) "len %zu lba_size %zu chksum_len %zu apptag 0x%"PRIx16" reftag 0x%"PRIx64"" 3234pci_nvme_dif_check(uint8_t prinfo, uint16_t chksum_len) "prinfo 0x%"PRIx8" chksum_len %"PRIu16"" 3235pci_nvme_dif_prchk_disabled_crc16(uint16_t apptag, uint32_t reftag) "apptag 0x%"PRIx16" reftag 0x%"PRIx32"" 3236pci_nvme_dif_prchk_disabled_crc64(uint16_t apptag, uint64_t reftag) "apptag 0x%"PRIx16" reftag 0x%"PRIx64"" 3237pci_nvme_dif_prchk_guard_crc16(uint16_t guard, uint16_t crc) "guard 0x%"PRIx16" crc 0x%"PRIx16"" 3238pci_nvme_dif_prchk_guard_crc64(uint64_t guard, uint64_t crc) "guard 0x%"PRIx64" crc 0x%"PRIx64"" 3239pci_nvme_dif_prchk_apptag(uint16_t apptag, uint16_t elbat, uint16_t elbatm) "apptag 0x%"PRIx16" elbat 0x%"PRIx16" elbatm 0x%"PRIx16"" 3240pci_nvme_dif_prchk_reftag_crc16(uint32_t reftag, uint32_t elbrt) "reftag 0x%"PRIx32" elbrt 0x%"PRIx32"" 3241pci_nvme_dif_prchk_reftag_crc64(uint64_t reftag, uint64_t elbrt) "reftag 0x%"PRIx64" elbrt 0x%"PRIx64"" 3242pci_nvme_copy(uint16_t cid, uint32_t nsid, uint16_t nr, uint8_t format) "cid %"PRIu16" nsid %"PRIu32" nr %"PRIu16" format 0x%"PRIx8"" 3243pci_nvme_copy_source_range(uint64_t slba, uint32_t nlb) "slba 0x%"PRIx64" nlb %"PRIu32"" 3244pci_nvme_copy_out(uint64_t slba, uint32_t nlb) "slba 0x%"PRIx64" nlb %"PRIu32"" 3245pci_nvme_verify(uint16_t cid, uint32_t nsid, uint64_t slba, uint32_t nlb) "cid %"PRIu16" nsid %"PRIu32" slba 0x%"PRIx64" nlb %"PRIu32"" 3246pci_nvme_verify_mdata_in_cb(uint16_t cid, const char *blkname) "cid %"PRIu16" blk '%s'" 3247pci_nvme_verify_cb(uint16_t cid, uint8_t prinfo, uint16_t apptag, uint16_t appmask, uint32_t reftag) "cid %"PRIu16" prinfo 0x%"PRIx8" apptag 0x%"PRIx16" appmask 0x%"PRIx16" reftag 0x%"PRIx32"" 3248pci_nvme_rw_complete_cb(uint16_t cid, const char *blkname) "cid %"PRIu16" blk '%s'" 3249pci_nvme_block_status(int64_t offset, int64_t bytes, int64_t pnum, int ret, bool zeroed) "offset %"PRId64" bytes %"PRId64" pnum %"PRId64" ret 0x%x zeroed %d" 3250pci_nvme_dsm(uint32_t nr, uint32_t attr) "nr %"PRIu32" attr 0x%"PRIx32"" 3251pci_nvme_dsm_deallocate(uint64_t slba, uint32_t nlb) "slba %"PRIu64" nlb %"PRIu32"" 3252pci_nvme_dsm_single_range_limit_exceeded(uint32_t nlb, uint32_t dmrsl) "nlb %"PRIu32" dmrsl %"PRIu32"" 3253pci_nvme_compare(uint16_t cid, uint32_t nsid, uint64_t slba, uint32_t nlb) "cid %"PRIu16" nsid %"PRIu32" slba 0x%"PRIx64" nlb %"PRIu32"" 3254pci_nvme_compare_data_cb(uint16_t cid) "cid %"PRIu16"" 3255pci_nvme_compare_mdata_cb(uint16_t cid) "cid %"PRIu16"" 3256pci_nvme_aio_discard_cb(uint16_t cid) "cid %"PRIu16"" 3257pci_nvme_aio_copy_in_cb(uint16_t cid) "cid %"PRIu16"" 3258pci_nvme_aio_flush_cb(uint16_t cid, const char *blkname) "cid %"PRIu16" blk '%s'" 3259pci_nvme_create_sq(uint64_t addr, uint16_t sqid, uint16_t cqid, uint16_t qsize, uint16_t qflags) "create submission queue, addr=0x%"PRIx64", sqid=%"PRIu16", cqid=%"PRIu16", qsize=%"PRIu16", qflags=%"PRIu16"" 3260pci_nvme_create_cq(uint64_t addr, uint16_t cqid, uint16_t vector, uint16_t size, uint16_t qflags, int ien) "create completion queue, addr=0x%"PRIx64", cqid=%"PRIu16", vector=%"PRIu16", qsize=%"PRIu16", qflags=%"PRIu16", ien=%d" 3261pci_nvme_del_sq(uint16_t qid) "deleting submission queue sqid=%"PRIu16"" 3262pci_nvme_del_cq(uint16_t cqid) "deleted completion queue, cqid=%"PRIu16"" 3263pci_nvme_identify(uint16_t cid, uint8_t cns, uint16_t ctrlid, uint8_t csi) "cid %"PRIu16" cns 0x%"PRIx8" ctrlid %"PRIu16" csi 0x%"PRIx8"" 3264pci_nvme_identify_ctrl(void) "identify controller" 3265pci_nvme_identify_ctrl_csi(uint8_t csi) "identify controller, csi=0x%"PRIx8"" 3266pci_nvme_identify_ns(uint32_t ns) "nsid %"PRIu32"" 3267pci_nvme_identify_ctrl_list(uint8_t cns, uint16_t cntid) "cns 0x%"PRIx8" cntid %"PRIu16"" 3268pci_nvme_identify_pri_ctrl_cap(uint16_t cntlid) "identify primary controller capabilities cntlid=%"PRIu16"" 3269pci_nvme_identify_sec_ctrl_list(uint16_t cntlid, uint8_t numcntl) "identify secondary controller list cntlid=%"PRIu16" numcntl=%"PRIu8"" 3270pci_nvme_identify_ns_csi(uint32_t ns, uint8_t csi) "nsid=%"PRIu32", csi=0x%"PRIx8"" 3271pci_nvme_identify_nslist(uint32_t ns) "nsid %"PRIu32"" 3272pci_nvme_identify_nslist_csi(uint16_t ns, uint8_t csi) "nsid=%"PRIu16", csi=0x%"PRIx8"" 3273pci_nvme_identify_cmd_set(void) "identify i/o command set" 3274pci_nvme_identify_ns_descr_list(uint32_t ns) "nsid %"PRIu32"" 3275pci_nvme_get_log(uint16_t cid, uint8_t lid, uint8_t lsp, uint8_t rae, uint32_t len, uint64_t off) "cid %"PRIu16" lid 0x%"PRIx8" lsp 0x%"PRIx8" rae 0x%"PRIx8" len %"PRIu32" off %"PRIu64"" 3276pci_nvme_getfeat(uint16_t cid, uint32_t nsid, uint8_t fid, uint8_t sel, uint32_t cdw11) "cid %"PRIu16" nsid 0x%"PRIx32" fid 0x%"PRIx8" sel 0x%"PRIx8" cdw11 0x%"PRIx32"" 3277pci_nvme_setfeat(uint16_t cid, uint32_t nsid, uint8_t fid, uint8_t save, uint32_t cdw11) "cid %"PRIu16" nsid 0x%"PRIx32" fid 0x%"PRIx8" save 0x%"PRIx8" cdw11 0x%"PRIx32"" 3278pci_nvme_getfeat_vwcache(const char* result) "get feature volatile write cache, result=%s" 3279pci_nvme_getfeat_numq(int result) "get feature number of queues, result=%d" 3280pci_nvme_setfeat_numq(int reqcq, int reqsq, int gotcq, int gotsq) "requested cq_count=%d sq_count=%d, responding with cq_count=%d sq_count=%d" 3281pci_nvme_setfeat_timestamp(uint64_t ts) "set feature timestamp = 0x%"PRIx64"" 3282pci_nvme_getfeat_timestamp(uint64_t ts) "get feature timestamp = 0x%"PRIx64"" 3283pci_nvme_process_aers(int queued) "queued %d" 3284pci_nvme_aer(uint16_t cid) "cid %"PRIu16"" 3285pci_nvme_aer_aerl_exceeded(void) "aerl exceeded" 3286pci_nvme_aer_masked(uint8_t type, uint8_t mask) "type 0x%"PRIx8" mask 0x%"PRIx8"" 3287pci_nvme_aer_post_cqe(uint8_t typ, uint8_t info, uint8_t log_page) "type 0x%"PRIx8" info 0x%"PRIx8" lid 0x%"PRIx8"" 3288pci_nvme_ns_attachment(uint16_t cid, uint8_t sel) "cid %"PRIu16", sel=0x%"PRIx8"" 3289pci_nvme_ns_attachment_attach(uint16_t cntlid, uint32_t nsid) "cntlid=0x%"PRIx16", nsid=0x%"PRIx32"" 3290pci_nvme_enqueue_event(uint8_t typ, uint8_t info, uint8_t log_page) "type 0x%"PRIx8" info 0x%"PRIx8" lid 0x%"PRIx8"" 3291pci_nvme_enqueue_event_noqueue(int queued) "queued %d" 3292pci_nvme_enqueue_event_masked(uint8_t typ) "type 0x%"PRIx8"" 3293pci_nvme_no_outstanding_aers(void) "ignoring event; no outstanding AERs" 3294pci_nvme_enqueue_req_completion(uint16_t cid, uint16_t cqid, uint32_t dw0, uint32_t dw1, uint16_t status) "cid %"PRIu16" cqid %"PRIu16" dw0 0x%"PRIx32" dw1 0x%"PRIx32" status 0x%"PRIx16"" 3295pci_nvme_update_cq_eventidx(uint16_t cqid, uint16_t new_eventidx) "cqid %"PRIu16" new_eventidx %"PRIu16"" 3296pci_nvme_update_sq_eventidx(uint16_t sqid, uint16_t new_eventidx) "sqid %"PRIu16" new_eventidx %"PRIu16"" 3297pci_nvme_mmio_read(uint64_t addr, unsigned size) "addr 0x%"PRIx64" size %d" 3298pci_nvme_mmio_write(uint64_t addr, uint64_t data, unsigned size) "addr 0x%"PRIx64" data 0x%"PRIx64" size %d" 3299pci_nvme_mmio_doorbell_cq(uint16_t cqid, uint16_t new_head) "cqid %"PRIu16" new_head %"PRIu16"" 3300pci_nvme_mmio_doorbell_sq(uint16_t sqid, uint16_t new_tail) "sqid %"PRIu16" new_tail %"PRIu16"" 3301pci_nvme_mmio_intm_set(uint64_t data, uint64_t new_mask) "wrote MMIO, interrupt mask set, data=0x%"PRIx64", new_mask=0x%"PRIx64"" 3302pci_nvme_mmio_intm_clr(uint64_t data, uint64_t new_mask) "wrote MMIO, interrupt mask clr, data=0x%"PRIx64", new_mask=0x%"PRIx64"" 3303pci_nvme_mmio_cfg(uint64_t data) "wrote MMIO, config controller config=0x%"PRIx64"" 3304pci_nvme_mmio_aqattr(uint64_t data) "wrote MMIO, admin queue attributes=0x%"PRIx64"" 3305pci_nvme_mmio_asqaddr(uint64_t data) "wrote MMIO, admin submission queue address=0x%"PRIx64"" 3306pci_nvme_mmio_acqaddr(uint64_t data) "wrote MMIO, admin completion queue address=0x%"PRIx64"" 3307pci_nvme_mmio_asqaddr_hi(uint64_t data, uint64_t new_addr) "wrote MMIO, admin submission queue high half=0x%"PRIx64", new_address=0x%"PRIx64"" 3308pci_nvme_mmio_acqaddr_hi(uint64_t data, uint64_t new_addr) "wrote MMIO, admin completion queue high half=0x%"PRIx64", new_address=0x%"PRIx64"" 3309pci_nvme_mmio_start_success(void) "setting controller enable bit succeeded" 3310pci_nvme_mmio_stopped(void) "cleared controller enable bit" 3311pci_nvme_mmio_shutdown_set(void) "shutdown bit set" 3312pci_nvme_mmio_shutdown_cleared(void) "shutdown bit cleared" 3313pci_nvme_update_cq_head(uint16_t cqid, uint16_t new_head) "cqid %"PRIu16" new_head %"PRIu16"" 3314pci_nvme_update_sq_tail(uint16_t sqid, uint16_t new_tail) "sqid %"PRIu16" new_tail %"PRIu16"" 3315pci_nvme_open_zone(uint64_t slba, uint32_t zone_idx, int all) "open zone, slba=%"PRIu64", idx=%"PRIu32", all=%"PRIi32"" 3316pci_nvme_close_zone(uint64_t slba, uint32_t zone_idx, int all) "close zone, slba=%"PRIu64", idx=%"PRIu32", all=%"PRIi32"" 3317pci_nvme_finish_zone(uint64_t slba, uint32_t zone_idx, int all) "finish zone, slba=%"PRIu64", idx=%"PRIu32", all=%"PRIi32"" 3318pci_nvme_reset_zone(uint64_t slba, uint32_t zone_idx, int all) "reset zone, slba=%"PRIu64", idx=%"PRIu32", all=%"PRIi32"" 3319pci_nvme_zns_zone_reset(uint64_t zslba) "zslba 0x%"PRIx64"" 3320pci_nvme_offline_zone(uint64_t slba, uint32_t zone_idx, int all) "offline zone, slba=%"PRIu64", idx=%"PRIu32", all=%"PRIi32"" 3321pci_nvme_set_descriptor_extension(uint64_t slba, uint32_t zone_idx) "set zone descriptor extension, slba=%"PRIu64", idx=%"PRIu32"" 3322pci_nvme_zd_extension_set(uint32_t zone_idx) "set descriptor extension for zone_idx=%"PRIu32"" 3323pci_nvme_clear_ns_close(uint32_t state, uint64_t slba) "zone state=%"PRIu32", slba=%"PRIu64" transitioned to Closed state" 3324pci_nvme_clear_ns_reset(uint32_t state, uint64_t slba) "zone state=%"PRIu32", slba=%"PRIu64" transitioned to Empty state" 3325pci_nvme_zoned_zrwa_implicit_flush(uint64_t zslba, uint32_t nlb) "zslba 0x%"PRIx64" nlb %"PRIu32"" 3326pci_nvme_pci_reset(void) "PCI Function Level Reset" 3327pci_nvme_virt_mngmt(uint16_t cid, uint16_t act, uint16_t cntlid, const char* rt, uint16_t nr) "cid %"PRIu16", act=0x%"PRIx16", ctrlid=%"PRIu16" %s nr=%"PRIu16"" 3328pci_nvme_fdp_ruh_change(uint16_t rgid, uint16_t ruhid) "change RU on RUH rgid=%"PRIu16", ruhid=%"PRIu16"" 3329 3330# error conditions 3331pci_nvme_err_mdts(size_t len) "len %zu" 3332pci_nvme_err_zasl(size_t len) "len %zu" 3333pci_nvme_err_req_status(uint16_t cid, uint32_t nsid, uint16_t status, uint8_t opc) "cid %"PRIu16" nsid %"PRIu32" status 0x%"PRIx16" opc 0x%"PRIx8"" 3334pci_nvme_err_addr_read(uint64_t addr) "addr 0x%"PRIx64"" 3335pci_nvme_err_addr_write(uint64_t addr) "addr 0x%"PRIx64"" 3336pci_nvme_err_cfs(void) "controller fatal status" 3337pci_nvme_err_aio(uint16_t cid, const char *errname, uint16_t status) "cid %"PRIu16" err '%s' status 0x%"PRIx16"" 3338pci_nvme_err_copy_invalid_format(uint8_t format) "format 0x%"PRIx8"" 3339pci_nvme_err_invalid_sgld(uint16_t cid, uint8_t typ) "cid %"PRIu16" type 0x%"PRIx8"" 3340pci_nvme_err_invalid_num_sgld(uint16_t cid, uint8_t typ) "cid %"PRIu16" type 0x%"PRIx8"" 3341pci_nvme_err_invalid_sgl_excess_length(uint32_t residual) "residual %"PRIu32"" 3342pci_nvme_err_invalid_dma(void) "PRP/SGL is too small for transfer size" 3343pci_nvme_err_invalid_prplist_ent(uint64_t prplist) "PRP list entry is not page aligned: 0x%"PRIx64"" 3344pci_nvme_err_invalid_prp2_align(uint64_t prp2) "PRP2 is not page aligned: 0x%"PRIx64"" 3345pci_nvme_err_invalid_opc(uint8_t opc) "invalid opcode 0x%"PRIx8"" 3346pci_nvme_err_invalid_admin_opc(uint8_t opc) "invalid admin opcode 0x%"PRIx8"" 3347pci_nvme_err_invalid_lba_range(uint64_t start, uint64_t len, uint64_t limit) "Invalid LBA start=%"PRIu64" len=%"PRIu64" limit=%"PRIu64"" 3348pci_nvme_err_invalid_log_page_offset(uint64_t ofs, uint64_t size) "must be <= %"PRIu64", got %"PRIu64"" 3349pci_nvme_err_cmb_invalid_cba(uint64_t cmbmsc) "cmbmsc 0x%"PRIx64"" 3350pci_nvme_err_cmb_not_enabled(uint64_t cmbmsc) "cmbmsc 0x%"PRIx64"" 3351pci_nvme_err_unaligned_zone_cmd(uint8_t action, uint64_t slba, uint64_t zslba) "unaligned zone op 0x%"PRIx32", got slba=%"PRIu64", zslba=%"PRIu64"" 3352pci_nvme_err_invalid_zone_state_transition(uint8_t action, uint64_t slba, uint8_t attrs) "action=0x%"PRIx8", slba=%"PRIu64", attrs=0x%"PRIx32"" 3353pci_nvme_err_write_not_at_wp(uint64_t slba, uint64_t zone, uint64_t wp) "writing at slba=%"PRIu64", zone=%"PRIu64", but wp=%"PRIu64"" 3354pci_nvme_err_append_not_at_start(uint64_t slba, uint64_t zone) "appending at slba=%"PRIu64", but zone=%"PRIu64"" 3355pci_nvme_err_zone_is_full(uint64_t zslba) "zslba 0x%"PRIx64"" 3356pci_nvme_err_zone_is_read_only(uint64_t zslba) "zslba 0x%"PRIx64"" 3357pci_nvme_err_zone_is_offline(uint64_t zslba) "zslba 0x%"PRIx64"" 3358pci_nvme_err_zone_boundary(uint64_t slba, uint32_t nlb, uint64_t zcap) "lba 0x%"PRIx64" nlb %"PRIu32" zcap 0x%"PRIx64"" 3359pci_nvme_err_zone_invalid_write(uint64_t slba, uint64_t wp) "lba 0x%"PRIx64" wp 0x%"PRIx64"" 3360pci_nvme_err_zone_write_not_ok(uint64_t slba, uint32_t nlb, uint16_t status) "slba=%"PRIu64", nlb=%"PRIu32", status=0x%"PRIx16"" 3361pci_nvme_err_zone_read_not_ok(uint64_t slba, uint32_t nlb, uint16_t status) "slba=%"PRIu64", nlb=%"PRIu32", status=0x%"PRIx16"" 3362pci_nvme_err_insuff_active_res(uint32_t max_active) "max_active=%"PRIu32" zone limit exceeded" 3363pci_nvme_err_insuff_open_res(uint32_t max_open) "max_open=%"PRIu32" zone limit exceeded" 3364pci_nvme_err_zd_extension_map_error(uint32_t zone_idx) "can't map descriptor extension for zone_idx=%"PRIu32"" 3365pci_nvme_err_invalid_iocsci(uint32_t idx) "unsupported command set combination index %"PRIu32"" 3366pci_nvme_err_invalid_del_sq(uint16_t qid) "invalid submission queue deletion, sid=%"PRIu16"" 3367pci_nvme_err_invalid_create_sq_cqid(uint16_t cqid) "failed creating submission queue, invalid cqid=%"PRIu16"" 3368pci_nvme_err_invalid_create_sq_sqid(uint16_t sqid) "failed creating submission queue, invalid sqid=%"PRIu16"" 3369pci_nvme_err_invalid_create_sq_size(uint16_t qsize) "failed creating submission queue, invalid qsize=%"PRIu16"" 3370pci_nvme_err_invalid_create_sq_addr(uint64_t addr) "failed creating submission queue, addr=0x%"PRIx64"" 3371pci_nvme_err_invalid_create_sq_qflags(uint16_t qflags) "failed creating submission queue, qflags=%"PRIu16"" 3372pci_nvme_err_invalid_del_cq_cqid(uint16_t cqid) "failed deleting completion queue, cqid=%"PRIu16"" 3373pci_nvme_err_invalid_del_cq_notempty(uint16_t cqid) "failed deleting completion queue, it is not empty, cqid=%"PRIu16"" 3374pci_nvme_err_invalid_create_cq_cqid(uint16_t cqid) "failed creating completion queue, cqid=%"PRIu16"" 3375pci_nvme_err_invalid_create_cq_size(uint16_t size) "failed creating completion queue, size=%"PRIu16"" 3376pci_nvme_err_invalid_create_cq_addr(uint64_t addr) "failed creating completion queue, addr=0x%"PRIx64"" 3377pci_nvme_err_invalid_create_cq_vector(uint16_t vector) "failed creating completion queue, vector=%"PRIu16"" 3378pci_nvme_err_invalid_create_cq_qflags(uint16_t qflags) "failed creating completion queue, qflags=%"PRIu16"" 3379pci_nvme_err_invalid_create_cq_entry_size(uint8_t iosqes, uint8_t iocqes) "iosqes %"PRIu8" iocqes %"PRIu8"" 3380pci_nvme_err_invalid_identify_cns(uint16_t cns) "identify, invalid cns=0x%"PRIx16"" 3381pci_nvme_err_invalid_getfeat(int dw10) "invalid get features, dw10=0x%"PRIx32"" 3382pci_nvme_err_invalid_setfeat(uint32_t dw10) "invalid set features, dw10=0x%"PRIx32"" 3383pci_nvme_err_invalid_log_page(uint16_t cid, uint16_t lid) "cid %"PRIu16" lid 0x%"PRIx16"" 3384pci_nvme_err_startfail_cq(void) "nvme_start_ctrl failed because there are non-admin completion queues" 3385pci_nvme_err_startfail_sq(void) "nvme_start_ctrl failed because there are non-admin submission queues" 3386pci_nvme_err_startfail_asq_misaligned(uint64_t addr) "nvme_start_ctrl failed because the admin submission queue address is misaligned: 0x%"PRIx64"" 3387pci_nvme_err_startfail_acq_misaligned(uint64_t addr) "nvme_start_ctrl failed because the admin completion queue address is misaligned: 0x%"PRIx64"" 3388pci_nvme_err_startfail_page_too_small(uint8_t log2ps, uint8_t maxlog2ps) "nvme_start_ctrl failed because the page size is too small: log2size=%u, min=%u" 3389pci_nvme_err_startfail_page_too_large(uint8_t log2ps, uint8_t maxlog2ps) "nvme_start_ctrl failed because the page size is too large: log2size=%u, max=%u" 3390pci_nvme_err_startfail_cqent_too_small(uint8_t log2ps, uint8_t maxlog2ps) "nvme_start_ctrl failed because the completion queue entry size is too small: log2size=%u, min=%u" 3391pci_nvme_err_startfail_cqent_too_large(uint8_t log2ps, uint8_t maxlog2ps) "nvme_start_ctrl failed because the completion queue entry size is too large: log2size=%u, max=%u" 3392pci_nvme_err_startfail_sqent_too_small(uint8_t log2ps, uint8_t maxlog2ps) "nvme_start_ctrl failed because the submission queue entry size is too small: log2size=%u, min=%u" 3393pci_nvme_err_startfail_sqent_too_large(uint8_t log2ps, uint8_t maxlog2ps) "nvme_start_ctrl failed because the submission queue entry size is too large: log2size=%u, max=%u" 3394pci_nvme_err_startfail_css(uint8_t css) "nvme_start_ctrl failed because invalid command set selected:%u" 3395pci_nvme_err_startfail_asqent_sz_zero(void) "nvme_start_ctrl failed because the admin submission queue size is zero" 3396pci_nvme_err_startfail_acqent_sz_zero(void) "nvme_start_ctrl failed because the admin completion queue size is zero" 3397pci_nvme_err_startfail_zasl_too_small(uint32_t zasl, uint32_t pagesz) "nvme_start_ctrl failed because zone append size limit %"PRIu32" is too small, needs to be >= %"PRIu32"" 3398pci_nvme_err_startfail(void) "setting controller enable bit failed" 3399pci_nvme_err_startfail_virt_state(uint16_t vq, uint16_t vi) "nvme_start_ctrl failed due to ctrl state: vi=%u vq=%u" 3400pci_nvme_err_invalid_mgmt_action(uint8_t action) "action=0x%"PRIx8"" 3401pci_nvme_err_ignored_mmio_vf_offline(uint64_t addr, unsigned size) "addr 0x%"PRIx64" size %d" 3402 3403# undefined behavior 3404pci_nvme_ub_mmiowr_misaligned32(uint64_t offset) "MMIO write not 32-bit aligned, offset=0x%"PRIx64"" 3405pci_nvme_ub_mmiowr_toosmall(uint64_t offset, unsigned size) "MMIO write smaller than 32 bits, offset=0x%"PRIx64", size=%u" 3406pci_nvme_ub_mmiowr_intmask_with_msix(void) "undefined access to interrupt mask set when MSI-X is enabled" 3407pci_nvme_ub_mmiowr_ro_csts(void) "attempted to set a read only bit of controller status" 3408pci_nvme_ub_mmiowr_ssreset_w1c_unsupported(void) "attempted to W1C CSTS.NSSRO but CAP.NSSRS is zero (not supported)" 3409pci_nvme_ub_mmiowr_ssreset_unsupported(void) "attempted NVM subsystem reset but CAP.NSSRS is zero (not supported)" 3410pci_nvme_ub_mmiowr_cmbloc_reserved(void) "invalid write to reserved CMBLOC when CMBSZ is zero, ignored" 3411pci_nvme_ub_mmiowr_cmbsz_readonly(void) "invalid write to read only CMBSZ, ignored" 3412pci_nvme_ub_mmiowr_pmrcap_readonly(void) "invalid write to read only PMRCAP, ignored" 3413pci_nvme_ub_mmiowr_pmrsts_readonly(void) "invalid write to read only PMRSTS, ignored" 3414pci_nvme_ub_mmiowr_pmrebs_readonly(void) "invalid write to read only PMREBS, ignored" 3415pci_nvme_ub_mmiowr_pmrswtp_readonly(void) "invalid write to read only PMRSWTP, ignored" 3416pci_nvme_ub_mmiowr_invalid(uint64_t offset, uint64_t data) "invalid MMIO write, offset=0x%"PRIx64", data=0x%"PRIx64"" 3417pci_nvme_ub_mmiord_misaligned32(uint64_t offset) "MMIO read not 32-bit aligned, offset=0x%"PRIx64"" 3418pci_nvme_ub_mmiord_toosmall(uint64_t offset) "MMIO read smaller than 32-bits, offset=0x%"PRIx64"" 3419pci_nvme_ub_mmiord_invalid_ofs(uint64_t offset) "MMIO read beyond last register, offset=0x%"PRIx64", returning 0" 3420pci_nvme_ub_db_wr_misaligned(uint64_t offset) "doorbell write not 32-bit aligned, offset=0x%"PRIx64", ignoring" 3421pci_nvme_ub_db_wr_invalid_cq(uint32_t qid) "completion queue doorbell write for nonexistent queue, cqid=%"PRIu32", ignoring" 3422pci_nvme_ub_db_wr_invalid_cqhead(uint32_t qid, uint16_t new_head) "completion queue doorbell write value beyond queue size, cqid=%"PRIu32", new_head=%"PRIu16", ignoring" 3423pci_nvme_ub_db_wr_invalid_sq(uint32_t qid) "submission queue doorbell write for nonexistent queue, sqid=%"PRIu32", ignoring" 3424pci_nvme_ub_db_wr_invalid_sqtail(uint32_t qid, uint16_t new_tail) "submission queue doorbell write value beyond queue size, sqid=%"PRIu32", new_head=%"PRIu16", ignoring" 3425pci_nvme_ub_unknown_css_value(void) "unknown value in cc.css field" 3426pci_nvme_ub_too_many_mappings(void) "too many prp/sgl mappings" 3427# See docs/devel/tracing.rst for syntax documentation. 3428 3429# ds1225y.c 3430nvram_read(uint32_t addr, uint32_t ret) "read addr %d: 0x%02x" 3431nvram_write(uint32_t addr, uint32_t old, uint32_t val) "write addr %d: 0x%02x -> 0x%02x" 3432 3433# fw_cfg.c 3434fw_cfg_select(void *s, uint16_t key_value, const char *key_name, int ret) "%p key 0x%04" PRIx16 " '%s', ret: %d" 3435fw_cfg_read(void *s, uint64_t ret) "%p = 0x%"PRIx64 3436fw_cfg_add_bytes(uint16_t key_value, const char *key_name, size_t len) "key 0x%04" PRIx16 " '%s', %zu bytes" 3437fw_cfg_add_file(void *s, int index, char *name, size_t len) "%p #%d: %s (%zd bytes)" 3438fw_cfg_add_string(uint16_t key_value, const char *key_name, const char *value) "key 0x%04" PRIx16 " '%s', value '%s'" 3439fw_cfg_add_i16(uint16_t key_value, const char *key_name, uint16_t value) "key 0x%04" PRIx16 " '%s', value 0x%" PRIx16 3440fw_cfg_add_i32(uint16_t key_value, const char *key_name, uint32_t value) "key 0x%04" PRIx16 " '%s', value 0x%" PRIx32 3441fw_cfg_add_i64(uint16_t key_value, const char *key_name, uint64_t value) "key 0x%04" PRIx16 " '%s', value 0x%" PRIx64 3442 3443# mac_nvram.c 3444macio_nvram_read(uint32_t addr, uint8_t val) "read addr=0x%04"PRIx32" val=0x%02x" 3445macio_nvram_write(uint32_t addr, uint8_t val) "write addr=0x%04"PRIx32" val=0x%02x" 3446# See docs/devel/tracing.rst for syntax documentation. 3447 3448# pci.c 3449pci_update_mappings_del(const char *dev, uint32_t bus, uint32_t slot, uint32_t func, int bar, uint64_t addr, uint64_t size) "%s %02x:%02x.%x %d,0x%"PRIx64"+0x%"PRIx64 3450pci_update_mappings_add(const char *dev, uint32_t bus, uint32_t slot, uint32_t func, int bar, uint64_t addr, uint64_t size) "%s %02x:%02x.%x %d,0x%"PRIx64"+0x%"PRIx64 3451pci_route_irq(int dev_irq, const char *dev_path, int parent_irq, const char *parent_path) "IRQ %d @%s -> IRQ %d @%s" 3452 3453# pci_host.c 3454pci_cfg_read(const char *dev, uint32_t bus, uint32_t slot, uint32_t func, unsigned offs, unsigned val) "%s %02x:%02x.%x @0x%x -> 0x%x" 3455pci_cfg_write(const char *dev, uint32_t bus, uint32_t slot, uint32_t func, unsigned offs, unsigned val) "%s %02x:%02x.%x @0x%x <- 0x%x" 3456 3457# msix.c 3458msix_write_config(char *name, bool enabled, bool masked) "dev %s enabled %d masked %d" 3459 3460# hw/pci/pcie_sriov.c 3461sriov_register_vfs(const char *name, int slot, int function, int num_vfs) "%s %02x:%x: creating %d vf devs" 3462sriov_unregister_vfs(const char *name, int slot, int function, int num_vfs) "%s %02x:%x: Unregistering %d vf devs" 3463sriov_config_write(const char *name, int slot, int fun, uint32_t offset, uint32_t val, uint32_t len) "%s %02x:%x: sriov offset 0x%x val 0x%x len %d" 3464# See docs/devel/tracing.rst for syntax documentation. 3465 3466# bonito.c 3467bonito_spciconf_small_access(uint64_t addr, unsigned size) "PCI config address is smaller then 32-bit, addr: 0x%"PRIx64", size: %u" 3468 3469# grackle.c 3470grackle_set_irq(int irq_num, int level) "set_irq num %d level %d" 3471 3472# gt64120.c 3473gt64120_read(uint64_t addr, uint64_t value) "gt64120 read 0x%03"PRIx64" value:0x%08" PRIx64 3474gt64120_write(uint64_t addr, uint64_t value) "gt64120 write 0x%03"PRIx64" value:0x%08" PRIx64 3475gt64120_read_intreg(const char *regname, unsigned size, uint64_t value) "gt64120 read %s size:%u value:0x%08" PRIx64 3476gt64120_write_intreg(const char *regname, unsigned size, uint64_t value) "gt64120 write %s size:%u value:0x%08" PRIx64 3477gt64120_isd_remap(uint64_t from_length, uint64_t from_addr, uint64_t to_length, uint64_t to_addr) "ISD: 0x%08" PRIx64 "@0x%08" PRIx64 " -> 0x%08" PRIx64 "@0x%08" PRIx64 3478 3479# mv64361.c 3480mv64361_region_map(const char *name, uint64_t poffs, uint64_t size, uint64_t moffs) "Mapping %s 0x%"PRIx64"+0x%"PRIx64" @ 0x%"PRIx64 3481mv64361_region_enable(const char *op, int num) "Should %s region %d" 3482mv64361_reg_read(uint64_t addr, uint32_t val) "0x%"PRIx64" -> 0x%x" 3483mv64361_reg_write(uint64_t addr, uint64_t val) "0x%"PRIx64" <- 0x%"PRIx64 3484 3485# sabre.c 3486sabre_set_request(int irq_num) "request irq %d" 3487sabre_clear_request(int irq_num) "clear request irq %d" 3488sabre_config_write(uint64_t addr, uint64_t val) "addr 0x%"PRIx64" val 0x%"PRIx64 3489sabre_config_read(uint64_t addr, uint64_t val) "addr 0x%"PRIx64" val 0x%"PRIx64 3490sabre_pci_config_write(uint64_t addr, uint64_t val) "addr 0x%"PRIx64" val 0x%"PRIx64 3491sabre_pci_config_read(uint64_t addr, uint64_t val) "addr 0x%"PRIx64" val 0x%"PRIx64 3492sabre_pci_set_irq(int irq_num, int level) "set irq_in %d level %d" 3493sabre_pci_set_obio_irq(int irq_num, int level) "set irq %d level %d" 3494 3495# uninorth.c 3496unin_set_irq(int irq_num, int level) "setting INT %d = %d" 3497unin_get_config_reg(uint32_t reg, uint32_t addr, uint32_t retval) "converted config space accessor 0x%"PRIx32 "/0x%"PRIx32 " -> 0x%"PRIx32 3498unin_data_write(uint64_t addr, unsigned len, uint64_t val) "write addr 0x%"PRIx64 " len %d val 0x%"PRIx64 3499unin_data_read(uint64_t addr, unsigned len, uint64_t val) "read addr 0x%"PRIx64 " len %d val 0x%"PRIx64 3500unin_write(uint64_t addr, uint64_t value) "addr=0x%" PRIx64 " val=0x%"PRIx64 3501unin_read(uint64_t addr, uint64_t value) "addr=0x%" PRIx64 " val=0x%"PRIx64 3502 3503# pnv_phb4.c 3504pnv_phb4_xive_notify(uint64_t notif_port, uint64_t data) "notif=@0x%"PRIx64" data=0x%"PRIx64 3505pnv_phb4_xive_notify_ic(uint64_t addr, uint64_t data) "addr=@0x%"PRIx64" data=0x%"PRIx64 3506pnv_phb4_xive_notify_abt(uint64_t notif_port, uint64_t data) "notif=@0x%"PRIx64" data=0x%"PRIx64 3507 3508# dino.c 3509dino_chip_mem_valid(uint64_t addr, uint32_t val) "access to addr 0x%"PRIx64" is %d" 3510dino_chip_read(uint64_t addr, uint32_t val) "addr 0x%"PRIx64" val 0x%08x" 3511dino_chip_write(uint64_t addr, uint32_t val) "addr 0x%"PRIx64" val 0x%08x" 3512 3513# astro.c 3514astro_chip_mem_valid(uint64_t addr, uint32_t val) "access to addr 0x%"PRIx64" is %d" 3515astro_chip_read(uint64_t addr, int size, uint64_t val) "addr 0x%"PRIx64" size %d val 0x%"PRIx64 3516astro_chip_write(uint64_t addr, int size, uint64_t val) "addr 0x%"PRIx64" size %d val 0x%"PRIx64 3517elroy_read(uint64_t addr, int size, uint64_t val) "addr 0x%"PRIx64" size %d val 0x%"PRIx64 3518elroy_write(uint64_t addr, int size, uint64_t val) "addr 0x%"PRIx64" size %d val 0x%"PRIx64 3519elroy_pci_config_data_read(uint64_t addr, int size, uint64_t val) "addr 0x%"PRIx64" size %d val 0x%"PRIx64 3520elroy_pci_config_data_write(uint64_t addr, int size, uint64_t val) "addr 0x%"PRIx64" size %d val 0x%"PRIx64 3521iosapic_reg_write(uint64_t reg_select, int size, uint64_t val) "reg_select 0x%"PRIx64" size %d val 0x%"PRIx64 3522iosapic_reg_read(uint64_t reg_select, int size, uint64_t val) "reg_select 0x%"PRIx64" size %d val 0x%"PRIx64 3523# See docs/devel/tracing.rst for syntax documentation. 3524 3525# spapr_pci.c 3526spapr_pci_msi(const char *msg, uint32_t ca) "%s (cfg=0x%x)" 3527spapr_pci_msi_setup(const char *name, unsigned vector, uint64_t addr) "dev\"%s\" vector %u, addr=0x%"PRIx64 3528spapr_pci_rtas_ibm_change_msi(unsigned cfg, unsigned func, unsigned req, unsigned first) "cfgaddr 0x%x func %u, requested %u, first irq %u" 3529spapr_pci_rtas_ibm_query_interrupt_source_number(unsigned ioa, unsigned intr) "queries for #%u, IRQ%u" 3530spapr_pci_msi_write(uint64_t addr, uint64_t data, uint32_t dt_irq) "@0x%"PRIx64"<=0x%"PRIx64" IRQ %u" 3531spapr_pci_lsi_set(const char *busname, int pin, uint32_t irq) "%s PIN%d IRQ %u" 3532spapr_pci_msi_retry(unsigned config_addr, unsigned req_num, unsigned max_irqs) "Guest device at 0x%x asked %u, have only %u" 3533 3534# spapr_hcall.c 3535spapr_cas_continue(unsigned long n) "Copy changes to the guest: %ld bytes" 3536spapr_cas_pvr(uint32_t cur_pvr, bool explicit_match, uint32_t new_pvr) "current=0x%x, explicit_match=%u, new=0x%x" 3537spapr_h_resize_hpt_prepare(uint64_t flags, uint64_t shift) "flags=0x%"PRIx64", shift=%"PRIu64 3538spapr_h_resize_hpt_commit(uint64_t flags, uint64_t shift) "flags=0x%"PRIx64", shift=%"PRIu64 3539spapr_update_dt(unsigned cb) "New blob %u bytes" 3540spapr_update_dt_failed_size(unsigned cbold, unsigned cbnew, unsigned magic) "Old blob %u bytes, new blob %u bytes, magic 0x%x" 3541spapr_update_dt_failed_check(unsigned cbold, unsigned cbnew, unsigned magic) "Old blob %u bytes, new blob %u bytes, magic 0x%x" 3542 3543# spapr_tpm_proxy.c 3544spapr_h_tpm_comm(const char *device_path, uint64_t operation) "tpm_device_path=%s operation=0x%"PRIx64 3545spapr_tpm_execute(uint64_t data_in, uint64_t data_in_sz, uint64_t data_out, uint64_t data_out_sz) "data_in=0x%"PRIx64", data_in_sz=%"PRIu64", data_out=0x%"PRIx64", data_out_sz=%"PRIu64 3546 3547# spapr_iommu.c 3548spapr_iommu_put(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t ret) "liobn=0x%"PRIx64" ioba=0x%"PRIx64" tce=0x%"PRIx64" ret=%"PRId64 3549spapr_iommu_get(uint64_t liobn, uint64_t ioba, uint64_t ret, uint64_t tce) "liobn=0x%"PRIx64" ioba=0x%"PRIx64" ret=%"PRId64" tce=0x%"PRIx64 3550spapr_iommu_indirect(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t iobaN, uint64_t tceN, uint64_t ret) "liobn=0x%"PRIx64" ioba=0x%"PRIx64" tcelist=0x%"PRIx64" iobaN=0x%"PRIx64" tceN=0x%"PRIx64" ret=%"PRId64 3551spapr_iommu_stuff(uint64_t liobn, uint64_t ioba, uint64_t tce_value, uint64_t npages, uint64_t ret) "liobn=0x%"PRIx64" ioba=0x%"PRIx64" tcevalue=0x%"PRIx64" npages=%"PRId64" ret=%"PRId64 3552spapr_iommu_pci_put(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t ret) "liobn=0x%"PRIx64" ioba=0x%"PRIx64" tce=0x%"PRIx64" ret=%"PRId64 3553spapr_iommu_pci_get(uint64_t liobn, uint64_t ioba, uint64_t ret, uint64_t tce) "liobn=0x%"PRIx64" ioba=0x%"PRIx64" ret=%"PRId64" tce=0x%"PRIx64 3554spapr_iommu_pci_indirect(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t iobaN, uint64_t tceN, uint64_t ret) "liobn=0x%"PRIx64" ioba=0x%"PRIx64" tcelist=0x%"PRIx64" iobaN=0x%"PRIx64" tceN=0x%"PRIx64" ret=%"PRId64 3555spapr_iommu_pci_stuff(uint64_t liobn, uint64_t ioba, uint64_t tce_value, uint64_t npages, uint64_t ret) "liobn=0x%"PRIx64" ioba=0x%"PRIx64" tcevalue=0x%"PRIx64" npages=%"PRId64" ret=%"PRId64 3556spapr_iommu_xlate(uint64_t liobn, uint64_t ioba, uint64_t tce, unsigned perm, unsigned pgsize) "liobn=0x%"PRIx64" 0x%"PRIx64" -> 0x%"PRIx64" perm=%u mask=0x%x" 3557spapr_iommu_new_table(uint64_t liobn, void *table, int fd) "liobn=0x%"PRIx64" table=%p fd=%d" 3558spapr_iommu_pre_save(uint64_t liobn, uint32_t nb, uint64_t offs, uint32_t ps) "liobn=%"PRIx64" %"PRIx32" bus_offset=0x%"PRIx64" ps=%"PRIu32 3559spapr_iommu_post_load(uint64_t liobn, uint32_t pre_nb, uint32_t post_nb, uint64_t offs, uint32_t ps) "liobn=%"PRIx64" %"PRIx32" => 0x%"PRIx32" bus_offset=0x%"PRIx64" ps=%"PRIu32 3560 3561# spapr_rtas_ddw.c 3562spapr_iommu_ddw_query(uint64_t buid, uint32_t cfgaddr, unsigned wa, uint64_t win_size, uint32_t pgmask) "buid=0x%"PRIx64" addr=0x%"PRIx32", %u windows available, max window size=0x%"PRIx64", mask=0x%"PRIx32 3563spapr_iommu_ddw_create(uint64_t buid, uint32_t cfgaddr, uint64_t pg_size, uint64_t req_size, uint64_t start, uint32_t liobn) "buid=0x%"PRIx64" addr=0x%"PRIx32", page size=0x%"PRIx64", requested=0x%"PRIx64", start addr=0x%"PRIx64", liobn=0x%"PRIx32 3564spapr_iommu_ddw_remove(uint32_t liobn) "liobn=0x%"PRIx32 3565spapr_iommu_ddw_reset(uint64_t buid, uint32_t cfgaddr) "buid=0x%"PRIx64" addr=0x%"PRIx32 3566 3567# spapr_drc.c 3568spapr_drc_set_isolation_state(uint32_t index, int state) "drc: 0x%"PRIx32", state: 0x%"PRIx32 3569spapr_drc_set_isolation_state_finalizing(uint32_t index) "drc: 0x%"PRIx32 3570spapr_drc_set_dr_indicator(uint32_t index, int state) "drc: 0x%"PRIx32", state: 0x%x" 3571spapr_drc_set_allocation_state(uint32_t index, int state) "drc: 0x%"PRIx32", state: 0x%x" 3572spapr_drc_set_allocation_state_finalizing(uint32_t index) "drc: 0x%"PRIx32 3573spapr_drc_set_configured(uint32_t index) "drc: 0x%"PRIx32 3574spapr_drc_attach(uint32_t index) "drc: 0x%"PRIx32 3575spapr_drc_unplug_request(uint32_t index) "drc: 0x%"PRIx32 3576spapr_drc_awaiting_quiesce(uint32_t index) "drc: 0x%"PRIx32 3577spapr_drc_reset(uint32_t index) "drc: 0x%"PRIx32 3578spapr_drc_realize(uint32_t index) "drc: 0x%"PRIx32 3579spapr_drc_realize_child(uint32_t index, const char *childname) "drc: 0x%"PRIx32", child name: %s" 3580spapr_drc_realize_complete(uint32_t index) "drc: 0x%"PRIx32 3581spapr_drc_unrealize(uint32_t index) "drc: 0x%"PRIx32 3582 3583# spapr_ovec.c 3584spapr_ovec_parse_vector(int vector, int byte, uint16_t vec_len, uint8_t entry) "read guest vector %2d, byte %3d / %3d: 0x%.2x" 3585spapr_ovec_populate_dt(int byte, uint16_t vec_len, uint8_t entry) "encoding guest vector byte %3d / %3d: 0x%.2x" 3586 3587# spapr_drc.c 3588spapr_rtas_get_sensor_state_not_supported(uint32_t index, uint32_t type) "sensor index: 0x%"PRIx32", type: %"PRIu32 3589spapr_rtas_get_sensor_state_invalid(uint32_t index) "sensor index: 0x%"PRIx32 3590spapr_rtas_ibm_configure_connector_invalid(uint32_t index) "DRC index: 0x%"PRIx32 3591 3592# spapr_vio.c 3593spapr_vio_h_reg_crq(uint64_t reg, uint64_t queue_addr, uint64_t queue_len) "CRQ for dev 0x%" PRIx64 " registered at 0x%" PRIx64 "/0x%" PRIx64 3594spapr_vio_free_crq(uint32_t reg) "CRQ for dev 0x%" PRIx32 " freed" 3595 3596# vof.c 3597vof_error_str_truncated(const char *s, int len) "%s truncated to %d" 3598vof_error_param(const char *method, int nargscheck, int nretcheck, int nargs, int nret) "%s takes/returns %d/%d, not %d/%d" 3599vof_error_unknown_service(const char *service, int nargs, int nret) "\"%s\" args=%d rets=%d" 3600vof_error_unknown_method(const char *method) "\"%s\"" 3601vof_error_unknown_ihandle_close(uint32_t ih) "ih=0x%x" 3602vof_error_unknown_path(const char *path) "\"%s\"" 3603vof_error_write(uint32_t ih) "ih=0x%x" 3604vof_finddevice(const char *path, uint32_t ph) "\"%s\" => ph=0x%x" 3605vof_claim(uint32_t virt, uint32_t size, uint32_t align, uint32_t ret) "virt=0x%x size=0x%x align=0x%x => 0x%x" 3606vof_release(uint32_t virt, uint32_t size, uint32_t ret) "virt=0x%x size=0x%x => 0x%x" 3607vof_method(uint32_t ihandle, const char *method, uint32_t param, uint32_t ret, uint32_t ret2) "ih=0x%x \"%s\"(0x%x) => 0x%x 0x%x" 3608vof_getprop(uint32_t ph, const char *prop, uint32_t ret, const char *val) "ph=0x%x \"%s\" => len=%d [%s]" 3609vof_getproplen(uint32_t ph, const char *prop, uint32_t ret) "ph=0x%x \"%s\" => len=%d" 3610vof_setprop(uint32_t ph, const char *prop, const char *val, uint32_t vallen, uint32_t ret) "ph=0x%x \"%s\" [%s] len=%d => ret=%d" 3611vof_open(const char *path, uint32_t ph, uint32_t ih) "%s ph=0x%x => ih=0x%x" 3612vof_interpret(const char *cmd, uint32_t param1, uint32_t param2, uint32_t ret, uint32_t ret2) "[%s] 0x%x 0x%x => 0x%x 0x%x" 3613vof_package_to_path(uint32_t ph, const char *tmp, int ret) "ph=0x%x => %s len=%d" 3614vof_instance_to_path(uint32_t ih, uint32_t ph, const char *tmp, int ret) "ih=0x%x ph=0x%x => %s len=%d" 3615vof_instance_to_package(uint32_t ih, uint32_t ph) "ih=0x%x => ph=0x%x" 3616vof_write(uint32_t ih, unsigned cb, const char *msg) "ih=0x%x [%u] \"%s\"" 3617vof_avail(uint64_t start, uint64_t end, uint64_t size) "0x%"PRIx64"..0x%"PRIx64" size=0x%"PRIx64 3618vof_claimed(uint64_t start, uint64_t end, uint64_t size) "0x%"PRIx64"..0x%"PRIx64" size=0x%"PRIx64 3619 3620# pnv_sbe.c 3621pnv_sbe_xscom_ctrl_read(uint64_t addr, uint64_t val) "addr 0x%" PRIx64 " val 0x%" PRIx64 3622pnv_sbe_xscom_ctrl_write(uint64_t addr, uint64_t val) "addr 0x%" PRIx64 " val 0x%" PRIx64 3623pnv_sbe_xscom_mbox_read(uint64_t addr, uint64_t val) "addr 0x%" PRIx64 " val 0x%" PRIx64 3624pnv_sbe_xscom_mbox_write(uint64_t addr, uint64_t val) "addr 0x%" PRIx64 " val 0x%" PRIx64 3625pnv_sbe_reg_set_host_doorbell(uint64_t val) "val 0x%" PRIx64 3626pnv_sbe_cmd_timer_start(uint64_t ns) "ns 0x%" PRIu64 3627pnv_sbe_cmd_timer_stop(void) "" 3628pnv_sbe_cmd_timer_expired(void) "" 3629pnv_sbe_msg_recv(uint16_t cmd, uint16_t seq, uint16_t ctrl_flags) "cmd 0x%" PRIx16 " seq %"PRIu16 " ctrl_flags 0x%" PRIx16 3630 3631# ppc.c 3632ppc_tb_adjust(uint64_t offs1, uint64_t offs2, int64_t diff, int64_t seconds) "adjusted from 0x%"PRIx64" to 0x%"PRIx64", diff %"PRId64" (%"PRId64"s)" 3633ppc_tb_load(uint64_t tb) "tb 0x%016" PRIx64 3634ppc_tb_store(uint64_t tb, uint64_t offset) "tb 0x%016" PRIx64 " offset 0x%08" PRIx64 3635 3636ppc_decr_load(uint64_t tb) "decr 0x%016" PRIx64 3637ppc_decr_excp(const char *action) "%s decrementer" 3638ppc_decr_store(uint32_t nr_bits, uint64_t decr, uint64_t value) "%d-bit 0x%016" PRIx64 " => 0x%016" PRIx64 3639 3640ppc4xx_fit(uint32_t ir, uint64_t tcr, uint64_t tsr) "ir %d TCR 0x%" PRIx64 " TSR 0x%" PRIx64 3641ppc4xx_pit_stop(void) "" 3642ppc4xx_pit_start(uint64_t reload) "PIT 0x%016" PRIx64 3643ppc4xx_pit(uint32_t ar, uint32_t ir, uint64_t tcr, uint64_t tsr, uint64_t reload) "ar %d ir %d TCR 0x%" PRIx64 " TSR 0x%" PRIx64 " PIT 0x%016" PRIx64 3644ppc4xx_wdt(uint64_t tcr, uint64_t tsr) "TCR 0x%" PRIx64 " TSR 0x%" PRIx64 3645ppc40x_store_pit(uint64_t value) "val 0x%" PRIx64 3646ppc40x_store_tcr(uint64_t value) "val 0x%" PRIx64 3647ppc40x_store_tsr(uint64_t value) "val 0x%" PRIx64 3648ppc40x_set_tb_clk(uint32_t value) "new frequency %" PRIu32 3649ppc40x_timers_init(uint32_t value) "frequency %" PRIu32 3650 3651ppc_irq_set(void *env, uint32_t pin, uint32_t level) "env [%p] pin %d level %d" 3652ppc_irq_set_exit(void *env, uint32_t irq, uint32_t level, uint32_t pending, uint32_t request) "env [%p] irq 0x%05" PRIx32 " level %d => pending 0x%08" PRIx32 " req 0x%08" PRIx32 3653ppc_irq_set_state(const char *name, uint32_t level) "\"%s\" level %d" 3654ppc_irq_reset(const char *name) "%s" 3655ppc_irq_cpu(const char *action) "%s" 3656 3657ppc_dcr_read(uint32_t addr, uint32_t val) "DRCN[0x%x] -> 0x%x" 3658ppc_dcr_write(uint32_t addr, uint32_t val) "DRCN[0x%x] <- 0x%x" 3659 3660# prep_systemio.c 3661prep_systemio_read(uint32_t addr, uint32_t val) "read addr=0x%x val=0x%x" 3662prep_systemio_write(uint32_t addr, uint32_t val) "write addr=0x%x val=0x%x" 3663 3664# rs6000_mc.c 3665rs6000mc_id_read(uint32_t addr, uint32_t val) "read addr=0x%x val=0x%x" 3666rs6000mc_presence_read(uint32_t addr, uint32_t val) "read addr=0x%x val=0x%x" 3667rs6000mc_size_read(uint32_t addr, uint32_t val) "read addr=0x%x val=0x%x" 3668rs6000mc_size_write(uint32_t addr, uint32_t val) "write addr=0x%x val=0x%x" 3669rs6000mc_parity_read(uint32_t addr, uint32_t val) "read addr=0x%x val=0x%x" 3670 3671# ppc4xx_pci.c 3672ppc4xx_pci_map_irq(int32_t devfn, int irq_num, int slot) "devfn 0x%x irq %d -> %d" 3673ppc4xx_pci_set_irq(int irq_num) "PCI irq %d" 3674 3675# ppc440_pcix.c 3676ppc440_pcix_map_irq(int32_t devfn, int irq_num, int slot) "devfn 0x%x irq %d -> %d" 3677ppc440_pcix_set_irq(int irq_num) "PCI irq %d" 3678ppc440_pcix_update_pim(int idx, uint64_t size, uint64_t la) "Added window %d of size=0x%" PRIx64 " to CPU=0x%" PRIx64 3679ppc440_pcix_update_pom(int idx, uint32_t size, uint64_t la, uint64_t pcia) "Added window %d of size=0x%x from CPU=0x%" PRIx64 " to PCI=0x%" PRIx64 3680ppc440_pcix_reg_read(uint64_t addr, uint32_t val) "addr 0x%" PRIx64 " = 0x%" PRIx32 3681ppc440_pcix_reg_write(uint64_t addr, uint32_t val, uint32_t size) "addr 0x%" PRIx64 " = 0x%" PRIx32 " size 0x%" PRIx32 3682 3683# ppc405_boards.c 3684opba_readb(uint64_t addr, uint32_t val) "addr 0x%" PRIx64 " = 0x%" PRIx32 3685opba_writeb(uint64_t addr, uint64_t val) "addr 0x%" PRIx64 " = 0x%" PRIx64 3686 3687ppc405_gpio_read(uint64_t addr, uint32_t size) "addr 0x%" PRIx64 " size %d" 3688ppc405_gpio_write(uint64_t addr, uint32_t size, uint64_t val) "addr 0x%" PRIx64 " size %d = 0x%" PRIx64 3689 3690ocm_update_mappings(uint32_t isarc, uint32_t isacntl, uint32_t dsarc, uint32_t dsacntl, uint32_t ocm_isarc, uint32_t ocm_isacntl, uint32_t ocm_dsarc, uint32_t ocm_dsacntl) "OCM update ISA 0x%08" PRIx32 " 0x%08" PRIx32 " (0x%08" PRIx32" 0x%08" PRIx32 ") DSA 0x%08" PRIx32 " 0x%08" PRIx32" (0x%08" PRIx32 " 0x%08" PRIx32 ")" 3691ocm_map(const char* prefix, uint32_t isarc) "OCM map %s 0x%08" PRIx32 3692ocm_unmap(const char* prefix, uint32_t isarc) "OCM unmap %s 0x%08" PRIx32 3693 3694ppc4xx_gpt_read(uint64_t addr, uint32_t size) "addr 0x%" PRIx64 " size %d" 3695ppc4xx_gpt_write(uint64_t addr, uint32_t size, uint64_t val) "addr 0x%" PRIx64 " size %d = 0x%" PRIx64 3696 3697ppc405ep_clocks_compute(const char *param, uint32_t param2, uint32_t val) "%s 0x%1" PRIx32 " %d" 3698ppc405ep_clocks_setup(const char *trace) "%s" 3699 3700# ppc4xx_devs.c 3701ppc4xx_sdram_enable(const char *trace) "%s SDRAM controller" 3702ppc4xx_sdram_unmap(uint64_t addr, uint64_t size) "Unmap RAM area 0x%" PRIx64 " size 0x%" PRIx64 3703ppc4xx_sdram_map(uint64_t addr, uint64_t size) "Map RAM area 0x%" PRIx64 " size 0x%" PRIx64 3704ppc4xx_sdram_init(uint64_t base, uint64_t size, uint32_t bcr) "Init RAM area 0x%" PRIx64 " size 0x%" PRIx64 " bcr 0x%x" 3705# See docs/devel/tracing.rst for syntax documentation. 3706 3707# rdma_backend.c 3708rdma_check_dev_attr(const char *name, int max_bk, int max_fe) "%s: be=%d, fe=%d" 3709rdma_create_ah_cache_hit(uint64_t subnet, uint64_t if_id) "subnet=0x%"PRIx64",if_id=0x%"PRIx64 3710rdma_create_ah_cache_miss(uint64_t subnet, uint64_t if_id) "subnet=0x%"PRIx64",if_id=0x%"PRIx64 3711rdma_poll_cq(int ne, void *ibcq) "Got %d completion(s) from cq %p" 3712rdmacm_mux(const char *title, int msg_type, int op_code) "%s: msg_type=%d, op_code=%d" 3713rdmacm_mux_check_op_status(int msg_type, int op_code, int err_code) "resp: msg_type=%d, op_code=%d, err_code=%d" 3714rdma_mad_message(const char *title, int len, char *data) "mad %s (%d): %s" 3715rdma_backend_rc_qp_state_init(uint32_t qpn) "RC QP 0x%x switch to INIT" 3716rdma_backend_ud_qp_state_init(uint32_t qpn, uint32_t qkey) "UD QP 0x%x switch to INIT, qkey=0x%x" 3717rdma_backend_rc_qp_state_rtr(uint32_t qpn, uint64_t subnet, uint64_t ifid, uint8_t sgid_idx, uint32_t dqpn, uint32_t rq_psn) "RC QP 0x%x switch to RTR, subnet = 0x%"PRIx64", ifid = 0x%"PRIx64 ", sgid_idx=%d, dqpn=0x%x, rq_psn=0x%x" 3718rdma_backend_ud_qp_state_rtr(uint32_t qpn, uint32_t qkey) "UD QP 0x%x switch to RTR, qkey=0x%x" 3719rdma_backend_rc_qp_state_rts(uint32_t qpn, uint32_t sq_psn) "RC QP 0x%x switch to RTS, sq_psn=0x%x, " 3720rdma_backend_ud_qp_state_rts(uint32_t qpn, uint32_t sq_psn, uint32_t qkey) "UD QP 0x%x switch to RTS, sq_psn=0x%x, qkey=0x%x" 3721rdma_backend_get_gid_index(uint64_t subnet, uint64_t ifid, int gid_idx) "subnet=0x%"PRIx64", ifid=0x%"PRIx64 ", gid_idx=%d" 3722rdma_backend_gid_change(const char *op, uint64_t subnet, uint64_t ifid) "%s subnet=0x%"PRIx64", ifid=0x%"PRIx64 3723 3724# rdma_rm.c 3725rdma_res_tbl_get(char *name, uint32_t handle) "tbl %s, handle %d" 3726rdma_res_tbl_alloc(char *name, uint32_t handle) "tbl %s, handle %d" 3727rdma_res_tbl_dealloc(char *name, uint32_t handle) "tbl %s, handle %d" 3728rdma_rm_alloc_mr(uint32_t mr_handle, void *host_virt, uint64_t guest_start, uint64_t guest_length, int access_flags) "mr_handle=%d, host_virt=%p, guest_start=0x%"PRIx64", length=%" PRId64", access_flags=0x%x" 3729rdma_rm_dealloc_mr(uint32_t mr_handle, uint64_t guest_start) "mr_handle=%d, guest_start=0x%"PRIx64 3730rdma_rm_alloc_qp(uint32_t rm_qpn, uint32_t backend_qpn, uint8_t qp_type) "rm_qpn=%d, backend_qpn=0x%x, qp_type=%d" 3731rdma_rm_modify_qp(uint32_t qpn, uint32_t attr_mask, int qp_state, uint8_t sgid_idx) "qpn=0x%x, attr_mask=0x%x, qp_state=%d, sgid_idx=%d" 3732 3733# rdma_utils.c 3734rdma_pci_dma_map(uint64_t addr, void *vaddr, uint64_t len) "0x%"PRIx64" -> %p (len=%" PRIu64")" 3735rdma_pci_dma_unmap(void *vaddr) "%p" 3736# See docs/devel/tracing.rst for syntax documentation. 3737 3738# pvrdma_main.c 3739pvrdma_regs_read(uint64_t addr, uint64_t val) "pvrdma.regs[0x%"PRIx64"]=0x%"PRIx64 3740pvrdma_regs_write(uint64_t addr, uint64_t val, const char *reg_name, const char *val_name) "pvrdma.regs[0x%"PRIx64"]=0x%"PRIx64" (%s %s)" 3741pvrdma_uar_write(uint64_t addr, uint64_t val, const char *reg_name, const char *val_name, int val1, int val2) "uar[0x%"PRIx64"]=0x%"PRIx64" (cls=%s, op=%s, obj=%d, val=%d)" 3742 3743# pvrdma_cmd.c 3744pvrdma_map_to_pdir_host_virt(void *vfirst, void *vremaped) "mremap %p -> %p" 3745pvrdma_map_to_pdir_next_page(int page_idx, void *vnext, void *vremaped) "mremap [%d] %p -> %p" 3746pvrdma_exec_cmd(int cmd, int err) "cmd=%d, err=%d" 3747 3748# pvrdma_dev_ring.c 3749pvrdma_ring_next_elem_read_no_data(char *ring_name) "pvrdma_ring %s is empty" 3750 3751# pvrdma_qp_ops.c 3752pvrdma_post_cqe(uint32_t cq_handle, int notify, uint64_t wr_id, uint64_t qpn, uint32_t op_code, uint32_t status, uint32_t byte_len, uint32_t src_qp, uint32_t wc_flags, uint32_t vendor_err) "cq_handle=%d, notify=%d, wr_id=0x%"PRIx64", qpn=0x%"PRIx64", opcode=%d, status=%d, byte_len=%d, src_qp=%d, wc_flags=%d, vendor_err=%d" 3753# See docs/devel/tracing.rst for syntax documentation. 3754 3755# allwinner-rtc.c 3756allwinner_rtc_read(uint64_t addr, uint64_t value) "addr 0x%" PRIx64 " value 0x%" PRIx64 3757allwinner_rtc_write(uint64_t addr, uint64_t value) "addr 0x%" PRIx64 " value 0x%" PRIx64 3758 3759# sun4v-rtc.c 3760sun4v_rtc_read(uint64_t addr, uint64_t value) "read: addr 0x%" PRIx64 " value 0x%" PRIx64 3761sun4v_rtc_write(uint64_t addr, uint64_t value) "write: addr 0x%" PRIx64 " value 0x%" PRIx64 3762 3763# xlnx-zynqmp-rtc.c 3764xlnx_zynqmp_rtc_gettime(int year, int month, int day, int hour, int min, int sec) "Get time from host: %d-%d-%d %2d:%02d:%02d" 3765 3766# pl031.c 3767pl031_irq_state(int level) "irq state %d" 3768pl031_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" 3769pl031_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" 3770pl031_alarm_raised(void) "alarm raised" 3771pl031_set_alarm(uint32_t ticks) "alarm set for %u ticks" 3772 3773# aspeed_rtc.c 3774aspeed_rtc_read(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " value 0x%08" PRIx64 3775aspeed_rtc_write(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " value 0x%08" PRIx64 3776 3777# m48t59.c 3778m48txx_nvram_io_read(uint64_t addr, uint64_t value) "io read addr:0x%04" PRIx64 " value:0x%02" PRIx64 3779m48txx_nvram_io_write(uint64_t addr, uint64_t value) "io write addr:0x%04" PRIx64 " value:0x%02" PRIx64 3780m48txx_nvram_mem_read(uint32_t addr, uint32_t value) "mem read addr:0x%04x value:0x%02x" 3781m48txx_nvram_mem_write(uint32_t addr, uint32_t value) "mem write addr:0x%04x value:0x%02x" 3782 3783# goldfish_rtc.c 3784goldfish_rtc_read(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " value 0x%08" PRIx64 3785goldfish_rtc_write(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " value 0x%08" PRIx64 3786# See docs/devel/tracing.rst for syntax documentation. 3787 3788# css.c 3789css_enable_facility(const char *facility) "CSS: enable %s" 3790css_crw(uint8_t rsc, uint8_t erc, uint16_t rsid, const char *chained) "CSS: queueing crw: rsc=0x%x, erc=0x%x, rsid=0x%x %s" 3791css_chpid_add(uint8_t cssid, uint8_t chpid, uint8_t type) "CSS: add chpid %x.%02x (type 0x%02x)" 3792css_new_image(uint8_t cssid, const char *default_cssid) "CSS: add css image 0x%02x %s" 3793css_assign_subch(const char *do_assign, uint8_t cssid, uint8_t ssid, uint16_t schid, uint16_t devno) "CSS: %s %x.%x.%04x (devno 0x%04x)" 3794css_io_interrupt(int cssid, int ssid, int schid, uint32_t intparm, uint8_t isc, const char *conditional) "CSS: I/O interrupt on sch %x.%x.%04x (intparm 0x%08x, isc 0x%x) %s" 3795css_adapter_interrupt(uint8_t isc) "CSS: adapter I/O interrupt (isc 0x%x)" 3796css_do_sic(uint16_t mode, uint8_t isc) "CSS: set interruption mode 0x%x on isc 0x%x" 3797 3798# virtio-ccw.c 3799virtio_ccw_interpret_ccw(int cssid, int ssid, int schid, int cmd_code) "VIRTIO-CCW: %x.%x.%04x: interpret command 0x%x" 3800virtio_ccw_new_device(int cssid, int ssid, int schid, int devno, const char *devno_mode) "VIRTIO-CCW: add subchannel %x.%x.%04x, devno 0x%04x (%s)" 3801virtio_ccw_set_ind(uint64_t ind_loc, uint8_t ind_old, uint8_t ind_new) "VIRTIO-CCW: indicator at %" PRIu64 ": 0x%x->0x%x" 3802 3803# s390-pci-vfio.c 3804s390_pci_clp_cap(const char *id, uint32_t cap) "PCI: %s: missing expected CLP capability %u" 3805s390_pci_clp_cap_size(const char *id, uint32_t size, uint32_t cap) "PCI: %s: bad size (%u) for CLP capability %u" 3806s390_pci_clp_dev_info(const char *id) "PCI: %s: cannot read vfio device info" 3807 3808# s390-pci-bus.c 3809s390_pci_sclp_nodev(const char *str, uint32_t aid) "%s no dev found aid 0x%x" 3810s390_pci_iommu_xlate(uint64_t addr) "iommu trans addr 0x%" PRIx64 3811s390_pci_msi_ctrl_write(uint64_t data, uint32_t idx, uint32_t vec) "write_msix data 0x%" PRIx64 " idx %d vec 0x%x" 3812s390_pcihost(const char *msg) "%s" 3813 3814# s390-pci-inst.c 3815s390_pci_irqs(const char *str, uint32_t id) "%s irqs for adapter id %d" 3816s390_pci_kvm_aif(const char *str) "Failed to %s interrupt forwarding" 3817 3818s390_pci_list_entry(uint32_t g_l2, uint32_t vid, uint32_t did, uint32_t fid, uint32_t fh) "g_l2 %d vendor id 0x%x device id 0x%x fid 0x%x fh 0x%x" 3819s390_pci_list(uint32_t rc) "failed rc 0x%x" 3820s390_pci_unknown(const char *msg, uint32_t cmd) "%s unknown command 0x%x" 3821s390_pci_bar(uint32_t bar, uint32_t addr, uint64_t size, uint32_t barsize) "bar %d addr 0x%x size 0x%" PRIx64 "barsize 0x%x" 3822s390_pci_nodev(const char *cmd, uint32_t fh) "%s no pci dev fh 0x%x" 3823s390_pci_invalid(const char *cmd, uint32_t fh) "%s invalid space fh 0x%x" 3824# See docs/devel/tracing.rst for syntax documentation. 3825 3826# scsi-bus.c 3827scsi_req_alloc(int target, int lun, int tag) "target %d lun %d tag %d" 3828scsi_req_cancel(int target, int lun, int tag) "target %d lun %d tag %d" 3829scsi_req_data(int target, int lun, int tag, int len) "target %d lun %d tag %d len %d" 3830scsi_req_data_canceled(int target, int lun, int tag, int len) "target %d lun %d tag %d len %d" 3831scsi_req_dequeue(int target, int lun, int tag) "target %d lun %d tag %d" 3832scsi_bus_drained_begin(void *bus, void *sdev) "bus %p sdev %p" 3833scsi_bus_drained_end(void *bus, void *sdev) "bus %p sdev %p" 3834scsi_req_continue(int target, int lun, int tag) "target %d lun %d tag %d" 3835scsi_req_continue_canceled(int target, int lun, int tag) "target %d lun %d tag %d" 3836scsi_req_parsed(int target, int lun, int tag, int cmd, int mode, int xfer) "target %d lun %d tag %d command %d dir %d length %d" 3837scsi_req_parsed_lba(int target, int lun, int tag, int cmd, uint64_t lba) "target %d lun %d tag %d command %d lba %"PRIu64 3838scsi_req_parse_bad(int target, int lun, int tag, int cmd) "target %d lun %d tag %d command %d" 3839scsi_req_build_sense(int target, int lun, int tag, int key, int asc, int ascq) "target %d lun %d tag %d key 0x%02x asc 0x%02x ascq 0x%02x" 3840scsi_device_set_ua(int target, int lun, int key, int asc, int ascq) "target %d lun %d key 0x%02x asc 0x%02x ascq 0x%02x" 3841scsi_report_luns(int target, int lun, int tag) "target %d lun %d tag %d" 3842scsi_inquiry(int target, int lun, int tag, int cdb1, int cdb2) "target %d lun %d tag %d page 0x%02x/0x%02x" 3843scsi_test_unit_ready(int target, int lun, int tag) "target %d lun %d tag %d" 3844scsi_request_sense(int target, int lun, int tag) "target %d lun %d tag %d" 3845 3846# mptsas.c 3847mptsas_command_complete(void *dev, uint32_t ctx, uint32_t status, uint32_t resid) "dev %p context 0x%08x status 0x%x resid %d" 3848mptsas_diag_read(void *dev, uint32_t addr, uint32_t val) "dev %p addr 0x%08x value 0x%08x" 3849mptsas_diag_write(void *dev, uint32_t addr, uint32_t val) "dev %p addr 0x%08x value 0x%08x" 3850mptsas_irq_intx(void *dev, int level) "dev %p level %d" 3851mptsas_irq_msi(void *dev) "dev %p " 3852mptsas_mmio_read(void *dev, uint32_t addr, uint32_t val) "dev %p addr 0x%08x value 0x%x" 3853mptsas_mmio_unhandled_read(void *dev, uint32_t addr) "dev %p addr 0x%08x" 3854mptsas_mmio_unhandled_write(void *dev, uint32_t addr, uint32_t val) "dev %p addr 0x%08x value 0x%x" 3855mptsas_mmio_write(void *dev, uint32_t addr, uint32_t val) "dev %p addr 0x%08x value 0x%x" 3856mptsas_process_message(void *dev, int msg, uint32_t ctx) "dev %p cmd %d context 0x%08x" 3857mptsas_process_scsi_io_request(void *dev, int bus, int target, int lun, uint64_t len) "dev %p dev %d:%d:%d length %"PRIu64"" 3858mptsas_reset(void *dev) "dev %p " 3859mptsas_scsi_overflow(void *dev, uint32_t ctx, uint64_t req, uint64_t found) "dev %p context 0x%08x: %"PRIu64"/%"PRIu64"" 3860mptsas_sgl_overflow(void *dev, uint32_t ctx, uint64_t req, uint64_t found) "dev %p context 0x%08x: %"PRIu64"/%"PRIu64"" 3861mptsas_unhandled_cmd(void *dev, uint32_t ctx, uint8_t msg_cmd) "dev %p context 0x%08x: Unhandled cmd 0x%x" 3862mptsas_unhandled_doorbell_cmd(void *dev, int cmd) "dev %p value 0x%08x" 3863 3864# mptconfig.c 3865mptsas_config_sas_device(void *dev, int address, int port, int phy_handle, int dev_handle, int page) "dev %p address %d (port %d, handles: phy %d dev %d) page %d" 3866mptsas_config_sas_phy(void *dev, int address, int port, int phy_handle, int dev_handle, int page) "dev %p address %d (port %d, handles: phy %d dev %d) page %d" 3867 3868# megasas.c 3869megasas_init_firmware(uint64_t pa) "pa 0x%" PRIx64 " " 3870megasas_init_queue(uint64_t queue_pa, int queue_len, uint32_t head, uint32_t tail, uint32_t flags) "queue at 0x%" PRIx64 " len %d head 0x%" PRIx32 " tail 0x%" PRIx32 " flags 0x%x" 3871megasas_initq_map_failed(int frame) "scmd %d: failed to map queue" 3872megasas_initq_mapped(uint64_t pa) "queue already mapped at 0x%" PRIx64 3873megasas_initq_mismatch(int queue_len, int fw_cmds) "queue size %d max fw cmds %d" 3874megasas_qf_mapped(unsigned int index) "skip mapped frame 0x%x" 3875megasas_qf_new(unsigned int index, uint64_t frame) "frame 0x%x addr 0x%" PRIx64 3876megasas_qf_busy(unsigned long pa) "all frames busy for frame 0x%lx" 3877megasas_qf_enqueue(unsigned int index, unsigned int count, uint64_t context, uint32_t head, uint32_t tail, unsigned int busy) "frame 0x%x count %d context 0x%" PRIx64 " head 0x%" PRIx32 " tail 0x%" PRIx32 " busy %u" 3878megasas_qf_update(uint32_t head, uint32_t tail, unsigned int busy) "head 0x%" PRIx32 " tail 0x%" PRIx32 " busy %u" 3879megasas_qf_map_failed(int cmd, unsigned long frame) "scmd %d: frame %lu" 3880megasas_qf_complete_noirq(uint64_t context) "context 0x%" PRIx64 " " 3881megasas_qf_complete(uint64_t context, uint32_t head, uint32_t tail, int busy) "context 0x%" PRIx64 " head 0x%" PRIx32 " tail 0x%" PRIx32 " busy %u" 3882megasas_frame_busy(uint64_t addr) "frame 0x%" PRIx64 " busy" 3883megasas_unhandled_frame_cmd(int cmd, uint8_t frame_cmd) "scmd %d: MFI cmd 0x%x" 3884megasas_handle_scsi(const char *frame, int bus, int dev, int lun, void *sdev, unsigned long size) "%s dev %x/%x/%x sdev %p xfer %lu" 3885megasas_scsi_target_not_present(const char *frame, int bus, int dev, int lun) "%s dev %x/%x/%x" 3886megasas_scsi_invalid_cdb_len(const char *frame, int bus, int dev, int lun, int len) "%s dev %x/%x/%x invalid cdb len %d" 3887megasas_iov_read_overflow(int cmd, int bytes, int len) "scmd %d: %d/%d bytes" 3888megasas_iov_write_overflow(int cmd, int bytes, int len) "scmd %d: %d/%d bytes" 3889megasas_iov_read_underflow(int cmd, int bytes, int len) "scmd %d: %d/%d bytes" 3890megasas_iov_write_underflow(int cmd, int bytes, int len) "scmd %d: %d/%d bytes" 3891megasas_scsi_req_alloc_failed(const char *frame, int dev, int lun) "%s dev %x/%x" 3892megasas_scsi_read_start(int cmd, int len) "scmd %d: transfer %d bytes of data" 3893megasas_scsi_write_start(int cmd, int len) "scmd %d: transfer %d bytes of data" 3894megasas_scsi_nodata(int cmd) "scmd %d: no data to be transferred" 3895megasas_scsi_complete(int cmd, uint32_t status, int len, int xfer) "scmd %d: status 0x%x, len %u/%u" 3896megasas_command_complete(int cmd, uint32_t status, uint32_t resid) "scmd %d: status 0x%x, residual %d" 3897megasas_handle_io(int cmd, const char *frame, int dev, int lun, unsigned long lba, unsigned long count) "scmd %d: %s dev %x/%x lba 0x%lx count %lu" 3898megasas_io_target_not_present(int cmd, const char *frame, int dev, int lun) "scmd %d: %s dev 1/%x/%x LUN not present" 3899megasas_io_read_start(int cmd, unsigned long lba, unsigned long count, unsigned long len) "scmd %d: start LBA 0x%lx %lu blocks (%lu bytes)" 3900megasas_io_write_start(int cmd, unsigned long lba, unsigned long count, unsigned long len) "scmd %d: start LBA 0x%lx %lu blocks (%lu bytes)" 3901megasas_io_complete(int cmd, uint32_t len) "scmd %d: %d bytes" 3902megasas_iovec_sgl_overflow(int cmd, int index, int limit) "scmd %d: iovec count %d limit %d" 3903megasas_iovec_sgl_underflow(int cmd, int index) "scmd %d: iovec count %d" 3904megasas_iovec_sgl_invalid(int cmd, int index, uint64_t pa, uint32_t len) "scmd %d: element %d pa 0x%" PRIx64 " len %u" 3905megasas_iovec_overflow(int cmd, int len, int limit) "scmd %d: len %d limit %d" 3906megasas_iovec_underflow(int cmd, int len, int limit) "scmd %d: len %d limit %d" 3907megasas_handle_dcmd(int cmd, int opcode) "scmd %d: MFI DCMD opcode 0x%x" 3908megasas_finish_dcmd(int cmd, int size) "scmd %d: MFI DCMD wrote %d bytes" 3909megasas_dcmd_req_alloc_failed(int cmd, const char *desc) "scmd %d: %s" 3910megasas_dcmd_internal_submit(int cmd, const char *desc, int dev) "scmd %d: %s to dev %d" 3911megasas_dcmd_internal_finish(int cmd, int opcode, int lun) "scmd %d: cmd 0x%x lun %d" 3912megasas_dcmd_internal_invalid(int cmd, int opcode) "scmd %d: DCMD 0x%x" 3913megasas_dcmd_unhandled(int cmd, int opcode, int len) "scmd %d: opcode 0x%x, len %d" 3914megasas_dcmd_zero_sge(int cmd) "scmd %d: zero DCMD sge count" 3915megasas_dcmd_invalid_sge(int cmd, int count) "scmd %d: DCMD sge count %d" 3916megasas_dcmd_invalid_xfer_len(int cmd, unsigned long size, unsigned long max) "scmd %d: xfer len %ld, max %ld" 3917megasas_dcmd_enter(int cmd, const char *dcmd, int len) "scmd %d: DCMD %s len %d" 3918megasas_dcmd_dummy(int cmd, unsigned long size) "scmd %d: xfer len %ld" 3919megasas_dcmd_set_fw_time(int cmd, unsigned long time) "scmd %d: Set FW time 0x%lx" 3920megasas_dcmd_pd_get_list(int cmd, int num, int max, int offset) "scmd %d: DCMD PD get list: %d / %d PDs, size %d" 3921megasas_dcmd_ld_get_list(int cmd, int num, int max) "scmd %d: DCMD LD get list: found %d / %d LDs" 3922megasas_dcmd_ld_get_info(int cmd, int ld_id) "scmd %d: dev %d" 3923megasas_dcmd_ld_list_query(int cmd, int flags) "scmd %d: query flags 0x%x" 3924megasas_dcmd_pd_get_info(int cmd, int pd_id) "scmd %d: dev %d" 3925megasas_dcmd_pd_list_query(int cmd, int flags) "scmd %d: query flags 0x%x" 3926megasas_dcmd_reset_ld(int cmd, int target_id) "scmd %d: dev %d" 3927megasas_dcmd_unsupported(int cmd, unsigned long size) "scmd %d: set properties len %ld" 3928megasas_abort_frame(int cmd, int abort_cmd) "scmd %d: frame 0x%x" 3929megasas_abort_no_cmd(int cmd, uint64_t context) "scmd %d: no active command for frame context 0x%" PRIx64 3930megasas_abort_invalid_context(int cmd, uint64_t context, int abort_cmd) "scmd %d: invalid frame context 0x%" PRIx64 " for abort frame 0x%x" 3931megasas_reset(int fw_state) "firmware state 0x%x" 3932megasas_init(int sges, int cmds, const char *mode) "Using %d sges, %d cmds, %s mode" 3933megasas_msix_raise(int vector) "vector %d" 3934megasas_msi_raise(int vector) "vector %d" 3935megasas_irq_lower(void) "INTx" 3936megasas_irq_raise(void) "INTx" 3937megasas_intr_enabled(void) "Interrupts enabled" 3938megasas_intr_disabled(void) "Interrupts disabled" 3939megasas_msix_enabled(int vector) "vector %d" 3940megasas_msi_enabled(int vector) "vector %d" 3941megasas_mmio_readl(const char *reg, uint32_t val) "reg %s: 0x%x" 3942megasas_mmio_invalid_readl(unsigned long addr) "addr 0x%lx" 3943megasas_mmio_writel(const char *reg, uint32_t val) "reg %s: 0x%x" 3944megasas_mmio_invalid_writel(uint32_t addr, uint32_t val) "addr 0x%x: 0x%x" 3945 3946# vmw_pvscsi.c 3947pvscsi_ring_init_data(uint32_t txr_len_log2, uint32_t rxr_len_log2) "TX/RX rings logarithms set to %d/%d" 3948pvscsi_ring_init_msg(uint32_t len_log2) "MSG ring logarithm set to %d" 3949pvscsi_ring_flush_cmp(uint64_t filled_cmp_ptr) "new production counter of completion ring is 0x%"PRIx64 3950pvscsi_ring_flush_msg(uint64_t filled_cmp_ptr) "new production counter of message ring is 0x%"PRIx64 3951pvscsi_update_irq_level(bool raise, uint64_t mask, uint64_t status) "interrupt level set to %d (MASK: 0x%"PRIx64", STATUS: 0x%"PRIx64")" 3952pvscsi_update_irq_msi(void) "sending MSI notification" 3953pvscsi_cmp_ring_put(unsigned long addr) "got completion descriptor 0x%lx" 3954pvscsi_msg_ring_put(unsigned long addr) "got message descriptor 0x%lx" 3955pvscsi_complete_request(uint64_t context, uint64_t len, uint8_t sense_key) "completion: ctx: 0x%"PRIx64", len: 0x%"PRIx64", sense key: %u" 3956pvscsi_get_sg_list(int nsg, size_t size) "get SG list: depth: %u, size: %zu" 3957pvscsi_get_next_sg_elem(uint32_t flags) "unknown flags in SG element (val: 0x%x)" 3958pvscsi_command_complete_not_found(uint32_t tag) "can't find request for tag 0x%x" 3959pvscsi_command_complete_data_run(void) "not all data required for command transferred" 3960pvscsi_command_complete_sense_len(int len) "sense information length is %d bytes" 3961pvscsi_convert_sglist(uint64_t context, unsigned long addr, uint32_t resid) "element: ctx: 0x%"PRIx64" addr: 0x%lx, len: %ul" 3962pvscsi_process_req_descr(uint8_t cmd, uint64_t ctx) "SCSI cmd 0x%x, ctx: 0x%"PRIx64 3963pvscsi_process_req_descr_unknown_device(void) "command directed to unknown device rejected" 3964pvscsi_process_req_descr_invalid_dir(void) "command with invalid transfer direction rejected" 3965pvscsi_process_io(unsigned long addr) "got descriptor 0x%lx" 3966pvscsi_on_cmd_noimpl(const char* cmd) "unimplemented command %s ignored" 3967pvscsi_on_cmd_reset_dev(uint32_t tgt, int lun, void* dev) "PVSCSI_CMD_RESET_DEVICE[target %u lun %d (dev 0x%p)]" 3968pvscsi_on_cmd_arrived(const char* cmd) "command %s arrived" 3969pvscsi_on_cmd_abort(uint64_t ctx, uint32_t tgt) "command PVSCSI_CMD_ABORT_CMD for ctx 0x%"PRIx64", target %u" 3970pvscsi_on_cmd_unknown(uint64_t cmd_id) "unknown command 0x%"PRIx64 3971pvscsi_on_cmd_unknown_data(uint32_t data) "data for unknown command 0x:0x%x" 3972pvscsi_io_write(const char* cmd, uint64_t val) "%s write: 0x%"PRIx64 3973pvscsi_io_write_unknown(unsigned long addr, unsigned sz, uint64_t val) "unknown write address: 0x%lx size: %u bytes value: 0x%"PRIx64 3974pvscsi_io_read(const char* cmd, uint64_t status) "%s read: 0x%"PRIx64 3975pvscsi_io_read_unknown(unsigned long addr, unsigned sz) "unknown read address: 0x%lx size: %u bytes" 3976pvscsi_init_msi_fail(int res) "failed to initialize MSI, error %d" 3977pvscsi_state(const char* state) "starting %s ..." 3978pvscsi_tx_rings_ppn(const char* label, uint64_t ppn) "%s page: 0x%"PRIx64 3979pvscsi_tx_rings_num_pages(const char* label, uint32_t num) "Number of %s pages: %u" 3980 3981# esp.c 3982esp_error_fifo_overrun(void) "FIFO overrun" 3983esp_error_unhandled_command(uint32_t val) "unhandled command (0x%2.2x)" 3984esp_error_invalid_write(uint32_t val, uint32_t addr) "invalid write of 0x%02x at [0x%x]" 3985esp_raise_irq(void) "Raise IRQ" 3986esp_lower_irq(void) "Lower IRQ" 3987esp_raise_drq(void) "Raise DREQ" 3988esp_lower_drq(void) "Lower DREQ" 3989esp_dma_enable(void) "Raise enable" 3990esp_dma_disable(void) "Lower enable" 3991esp_pdma_read(int size) "pDMA read %u bytes" 3992esp_pdma_write(int size) "pDMA write %u bytes" 3993esp_get_cmd(uint32_t dmalen, int target) "len %d target %d" 3994esp_do_command_phase(uint8_t busid) "busid 0x%x" 3995esp_do_identify(uint8_t byte) "0x%x" 3996esp_handle_satn_stop(uint32_t cmdlen) "cmdlen %d" 3997esp_write_response(uint32_t status) "Transfer status (status=%d)" 3998esp_do_dma(uint32_t cmdlen, uint32_t len) "command len %d + %d" 3999esp_command_complete(void) "SCSI Command complete" 4000esp_command_complete_deferred(void) "SCSI Command complete deferred" 4001esp_command_complete_unexpected(void) "SCSI command completed unexpectedly" 4002esp_command_complete_fail(void) "Command failed" 4003esp_transfer_data(uint32_t dma_left, int32_t ti_size) "transfer %d/%d" 4004esp_handle_ti(uint32_t minlen) "Transfer Information len %d" 4005esp_handle_ti_cmd(uint32_t cmdlen) "command len %d" 4006esp_mem_readb(uint32_t saddr, uint8_t reg) "reg[%d]: 0x%2.2x" 4007esp_mem_writeb(uint32_t saddr, uint8_t reg, uint32_t val) "reg[%d]: 0x%2.2x -> 0x%2.2x" 4008esp_mem_writeb_cmd_nop(uint32_t val) "NOP (0x%2.2x)" 4009esp_mem_writeb_cmd_flush(uint32_t val) "Flush FIFO (0x%2.2x)" 4010esp_mem_writeb_cmd_reset(uint32_t val) "Chip reset (0x%2.2x)" 4011esp_mem_writeb_cmd_bus_reset(uint32_t val) "Bus reset (0x%2.2x)" 4012esp_mem_writeb_cmd_iccs(uint32_t val) "Initiator Command Complete Sequence (0x%2.2x)" 4013esp_mem_writeb_cmd_msgacc(uint32_t val) "Message Accepted (0x%2.2x)" 4014esp_mem_writeb_cmd_pad(uint32_t val) "Transfer padding (0x%2.2x)" 4015esp_mem_writeb_cmd_satn(uint32_t val) "Set ATN (0x%2.2x)" 4016esp_mem_writeb_cmd_rstatn(uint32_t val) "Reset ATN (0x%2.2x)" 4017esp_mem_writeb_cmd_sel(uint32_t val) "Select without ATN (0x%2.2x)" 4018esp_mem_writeb_cmd_selatn(uint32_t val) "Select with ATN (0x%2.2x)" 4019esp_mem_writeb_cmd_selatns(uint32_t val) "Select with ATN & stop (0x%2.2x)" 4020esp_mem_writeb_cmd_ensel(uint32_t val) "Enable selection (0x%2.2x)" 4021esp_mem_writeb_cmd_dissel(uint32_t val) "Disable selection (0x%2.2x)" 4022esp_mem_writeb_cmd_ti(uint32_t val) "Transfer Information (0x%2.2x)" 4023 4024# esp-pci.c 4025esp_pci_error_invalid_dma_direction(void) "invalid DMA transfer direction" 4026esp_pci_error_invalid_read(uint32_t reg) "read access outside bounds (reg 0x%x)" 4027esp_pci_error_invalid_write(uint32_t reg) "write access outside bounds (reg 0x%x)" 4028esp_pci_error_invalid_write_dma(uint32_t val, uint32_t addr) "invalid write of 0x%02x at [0x%x]" 4029esp_pci_dma_read(uint32_t saddr, uint32_t reg) "reg[%d]: 0x%8.8x" 4030esp_pci_dma_write(uint32_t saddr, uint32_t reg, uint32_t val) "reg[%d]: 0x%8.8x -> 0x%8.8x" 4031esp_pci_dma_idle(uint32_t val) "IDLE (0x%.8x)" 4032esp_pci_dma_blast(uint32_t val) "BLAST (0x%.8x)" 4033esp_pci_dma_abort(uint32_t val) "ABORT (0x%.8x)" 4034esp_pci_dma_start(uint32_t val) "START (0x%.8x)" 4035esp_pci_sbac_read(uint32_t reg) "sbac: 0x%8.8x" 4036esp_pci_sbac_write(uint32_t reg, uint32_t val) "sbac: 0x%8.8x -> 0x%8.8x" 4037 4038# spapr_vscsi.c 4039spapr_vscsi_send_rsp(uint8_t status, int32_t res_in, int32_t res_out) "status: 0x%x, res_in: %"PRId32", res_out: %"PRId32 4040spapr_vscsi_fetch_desc_no_data(void) "no data descriptor" 4041spapr_vscsi_fetch_desc_direct(void) "direct segment" 4042spapr_vscsi_fetch_desc_indirect(uint32_t qtag, unsigned desc, unsigned local_desc) "indirect segment local tag=0x%"PRIx32" desc#%u/%u" 4043spapr_vscsi_fetch_desc_out_of_range(unsigned desc, unsigned desc_offset) "#%u is ouf of range (%u bytes)" 4044spapr_vscsi_fetch_desc_dma_read_error(int rc) "spapr_vio_dma_read -> %d reading ext_desc" 4045spapr_vscsi_fetch_desc_indirect_seg_ext(uint32_t qtag, unsigned n, unsigned desc, uint64_t va, uint32_t len) "indirect segment ext. tag=0x%"PRIx32" desc#%u/%u { va=0x%"PRIx64" len=0x%"PRIx32" }" 4046spapr_vscsi_fetch_desc_out_of_desc(void) "Out of descriptors !" 4047spapr_vscsi_fetch_desc_out_of_desc_boundary(unsigned offset, unsigned desc, uint32_t len) " offset=0x%x is out of a descriptor #%u boundary=0x%"PRIx32 4048spapr_vscsi_fetch_desc_done(unsigned desc_num, unsigned desc_offset, uint64_t va, uint32_t len) " cur=%u offs=0x%x ret { va=0x%"PRIx64" len=0x%"PRIx32" }" 4049spapr_vscsi_srp_indirect_data(uint32_t len) "indirect segment 0x%"PRIx32" bytes" 4050spapr_vscsi_srp_indirect_data_rw(int writing, int rc) "spapr_vio_dma_r/w(%d) -> %d" 4051spapr_vscsi_srp_indirect_data_buf(unsigned a, unsigned b, unsigned c, unsigned d) " data: %02x %02x %02x %02x..." 4052spapr_vscsi_srp_transfer_data(uint32_t len) "no data desc transfer, skipping 0x%"PRIx32" bytes" 4053spapr_vscsi_transfer_data(uint32_t tag, uint32_t len, void *req) "SCSI xfer complete tag=0x%"PRIx32" len=0x%"PRIx32", req=%p" 4054spapr_vscsi_command_complete(uint32_t tag, uint32_t status, void *req) "SCSI cmd complete, tag=0x%"PRIx32" status=0x%"PRIx32", req=%p" 4055spapr_vscsi_command_complete_sense_data1(uint32_t len, unsigned s0, unsigned s1, unsigned s2, unsigned s3, unsigned s4, unsigned s5, unsigned s6, unsigned s7) "Sense data, %d bytes: %02x %02x %02x %02x %02x %02x %02x %02x" 4056spapr_vscsi_command_complete_sense_data2(unsigned s8, unsigned s9, unsigned s10, unsigned s11, unsigned s12, unsigned s13, unsigned s14, unsigned s15) " %02x %02x %02x %02x %02x %02x %02x %02x" 4057spapr_vscsi_command_complete_status(uint32_t status) "Command complete err=%"PRIu32 4058spapr_vscsi_save_request(uint32_t qtag, unsigned desc, unsigned offset) "saving tag=%"PRIu32", current desc#%u, offset=0x%x" 4059spapr_vscsi_load_request(uint32_t qtag, unsigned desc, unsigned offset) "restoring tag=%"PRIu32", current desc#%u, offset=0x%x" 4060spapr_vscsi_process_login(void) "Got login, sending response !" 4061spapr_vscsi_process_tsk_mgmt(uint8_t func) "tsk_mgmt_func 0x%02x" 4062spapr_vscsi_queue_cmd_no_drive(uint64_t lun) "Command for lun 0x%08" PRIx64 " with no drive" 4063spapr_vscsi_queue_cmd(uint32_t qtag, unsigned cdb, const char *cmd, int lun, int ret) "Queued command tag 0x%"PRIx32" CMD 0x%x=%s LUN %d ret: %d" 4064spapr_vscsi_do_crq(unsigned c0, unsigned c1) "crq: %02x %02x ..." 4065 4066# lsi53c895a.c 4067lsi_reset(void) "Reset" 4068lsi_update_irq(int level, uint8_t dstat, uint8_t sist1, uint8_t sist0) "Update IRQ level %d dstat 0x%02x sist 0x%02x0x%02x" 4069lsi_update_irq_disconnected(void) "Handled IRQs & disconnected, looking for pending processes" 4070lsi_script_scsi_interrupt(uint8_t stat1, uint8_t stat0, uint8_t sist1, uint8_t sist0) "SCSI Interrupt 0x%02x0x%02x prev 0x%02x0x%02x" 4071lsi_script_dma_interrupt(uint8_t stat, uint8_t dstat) "DMA Interrupt 0x%x prev 0x%x" 4072lsi_bad_phase_jump(uint32_t dsp) "Data phase mismatch jump to 0x%"PRIX32 4073lsi_bad_phase_interrupt(void) "Phase mismatch interrupt" 4074lsi_bad_selection(uint32_t id) "Selected absent target %"PRIu32 4075lsi_do_dma_unavailable(void) "DMA no data available" 4076lsi_do_dma(uint64_t addr, int len) "DMA addr=0x%"PRIx64" len=%d" 4077lsi_queue_command(uint32_t tag) "Queueing tag=0x%"PRIx32 4078lsi_add_msg_byte_error(void) "MSG IN data too long" 4079lsi_add_msg_byte(uint8_t data) "MSG IN 0x%02x" 4080lsi_reselect(int id) "Reselected target %d" 4081lsi_queue_req_error(void *p) "Multiple IO pending for request %p" 4082lsi_queue_req(uint32_t tag) "Queueing IO tag=0x%"PRIx32 4083lsi_command_complete(uint32_t status) "Command complete status=%"PRId32 4084lsi_transfer_data(uint32_t tag, uint32_t len) "Data ready tag=0x%"PRIx32" len=%"PRId32 4085lsi_do_command(uint32_t dbc) "Send command len=%"PRId32 4086lsi_do_status(uint32_t dbc, uint8_t status) "Get status len=%"PRId32" status=%d" 4087lsi_do_status_error(void) "Bad Status move" 4088lsi_do_msgin(uint32_t dbc, int len) "Message in len=%"PRId32" %d" 4089lsi_do_msgout(uint32_t dbc) "MSG out len=%"PRId32 4090lsi_do_msgout_disconnect(void) "MSG: Disconnect" 4091lsi_do_msgout_noop(void) "MSG: No Operation" 4092lsi_do_msgout_extended(uint8_t msg, uint8_t len) "Extended message 0x%x (len %d)" 4093lsi_do_msgout_ignored(const char *msg) "%s (ignored)" 4094lsi_do_msgout_simplequeue(uint8_t select_tag) "SIMPLE queue tag=0x%x" 4095lsi_do_msgout_abort(uint32_t tag) "MSG: ABORT TAG tag=0x%"PRIx32 4096lsi_do_msgout_clearqueue(uint32_t tag) "MSG: CLEAR QUEUE tag=0x%"PRIx32 4097lsi_do_msgout_busdevicereset(uint32_t tag) "MSG: BUS DEVICE RESET tag=0x%"PRIx32 4098lsi_do_msgout_select(int id) "Select LUN %d" 4099lsi_memcpy(uint32_t dest, uint32_t src, int count) "memcpy dest 0x%"PRIx32" src 0x%"PRIx32" count %d" 4100lsi_wait_reselect(void) "Wait Reselect" 4101lsi_execute_script(uint32_t dsp, uint32_t insn, uint32_t addr) "SCRIPTS dsp=0x%"PRIx32" opcode 0x%"PRIx32" arg 0x%"PRIx32 4102lsi_execute_script_blockmove_delayed(void) "Delayed select timeout" 4103lsi_execute_script_blockmove_badphase(const char *phase, const char *expected) "Wrong phase got %s expected %s" 4104lsi_execute_script_io_alreadyreselected(void) "Already reselected, jumping to alternative address" 4105lsi_execute_script_io_selected(uint8_t id, const char *atn) "Selected target %d%s" 4106lsi_execute_script_io_disconnect(void) "Wait Disconnect" 4107lsi_execute_script_io_set(const char *atn, const char *ack, const char *tm, const char *cc) "Set%s%s%s%s" 4108lsi_execute_script_io_clear(const char *atn, const char *ack, const char *tm, const char *cc) "Clear%s%s%s%s" 4109lsi_execute_script_io_opcode(const char *opcode, int reg, const char *opname, uint8_t data8, uint32_t sfbr, const char *ssfbr) "%s reg 0x%x %s data8=0x%02x sfbr=0x%02x%s" 4110lsi_execute_script_tc_nop(void) "NOP" 4111lsi_execute_script_tc_delayedselect_timeout(void) "Delayed select timeout" 4112lsi_execute_script_tc_compc(int result) "Compare carry %d" 4113lsi_execute_script_tc_compp(const char *phase, char op, const char *insn_phase) "Compare phase %s %c= %s" 4114lsi_execute_script_tc_compd(uint32_t sfbr, uint8_t mask, char op, int result) "Compare data 0x%"PRIx32" & 0x%x %c= 0x%x" 4115lsi_execute_script_tc_jump(uint32_t addr) "Jump to 0x%"PRIx32 4116lsi_execute_script_tc_call(uint32_t addr) "Call 0x%"PRIx32 4117lsi_execute_script_tc_return(uint32_t addr) "Return to 0x%"PRIx32 4118lsi_execute_script_tc_interrupt(uint32_t addr) "Interrupt 0x%"PRIx32 4119lsi_execute_script_tc_illegal(void) "Illegal transfer control" 4120lsi_execute_script_tc_cc_failed(void) "Control condition failed" 4121lsi_execute_script_mm_load(int reg, int n, uint32_t addr, int data) "Load reg 0x%x size %d addr 0x%"PRIx32" = 0x%08x" 4122lsi_execute_script_mm_store(int reg, int n, uint32_t addr) "Store reg 0x%x size %d addr 0x%"PRIx32 4123lsi_execute_script_stop(void) "SCRIPTS execution stopped" 4124lsi_awoken(void) "Woken by SIGP" 4125lsi_reg_read(const char *name, int offset, uint8_t ret) "Read reg %s 0x%x = 0x%02x" 4126lsi_reg_write(const char *name, int offset, uint8_t val) "Write reg %s 0x%x = 0x%02x" 4127 4128# virtio-scsi.c 4129virtio_scsi_cmd_req(int lun, uint32_t tag, uint8_t cmd) "virtio_scsi_cmd_req lun=%u tag=0x%x cmd=0x%x" 4130virtio_scsi_cmd_resp(int lun, uint32_t tag, int response, uint8_t status) "virtio_scsi_cmd_resp lun=%u tag=0x%x response=%d status=0x%x" 4131virtio_scsi_tmf_req(int lun, uint32_t tag, int subtype) "virtio_scsi_tmf_req lun=%u tag=0x%x subtype=%d" 4132virtio_scsi_tmf_resp(int lun, uint32_t tag, int response) "virtio_scsi_tmf_resp lun=%u tag=0x%x response=%d" 4133virtio_scsi_an_req(int lun, uint32_t event_requested) "virtio_scsi_an_req lun=%u event_requested=0x%x" 4134virtio_scsi_an_resp(int lun, int response) "virtio_scsi_an_resp lun=%u response=%d" 4135virtio_scsi_event(int lun, int event, int reason) "virtio_scsi_event lun=%u event=%d reason=%d" 4136 4137# scsi-disk.c 4138scsi_disk_check_condition(uint32_t tag, uint8_t key, uint8_t asc, uint8_t ascq) "Command complete tag=0x%x sense=%d/%d/%d" 4139scsi_disk_read_complete(uint32_t tag, size_t size) "Data ready tag=0x%x len=%zd" 4140scsi_disk_read_data_count(uint32_t sector_count) "Read sector_count=%d" 4141scsi_disk_read_data_invalid(void) "Data transfer direction invalid" 4142scsi_disk_write_complete_noio(uint32_t tag, size_t size) "Write complete tag=0x%x more=%zd" 4143scsi_disk_write_data_invalid(void) "Data transfer direction invalid" 4144scsi_disk_emulate_vpd_page_00(size_t xfer) "Inquiry EVPD[Supported pages] buffer size %zd" 4145scsi_disk_emulate_vpd_page_80_not_supported(void) "Inquiry (EVPD[Serial number] not supported" 4146scsi_disk_emulate_vpd_page_80(size_t xfer) "Inquiry EVPD[Serial number] buffer size %zd" 4147scsi_disk_emulate_vpd_page_83(size_t xfer) "Inquiry EVPD[Device identification] buffer size %zd" 4148scsi_disk_emulate_vpd_page_b0_not_supported(void) "Inquiry (EVPD[Block limits] not supported for CDROM" 4149scsi_disk_emulate_mode_sense(int cmd, int page, size_t xfer, int control) "Mode Sense(%d) (page %d, xfer %zd, page_control %d)" 4150scsi_disk_emulate_read_toc(int start_track, int format, int msf) "Read TOC (track %d format %d msf %d)" 4151scsi_disk_emulate_read_data(int buflen) "Read buf_len=%d" 4152scsi_disk_emulate_write_data(int buflen) "Write buf_len=%d" 4153scsi_disk_emulate_command_SAI_16(void) "SAI READ CAPACITY(16)" 4154scsi_disk_emulate_command_SAI_unsupported(void) "Unsupported Service Action In" 4155scsi_disk_emulate_command_SEEK_10(uint64_t lba) "Seek(10) (sector %" PRId64 ")" 4156scsi_disk_emulate_command_MODE_SELECT(size_t xfer) "Mode Select(6) (len %zd)" 4157scsi_disk_emulate_command_MODE_SELECT_10(size_t xfer) "Mode Select(10) (len %zd)" 4158scsi_disk_emulate_command_UNMAP(size_t xfer) "Unmap (len %zd)" 4159scsi_disk_emulate_command_VERIFY(int bytchk) "Verify (bytchk %d)" 4160scsi_disk_emulate_command_WRITE_SAME(int cmd, size_t xfer) "WRITE SAME %d (len %zd)" 4161scsi_disk_emulate_command_UNKNOWN(int cmd, const char *name) "Unknown SCSI command (0x%2.2x=%s)" 4162scsi_disk_emulate_command_FORMAT_UNIT(size_t xfer) "Format Unit (len %zu)" 4163scsi_disk_dma_command_READ(uint64_t lba, uint32_t len) "Read (sector %" PRId64 ", count %u)" 4164scsi_disk_dma_command_WRITE(const char *cmd, uint64_t lba, int len) "Write %s(sector %" PRId64 ", count %u)" 4165scsi_disk_new_request(uint32_t lun, uint32_t tag, const char *line) "Command: lun=%d tag=0x%x data=%s" 4166scsi_disk_aio_sgio_command(uint32_t tag, uint8_t cmd, uint64_t lba, int len, uint32_t timeout) "disk aio sgio: tag=0x%x cmd=0x%x (sector %" PRId64 ", count %d) timeout=%u" 4167scsi_disk_mode_select_page_truncated(int page, int len, int page_len) "page %d expected length %d but received length %d" 4168scsi_disk_mode_select_set_blocksize(int blocksize) "set block size to %d" 4169 4170# scsi-generic.c 4171scsi_generic_command_complete_noio(void *req, uint32_t tag, int statuc) "Command complete %p tag=0x%x status=%d" 4172scsi_generic_read_complete(uint32_t tag, int len) "Data ready tag=0x%x len=%d" 4173scsi_generic_read_data(uint32_t tag) "scsi_read_data tag=0x%x" 4174scsi_generic_write_complete(int ret) "scsi_write_complete() ret = %d" 4175scsi_generic_write_complete_blocksize(int blocksize) "block size %d" 4176scsi_generic_write_data(uint32_t tag) "scsi_write_data tag=0x%x" 4177scsi_generic_send_command(const char *line) "Command: data=%s" 4178scsi_generic_realize_type(int type) "device type %d" 4179scsi_generic_realize_blocksize(int blocksize) "block size %d" 4180scsi_generic_aio_sgio_command(uint32_t tag, uint8_t cmd, uint32_t timeout) "generic aio sgio: tag=0x%x cmd=0x%x timeout=%u" 4181scsi_generic_ioctl_sgio_command(uint8_t cmd, uint32_t timeout) "generic ioctl sgio: cmd=0x%x timeout=%u" 4182scsi_generic_ioctl_sgio_done(uint8_t cmd, int ret, uint8_t status, uint8_t host_status) "generic ioctl sgio: cmd=0x%x ret=%d status=0x%x host_status=0x%x" 4183# See docs/devel/tracing.rst for syntax documentation. 4184 4185# tmp_sbtsi.c 4186tmp_sbtsi_write_data(uint8_t addr, uint8_t value) "SBTSI write addr:0x%02x data: 0x%02x" 4187tmp_sbtsi_read_data(uint8_t addr, uint8_t value) "SBTSI read addr:0x%02x data: 0x%02x" 4188# See docs/devel/tracing.rst for syntax documentation. 4189 4190# allwinner-sdhost.c 4191allwinner_sdhost_set_inserted(bool inserted) "inserted %u" 4192allwinner_sdhost_process_desc(uint64_t desc_addr, uint32_t desc_size, bool is_write, uint32_t max_bytes) "desc_addr 0x%" PRIx64 " desc_size %" PRIu32 " is_write %u max_bytes %" PRIu32 4193allwinner_sdhost_read(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32 4194allwinner_sdhost_write(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32 4195allwinner_sdhost_update_irq(uint32_t irq) "IRQ bits 0x%" PRIx32 4196 4197# bcm2835_sdhost.c 4198bcm2835_sdhost_read(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" 4199bcm2835_sdhost_write(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" 4200bcm2835_sdhost_edm_change(const char *why, uint32_t edm) "(%s) EDM now 0x%x" 4201bcm2835_sdhost_update_irq(uint32_t irq) "IRQ bits 0x%x" 4202 4203# core.c 4204sdbus_command(const char *bus_name, uint8_t cmd, uint32_t arg) "@%s CMD%02d arg 0x%08x" 4205sdbus_read(const char *bus_name, uint8_t value) "@%s value 0x%02x" 4206sdbus_write(const char *bus_name, uint8_t value) "@%s value 0x%02x" 4207sdbus_set_voltage(const char *bus_name, uint16_t millivolts) "@%s %u (mV)" 4208sdbus_get_dat_lines(const char *bus_name, uint8_t dat_lines) "@%s dat_lines: %u" 4209sdbus_get_cmd_line(const char *bus_name, bool cmd_line) "@%s cmd_line: %u" 4210 4211# sdhci.c 4212sdhci_set_inserted(const char *level) "card state changed: %s" 4213sdhci_send_command(uint8_t cmd, uint32_t arg) "CMD%02u ARG[0x%08x]" 4214sdhci_error(const char *msg) "%s" 4215sdhci_response4(uint32_t r0) "RSPREG[31..0]=0x%08x" 4216sdhci_response16(uint32_t r3, uint32_t r2, uint32_t r1, uint32_t r0) "RSPREG[127..96]=0x%08x, RSPREG[95..64]=0x%08x, RSPREG[63..32]=0x%08x, RSPREG[31..0]=0x%08x" 4217sdhci_end_transfer(uint8_t cmd, uint32_t arg) "Automatically issue CMD%02u 0x%08x" 4218sdhci_adma(const char *desc, uint32_t sysad) "%s: admasysaddr=0x%" PRIx32 4219sdhci_adma_loop(uint64_t addr, uint16_t length, uint8_t attr) "addr=0x%08" PRIx64 ", len=%d, attr=0x%x" 4220sdhci_adma_transfer_completed(void) "" 4221sdhci_access(const char *access, unsigned int size, uint64_t offset, const char *dir, uint64_t val, uint64_t val2) "%s%u: addr[0x%04" PRIx64 "] %s 0x%08" PRIx64 " (%" PRIu64 ")" 4222sdhci_read_dataport(uint16_t data_count) "all %u bytes of data have been read from input buffer" 4223sdhci_write_dataport(uint16_t data_count) "write buffer filled with %u bytes of data" 4224sdhci_capareg(const char *desc, uint16_t val) "%s: %u" 4225 4226# sd.c 4227sdcard_normal_command(const char *proto, const char *cmd_desc, uint8_t cmd, uint32_t arg, const char *state) "%s %20s/ CMD%02d arg 0x%08x (state %s)" 4228sdcard_app_command(const char *proto, const char *acmd_desc, uint8_t acmd, uint32_t arg, const char *state) "%s %23s/ACMD%02d arg 0x%08x (state %s)" 4229sdcard_response(const char *rspdesc, int rsplen) "%s (sz:%d)" 4230sdcard_powerup(void) "" 4231sdcard_inquiry_cmd41(void) "" 4232sdcard_reset(void) "" 4233sdcard_set_blocklen(uint16_t length) "0x%03x" 4234sdcard_inserted(bool readonly) "read_only: %u" 4235sdcard_ejected(void) "" 4236sdcard_erase(uint32_t first, uint32_t last) "addr first 0x%" PRIx32" last 0x%" PRIx32 4237sdcard_lock(void) "" 4238sdcard_unlock(void) "" 4239sdcard_read_block(uint64_t addr, uint32_t len) "addr 0x%" PRIx64 " size 0x%x" 4240sdcard_write_block(uint64_t addr, uint32_t len) "addr 0x%" PRIx64 " size 0x%x" 4241sdcard_write_data(const char *proto, const char *cmd_desc, uint8_t cmd, uint8_t value) "%s %20s/ CMD%02d value 0x%02x" 4242sdcard_read_data(const char *proto, const char *cmd_desc, uint8_t cmd, uint32_t length) "%s %20s/ CMD%02d len %" PRIu32 4243sdcard_set_voltage(uint16_t millivolts) "%u mV" 4244 4245# pxa2xx_mmci.c 4246pxa2xx_mmci_read(uint8_t size, uint32_t addr, uint32_t value) "size %d addr 0x%02x value 0x%08x" 4247pxa2xx_mmci_write(uint8_t size, uint32_t addr, uint32_t value) "size %d addr 0x%02x value 0x%08x" 4248 4249# pl181.c 4250pl181_command_send(uint8_t cmd, uint32_t arg) "sending CMD%02d arg 0x%08" PRIx32 4251pl181_command_sent(void) "command sent" 4252pl181_command_response_pending(void) "response received" 4253pl181_command_timeout(void) "command timeouted" 4254pl181_fifo_push(uint32_t data) "FIFO push 0x%08" PRIx32 4255pl181_fifo_pop(uint32_t data) "FIFO pop 0x%08" PRIx32 4256pl181_fifo_transfer_complete(void) "FIFO transfer complete" 4257pl181_data_engine_idle(void) "data engine idle" 4258 4259# aspeed_sdhci.c 4260aspeed_sdhci_read(uint64_t addr, uint32_t size, uint64_t data) "@0x%" PRIx64 " size %u: 0x%" PRIx64 4261aspeed_sdhci_write(uint64_t addr, uint32_t size, uint64_t data) "@0x%" PRIx64 " size %u: 0x%" PRIx64 4262# sh7750.c 4263sh7750_porta(uint16_t prev, uint16_t cur, uint16_t pdtr, uint16_t pctr) "porta changed from 0x%04x to 0x%04x\npdtra=0x%04x, pctra=0x%08x" 4264sh7750_portb(uint16_t prev, uint16_t cur, uint16_t pdtr, uint16_t pctr) "portb changed from 0x%04x to 0x%04x\npdtrb=0x%04x, pctrb=0x%08x" 4265# See docs/devel/tracing.rst for syntax documentation. 4266 4267# sun4m.c 4268sun4m_cpu_set_irq_raise(int level) "Raise CPU IRQ %d" 4269sun4m_cpu_set_irq_lower(int level) "Lower CPU IRQ %d" 4270 4271# sun4m_iommu.c 4272sun4m_iommu_mem_readl(uint64_t addr, uint32_t ret) "read reg[0x%"PRIx64"] = 0x%x" 4273sun4m_iommu_mem_writel(uint64_t addr, uint32_t val) "write reg[0x%"PRIx64"] = 0x%x" 4274sun4m_iommu_mem_writel_ctrl(uint64_t iostart) "iostart = 0x%"PRIx64 4275sun4m_iommu_mem_writel_tlbflush(uint32_t val) "tlb flush 0x%x" 4276sun4m_iommu_mem_writel_pgflush(uint32_t val) "page flush 0x%x" 4277sun4m_iommu_page_get_flags(uint64_t pa, uint64_t iopte, uint32_t ret) "get flags addr 0x%"PRIx64" => pte 0x%"PRIx64", *pte = 0x%x" 4278sun4m_iommu_translate_pa(uint64_t addr, uint64_t pa, uint32_t iopte) "xlate dva 0x%"PRIx64" => pa 0x%"PRIx64" iopte = 0x%x" 4279sun4m_iommu_bad_addr(uint64_t addr) "bad addr 0x%"PRIx64 4280 4281# leon3.c 4282leon3_set_irq(int intno) "Set CPU IRQ %d" 4283leon3_reset_irq(int intno) "Reset CPU IRQ %d" 4284int_helper_icache_freeze(void) "Instruction cache: freeze" 4285int_helper_dcache_freeze(void) "Data cache: freeze" 4286# See docs/devel/tracing.rst for syntax documentation. 4287 4288# sun4u.c 4289ebus_isa_irq_handler(int n, int level) "Set ISA IRQ %d level %d" 4290 4291# sun4u_iommu.c 4292sun4u_iommu_mem_read(uint64_t addr, uint64_t val, int size) "addr: 0x%"PRIx64" val: 0x%"PRIx64" size: %d" 4293sun4u_iommu_mem_write(uint64_t addr, uint64_t val, int size) "addr: 0x%"PRIx64" val: 0x%"PRIx64" size: %d" 4294sun4u_iommu_translate(uint64_t addr, uint64_t trans_addr, uint64_t tte) "xlate 0x%"PRIx64" => pa 0x%"PRIx64" tte: 0x%"PRIx64 4295 4296# sparc64.c 4297sparc64_cpu_ivec_raise_irq(int irq) "Raise IVEC IRQ %d" 4298sparc64_cpu_ivec_lower_irq(int irq) "Lower IVEC IRQ %d" 4299sparc64_cpu_tick_irq_disabled(void) "tick_irq: softint disabled" 4300sparc64_cpu_tick_irq_fire(void) "tick_irq: fire" 4301sparc64_cpu_stick_irq_disabled(void) "stick_irq: softint disabled" 4302sparc64_cpu_stick_irq_fire(void) "stick_irq: fire" 4303sparc64_cpu_hstick_irq_disabled(void) "hstick_irq: softint disabled" 4304sparc64_cpu_hstick_irq_fire(void) "hstick_irq: fire" 4305sparc64_cpu_tick_set_count(const char *name, uint64_t real_count, const char *npt, void *p) "%s set_count count=0x%"PRIx64" (npt %s) p=%p" 4306sparc64_cpu_tick_get_count(const char *name, uint64_t real_count, const char *npt, void *p) "%s get_count count=0x%"PRIx64" (npt %s) p=%p" 4307sparc64_cpu_tick_set_limit(const char *name, uint64_t real_limit, const char *dis, void *p, uint64_t limit, uint64_t t, uint64_t dt) "%s set_limit limit=0x%"PRIx64 " (%s) p=%p called with limit=0x%"PRIx64" at 0x%"PRIx64" (delta=0x%"PRIx64")" 4308sparc64_cpu_tick_set_limit_zero(const char *name) "%s set_limit limit=ZERO - not starting timer" 4309# aspeed_smc.c 4310 4311aspeed_smc_flash_set_segment(int cs, uint64_t reg, uint64_t start, uint64_t end) "CS%d segreg=0x%"PRIx64" [ 0x%"PRIx64" - 0x%"PRIx64" ]" 4312aspeed_smc_flash_read(int cs, uint64_t addr, uint32_t size, uint64_t data, int mode) "CS%d @0x%" PRIx64 " size %u: 0x%" PRIx64" mode:%d" 4313aspeed_smc_do_snoop(int cs, int index, int dummies, int data) "CS%d index:0x%x dummies:%d data:0x%x" 4314aspeed_smc_flash_write(int cs, uint64_t addr, uint32_t size, uint64_t data, int mode) "CS%d @0x%" PRIx64 " size %u: 0x%" PRIx64" mode:%d" 4315aspeed_smc_read(uint64_t addr, uint32_t size, uint64_t data) "@0x%" PRIx64 " size %u: 0x%" PRIx64 4316aspeed_smc_dma_checksum(uint32_t addr, uint32_t data) "0x%08x: 0x%08x" 4317aspeed_smc_dma_rw(const char *dir, uint32_t flash_addr, uint32_t dram_addr, uint32_t size) "%s flash:@0x%08x dram:@0x%08x size:0x%08x" 4318aspeed_smc_write(uint64_t addr, uint32_t size, uint64_t data) "@0x%" PRIx64 " size %u: 0x%" PRIx64 4319aspeed_smc_flash_select(int cs, const char *prefix) "CS%d %sselect" 4320 4321# npcm7xx_fiu.c 4322 4323npcm7xx_fiu_enter_reset(const char *id, int reset_type) "%s reset type: %d" 4324npcm7xx_fiu_hold_reset(const char *id) "%s" 4325npcm7xx_fiu_select(const char *id, int cs) "%s select CS%d" 4326npcm7xx_fiu_deselect(const char *id, int cs) "%s deselect CS%d" 4327npcm7xx_fiu_ctrl_read(const char *id, uint64_t addr, uint32_t data) "%s offset: 0x%04" PRIx64 " value: 0x%08" PRIx32 4328npcm7xx_fiu_ctrl_write(const char *id, uint64_t addr, uint32_t data) "%s offset: 0x%04" PRIx64 " value: 0x%08" PRIx32 4329npcm7xx_fiu_flash_read(const char *id, int cs, uint64_t addr, unsigned int size, uint64_t value) "%s[%d] offset: 0x%08" PRIx64 " size: %u value: 0x%" PRIx64 4330npcm7xx_fiu_flash_write(const char *id, unsigned cs, uint64_t addr, unsigned int size, uint64_t value) "%s[%d] offset: 0x%08" PRIx64 " size: %u value: 0x%" PRIx64 4331 4332# npcm_pspi.c 4333npcm_pspi_enter_reset(const char *id, int reset_type) "%s reset type: %d" 4334npcm_pspi_ctrl_read(const char *id, uint64_t addr, uint16_t data) "%s offset: 0x%03" PRIx64 " value: 0x%04" PRIx16 4335npcm_pspi_ctrl_write(const char *id, uint64_t addr, uint16_t data) "%s offset: 0x%03" PRIx64 " value: 0x%04" PRIx16 4336 4337# ibex_spi_host.c 4338 4339ibex_spi_host_reset(const char *msg) "%s" 4340ibex_spi_host_transfer(uint32_t tx_data, uint32_t rx_data) "tx_data: 0x%" PRIx32 " rx_data: @0x%" PRIx32 4341ibex_spi_host_write(uint64_t addr, uint32_t size, uint64_t data) "@0x%" PRIx64 " size %u: 0x%" PRIx64 4342ibex_spi_host_read(uint64_t addr, uint32_t size) "@0x%" PRIx64 " size %u:" 4343# See docs/devel/tracing.rst for syntax documentation. 4344 4345# slavio_timer.c 4346slavio_timer_get_out(uint64_t limit, uint32_t counthigh, uint32_t count) "limit 0x%"PRIx64" count 0x%x0x%08x" 4347slavio_timer_irq(uint32_t counthigh, uint32_t count) "callback: count 0x%x0x%08x" 4348slavio_timer_mem_readl_invalid(uint64_t addr) "invalid read address 0x%"PRIx64 4349slavio_timer_mem_readl(uint64_t addr, uint32_t ret) "read 0x%"PRIx64" = 0x%08x" 4350slavio_timer_mem_writel(uint64_t addr, uint32_t val) "write 0x%"PRIx64" = 0x%08x" 4351slavio_timer_mem_writel_limit(unsigned int timer_index, uint64_t count) "processor %d user timer set to 0x%016"PRIx64 4352slavio_timer_mem_writel_counter_invalid(void) "not user timer" 4353slavio_timer_mem_writel_status_start(unsigned int timer_index) "processor %d user timer started" 4354slavio_timer_mem_writel_status_stop(unsigned int timer_index) "processor %d user timer stopped" 4355slavio_timer_mem_writel_mode_user(unsigned int timer_index) "processor %d changed from counter to user timer" 4356slavio_timer_mem_writel_mode_counter(unsigned int timer_index) "processor %d changed from user timer to counter" 4357slavio_timer_mem_writel_mode_invalid(void) "not system timer" 4358slavio_timer_mem_writel_invalid(uint64_t addr) "invalid write address 0x%"PRIx64 4359 4360# grlib_gptimer.c 4361grlib_gptimer_enable(int id, uint32_t count) "timer:%d set count 0x%x and run" 4362grlib_gptimer_disabled(int id, uint32_t config) "timer:%d Timer disable config 0x%x" 4363grlib_gptimer_restart(int id, uint32_t reload) "timer:%d reload val: 0x%x" 4364grlib_gptimer_set_scaler(uint32_t scaler, uint32_t freq) "scaler:0x%x freq:%uHz" 4365grlib_gptimer_hit(int id) "timer:%d HIT" 4366grlib_gptimer_readl(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x" 4367grlib_gptimer_writel(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x" 4368 4369# aspeed_timer.c 4370aspeed_timer_ctrl_enable(uint8_t i, bool enable) "Timer %" PRIu8 ": %d" 4371aspeed_timer_ctrl_external_clock(uint8_t i, bool enable) "Timer %" PRIu8 ": %d" 4372aspeed_timer_ctrl_overflow_interrupt(uint8_t i, bool enable) "Timer %" PRIu8 ": %d" 4373aspeed_timer_ctrl_pulse_enable(uint8_t i, bool enable) "Timer %" PRIu8 ": %d" 4374aspeed_timer_set_ctrl2(uint32_t value) "Value: 0x%" PRIx32 4375aspeed_timer_set_value(int timer, int reg, uint32_t value) "Timer %d register %d: 0x%" PRIx32 4376aspeed_timer_read(uint64_t offset, unsigned size, uint64_t value) "From 0x%" PRIx64 ": of size %u: 0x%" PRIx64 4377 4378# armv7m_systick.c 4379systick_reload(void) "systick reload" 4380systick_timer_tick(void) "systick reload" 4381systick_read(uint64_t addr, uint32_t value, unsigned size) "systick read addr 0x%" PRIx64 " data 0x%" PRIx32 " size %u" 4382systick_write(uint64_t addr, uint32_t value, unsigned size) "systick write addr 0x%" PRIx64 " data 0x%" PRIx32 " size %u" 4383 4384# cmsdk-apb-timer.c 4385cmsdk_apb_timer_read(uint64_t offset, uint64_t data, unsigned size) "CMSDK APB timer read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" 4386cmsdk_apb_timer_write(uint64_t offset, uint64_t data, unsigned size) "CMSDK APB timer write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" 4387cmsdk_apb_timer_reset(void) "CMSDK APB timer: reset" 4388 4389# cmsdk-apb-dualtimer.c 4390cmsdk_apb_dualtimer_read(uint64_t offset, uint64_t data, unsigned size) "CMSDK APB dualtimer read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" 4391cmsdk_apb_dualtimer_write(uint64_t offset, uint64_t data, unsigned size) "CMSDK APB dualtimer write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" 4392cmsdk_apb_dualtimer_reset(void) "CMSDK APB dualtimer: reset" 4393 4394# npcm7xx_timer.c 4395npcm7xx_timer_read(const char *id, uint64_t offset, uint64_t value) " %s offset: 0x%04" PRIx64 " value 0x%08" PRIx64 4396npcm7xx_timer_write(const char *id, uint64_t offset, uint64_t value) "%s offset: 0x%04" PRIx64 " value 0x%08" PRIx64 4397npcm7xx_timer_irq(const char *id, int timer, int state) "%s timer %d state %d" 4398 4399# nrf51_timer.c 4400nrf51_timer_read(uint8_t timer_id, uint64_t addr, uint32_t value, unsigned size) "timer %u read addr 0x%" PRIx64 " data 0x%" PRIx32 " size %u" 4401nrf51_timer_write(uint8_t timer_id, uint64_t addr, uint32_t value, unsigned size) "timer %u write addr 0x%" PRIx64 " data 0x%" PRIx32 " size %u" 4402nrf51_timer_set_count(uint8_t timer_id, uint8_t counter_id, uint32_t value) "timer %u counter %u count 0x%" PRIx32 4403 4404# bcm2835_systmr.c 4405bcm2835_systmr_timer_expired(unsigned id) "timer #%u expired" 4406bcm2835_systmr_irq_ack(unsigned id) "timer #%u acked" 4407bcm2835_systmr_read(uint64_t offset, uint64_t data) "timer read: offset 0x%" PRIx64 " data 0x%" PRIx64 4408bcm2835_systmr_write(uint64_t offset, uint32_t data) "timer write: offset 0x%" PRIx64 " data 0x%" PRIx32 4409bcm2835_systmr_run(unsigned id, uint64_t delay_us) "timer #%u expiring in %"PRIu64" us" 4410 4411# avr_timer16.c 4412avr_timer16_read(uint8_t addr, uint8_t value) "timer16 read addr:%u value:%u" 4413avr_timer16_read_ifr(uint8_t value) "timer16 read addr:ifr value:%u" 4414avr_timer16_read_imsk(uint8_t value) "timer16 read addr:imsk value:%u" 4415avr_timer16_write(uint8_t addr, uint8_t value) "timer16 write addr:%u value:%u" 4416avr_timer16_write_imsk(uint8_t value) "timer16 write addr:imsk value:%u" 4417avr_timer16_interrupt_count(uint8_t cnt) "count: %u" 4418avr_timer16_interrupt_overflow(const char *reason) "overflow: %s" 4419avr_timer16_next_alarm(uint64_t delay_ns) "next alarm: %" PRIu64 " ns from now" 4420avr_timer16_clksrc_update(uint64_t freq_hz, uint64_t period_ns, uint64_t delay_s) "timer frequency: %" PRIu64 " Hz, period: %" PRIu64 " ns (%" PRId64 " us)" 4421 4422# sse_counter.c 4423sse_counter_control_read(uint64_t offset, uint64_t data, unsigned size) "SSE system counter control frame read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" 4424sse_counter_control_write(uint64_t offset, uint64_t data, unsigned size) "SSE system counter control framen write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" 4425sse_counter_status_read(uint64_t offset, uint64_t data, unsigned size) "SSE system counter status frame read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" 4426sse_counter_status_write(uint64_t offset, uint64_t data, unsigned size) "SSE system counter status frame write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" 4427sse_counter_reset(void) "SSE system counter: reset" 4428 4429# sse_timer.c 4430sse_timer_read(uint64_t offset, uint64_t data, unsigned size) "SSE system timer read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" 4431sse_timer_write(uint64_t offset, uint64_t data, unsigned size) "SSE system timer write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" 4432sse_timer_reset(void) "SSE system timer: reset" 4433 4434# sifive_pwm.c 4435sifive_pwm_set_alarm(uint64_t alarm, uint64_t now) "Setting alarm to: 0x%" PRIx64 ", now: 0x%" PRIx64 4436sifive_pwm_interrupt(int num) "Interrupt %d" 4437sifive_pwm_read(uint64_t offset) "Read at address: 0x%" PRIx64 4438sifive_pwm_write(uint64_t data, uint64_t offset) "Write 0x%" PRIx64 " at address: 0x%" PRIx64 4439 4440# sh_timer.c 4441sh_timer_start_stop(int enable, int current) "%d (%d)" 4442sh_timer_read(uint64_t offset) "tmu012_read 0x%" PRIx64 4443sh_timer_write(uint64_t offset, uint64_t value) "tmu012_write 0x%" PRIx64 " 0x%08" PRIx64 4444# See docs/devel/tracing.rst for syntax documentation. 4445 4446# tpm_crb.c 4447tpm_crb_mmio_read(uint64_t addr, unsigned size, uint32_t val) "CRB read 0x%016" PRIx64 " len:%u val: 0x%" PRIx32 4448tpm_crb_mmio_write(uint64_t addr, unsigned size, uint32_t val) "CRB write 0x%016" PRIx64 " len:%u val: 0x%" PRIx32 4449 4450# tpm_tis_common.c 4451tpm_tis_raise_irq(uint32_t irqmask) "Raising IRQ for flag 0x%08x" 4452tpm_tis_new_active_locality(uint8_t locty) "Active locality is now %d" 4453tpm_tis_abort(uint8_t locty) "New active locality is %d" 4454tpm_tis_data_read(uint32_t value, uint32_t off) "byte 0x%02x [%d]" 4455tpm_tis_mmio_read(unsigned size, uint32_t addr, uint32_t val) " read.%u(0x%08x) = 0x%08x" 4456tpm_tis_mmio_write(unsigned size, uint32_t addr, uint32_t val) "write.%u(0x%08x) = 0x%08x" 4457tpm_tis_mmio_write_locty4(void) "Access to locality 4 only allowed from hardware" 4458tpm_tis_mmio_write_release_locty(uint8_t locty) "Releasing locality %d" 4459tpm_tis_mmio_write_locty_req_use(uint8_t locty) "Locality %d requests use" 4460tpm_tis_mmio_write_next_locty(uint8_t locty) "Next active locality is %d" 4461tpm_tis_mmio_write_locty_seized(uint8_t locty, uint8_t active) "Locality %d seized from locality %d" 4462tpm_tis_mmio_write_init_abort(void) "Initiating abort" 4463tpm_tis_mmio_write_lowering_irq(void) "Lowering IRQ" 4464tpm_tis_mmio_write_data2send(uint32_t value, unsigned size) "Data to send to TPM: 0x%08x (size=%d)" 4465tpm_tis_pre_save(uint8_t locty, uint32_t rw_offset) "locty: %d, rw_offset = %u" 4466 4467# tpm_ppi.c 4468tpm_ppi_memset(uint8_t *ptr, size_t size) "memset: %p %zu" 4469 4470# tpm_spapr.c 4471tpm_spapr_do_crq(uint8_t raw1, uint8_t raw2) "1st 2 bytes in CRQ: 0x%02x 0x%02x" 4472tpm_spapr_do_crq_crq_result(void) "SPAPR_VTPM_INIT_CRQ_RESULT" 4473tpm_spapr_do_crq_crq_complete_result(void) "SPAPR_VTPM_INIT_CRQ_COMP_RESULT" 4474tpm_spapr_do_crq_tpm_command(void) "got TPM command payload" 4475tpm_spapr_do_crq_tpm_get_rtce_buffer_size(size_t buffersize) "response: buffer size is %zu" 4476tpm_spapr_do_crq_get_version(uint32_t version) "response: version %u" 4477tpm_spapr_do_crq_prepare_to_suspend(void) "response: preparing to suspend" 4478tpm_spapr_do_crq_unknown_msg_type(uint8_t type) "Unknown message type 0x%02x" 4479tpm_spapr_do_crq_unknown_crq(uint8_t raw1, uint8_t raw2) "unknown CRQ 0x%02x 0x%02x ..." 4480tpm_spapr_post_load(void) "Delivering TPM response after resume" 4481tpm_spapr_caught_response(uint32_t v) "Caught response to deliver after resume: %u bytes" 4482 4483# tpm_tis_i2c.c 4484tpm_tis_i2c_recv(uint8_t data) "TPM I2C read: 0x%X" 4485tpm_tis_i2c_send(uint8_t data) "TPM I2C write: 0x%X" 4486tpm_tis_i2c_event(const char *event) "TPM I2C event: %s" 4487tpm_tis_i2c_send_reg(const char *name, int reg) "TPM I2C write register: %s(0x%X)" 4488# ufs.c 4489ufs_irq_raise(void) "INTx" 4490ufs_irq_lower(void) "INTx" 4491ufs_mmio_read(uint64_t addr, uint64_t data, unsigned size) "addr 0x%"PRIx64" data 0x%"PRIx64" size %d" 4492ufs_mmio_write(uint64_t addr, uint64_t data, unsigned size) "addr 0x%"PRIx64" data 0x%"PRIx64" size %d" 4493ufs_process_db(uint32_t slot) "UTRLDBR slot %"PRIu32"" 4494ufs_process_req(uint32_t slot) "UTRLDBR slot %"PRIu32"" 4495ufs_complete_req(uint32_t slot) "UTRLDBR slot %"PRIu32"" 4496ufs_sendback_req(uint32_t slot) "UTRLDBR slot %"PRIu32"" 4497ufs_exec_nop_cmd(uint32_t slot) "UTRLDBR slot %"PRIu32"" 4498ufs_exec_scsi_cmd(uint32_t slot, uint8_t lun, uint8_t opcode) "slot %"PRIu32", lun 0x%"PRIx8", opcode 0x%"PRIx8"" 4499ufs_exec_query_cmd(uint32_t slot, uint8_t opcode) "slot %"PRIu32", opcode 0x%"PRIx8"" 4500ufs_process_uiccmd(uint32_t uiccmd, uint32_t ucmdarg1, uint32_t ucmdarg2, uint32_t ucmdarg3) "uiccmd 0x%"PRIx32", ucmdarg1 0x%"PRIx32", ucmdarg2 0x%"PRIx32", ucmdarg3 0x%"PRIx32"" 4501 4502# error condition 4503ufs_err_dma_read_utrd(uint32_t slot, uint64_t addr) "failed to read utrd. UTRLDBR slot %"PRIu32", UTRD dma addr %"PRIu64"" 4504ufs_err_dma_read_req_upiu(uint32_t slot, uint64_t addr) "failed to read req upiu. UTRLDBR slot %"PRIu32", request upiu addr %"PRIu64"" 4505ufs_err_dma_read_prdt(uint32_t slot, uint64_t addr) "failed to read prdt. UTRLDBR slot %"PRIu32", prdt addr %"PRIu64"" 4506ufs_err_dma_write_utrd(uint32_t slot, uint64_t addr) "failed to write utrd. UTRLDBR slot %"PRIu32", UTRD dma addr %"PRIu64"" 4507ufs_err_dma_write_rsp_upiu(uint32_t slot, uint64_t addr) "failed to write rsp upiu. UTRLDBR slot %"PRIu32", response upiu addr %"PRIu64"" 4508ufs_err_utrl_slot_error(uint32_t slot) "UTRLDBR slot %"PRIu32" is in error" 4509ufs_err_utrl_slot_busy(uint32_t slot) "UTRLDBR slot %"PRIu32" is busy" 4510ufs_err_unsupport_register_offset(uint32_t offset) "Register offset 0x%"PRIx32" is not yet supported" 4511ufs_err_invalid_register_offset(uint32_t offset) "Register offset 0x%"PRIx32" is invalid" 4512ufs_err_scsi_cmd_invalid_lun(uint8_t lun) "scsi command has invalid lun: 0x%"PRIx8"" 4513ufs_err_query_flag_not_readable(uint8_t idn) "query flag idn 0x%"PRIx8" is denied to read" 4514ufs_err_query_flag_not_writable(uint8_t idn) "query flag idn 0x%"PRIx8" is denied to write" 4515ufs_err_query_attr_not_readable(uint8_t idn) "query attribute idn 0x%"PRIx8" is denied to read" 4516ufs_err_query_attr_not_writable(uint8_t idn) "query attribute idn 0x%"PRIx8" is denied to write" 4517ufs_err_query_invalid_opcode(uint8_t opcode) "query request has invalid opcode. opcode: 0x%"PRIx8"" 4518ufs_err_query_invalid_idn(uint8_t opcode, uint8_t idn) "query request has invalid idn. opcode: 0x%"PRIx8", idn 0x%"PRIx8"" 4519ufs_err_query_invalid_index(uint8_t opcode, uint8_t index) "query request has invalid index. opcode: 0x%"PRIx8", index 0x%"PRIx8"" 4520ufs_err_invalid_trans_code(uint32_t slot, uint8_t trans_code) "request upiu has invalid transaction code. slot: %"PRIu32", trans_code: 0x%"PRIx8"" 4521# See docs/devel/tracing.rst for syntax documentation. 4522 4523# core.c 4524usb_packet_state_change(int bus, const char *port, int ep, void *p, const char *o, const char *n) "bus %d, port %s, ep %d, packet %p, state %s -> %s" 4525usb_packet_state_fault(int bus, const char *port, int ep, void *p, const char *o, const char *n) "bus %d, port %s, ep %d, packet %p, state %s, expected %s" 4526 4527# bus.c 4528usb_port_claim(int bus, const char *port) "bus %d, port %s" 4529usb_port_attach(int bus, const char *port, const char *devspeed, const char *portspeed) "bus %d, port %s, devspeed %s, portspeed %s" 4530usb_port_detach(int bus, const char *port) "bus %d, port %s" 4531usb_port_release(int bus, const char *port) "bus %d, port %s" 4532 4533# hcd-ohci-pci.c 4534usb_ohci_exit(const char *s) "%s" 4535 4536# hcd-ohci.c 4537usb_ohci_iso_td_read_failed(uint32_t addr) "ISO_TD read error at 0x%x" 4538usb_ohci_iso_td_head(uint32_t head, uint32_t tail, uint32_t flags, uint32_t bp, uint32_t next, uint32_t be, uint32_t framenum, uint32_t startframe, uint32_t framecount, int rel_frame_num) "ISO_TD ED head 0x%.8x tailp 0x%.8x\n0x%.8x 0x%.8x 0x%.8x 0x%.8x\nframe_number 0x%.8x starting_frame 0x%.8x\nframe_count 0x%.8x relative %d" 4539usb_ohci_iso_td_head_offset(uint32_t o0, uint32_t o1, uint32_t o2, uint32_t o3, uint32_t o4, uint32_t o5, uint32_t o6, uint32_t o7) "0x%.8x 0x%.8x 0x%.8x 0x%.8x 0x%.8x 0x%.8x 0x%.8x 0x%.8x" 4540usb_ohci_iso_td_relative_frame_number_neg(int rel) "ISO_TD R=%d < 0" 4541usb_ohci_iso_td_relative_frame_number_big(int rel, int count) "ISO_TD R=%d > FC=%d" 4542usb_ohci_iso_td_bad_direction(int dir) "Bad direction %d" 4543usb_ohci_iso_td_bad_bp_be(uint32_t bp, uint32_t be) "ISO_TD bp 0x%.8x be 0x%.8x" 4544usb_ohci_iso_td_bad_cc_not_accessed(uint32_t start, uint32_t next) "ISO_TD cc != not accessed 0x%.8x 0x%.8x" 4545usb_ohci_iso_td_bad_cc_overrun(uint32_t start, uint32_t next) "ISO_TD start_offset=0x%.8x > next_offset=0x%.8x" 4546usb_ohci_iso_td_so(uint32_t so, uint32_t eo, uint32_t s, uint32_t e, const char *str, ssize_t len, int ret) "0x%.8x eo 0x%.8x\nsa 0x%.8x ea 0x%.8x\ndir %s len %zu ret %d" 4547usb_ohci_iso_td_data_overrun(int ret, ssize_t len) "DataOverrun %d > %zu" 4548usb_ohci_iso_td_data_underrun(int ret) "DataUnderrun %d" 4549usb_ohci_iso_td_nak(int ret) "got NAK/STALL %d" 4550usb_ohci_iso_td_bad_response(int ret) "Bad device response %d" 4551usb_ohci_port_attach(int index) "port #%d" 4552usb_ohci_port_detach(int index) "port #%d" 4553usb_ohci_port_wakeup(int index) "port #%d" 4554usb_ohci_port_suspend(int index) "port #%d" 4555usb_ohci_port_reset(int index) "port #%d" 4556usb_ohci_remote_wakeup(const char *s) "%s: SUSPEND->RESUME" 4557usb_ohci_reset(const char *s) "%s" 4558usb_ohci_start(const char *s) "%s: USB Operational" 4559usb_ohci_resume(const char *s) "%s: USB Resume" 4560usb_ohci_stop(const char *s) "%s: USB Suspended" 4561usb_ohci_set_ctl(const char *s, uint32_t new_state) "%s: new state 0x%x" 4562usb_ohci_td_underrun(void) "" 4563usb_ohci_td_dev_error(void) "" 4564usb_ohci_td_nak(void) "" 4565usb_ohci_td_stall(void) "" 4566usb_ohci_td_babble(void) "" 4567usb_ohci_td_bad_device_response(int rc) "%d" 4568usb_ohci_td_read_error(uint32_t addr) "TD read error at 0x%x" 4569usb_ohci_td_bad_direction(int dir) "Bad direction %d" 4570usb_ohci_td_skip_async(void) "" 4571usb_ohci_td_pkt_hdr(uint32_t addr, int64_t pktlen, int64_t len, const char *s, int flag_r, uint32_t cbp, uint32_t be) " TD @ 0x%.8x %" PRId64 " of %" PRId64 " bytes %s r=%d cbp=0x%.8x be=0x%.8x" 4572usb_ohci_td_pkt_short(const char *dir, const char *buf) "%s data: %s" 4573usb_ohci_td_pkt_full(const char *dir, const char *buf) "%s data: %s" 4574usb_ohci_td_too_many_pending(int ep) "ep=%d" 4575usb_ohci_td_packet_status(int status) "status=%d" 4576usb_ohci_ed_read_error(uint32_t addr) "ED read error at 0x%x" 4577usb_ohci_ed_pkt(uint32_t cur, int h, int c, uint32_t head, uint32_t tail, uint32_t next) "ED @ 0x%.8x h=%u c=%u\n head=0x%.8x tailp=0x%.8x next=0x%.8x" 4578usb_ohci_ed_pkt_flags(uint32_t fa, uint32_t en, uint32_t d, int s, int k, int f, uint32_t mps) "fa=%u en=%u d=%u s=%u k=%u f=%u mps=%u" 4579usb_ohci_hcca_read_error(uint32_t addr) "HCCA read error at 0x%x" 4580usb_ohci_mem_read(uint32_t size, const char *name, uint32_t addr, uint32_t offs, uint32_t val) "%d %s 0x%x %d -> 0x%x" 4581usb_ohci_mem_port_read(uint32_t size, const char *name, uint32_t port, uint32_t addr, uint32_t offs, uint32_t val) "%d %s[%d] 0x%x %d -> 0x%x" 4582usb_ohci_mem_read_unaligned(uint32_t addr) "at 0x%x" 4583usb_ohci_mem_read_bad_offset(uint32_t addr) "0x%x" 4584usb_ohci_mem_write(uint32_t size, const char *name, uint32_t addr, uint32_t offs, uint32_t val) "%d %s 0x%x %d <- 0x%x" 4585usb_ohci_mem_port_write(uint32_t size, const char *name, uint32_t port, uint32_t addr, uint32_t offs, uint32_t val) "%d %s[%d] 0x%x %d <- 0x%x" 4586usb_ohci_mem_write_unaligned(uint32_t addr) "at 0x%x" 4587usb_ohci_mem_write_bad_offset(uint32_t addr) "0x%x" 4588usb_ohci_process_lists(uint32_t head, uint32_t cur) "head 0x%x, cur 0x%x" 4589usb_ohci_set_frame_interval(const char *name, uint16_t fi_x, uint16_t fi_u) "%s: FrameInterval = 0x%x (%u)" 4590usb_ohci_hub_power_up(void) "powered up all ports" 4591usb_ohci_hub_power_down(void) "powered down all ports" 4592usb_ohci_init_time(int64_t frametime, int64_t bittime) "usb_bit_time=%" PRId64 " usb_frame_time=%" PRId64 4593usb_ohci_die(void) "" 4594usb_ohci_async_complete(void) "" 4595 4596# hcd-ehci.c 4597usb_ehci_reset(void) "=== RESET ===" 4598usb_ehci_unrealize(void) "=== UNREALIZE ===" 4599usb_ehci_opreg_read(uint32_t addr, const char *str, uint32_t val) "rd mmio 0x%04x [%s] = 0x%x" 4600usb_ehci_opreg_write(uint32_t addr, const char *str, uint32_t val) "wr mmio 0x%04x [%s] = 0x%x" 4601usb_ehci_opreg_change(uint32_t addr, const char *str, uint32_t new, uint32_t old) "ch mmio 0x%04x [%s] = 0x%x (old: 0x%x)" 4602usb_ehci_portsc_read(uint32_t addr, uint32_t port, uint32_t val) "rd mmio 0x%04x [port %d] = 0x%x" 4603usb_ehci_portsc_write(uint32_t addr, uint32_t port, uint32_t val) "wr mmio 0x%04x [port %d] = 0x%x" 4604usb_ehci_portsc_change(uint32_t addr, uint32_t port, uint32_t new, uint32_t old) "ch mmio 0x%04x [port %d] = 0x%x (old: 0x%x)" 4605usb_ehci_usbsts(const char *sts, int state) "usbsts %s %d" 4606usb_ehci_state(const char *schedule, const char *state) "%s schedule %s" 4607usb_ehci_qh_ptrs(void *q, uint32_t addr, uint32_t nxt, uint32_t c_qtd, uint32_t n_qtd, uint32_t a_qtd) "q %p - QH @ 0x%08x: next 0x%08x qtds 0x%08x,0x%08x,0x%08x" 4608usb_ehci_qh_fields(uint32_t addr, int rl, int mplen, int eps, int ep, int devaddr) "QH @ 0x%08x - rl %d, mplen %d, eps %d, ep %d, dev %d" 4609usb_ehci_qh_bits(uint32_t addr, int c, int h, int dtc, int i) "QH @ 0x%08x - c %d, h %d, dtc %d, i %d" 4610usb_ehci_qtd_ptrs(void *q, uint32_t addr, uint32_t nxt, uint32_t altnext) "q %p - QTD @ 0x%08x: next 0x%08x altnext 0x%08x" 4611usb_ehci_qtd_fields(uint32_t addr, int tbytes, int cpage, int cerr, int pid) "QTD @ 0x%08x - tbytes %d, cpage %d, cerr %d, pid %d" 4612usb_ehci_qtd_bits(uint32_t addr, int ioc, int active, int halt, int babble, int xacterr) "QTD @ 0x%08x - ioc %d, active %d, halt %d, babble %d, xacterr %d" 4613usb_ehci_itd(uint32_t addr, uint32_t nxt, uint32_t mplen, uint32_t mult, uint32_t ep, uint32_t devaddr) "ITD @ 0x%08x: next 0x%08x - mplen %d, mult %d, ep %d, dev %d" 4614usb_ehci_sitd(uint32_t addr, uint32_t nxt, uint32_t active) "ITD @ 0x%08x: next 0x%08x - active %d" 4615usb_ehci_port_attach(uint32_t port, const char *owner, const char *device) "attach port #%d, owner %s, device %s" 4616usb_ehci_port_detach(uint32_t port, const char *owner) "detach port #%d, owner %s" 4617usb_ehci_port_reset(uint32_t port, int enable) "reset port #%d - %d" 4618usb_ehci_port_suspend(uint32_t port) "port #%d" 4619usb_ehci_port_wakeup(uint32_t port) "port #%d" 4620usb_ehci_port_resume(uint32_t port) "port #%d" 4621usb_ehci_queue_action(void *q, const char *action) "q %p: %s" 4622usb_ehci_packet_action(void *q, void *p, const char *action) "q %p p %p: %s" 4623usb_ehci_irq(uint32_t level, uint32_t frindex, uint32_t sts, uint32_t mask) "level %d, frindex 0x%04x, sts 0x%x, mask 0x%x" 4624usb_ehci_guest_bug(const char *reason) "%s" 4625usb_ehci_doorbell_ring(void) "" 4626usb_ehci_doorbell_ack(void) "" 4627usb_ehci_dma_error(void) "" 4628 4629# hcd-uhci.c 4630usb_uhci_reset(void) "=== RESET ===" 4631usb_uhci_exit(void) "=== EXIT ===" 4632usb_uhci_schedule_start(void) "" 4633usb_uhci_schedule_stop(void) "" 4634usb_uhci_frame_start(uint32_t num) "nr %d" 4635usb_uhci_frame_stop_bandwidth(void) "" 4636usb_uhci_frame_loop_stop_idle(void) "" 4637usb_uhci_frame_loop_continue(void) "" 4638usb_uhci_mmio_readw(uint32_t addr, uint32_t val) "addr 0x%04x, ret 0x%04x" 4639usb_uhci_mmio_writew(uint32_t addr, uint32_t val) "addr 0x%04x, val 0x%04x" 4640usb_uhci_queue_add(uint32_t token) "token 0x%x" 4641usb_uhci_queue_del(uint32_t token, const char *reason) "token 0x%x: %s" 4642usb_uhci_packet_add(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x" 4643usb_uhci_packet_link_async(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x" 4644usb_uhci_packet_unlink_async(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x" 4645usb_uhci_packet_cancel(uint32_t token, uint32_t addr, int done) "token 0x%x, td 0x%x, done %d" 4646usb_uhci_packet_complete_success(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x" 4647usb_uhci_packet_complete_shortxfer(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x" 4648usb_uhci_packet_complete_stall(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x" 4649usb_uhci_packet_complete_babble(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x" 4650usb_uhci_packet_complete_error(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x" 4651usb_uhci_packet_del(uint32_t token, uint32_t addr) "token 0x%x, td 0x%x" 4652usb_uhci_qh_load(uint32_t qh) "qh 0x%x" 4653usb_uhci_td_load(uint32_t qh, uint32_t td, uint32_t ctrl, uint32_t token) "qh 0x%x, td 0x%x, ctrl 0x%x, token 0x%x" 4654usb_uhci_td_queue(uint32_t td, uint32_t ctrl, uint32_t token) "td 0x%x, ctrl 0x%x, token 0x%x" 4655usb_uhci_td_nextqh(uint32_t qh, uint32_t td) "qh 0x%x, td 0x%x" 4656usb_uhci_td_async(uint32_t qh, uint32_t td) "qh 0x%x, td 0x%x" 4657usb_uhci_td_complete(uint32_t qh, uint32_t td) "qh 0x%x, td 0x%x" 4658 4659# hcd-xhci.c 4660usb_xhci_reset(void) "=== RESET ===" 4661usb_xhci_exit(void) "=== EXIT ===" 4662usb_xhci_run(void) "" 4663usb_xhci_stop(void) "" 4664usb_xhci_cap_read(uint32_t off, uint32_t val) "off 0x%04x, ret 0x%08x" 4665usb_xhci_oper_read(uint32_t off, uint32_t val) "off 0x%04x, ret 0x%08x" 4666usb_xhci_port_read(uint32_t port, uint32_t off, uint32_t val) "port %d, off 0x%04x, ret 0x%08x" 4667usb_xhci_runtime_read(uint32_t off, uint32_t val) "off 0x%04x, ret 0x%08x" 4668usb_xhci_doorbell_read(uint32_t off, uint32_t val) "off 0x%04x, ret 0x%08x" 4669usb_xhci_oper_write(uint32_t off, uint32_t val) "off 0x%04x, val 0x%08x" 4670usb_xhci_port_write(uint32_t port, uint32_t off, uint32_t val) "port %d, off 0x%04x, val 0x%08x" 4671usb_xhci_runtime_write(uint32_t off, uint32_t val) "off 0x%04x, val 0x%08x" 4672usb_xhci_doorbell_write(uint32_t off, uint32_t val) "off 0x%04x, val 0x%08x" 4673usb_xhci_irq_intx(uint32_t level) "level %d" 4674usb_xhci_irq_msi(uint32_t nr) "nr %d" 4675usb_xhci_irq_msix(uint32_t nr) "nr %d" 4676usb_xhci_irq_msix_use(uint32_t nr) "nr %d" 4677usb_xhci_irq_msix_unuse(uint32_t nr) "nr %d" 4678usb_xhci_queue_event(uint32_t vector, uint32_t idx, const char *trb, const char *evt, uint64_t param, uint32_t status, uint32_t control) "v %d, idx %d, %s, %s, p 0x%016" PRIx64 ", s 0x%08x, c 0x%08x" 4679usb_xhci_fetch_trb(uint64_t addr, const char *name, uint64_t param, uint32_t status, uint32_t control) "addr 0x%016" PRIx64 ", %s, p 0x%016" PRIx64 ", s 0x%08x, c 0x%08x" 4680usb_xhci_port_reset(uint32_t port, bool warm) "port %d, warm %d" 4681usb_xhci_port_link(uint32_t port, uint32_t pls) "port %d, pls %d" 4682usb_xhci_port_notify(uint32_t port, uint32_t pls) "port %d, bits 0x%x" 4683usb_xhci_slot_enable(uint32_t slotid) "slotid %d" 4684usb_xhci_slot_disable(uint32_t slotid) "slotid %d" 4685usb_xhci_slot_address(uint32_t slotid, const char *port) "slotid %d, port %s" 4686usb_xhci_slot_configure(uint32_t slotid) "slotid %d" 4687usb_xhci_slot_evaluate(uint32_t slotid) "slotid %d" 4688usb_xhci_slot_reset(uint32_t slotid) "slotid %d" 4689usb_xhci_ep_enable(uint32_t slotid, uint32_t epid) "slotid %d, epid %d" 4690usb_xhci_ep_disable(uint32_t slotid, uint32_t epid) "slotid %d, epid %d" 4691usb_xhci_ep_set_dequeue(uint32_t slotid, uint32_t epid, uint32_t streamid, uint64_t param) "slotid %d, epid %d, streamid %d, ptr 0x%016" PRIx64 4692usb_xhci_ep_kick(uint32_t slotid, uint32_t epid, uint32_t streamid) "slotid %d, epid %d, streamid %d" 4693usb_xhci_ep_stop(uint32_t slotid, uint32_t epid) "slotid %d, epid %d" 4694usb_xhci_ep_reset(uint32_t slotid, uint32_t epid) "slotid %d, epid %d" 4695usb_xhci_ep_state(uint32_t slotid, uint32_t epid, const char *os, const char *ns) "slotid %d, epid %d, %s -> %s" 4696usb_xhci_xfer_start(void *xfer, uint32_t slotid, uint32_t epid, uint32_t streamid) "%p: slotid %d, epid %d, streamid %d" 4697usb_xhci_xfer_async(void *xfer) "%p" 4698usb_xhci_xfer_nak(void *xfer) "%p" 4699usb_xhci_xfer_retry(void *xfer) "%p" 4700usb_xhci_xfer_success(void *xfer, uint32_t bytes) "%p: len %d" 4701usb_xhci_xfer_error(void *xfer, uint32_t ret) "%p: ret %d" 4702usb_xhci_unimplemented(const char *item, int nr) "%s (0x%x)" 4703usb_xhci_enforced_limit(const char *item) "%s" 4704 4705# hcd-dwc2.c 4706usb_dwc2_update_irq(uint32_t level) "level=%d" 4707usb_dwc2_raise_global_irq(uint32_t intr) "0x%08x" 4708usb_dwc2_lower_global_irq(uint32_t intr) "0x%08x" 4709usb_dwc2_raise_host_irq(uint32_t intr) "0x%04x" 4710usb_dwc2_lower_host_irq(uint32_t intr) "0x%04x" 4711usb_dwc2_sof(int64_t next) "next SOF %" PRId64 4712usb_dwc2_bus_start(void) "start SOFs" 4713usb_dwc2_bus_stop(void) "stop SOFs" 4714usb_dwc2_find_device(uint8_t addr) "%d" 4715usb_dwc2_port_disabled(uint32_t pnum) "port %d disabled" 4716usb_dwc2_device_found(uint32_t pnum) "device found on port %d" 4717usb_dwc2_device_not_found(void) "device not found" 4718usb_dwc2_handle_packet(uint32_t chan, void *dev, void *pkt, uint32_t ep, const char *type, const char *dir, uint32_t mps, uint32_t len, uint32_t pcnt) "ch %d dev %p pkt %p ep %d type %s dir %s mps %d len %d pcnt %d" 4719usb_dwc2_memory_read(uint32_t addr, uint32_t len) "addr %d len %d" 4720usb_dwc2_packet_status(const char *status, uint32_t len) "status %s len %d" 4721usb_dwc2_packet_error(const char *status) "ERROR %s" 4722usb_dwc2_async_packet(void *pkt, uint32_t chan, void *dev, uint32_t ep, const char *dir, uint32_t len) "pkt %p ch %d dev %p ep %d %s len %d" 4723usb_dwc2_memory_write(uint32_t addr, uint32_t len) "addr %d len %d" 4724usb_dwc2_packet_done(const char *status, uint32_t actual, uint32_t len, uint32_t pcnt) "status %s actual %d len %d pcnt %d" 4725usb_dwc2_packet_next(const char *status, uint32_t len, uint32_t pcnt) "status %s len %d pcnt %d" 4726usb_dwc2_attach(void *port) "port %p" 4727usb_dwc2_attach_speed(const char *speed) "%s-speed device attached" 4728usb_dwc2_detach(void *port) "port %p" 4729usb_dwc2_child_detach(void *port, void *child) "port %p child %p" 4730usb_dwc2_wakeup(void *port) "port %p" 4731usb_dwc2_async_packet_complete(void *port, void *pkt, uint32_t chan, void *dev, uint32_t ep, const char *dir, uint32_t len) "port %p packet %p ch %d dev %p ep %d %s len %d" 4732usb_dwc2_work_bh(void) "" 4733usb_dwc2_work_bh_service(uint32_t first, uint32_t current, void *dev, uint32_t ep) "first %d servicing %d dev %p ep %d" 4734usb_dwc2_work_bh_next(uint32_t chan) "next %d" 4735usb_dwc2_enable_chan(uint32_t chan, void *dev, void *pkt, uint32_t ep) "ch %d dev %p pkt %p ep %d" 4736usb_dwc2_glbreg_read(uint64_t addr, const char *reg, uint32_t val) " 0x%04" PRIx64 " %s val 0x%08x" 4737usb_dwc2_glbreg_write(uint64_t addr, const char *reg, uint64_t val, uint32_t old, uint64_t result) "0x%04" PRIx64 " %s val 0x%08" PRIx64 " old 0x%08x result 0x%08" PRIx64 4738usb_dwc2_fszreg_read(uint64_t addr, uint32_t val) " 0x%04" PRIx64 " HPTXFSIZ val 0x%08x" 4739usb_dwc2_fszreg_write(uint64_t addr, uint64_t val, uint32_t old, uint64_t result) "0x%04" PRIx64 " HPTXFSIZ val 0x%08" PRIx64 " old 0x%08x result 0x%08" PRIx64 4740usb_dwc2_hreg0_read(uint64_t addr, const char *reg, uint32_t val) " 0x%04" PRIx64 " %s val 0x%08x" 4741usb_dwc2_hreg0_write(uint64_t addr, const char *reg, uint64_t val, uint32_t old, uint64_t result) " 0x%04" PRIx64 " %s val 0x%08" PRIx64 " old 0x%08x result 0x%08" PRIx64 4742usb_dwc2_hreg1_read(uint64_t addr, const char *reg, uint64_t chan, uint32_t val) " 0x%04" PRIx64 " %s%" PRId64 " val 0x%08x" 4743usb_dwc2_hreg1_write(uint64_t addr, const char *reg, uint64_t chan, uint64_t val, uint32_t old, uint64_t result) " 0x%04" PRIx64 " %s%" PRId64 " val 0x%08" PRIx64 " old 0x%08x result 0x%08" PRIx64 4744usb_dwc2_pcgreg_read(uint64_t addr, const char *reg, uint32_t val) " 0x%04" PRIx64 " %s val 0x%08x" 4745usb_dwc2_pcgreg_write(uint64_t addr, const char *reg, uint64_t val, uint32_t old, uint64_t result) "0x%04" PRIx64 " %s val 0x%08" PRIx64 " old 0x%08x result 0x%08" PRIx64 4746usb_dwc2_hreg2_read(uint64_t addr, uint64_t fifo, uint32_t val) " 0x%04" PRIx64 " FIFO%" PRId64 " val 0x%08x" 4747usb_dwc2_hreg2_write(uint64_t addr, uint64_t fifo, uint64_t val, uint32_t old, uint64_t result) " 0x%04" PRIx64 " FIFO%" PRId64 " val 0x%08" PRIx64 " old 0x%08x result 0x%08" PRIx64 4748usb_dwc2_hreg0_action(const char *s) "%s" 4749usb_dwc2_wakeup_endpoint(void *ep, uint32_t stream) "endp %p stream %d" 4750usb_dwc2_work_timer(void) "" 4751usb_dwc2_reset_enter(void) "=== RESET enter ===" 4752usb_dwc2_reset_hold(void) "=== RESET hold ===" 4753usb_dwc2_reset_exit(void) "=== RESET exit ===" 4754 4755# desc.c 4756usb_desc_device(int addr, int len, int ret) "dev %d query device, len %d, ret %d" 4757usb_desc_device_qualifier(int addr, int len, int ret) "dev %d query device qualifier, len %d, ret %d" 4758usb_desc_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d" 4759usb_desc_other_speed_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d" 4760usb_desc_string(int addr, int index, int len, int ret) "dev %d query string %d, len %d, ret %d" 4761usb_desc_bos(int addr, int len, int ret) "dev %d bos, len %d, ret %d" 4762usb_desc_msos(int addr, int index, int len, int ret) "dev %d msos, index 0x%x, len %d, ret %d" 4763usb_set_addr(int addr) "dev %d" 4764usb_set_config(int addr, int config, int ret) "dev %d, config %d, ret %d" 4765usb_set_interface(int addr, int iface, int alt, int ret) "dev %d, interface %d, altsetting %d, ret %d" 4766usb_clear_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d" 4767usb_set_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d" 4768 4769# dev-hub.c 4770usb_hub_reset(int addr) "dev %d" 4771usb_hub_control(int addr, int request, int value, int index, int length) "dev %d, req 0x%x, value %d, index %d, length %d" 4772usb_hub_get_port_status(int addr, int nr, int status, int changed) "dev %d, port %d, status 0x%x, changed 0x%x" 4773usb_hub_set_port_feature(int addr, int nr, const char *f) "dev %d, port %d, feature %s" 4774usb_hub_clear_port_feature(int addr, int nr, const char *f) "dev %d, port %d, feature %s" 4775usb_hub_attach(int addr, int nr) "dev %d, port %d" 4776usb_hub_detach(int addr, int nr) "dev %d, port %d" 4777usb_hub_status_report(int addr, int status) "dev %d, status 0x%x" 4778 4779# dev-storage.c 4780usb_msd_reset(void) "" 4781usb_msd_maxlun(unsigned maxlun) "%d" 4782usb_msd_send_status(unsigned status, unsigned tag, size_t size) "status %d, tag 0x%x, len %zd" 4783usb_msd_data_in(unsigned packet, unsigned remaining, unsigned total) "%d/%d (scsi %d)" 4784usb_msd_data_out(unsigned packet, unsigned remaining) "%d/%d" 4785usb_msd_packet_async(void) "" 4786usb_msd_packet_complete(void) "" 4787usb_msd_cmd_submit(unsigned lun, unsigned tag, unsigned flags, unsigned len, unsigned data_len) "lun %u, tag 0x%x, flags 0x%08x, len %d, data-len %d" 4788usb_msd_cmd_complete(unsigned status, unsigned tag) "status %d, tag 0x%x" 4789usb_msd_cmd_cancel(unsigned tag) "tag 0x%x" 4790usb_msd_fatal_error(void) "" 4791 4792# dev-uas.c 4793usb_uas_reset(int addr) "dev %d" 4794usb_uas_command(int addr, uint16_t tag, int lun, uint32_t lun64_1, uint32_t lun64_2) "dev %d, tag 0x%x, lun %d, lun64 0x%08x-0x%08x" 4795usb_uas_response(int addr, uint16_t tag, uint8_t code) "dev %d, tag 0x%x, code 0x%x" 4796usb_uas_sense(int addr, uint16_t tag, uint8_t status) "dev %d, tag 0x%x, status 0x%x" 4797usb_uas_read_ready(int addr, uint16_t tag) "dev %d, tag 0x%x" 4798usb_uas_write_ready(int addr, uint16_t tag) "dev %d, tag 0x%x" 4799usb_uas_xfer_data(int addr, uint16_t tag, uint32_t copy, uint32_t uoff, uint32_t usize, uint32_t soff, uint32_t ssize) "dev %d, tag 0x%x, copy %d, usb-pkt %d/%d, scsi-buf %d/%d" 4800usb_uas_scsi_data(int addr, uint16_t tag, uint32_t bytes) "dev %d, tag 0x%x, bytes %d" 4801usb_uas_scsi_complete(int addr, uint16_t tag, uint32_t status, uint32_t resid) "dev %d, tag 0x%x, status 0x%x, residue %d" 4802usb_uas_tmf_abort_task(int addr, uint16_t tag, uint16_t task_tag) "dev %d, tag 0x%x, task-tag 0x%x" 4803usb_uas_tmf_logical_unit_reset(int addr, uint16_t tag, int lun) "dev %d, tag 0x%x, lun %d" 4804usb_uas_tmf_unsupported(int addr, uint16_t tag, uint32_t function) "dev %d, tag 0x%x, function 0x%x" 4805 4806# dev-mtp.c 4807usb_mtp_reset(int addr) "dev %d" 4808usb_mtp_command(int dev, uint16_t code, uint32_t trans, uint32_t arg0, uint32_t arg1, uint32_t arg2, uint32_t arg3, uint32_t arg4) "dev %d, code 0x%x, trans 0x%x, args 0x%x, 0x%x, 0x%x, 0x%x, 0x%x" 4809usb_mtp_success(int dev, uint32_t trans, uint32_t arg0, uint32_t arg1) "dev %d, trans 0x%x, args 0x%x, 0x%x" 4810usb_mtp_error(int dev, uint16_t code, uint32_t trans, uint32_t arg0, uint32_t arg1) "dev %d, code 0x%x, trans 0x%x, args 0x%x, 0x%x" 4811usb_mtp_data_in(int dev, uint32_t trans, uint32_t len) "dev %d, trans 0x%x, len %d" 4812usb_mtp_xfer(int dev, uint32_t ep, uint32_t dlen, uint32_t plen) "dev %d, ep %d, %d/%d" 4813usb_mtp_nak(int dev, uint32_t ep) "dev %d, ep %d" 4814usb_mtp_stall(int dev, const char *reason) "dev %d, reason: %s" 4815usb_mtp_op_get_device_info(int dev) "dev %d" 4816usb_mtp_op_open_session(int dev) "dev %d" 4817usb_mtp_op_close_session(int dev) "dev %d" 4818usb_mtp_op_get_storage_ids(int dev) "dev %d" 4819usb_mtp_op_get_storage_info(int dev) "dev %d" 4820usb_mtp_op_get_num_objects(int dev, uint32_t handle, const char *path) "dev %d, handle 0x%x, path %s" 4821usb_mtp_op_get_object_handles(int dev, uint32_t handle, const char *path) "dev %d, handle 0x%x, path %s" 4822usb_mtp_op_get_object_info(int dev, uint32_t handle, const char *path) "dev %d, handle 0x%x, path %s" 4823usb_mtp_op_get_object(int dev, uint32_t handle, const char *path) "dev %d, handle 0x%x, path %s" 4824usb_mtp_op_get_partial_object(int dev, uint32_t handle, const char *path, uint32_t offset, uint32_t length) "dev %d, handle 0x%x, path %s, off %d, len %d" 4825usb_mtp_op_unknown(int dev, uint32_t code) "dev %d, command code 0x%x" 4826usb_mtp_object_alloc(int dev, uint32_t handle, const char *path) "dev %d, handle 0x%x, path %s" 4827usb_mtp_object_free(int dev, uint32_t handle, const char *path) "dev %d, handle 0x%x, path %s" 4828usb_mtp_add_child(int dev, uint32_t handle, const char *path) "dev %d, handle 0x%x, path %s" 4829usb_mtp_file_monitor_event(int dev, const char *path, const char *s) "dev %d, path %s event %s" 4830 4831# host-libusb.c 4832usb_host_open_started(int bus, int addr) "dev %d:%d" 4833usb_host_open_hostfd(int hostfd) "hostfd %d" 4834usb_host_open_success(int bus, int addr) "dev %d:%d" 4835usb_host_open_failure(int bus, int addr) "dev %d:%d" 4836usb_host_close(int bus, int addr) "dev %d:%d" 4837usb_host_attach_kernel(int bus, int addr, int interface) "dev %d:%d, if %d" 4838usb_host_detach_kernel(int bus, int addr, int interface) "dev %d:%d, if %d" 4839usb_host_set_address(int bus, int addr, int config) "dev %d:%d, address %d" 4840usb_host_set_config(int bus, int addr, int config) "dev %d:%d, config %d" 4841usb_host_set_interface(int bus, int addr, int interface, int alt) "dev %d:%d, interface %d, alt %d" 4842usb_host_claim_interface(int bus, int addr, int config, int interface) "dev %d:%d, config %d, if %d" 4843usb_host_release_interface(int bus, int addr, int interface) "dev %d:%d, if %d" 4844usb_host_req_control(int bus, int addr, void *p, int req, int value, int index) "dev %d:%d, packet %p, req 0x%x, value %d, index %d" 4845usb_host_req_data(int bus, int addr, void *p, int in, int ep, int size) "dev %d:%d, packet %p, in %d, ep %d, size %d" 4846usb_host_req_complete(int bus, int addr, void *p, int status, int length) "dev %d:%d, packet %p, status %d, length %d" 4847usb_host_req_emulated(int bus, int addr, void *p, int status) "dev %d:%d, packet %p, status %d" 4848usb_host_req_canceled(int bus, int addr, void *p) "dev %d:%d, packet %p" 4849usb_host_iso_start(int bus, int addr, int ep) "dev %d:%d, ep %d" 4850usb_host_iso_stop(int bus, int addr, int ep) "dev %d:%d, ep %d" 4851usb_host_iso_out_of_bufs(int bus, int addr, int ep) "dev %d:%d, ep %d" 4852usb_host_reset(int bus, int addr) "dev %d:%d" 4853usb_host_auto_scan_enabled(void) 4854usb_host_auto_scan_disabled(void) 4855usb_host_parse_config(int bus, int addr, int value, int active) "dev %d:%d, value %d, active %d" 4856usb_host_parse_interface(int bus, int addr, int num, int alt, int active) "dev %d:%d, num %d, alt %d, active %d" 4857usb_host_parse_endpoint(int bus, int addr, int ep, const char *dir, const char *type, int active) "dev %d:%d, ep %d, %s, %s, active %d" 4858usb_host_parse_error(int bus, int addr, const char *errmsg) "dev %d:%d, msg %s" 4859usb_host_remote_wakeup_removed(int bus, int addr) "dev %d:%d" 4860 4861# dev-serial.c 4862usb_serial_reset(int bus, int addr) "dev %d:%u reset" 4863usb_serial_handle_control(int bus, int addr, int request, int value) "dev %d:%u got control 0x%x, value 0x%x" 4864usb_serial_unsupported_parity(int bus, int addr, int value) "dev %d:%u unsupported parity %d" 4865usb_serial_unsupported_stopbits(int bus, int addr, int value) "dev %d:%u unsupported stop bits %d" 4866usb_serial_unsupported_control(int bus, int addr, int request, int value) "dev %d:%u got unsupported/bogus control 0x%x, value 0x%x" 4867usb_serial_unsupported_data_bits(int bus, int addr, int value) "dev %d:%u unsupported data bits %d, falling back to 8" 4868usb_serial_bad_token(int bus, int addr) "dev %d:%u bad token" 4869usb_serial_set_baud(int bus, int addr, int baud) "dev %d:%u baud rate %d" 4870usb_serial_set_data(int bus, int addr, int parity, int data, int stop) "dev %d:%u parity %c, data bits %d, stop bits %d" 4871usb_serial_set_flow_control(int bus, int addr, int index) "dev %d:%u flow control %d" 4872usb_serial_set_xonxoff(int bus, int addr, uint8_t xon, uint8_t xoff) "dev %d:%u xon 0x%x xoff 0x%x" 4873 4874# canokey.c 4875canokey_emu_stall_ep(uint8_t ep) "ep %d" 4876canokey_emu_set_address(uint8_t addr) "addr %d" 4877canokey_emu_prepare_receive(uint8_t ep, uint16_t size) "ep %d size %d" 4878canokey_emu_transmit(uint8_t ep, uint16_t size) "ep %d size %d" 4879canokey_thread_start(void) 4880canokey_thread_stop(void) 4881canokey_handle_reset(void) 4882canokey_handle_control_setup(int request, int value, int index, int length) "request 0x%04X value 0x%04X index 0x%04X length 0x%04X" 4883canokey_handle_control_out(void) 4884canokey_handle_control_in(int actual_len) "len %d" 4885canokey_handle_data_out(uint8_t ep_out, uint32_t out_len) "ep %d len %d" 4886canokey_handle_data_in(uint8_t ep_in, uint32_t in_len) "ep %d len %d" 4887canokey_realize(void) 4888canokey_unrealize(void) 4889# See docs/devel/tracing.rst for syntax documentation. 4890 4891# pci.c 4892vfio_intx_interrupt(const char *name, char line) " (%s) Pin %c" 4893vfio_intx_eoi(const char *name) " (%s) EOI" 4894vfio_intx_enable_kvm(const char *name) " (%s) KVM INTx accel enabled" 4895vfio_intx_disable_kvm(const char *name) " (%s) KVM INTx accel disabled" 4896vfio_intx_update(const char *name, int new_irq, int target_irq) " (%s) IRQ moved %d -> %d" 4897vfio_intx_enable(const char *name) " (%s)" 4898vfio_intx_disable(const char *name) " (%s)" 4899vfio_msi_interrupt(const char *name, int index, uint64_t addr, int data) " (%s) vector %d 0x%"PRIx64"/0x%x" 4900vfio_msix_vector_do_use(const char *name, int index) " (%s) vector %d used" 4901vfio_msix_vector_release(const char *name, int index) " (%s) vector %d released" 4902vfio_msix_enable(const char *name) " (%s)" 4903vfio_msix_pba_disable(const char *name) " (%s)" 4904vfio_msix_pba_enable(const char *name) " (%s)" 4905vfio_msix_disable(const char *name) " (%s)" 4906vfio_msix_fixup(const char *name, int bar, uint64_t start, uint64_t end) " (%s) MSI-X region %d mmap fixup [0x%"PRIx64" - 0x%"PRIx64"]" 4907vfio_msix_relo(const char *name, int bar, uint64_t offset) " (%s) BAR %d offset 0x%"PRIx64"" 4908vfio_msi_enable(const char *name, int nr_vectors) " (%s) Enabled %d MSI vectors" 4909vfio_msi_disable(const char *name) " (%s)" 4910vfio_pci_load_rom(const char *name, unsigned long size, unsigned long offset, unsigned long flags) "Device %s ROM:\n size: 0x%lx, offset: 0x%lx, flags: 0x%lx" 4911vfio_rom_read(const char *name, uint64_t addr, int size, uint64_t data) " (%s, 0x%"PRIx64", 0x%x) = 0x%"PRIx64 4912vfio_pci_size_rom(const char *name, int size) "%s ROM size 0x%x" 4913vfio_vga_write(uint64_t addr, uint64_t data, int size) " (0x%"PRIx64", 0x%"PRIx64", %d)" 4914vfio_vga_read(uint64_t addr, int size, uint64_t data) " (0x%"PRIx64", %d) = 0x%"PRIx64 4915vfio_pci_read_config(const char *name, int addr, int len, int val) " (%s, @0x%x, len=0x%x) 0x%x" 4916vfio_pci_write_config(const char *name, int addr, int val, int len) " (%s, @0x%x, 0x%x, len=0x%x)" 4917vfio_msi_setup(const char *name, int pos) "%s PCI MSI CAP @0x%x" 4918vfio_msix_early_setup(const char *name, int pos, int table_bar, int offset, int entries, bool noresize) "%s PCI MSI-X CAP @0x%x, BAR %d, offset 0x%x, entries %d, noresize %d" 4919vfio_check_pcie_flr(const char *name) "%s Supports FLR via PCIe cap" 4920vfio_check_pm_reset(const char *name) "%s Supports PM reset" 4921vfio_check_af_flr(const char *name) "%s Supports FLR via AF cap" 4922vfio_pci_hot_reset(const char *name, const char *type) " (%s) %s" 4923vfio_pci_hot_reset_has_dep_devices(const char *name) "%s: hot reset dependent devices:" 4924vfio_pci_hot_reset_dep_devices(int domain, int bus, int slot, int function, int group_id) "\t%04x:%02x:%02x.%x group %d" 4925vfio_pci_hot_reset_result(const char *name, const char *result) "%s hot reset: %s" 4926vfio_populate_device_config(const char *name, unsigned long size, unsigned long offset, unsigned long flags) "Device %s config:\n size: 0x%lx, offset: 0x%lx, flags: 0x%lx" 4927vfio_populate_device_get_irq_info_failure(const char *errstr) "VFIO_DEVICE_GET_IRQ_INFO failure: %s" 4928vfio_attach_device(const char *name, int group_id) " (%s) group %d" 4929vfio_detach_device(const char *name, int group_id) " (%s) group %d" 4930vfio_mdev(const char *name, bool is_mdev) " (%s) is_mdev %d" 4931vfio_add_ext_cap_dropped(const char *name, uint16_t cap, uint16_t offset) "%s 0x%x@0x%x" 4932vfio_pci_reset(const char *name) " (%s)" 4933vfio_pci_reset_flr(const char *name) "%s FLR/VFIO_DEVICE_RESET" 4934vfio_pci_reset_pm(const char *name) "%s PCI PM Reset" 4935vfio_pci_emulated_vendor_id(const char *name, uint16_t val) "%s 0x%04x" 4936vfio_pci_emulated_device_id(const char *name, uint16_t val) "%s 0x%04x" 4937vfio_pci_emulated_sub_vendor_id(const char *name, uint16_t val) "%s 0x%04x" 4938vfio_pci_emulated_sub_device_id(const char *name, uint16_t val) "%s 0x%04x" 4939 4940# pci-quirks.c 4941vfio_quirk_rom_in_denylist(const char *name, uint16_t vid, uint16_t did) "%s %04x:%04x" 4942vfio_quirk_generic_window_address_write(const char *name, const char * region_name, uint64_t data) "%s %s 0x%"PRIx64 4943vfio_quirk_generic_window_data_read(const char *name, const char * region_name, uint64_t data) "%s %s 0x%"PRIx64 4944vfio_quirk_generic_window_data_write(const char *name, const char * region_name, uint64_t data) "%s %s 0x%"PRIx64 4945vfio_quirk_generic_mirror_read(const char *name, const char * region_name, uint64_t addr, uint64_t data) "%s %s 0x%"PRIx64": 0x%"PRIx64 4946vfio_quirk_generic_mirror_write(const char *name, const char * region_name, uint64_t addr, uint64_t data) "%s %s 0x%"PRIx64": 0x%"PRIx64 4947vfio_quirk_ati_3c3_read(const char *name, uint64_t data) "%s 0x%"PRIx64 4948vfio_quirk_ati_3c3_probe(const char *name) "%s" 4949vfio_quirk_ati_bar4_probe(const char *name) "%s" 4950vfio_quirk_ati_bar2_probe(const char *name) "%s" 4951vfio_quirk_nvidia_3d0_state(const char *name, const char *state) "%s %s" 4952vfio_quirk_nvidia_3d0_read(const char *name, uint8_t offset, unsigned size, uint64_t val) " (%s, @0x%x, len=0x%x) 0x%"PRIx64 4953vfio_quirk_nvidia_3d0_write(const char *name, uint8_t offset, uint64_t data, unsigned size) "(%s, @0x%x, 0x%"PRIx64", len=0x%x)" 4954vfio_quirk_nvidia_3d0_probe(const char *name) "%s" 4955vfio_quirk_nvidia_bar5_state(const char *name, const char *state) "%s %s" 4956vfio_quirk_nvidia_bar5_probe(const char *name) "%s" 4957vfio_quirk_nvidia_bar0_msi_ack(const char *name) "%s" 4958vfio_quirk_nvidia_bar0_probe(const char *name) "%s" 4959vfio_quirk_rtl8168_fake_latch(const char *name, uint64_t val) "%s 0x%"PRIx64 4960vfio_quirk_rtl8168_msix_write(const char *name, uint16_t offset, uint64_t val) "%s MSI-X table write[0x%x]: 0x%"PRIx64 4961vfio_quirk_rtl8168_msix_read(const char *name, uint16_t offset, uint64_t val) "%s MSI-X table read[0x%x]: 0x%"PRIx64 4962vfio_quirk_rtl8168_probe(const char *name) "%s" 4963 4964vfio_quirk_ati_bonaire_reset_skipped(const char *name) "%s" 4965vfio_quirk_ati_bonaire_reset_no_smc(const char *name) "%s" 4966vfio_quirk_ati_bonaire_reset_timeout(const char *name) "%s" 4967vfio_quirk_ati_bonaire_reset_done(const char *name) "%s" 4968vfio_quirk_ati_bonaire_reset(const char *name) "%s" 4969vfio_ioeventfd_exit(const char *name, uint64_t addr, unsigned size, uint64_t data) "%s+0x%"PRIx64"[%d]:0x%"PRIx64 4970vfio_ioeventfd_handler(const char *name, uint64_t addr, unsigned size, uint64_t data) "%s+0x%"PRIx64"[%d] -> 0x%"PRIx64 4971vfio_ioeventfd_init(const char *name, uint64_t addr, unsigned size, uint64_t data, bool vfio) "%s+0x%"PRIx64"[%d]:0x%"PRIx64" vfio:%d" 4972vfio_pci_igd_opregion_enabled(const char *name) "%s" 4973 4974# igd.c 4975vfio_pci_igd_bar4_write(const char *name, uint32_t index, uint32_t data, uint32_t base) "%s [0x%03x] 0x%08x -> 0x%08x" 4976vfio_pci_igd_bdsm_enabled(const char *name, int size) "%s %dMB" 4977vfio_pci_igd_host_bridge_enabled(const char *name) "%s" 4978vfio_pci_igd_lpc_bridge_enabled(const char *name) "%s" 4979 4980# common.c 4981vfio_region_write(const char *name, int index, uint64_t addr, uint64_t data, unsigned size) " (%s:region%d+0x%"PRIx64", 0x%"PRIx64 ", %d)" 4982vfio_region_read(char *name, int index, uint64_t addr, unsigned size, uint64_t data) " (%s:region%d+0x%"PRIx64", %d) = 0x%"PRIx64 4983vfio_iommu_map_notify(const char *op, uint64_t iova_start, uint64_t iova_end) "iommu %s @ 0x%"PRIx64" - 0x%"PRIx64 4984vfio_listener_region_skip(const char *name, uint64_t start, uint64_t end) "SKIPPING %s 0x%"PRIx64" - 0x%"PRIx64 4985vfio_spapr_group_attach(int groupfd, int tablefd) "Attached groupfd %d to liobn fd %d" 4986vfio_listener_region_add_iommu(uint64_t start, uint64_t end) "region_add [iommu] 0x%"PRIx64" - 0x%"PRIx64 4987vfio_listener_region_add_ram(uint64_t iova_start, uint64_t iova_end, void *vaddr) "region_add [ram] 0x%"PRIx64" - 0x%"PRIx64" [%p]" 4988vfio_known_safe_misalignment(const char *name, uint64_t iova, uint64_t offset_within_region, uintptr_t page_size) "Region \"%s\" iova=0x%"PRIx64" offset_within_region=0x%"PRIx64" qemu_real_host_page_size=0x%"PRIxPTR 4989vfio_listener_region_add_no_dma_map(const char *name, uint64_t iova, uint64_t size, uint64_t page_size) "Region \"%s\" 0x%"PRIx64" size=0x%"PRIx64" is not aligned to 0x%"PRIx64" and cannot be mapped for DMA" 4990vfio_listener_region_del(uint64_t start, uint64_t end) "region_del 0x%"PRIx64" - 0x%"PRIx64 4991vfio_device_dirty_tracking_update(uint64_t start, uint64_t end, uint64_t min, uint64_t max) "section 0x%"PRIx64" - 0x%"PRIx64" -> update [0x%"PRIx64" - 0x%"PRIx64"]" 4992vfio_device_dirty_tracking_start(int nr_ranges, uint64_t min32, uint64_t max32, uint64_t min64, uint64_t max64, uint64_t minpci, uint64_t maxpci) "nr_ranges %d 32:[0x%"PRIx64" - 0x%"PRIx64"], 64:[0x%"PRIx64" - 0x%"PRIx64"], pci64:[0x%"PRIx64" - 0x%"PRIx64"]" 4993vfio_disconnect_container(int fd) "close container->fd=%d" 4994vfio_put_group(int fd) "close group->fd=%d" 4995vfio_get_device(const char * name, unsigned int flags, unsigned int num_regions, unsigned int num_irqs) "Device %s flags: %u, regions: %u, irqs: %u" 4996vfio_put_base_device(int fd) "close vdev->fd=%d" 4997vfio_region_setup(const char *dev, int index, const char *name, unsigned long flags, unsigned long offset, unsigned long size) "Device %s, region %d \"%s\", flags: 0x%lx, offset: 0x%lx, size: 0x%lx" 4998vfio_region_mmap_fault(const char *name, int index, unsigned long offset, unsigned long size, int fault) "Region %s mmaps[%d], [0x%lx - 0x%lx], fault: %d" 4999vfio_region_mmap(const char *name, unsigned long offset, unsigned long end) "Region %s [0x%lx - 0x%lx]" 5000vfio_region_exit(const char *name, int index) "Device %s, region %d" 5001vfio_region_finalize(const char *name, int index) "Device %s, region %d" 5002vfio_region_mmaps_set_enabled(const char *name, bool enabled) "Region %s mmaps enabled: %d" 5003vfio_region_unmap(const char *name, unsigned long offset, unsigned long end) "Region %s unmap [0x%lx - 0x%lx]" 5004vfio_region_sparse_mmap_header(const char *name, int index, int nr_areas) "Device %s region %d: %d sparse mmap entries" 5005vfio_region_sparse_mmap_entry(int i, unsigned long start, unsigned long end) "sparse entry %d [0x%lx - 0x%lx]" 5006vfio_get_dev_region(const char *name, int index, uint32_t type, uint32_t subtype) "%s index %d, %08x/%08x" 5007vfio_dma_unmap_overflow_workaround(void) "" 5008vfio_get_dirty_bitmap(int fd, uint64_t iova, uint64_t size, uint64_t bitmap_size, uint64_t start, uint64_t dirty_pages) "container fd=%d, iova=0x%"PRIx64" size= 0x%"PRIx64" bitmap_size=0x%"PRIx64" start=0x%"PRIx64" dirty_pages=%"PRIu64 5009vfio_iommu_map_dirty_notify(uint64_t iova_start, uint64_t iova_end) "iommu dirty @ 0x%"PRIx64" - 0x%"PRIx64 5010 5011# platform.c 5012vfio_platform_realize(char *name, char *compat) "vfio device %s, compat = %s" 5013vfio_platform_eoi(int pin, int fd) "EOI IRQ pin %d (fd=%d)" 5014vfio_platform_intp_mmap_enable(int pin) "IRQ #%d still active, stay in slow path" 5015vfio_platform_intp_interrupt(int pin, int fd) "Inject IRQ #%d (fd = %d)" 5016vfio_platform_intp_inject_pending_lockheld(int pin, int fd) "Inject pending IRQ #%d (fd = %d)" 5017vfio_platform_populate_interrupts(int pin, int count, int flags) "- IRQ index %d: count %d, flags=0x%x" 5018vfio_intp_interrupt_set_pending(int index) "irq %d is set PENDING" 5019vfio_platform_start_level_irqfd_injection(int index, int fd, int resamplefd) "IRQ index=%d, fd = %d, resamplefd = %d" 5020vfio_platform_start_edge_irqfd_injection(int index, int fd) "IRQ index=%d, fd = %d" 5021 5022# spapr.c 5023vfio_prereg_listener_region_add_skip(uint64_t start, uint64_t end) "0x%"PRIx64" - 0x%"PRIx64 5024vfio_prereg_listener_region_del_skip(uint64_t start, uint64_t end) "0x%"PRIx64" - 0x%"PRIx64 5025vfio_prereg_register(uint64_t va, uint64_t size, int ret) "va=0x%"PRIx64" size=0x%"PRIx64" ret=%d" 5026vfio_prereg_unregister(uint64_t va, uint64_t size, int ret) "va=0x%"PRIx64" size=0x%"PRIx64" ret=%d" 5027vfio_spapr_create_window(int ps, unsigned int levels, uint64_t ws, uint64_t off) "pageshift=0x%x levels=%u winsize=0x%"PRIx64" offset=0x%"PRIx64 5028vfio_spapr_remove_window(uint64_t off) "offset=0x%"PRIx64 5029 5030# display.c 5031vfio_display_edid_available(void) "" 5032vfio_display_edid_link_up(void) "" 5033vfio_display_edid_link_down(void) "" 5034vfio_display_edid_update(uint32_t prefx, uint32_t prefy) "%ux%u" 5035vfio_display_edid_write_error(void) "" 5036 5037# migration.c 5038vfio_load_cleanup(const char *name) " (%s)" 5039vfio_load_device_config_state(const char *name) " (%s)" 5040vfio_load_state(const char *name, uint64_t data) " (%s) data 0x%"PRIx64 5041vfio_load_state_device_data(const char *name, uint64_t data_size, int ret) " (%s) size 0x%"PRIx64" ret %d" 5042vfio_migration_realize(const char *name) " (%s)" 5043vfio_migration_set_state(const char *name, const char *state) " (%s) state %s" 5044vfio_migration_state_notifier(const char *name, const char *state) " (%s) state %s" 5045vfio_save_block(const char *name, int data_size) " (%s) data_size %d" 5046vfio_save_cleanup(const char *name) " (%s)" 5047vfio_save_complete_precopy(const char *name, int ret) " (%s) ret %d" 5048vfio_save_device_config_state(const char *name) " (%s)" 5049vfio_save_iterate(const char *name, uint64_t precopy_init_size, uint64_t precopy_dirty_size) " (%s) precopy initial size 0x%"PRIx64" precopy dirty size 0x%"PRIx64 5050vfio_save_setup(const char *name, uint64_t data_buffer_size) " (%s) data buffer size 0x%"PRIx64 5051vfio_state_pending_estimate(const char *name, uint64_t precopy, uint64_t postcopy, uint64_t precopy_init_size, uint64_t precopy_dirty_size) " (%s) precopy 0x%"PRIx64" postcopy 0x%"PRIx64" precopy initial size 0x%"PRIx64" precopy dirty size 0x%"PRIx64 5052vfio_state_pending_exact(const char *name, uint64_t precopy, uint64_t postcopy, uint64_t stopcopy_size, uint64_t precopy_init_size, uint64_t precopy_dirty_size) " (%s) precopy 0x%"PRIx64" postcopy 0x%"PRIx64" stopcopy size 0x%"PRIx64" precopy initial size 0x%"PRIx64" precopy dirty size 0x%"PRIx64 5053vfio_vmstate_change(const char *name, int running, const char *reason, const char *dev_state) " (%s) running %d reason %s device state %s" 5054vfio_vmstate_change_prepare(const char *name, int running, const char *reason, const char *dev_state) " (%s) running %d reason %s device state %s" 5055# See docs/devel/tracing.rst for syntax documentation. 5056 5057# vhost.c 5058vhost_commit(bool started, bool changed) "Started: %d Changed: %d" 5059vhost_region_add_section(const char *name, uint64_t gpa, uint64_t size, uint64_t host) "%s: 0x%"PRIx64"+0x%"PRIx64" @ 0x%"PRIx64 5060vhost_region_add_section_merge(const char *name, uint64_t new_size, uint64_t gpa, uint64_t owr) "%s: size: 0x%"PRIx64 " gpa: 0x%"PRIx64 " owr: 0x%"PRIx64 5061vhost_region_add_section_aligned(const char *name, uint64_t gpa, uint64_t size, uint64_t host) "%s: 0x%"PRIx64"+0x%"PRIx64" @ 0x%"PRIx64 5062vhost_section(const char *name) "%s" 5063vhost_reject_section(const char *name, int d) "%s:%d" 5064vhost_iotlb_miss(void *dev, int step) "%p step %d" 5065vhost_dev_cleanup(void *dev) "%p" 5066vhost_dev_start(void *dev, const char *name, bool vrings) "%p:%s vrings:%d" 5067vhost_dev_stop(void *dev, const char *name, bool vrings) "%p:%s vrings:%d" 5068 5069 5070# vhost-user.c 5071vhost_user_postcopy_end_entry(void) "" 5072vhost_user_postcopy_end_exit(void) "" 5073vhost_user_postcopy_fault_handler(const char *name, uint64_t fault_address, int nregions) "%s: @0x%"PRIx64" nregions:%d" 5074vhost_user_postcopy_fault_handler_loop(int i, uint64_t client_base, uint64_t size) "%d: client 0x%"PRIx64" +0x%"PRIx64 5075vhost_user_postcopy_fault_handler_found(int i, uint64_t region_offset, uint64_t rb_offset) "%d: region_offset: 0x%"PRIx64" rb_offset:0x%"PRIx64 5076vhost_user_postcopy_listen(void) "" 5077vhost_user_set_mem_table_postcopy(uint64_t client_addr, uint64_t qhva, int reply_i, int region_i) "client:0x%"PRIx64" for hva: 0x%"PRIx64" reply %d region %d" 5078vhost_user_set_mem_table_withfd(int index, const char *name, uint64_t memory_size, uint64_t guest_phys_addr, uint64_t userspace_addr, uint64_t offset) "%d:%s: size:0x%"PRIx64" GPA:0x%"PRIx64" QVA/userspace:0x%"PRIx64" RB offset:0x%"PRIx64 5079vhost_user_postcopy_waker(const char *rb, uint64_t rb_offset) "%s + 0x%"PRIx64 5080vhost_user_postcopy_waker_found(uint64_t client_addr) "0x%"PRIx64 5081vhost_user_postcopy_waker_nomatch(const char *rb, uint64_t rb_offset) "%s + 0x%"PRIx64 5082vhost_user_read(uint32_t req, uint32_t flags) "req:%d flags:0x%"PRIx32"" 5083vhost_user_write(uint32_t req, uint32_t flags) "req:%d flags:0x%"PRIx32"" 5084vhost_user_create_notifier(int idx, void *n) "idx:%d n:%p" 5085 5086# vhost-vdpa.c 5087vhost_vdpa_dma_map(void *vdpa, int fd, uint32_t msg_type, uint32_t asid, uint64_t iova, uint64_t size, uint64_t uaddr, uint8_t perm, uint8_t type) "vdpa:%p fd: %d msg_type: %"PRIu32" asid: %"PRIu32" iova: 0x%"PRIx64" size: 0x%"PRIx64" uaddr: 0x%"PRIx64" perm: 0x%"PRIx8" type: %"PRIu8 5088vhost_vdpa_dma_unmap(void *vdpa, int fd, uint32_t msg_type, uint32_t asid, uint64_t iova, uint64_t size, uint8_t type) "vdpa:%p fd: %d msg_type: %"PRIu32" asid: %"PRIu32" iova: 0x%"PRIx64" size: 0x%"PRIx64" type: %"PRIu8 5089vhost_vdpa_listener_begin_batch(void *v, int fd, uint32_t msg_type, uint8_t type) "vdpa:%p fd: %d msg_type: %"PRIu32" type: %"PRIu8 5090vhost_vdpa_listener_commit(void *v, int fd, uint32_t msg_type, uint8_t type) "vdpa:%p fd: %d msg_type: %"PRIu32" type: %"PRIu8 5091vhost_vdpa_listener_region_add_unaligned(void *v, const char *name, uint64_t offset_as, uint64_t offset_page) "vdpa: %p region %s offset_within_address_space %"PRIu64" offset_within_region %"PRIu64 5092vhost_vdpa_listener_region_add(void *vdpa, uint64_t iova, uint64_t llend, void *vaddr, bool readonly) "vdpa: %p iova 0x%"PRIx64" llend 0x%"PRIx64" vaddr: %p read-only: %d" 5093vhost_vdpa_listener_region_del_unaligned(void *v, const char *name, uint64_t offset_as, uint64_t offset_page) "vdpa: %p region %s offset_within_address_space %"PRIu64" offset_within_region %"PRIu64 5094vhost_vdpa_listener_region_del(void *vdpa, uint64_t iova, uint64_t llend) "vdpa: %p iova 0x%"PRIx64" llend 0x%"PRIx64 5095vhost_vdpa_add_status(void *dev, uint8_t status) "dev: %p status: 0x%"PRIx8 5096vhost_vdpa_init(void *dev, void *vdpa) "dev: %p vdpa: %p" 5097vhost_vdpa_cleanup(void *dev, void *vdpa) "dev: %p vdpa: %p" 5098vhost_vdpa_memslots_limit(void *dev, int ret) "dev: %p = 0x%x" 5099vhost_vdpa_set_mem_table(void *dev, uint32_t nregions, uint32_t padding) "dev: %p nregions: %"PRIu32" padding: 0x%"PRIx32 5100vhost_vdpa_dump_regions(void *dev, int i, uint64_t guest_phys_addr, uint64_t memory_size, uint64_t userspace_addr, uint64_t flags_padding) "dev: %p %d: guest_phys_addr: 0x%"PRIx64" memory_size: 0x%"PRIx64" userspace_addr: 0x%"PRIx64" flags_padding: 0x%"PRIx64 5101vhost_vdpa_set_features(void *dev, uint64_t features) "dev: %p features: 0x%"PRIx64 5102vhost_vdpa_get_device_id(void *dev, uint32_t device_id) "dev: %p device_id %"PRIu32 5103vhost_vdpa_reset_device(void *dev) "dev: %p" 5104vhost_vdpa_get_vq_index(void *dev, int idx, int vq_idx) "dev: %p idx: %d vq idx: %d" 5105vhost_vdpa_set_vring_ready(void *dev, unsigned i, int r) "dev: %p, idx: %u, r: %d" 5106vhost_vdpa_dump_config(void *dev, const char *line) "dev: %p %s" 5107vhost_vdpa_set_config(void *dev, uint32_t offset, uint32_t size, uint32_t flags) "dev: %p offset: %"PRIu32" size: %"PRIu32" flags: 0x%"PRIx32 5108vhost_vdpa_get_config(void *dev, void *config, uint32_t config_len) "dev: %p config: %p config_len: %"PRIu32 5109vhost_vdpa_suspend(void *dev) "dev: %p" 5110vhost_vdpa_dev_start(void *dev, bool started) "dev: %p started: %d" 5111vhost_vdpa_set_log_base(void *dev, uint64_t base, unsigned long long size, int refcnt, int fd, void *log) "dev: %p base: 0x%"PRIx64" size: %llu refcnt: %d fd: %d log: %p" 5112vhost_vdpa_set_vring_addr(void *dev, unsigned int index, unsigned int flags, uint64_t desc_user_addr, uint64_t used_user_addr, uint64_t avail_user_addr, uint64_t log_guest_addr) "dev: %p index: %u flags: 0x%x desc_user_addr: 0x%"PRIx64" used_user_addr: 0x%"PRIx64" avail_user_addr: 0x%"PRIx64" log_guest_addr: 0x%"PRIx64 5113vhost_vdpa_set_vring_num(void *dev, unsigned int index, unsigned int num) "dev: %p index: %u num: %u" 5114vhost_vdpa_set_vring_base(void *dev, unsigned int index, unsigned int num) "dev: %p index: %u num: %u" 5115vhost_vdpa_get_vring_base(void *dev, unsigned int index, unsigned int num) "dev: %p index: %u num: %u" 5116vhost_vdpa_set_vring_kick(void *dev, unsigned int index, int fd) "dev: %p index: %u fd: %d" 5117vhost_vdpa_set_vring_call(void *dev, unsigned int index, int fd) "dev: %p index: %u fd: %d" 5118vhost_vdpa_get_features(void *dev, uint64_t features) "dev: %p features: 0x%"PRIx64 5119vhost_vdpa_set_owner(void *dev) "dev: %p" 5120vhost_vdpa_vq_get_addr(void *dev, void *vq, uint64_t desc_user_addr, uint64_t avail_user_addr, uint64_t used_user_addr) "dev: %p vq: %p desc_user_addr: 0x%"PRIx64" avail_user_addr: 0x%"PRIx64" used_user_addr: 0x%"PRIx64 5121vhost_vdpa_get_iova_range(void *dev, uint64_t first, uint64_t last) "dev: %p first: 0x%"PRIx64" last: 0x%"PRIx64 5122vhost_vdpa_set_config_call(void *dev, int fd)"dev: %p fd: %d" 5123 5124# virtio.c 5125virtqueue_alloc_element(void *elem, size_t sz, unsigned in_num, unsigned out_num) "elem %p size %zd in_num %u out_num %u" 5126virtqueue_fill(void *vq, const void *elem, unsigned int len, unsigned int idx) "vq %p elem %p len %u idx %u" 5127virtqueue_flush(void *vq, unsigned int count) "vq %p count %u" 5128virtqueue_pop(void *vq, void *elem, unsigned int in_num, unsigned int out_num) "vq %p elem %p in_num %u out_num %u" 5129virtio_queue_notify(void *vdev, int n, void *vq) "vdev %p n %d vq %p" 5130virtio_notify_irqfd_deferred_fn(void *vdev, void *vq) "vdev %p vq %p" 5131virtio_notify_irqfd(void *vdev, void *vq) "vdev %p vq %p" 5132virtio_notify(void *vdev, void *vq) "vdev %p vq %p" 5133virtio_set_status(void *vdev, uint8_t val) "vdev %p val %u" 5134 5135# virtio-rng.c 5136virtio_rng_guest_not_ready(void *rng) "rng %p: guest not ready" 5137virtio_rng_cpu_is_stopped(void *rng, int size) "rng %p: cpu is stopped, dropping %d bytes" 5138virtio_rng_popped(void *rng) "rng %p: elem popped" 5139virtio_rng_pushed(void *rng, size_t len) "rng %p: %zd bytes pushed" 5140virtio_rng_request(void *rng, size_t size, unsigned quota) "rng %p: %zd bytes requested, %u bytes quota left" 5141virtio_rng_vm_state_change(void *rng, int running, int state) "rng %p: state change to running %d state %d" 5142 5143# virtio-balloon.c 5144# 5145virtio_balloon_bad_addr(uint64_t gpa) "0x%"PRIx64 5146virtio_balloon_handle_output(const char *name, uint64_t gpa) "section name: %s gpa: 0x%"PRIx64 5147virtio_balloon_get_config(uint32_t num_pages, uint32_t actual) "num_pages: %d actual: %d" 5148virtio_balloon_set_config(uint32_t actual, uint32_t oldactual) "actual: %d oldactual: %d" 5149virtio_balloon_to_target(uint64_t target, uint32_t num_pages) "balloon target: 0x%"PRIx64" num_pages: %d" 5150 5151# virtio-mmio.c 5152virtio_mmio_read(uint64_t offset) "virtio_mmio_read offset 0x%" PRIx64 5153virtio_mmio_write_offset(uint64_t offset, uint64_t value) "virtio_mmio_write offset 0x%" PRIx64 " value 0x%" PRIx64 5154virtio_mmio_guest_page(uint64_t size, int shift) "guest page size 0x%" PRIx64 " shift %d" 5155virtio_mmio_queue_write(uint64_t value, int max_size) "mmio_queue write 0x%" PRIx64 " max %d" 5156virtio_mmio_setting_irq(int level) "virtio_mmio setting IRQ %d" 5157 5158# virtio-pci.c 5159virtio_pci_notify(uint16_t vector) "virtio_pci_notify vec 0x%x" 5160virtio_pci_notify_write(uint64_t addr, uint64_t val, unsigned int size) "0x%" PRIx64" = 0x%" PRIx64 " (%d)" 5161virtio_pci_notify_write_pio(uint64_t addr, uint64_t val, unsigned int size) "0x%" PRIx64" = 0x%" PRIx64 " (%d)" 5162 5163# hw/virtio/virtio-iommu.c 5164virtio_iommu_device_reset(void) "reset!" 5165virtio_iommu_system_reset(void) "system reset!" 5166virtio_iommu_get_features(uint64_t features) "device supports features=0x%"PRIx64 5167virtio_iommu_device_status(uint8_t status) "driver status = %d" 5168virtio_iommu_get_config(uint64_t page_size_mask, uint64_t start, uint64_t end, uint32_t domain_start, uint32_t domain_end, uint32_t probe_size, uint8_t bypass) "page_size_mask=0x%"PRIx64" input range start=0x%"PRIx64" input range end=0x%"PRIx64" domain range start=%d domain range end=%d probe_size=0x%x bypass=0x%x" 5169virtio_iommu_set_config(uint8_t bypass) "bypass=0x%x" 5170virtio_iommu_attach(uint32_t domain_id, uint32_t ep_id) "domain=%d endpoint=%d" 5171virtio_iommu_detach(uint32_t domain_id, uint32_t ep_id) "domain=%d endpoint=%d" 5172virtio_iommu_map(uint32_t domain_id, uint64_t virt_start, uint64_t virt_end, uint64_t phys_start, uint32_t flags) "domain=%d virt_start=0x%"PRIx64" virt_end=0x%"PRIx64 " phys_start=0x%"PRIx64" flags=%d" 5173virtio_iommu_unmap(uint32_t domain_id, uint64_t virt_start, uint64_t virt_end) "domain=%d virt_start=0x%"PRIx64" virt_end=0x%"PRIx64 5174virtio_iommu_unmap_done(uint32_t domain_id, uint64_t virt_start, uint64_t virt_end) "domain=%d virt_start=0x%"PRIx64" virt_end=0x%"PRIx64 5175virtio_iommu_translate(const char *name, uint32_t rid, uint64_t iova, int flag) "mr=%s rid=%d addr=0x%"PRIx64" flag=%d" 5176virtio_iommu_init_iommu_mr(char *iommu_mr) "init %s" 5177virtio_iommu_get_endpoint(uint32_t ep_id) "Alloc endpoint=%d" 5178virtio_iommu_put_endpoint(uint32_t ep_id) "Free endpoint=%d" 5179virtio_iommu_get_domain(uint32_t domain_id) "Alloc domain=%d" 5180virtio_iommu_put_domain(uint32_t domain_id) "Free domain=%d" 5181virtio_iommu_translate_out(uint64_t virt_addr, uint64_t phys_addr, uint32_t sid) "0x%"PRIx64" -> 0x%"PRIx64 " for sid=%d" 5182virtio_iommu_report_fault(uint8_t reason, uint32_t flags, uint32_t endpoint, uint64_t addr) "FAULT reason=%d flags=%d endpoint=%d address =0x%"PRIx64 5183virtio_iommu_fill_resv_property(uint32_t devid, uint8_t subtype, uint64_t start, uint64_t end) "dev= %d, type=%d start=0x%"PRIx64" end=0x%"PRIx64 5184virtio_iommu_notify_map(const char *name, uint64_t virt_start, uint64_t virt_end, uint64_t phys_start, uint32_t flags) "mr=%s virt_start=0x%"PRIx64" virt_end=0x%"PRIx64" phys_start=0x%"PRIx64" flags=%d" 5185virtio_iommu_notify_unmap(const char *name, uint64_t virt_start, uint64_t virt_end) "mr=%s virt_start=0x%"PRIx64" virt_end=0x%"PRIx64 5186virtio_iommu_remap(const char *name, uint64_t virt_start, uint64_t virt_end, uint64_t phys_start) "mr=%s virt_start=0x%"PRIx64" virt_end=0x%"PRIx64" phys_start=0x%"PRIx64 5187virtio_iommu_set_page_size_mask(const char *name, uint64_t old, uint64_t new) "mr=%s old_mask=0x%"PRIx64" new_mask=0x%"PRIx64 5188virtio_iommu_notify_flag_add(const char *name) "add notifier to mr %s" 5189virtio_iommu_notify_flag_del(const char *name) "del notifier from mr %s" 5190virtio_iommu_switch_address_space(uint8_t bus, uint8_t slot, uint8_t fn, bool on) "Device %02x:%02x.%x switching address space (iommu enabled=%d)" 5191virtio_iommu_freeze_granule(uint64_t page_size_mask) "granule set to 0x%"PRIx64 5192virtio_iommu_host_resv_regions(const char *name, uint32_t index, uint64_t lob, uint64_t upb) "mr=%s host-resv-reg[%d] = [0x%"PRIx64",0x%"PRIx64"]" 5193 5194# virtio-mem.c 5195virtio_mem_send_response(uint16_t type) "type=%" PRIu16 5196virtio_mem_plug_request(uint64_t addr, uint16_t nb_blocks) "addr=0x%" PRIx64 " nb_blocks=%" PRIu16 5197virtio_mem_unplug_request(uint64_t addr, uint16_t nb_blocks) "addr=0x%" PRIx64 " nb_blocks=%" PRIu16 5198virtio_mem_unplugged_all(void) "" 5199virtio_mem_unplug_all_request(void) "" 5200virtio_mem_resized_usable_region(uint64_t old_size, uint64_t new_size) "old_size=0x%" PRIx64 "new_size=0x%" PRIx64 5201virtio_mem_state_request(uint64_t addr, uint16_t nb_blocks) "addr=0x%" PRIx64 " nb_blocks=%" PRIu16 5202virtio_mem_state_response(uint16_t state) "state=%" PRIu16 5203 5204# virtio-pmem.c 5205virtio_pmem_flush_request(void) "flush request" 5206virtio_pmem_response(void) "flush response" 5207virtio_pmem_flush_done(int type) "fsync return=%d" 5208 5209# virtio-gpio.c 5210virtio_gpio_start(void) "start" 5211virtio_gpio_stop(void) "stop" 5212virtio_gpio_set_status(uint8_t status) "0x%x" 5213# See docs/devel/tracing.rst for syntax documentation. 5214 5215# allwinner-wdt.c 5216allwinner_wdt_read(uint64_t offset, uint64_t data, unsigned size) "Allwinner watchdog read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" 5217allwinner_wdt_write(uint64_t offset, uint64_t data, unsigned size) "Allwinner watchdog write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" 5218allwinner_wdt_reset_enter(void) "Allwinner watchdog: reset" 5219allwinner_wdt_update_timer(uint8_t count) "Allwinner watchdog: count %" PRIu8 5220allwinner_wdt_expired(bool enabled, bool reset_enabled) "Allwinner watchdog: enabled %u reset_enabled %u" 5221 5222# cmsdk-apb-watchdog.c 5223cmsdk_apb_watchdog_read(uint64_t offset, uint64_t data, unsigned size) "CMSDK APB watchdog read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" 5224cmsdk_apb_watchdog_write(uint64_t offset, uint64_t data, unsigned size) "CMSDK APB watchdog write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" 5225cmsdk_apb_watchdog_reset(void) "CMSDK APB watchdog: reset" 5226cmsdk_apb_watchdog_lock(uint32_t lock) "CMSDK APB watchdog: lock %" PRIu32 5227 5228# wdt-aspeed.c 5229aspeed_wdt_read(uint64_t addr, uint32_t size) "@0x%" PRIx64 " size=%d" 5230aspeed_wdt_write(uint64_t addr, uint32_t size, uint64_t data) "@0x%" PRIx64 " size=%d value=0x%"PRIx64 5231 5232# wdt_imx2.c 5233imx2_wdt_read(uint32_t addr, uint16_t data) "[0x%" PRIx32 "] -> 0x%" PRIx16 5234imx2_wdt_write(uint32_t addr, uint16_t data) "[0x%" PRIx32 "] <- 0x%" PRIx16 5235imx2_wdt_interrupt(void) "" 5236imx2_wdt_expired(void) "" 5237 5238# spapr_watchdog.c 5239spapr_watchdog_start(uint64_t flags, uint64_t num, uint64_t timeout) "Flags 0x%" PRIx64 " num=%" PRId64 " %" PRIu64 "ms" 5240spapr_watchdog_stop(uint64_t num, uint64_t ret) "num=%" PRIu64 " ret=%" PRId64 5241spapr_watchdog_query(uint64_t caps) "caps=0x%" PRIx64 5242spapr_watchdog_query_lpm(uint64_t caps) "caps=0x%" PRIx64 5243spapr_watchdog_expired(uint64_t num, unsigned action) "num=%" PRIu64 " action=%u" 5244 5245# watchdog.c 5246watchdog_perform_action(unsigned int action) "action=%u" 5247watchdog_set_action(unsigned int action) "action=%u" 5248# See docs/devel/tracing.rst for syntax documentation. 5249 5250# ../../include/hw/xen/xen_native.h 5251xen_default_ioreq_server(void) "" 5252xen_ioreq_server_create(uint32_t id) "id: %u" 5253xen_ioreq_server_destroy(uint32_t id) "id: %u" 5254xen_ioreq_server_state(uint32_t id, bool enable) "id: %u: enable: %i" 5255xen_map_mmio_range(uint32_t id, uint64_t start_addr, uint64_t end_addr) "id: %u start: 0x%"PRIx64" end: 0x%"PRIx64 5256xen_unmap_mmio_range(uint32_t id, uint64_t start_addr, uint64_t end_addr) "id: %u start: 0x%"PRIx64" end: 0x%"PRIx64 5257xen_map_portio_range(uint32_t id, uint64_t start_addr, uint64_t end_addr) "id: %u start: 0x%"PRIx64" end: 0x%"PRIx64 5258xen_unmap_portio_range(uint32_t id, uint64_t start_addr, uint64_t end_addr) "id: %u start: 0x%"PRIx64" end: 0x%"PRIx64 5259xen_map_pcidev(uint32_t id, uint8_t bus, uint8_t dev, uint8_t func) "id: %u bdf: %02x.%02x.%02x" 5260xen_unmap_pcidev(uint32_t id, uint8_t bus, uint8_t dev, uint8_t func) "id: %u bdf: %02x.%02x.%02x" 5261xen_domid_restrict(int err) "err: %u" 5262 5263# xen-bus.c 5264xen_bus_realize(void) "" 5265xen_bus_unrealize(void) "" 5266xen_bus_enumerate(void) "" 5267xen_bus_cleanup(void) "" 5268xen_bus_type_enumerate(const char *type) "type: %s" 5269xen_bus_backend_create(const char *type, const char *path) "type: %s path: %s" 5270xen_bus_device_cleanup(const char *type, char *name) "type: %s name: %s" 5271xen_bus_add_watch(const char *node, const char *key) "node: %s key: %s" 5272xen_bus_remove_watch(const char *node, const char *key) "node: %s key: %s" 5273xen_device_realize(const char *type, char *name) "type: %s name: %s" 5274xen_device_unrealize(const char *type, char *name) "type: %s name: %s" 5275xen_device_backend_state(const char *type, char *name, const char *state) "type: %s name: %s -> %s" 5276xen_device_backend_online(const char *type, char *name, bool online) "type: %s name: %s -> %u" 5277xen_device_backend_changed(const char *type, char *name) "type: %s name: %s" 5278xen_device_frontend_state(const char *type, char *name, const char *state) "type: %s name: %s -> %s" 5279xen_device_frontend_changed(const char *type, char *name) "type: %s name: %s" 5280xen_device_unplug(const char *type, char *name) "type: %s name: %s" 5281xen_device_add_watch(const char *type, char *name, const char *node, const char *key) "type: %s name: %s node: %s key: %s" 5282xen_device_remove_watch(const char *type, char *name, const char *node, const char *key) "type: %s name: %s node: %s key: %s" 5283 5284# xen-bus-helper.c 5285xs_node_create(const char *node) "%s" 5286xs_node_destroy(const char *node) "%s" 5287xs_node_vprintf(char *path, char *value) "%s %s" 5288xs_node_vscanf(char *path, char *value) "%s %s" 5289xs_node_watch(char *path) "%s" 5290xs_node_unwatch(char *path) "%s" 5291 5292# xen-hvm.c 5293xen_ram_alloc(unsigned long ram_addr, unsigned long size) "requested: 0x%lx, size 0x%lx" 5294xen_client_set_memory(uint64_t start_addr, unsigned long size, bool log_dirty) "0x%"PRIx64" size 0x%lx, log_dirty %i" 5295handle_ioreq(void *req, uint32_t type, uint32_t dir, uint32_t df, uint32_t data_is_ptr, uint64_t addr, uint64_t data, uint32_t count, uint32_t size) "I/O=%p type=%d dir=%d df=%d ptr=%d port=0x%"PRIx64" data=0x%"PRIx64" count=%d size=%d" 5296handle_ioreq_read(void *req, uint32_t type, uint32_t df, uint32_t data_is_ptr, uint64_t addr, uint64_t data, uint32_t count, uint32_t size) "I/O=%p read type=%d df=%d ptr=%d port=0x%"PRIx64" data=0x%"PRIx64" count=%d size=%d" 5297handle_ioreq_write(void *req, uint32_t type, uint32_t df, uint32_t data_is_ptr, uint64_t addr, uint64_t data, uint32_t count, uint32_t size) "I/O=%p write type=%d df=%d ptr=%d port=0x%"PRIx64" data=0x%"PRIx64" count=%d size=%d" 5298cpu_ioreq_pio(void *req, uint32_t dir, uint32_t df, uint32_t data_is_ptr, uint64_t addr, uint64_t data, uint32_t count, uint32_t size) "I/O=%p pio dir=%d df=%d ptr=%d port=0x%"PRIx64" data=0x%"PRIx64" count=%d size=%d" 5299cpu_ioreq_pio_read_reg(void *req, uint64_t data, uint64_t addr, uint32_t size) "I/O=%p pio read reg data=0x%"PRIx64" port=0x%"PRIx64" size=%d" 5300cpu_ioreq_pio_write_reg(void *req, uint64_t data, uint64_t addr, uint32_t size) "I/O=%p pio write reg data=0x%"PRIx64" port=0x%"PRIx64" size=%d" 5301cpu_ioreq_move(void *req, uint32_t dir, uint32_t df, uint32_t data_is_ptr, uint64_t addr, uint64_t data, uint32_t count, uint32_t size) "I/O=%p copy dir=%d df=%d ptr=%d port=0x%"PRIx64" data=0x%"PRIx64" count=%d size=%d" 5302xen_map_resource_ioreq(uint32_t id, void *addr) "id: %u addr: %p" 5303cpu_ioreq_config_read(void *req, uint32_t sbdf, uint32_t reg, uint32_t size, uint32_t data) "I/O=%p sbdf=0x%x reg=%u size=%u data=0x%x" 5304cpu_ioreq_config_write(void *req, uint32_t sbdf, uint32_t reg, uint32_t size, uint32_t data) "I/O=%p sbdf=0x%x reg=%u size=%u data=0x%x" 5305 5306# xen-mapcache.c 5307xen_map_cache(uint64_t phys_addr) "want 0x%"PRIx64 5308xen_remap_bucket(uint64_t index) "index 0x%"PRIx64 5309xen_map_cache_return(void* ptr) "%p" 5310# See docs/devel/tracing.rst for syntax documentation. 5311 5312# npcm7xx_gpio.c 5313npcm7xx_gpio_read(const char *id, uint64_t offset, uint64_t value) " %s offset: 0x%04" PRIx64 " value 0x%08" PRIx64 5314npcm7xx_gpio_write(const char *id, uint64_t offset, uint64_t value) "%s offset: 0x%04" PRIx64 " value 0x%08" PRIx64 5315npcm7xx_gpio_set_input(const char *id, int32_t line, int32_t level) "%s line: %" PRIi32 " level: %" PRIi32 5316npcm7xx_gpio_set_output(const char *id, int32_t line, int32_t level) "%s line: %" PRIi32 " level: %" PRIi32 5317npcm7xx_gpio_update_events(const char *id, uint32_t evst, uint32_t even) "%s evst: 0x%08" PRIx32 " even: 0x%08" PRIx32 5318 5319# nrf51_gpio.c 5320nrf51_gpio_read(uint64_t offset, uint64_t r) "offset 0x%" PRIx64 " value 0x%" PRIx64 5321nrf51_gpio_write(uint64_t offset, uint64_t value) "offset 0x%" PRIx64 " value 0x%" PRIx64 5322nrf51_gpio_set(int64_t line, int64_t value) "line %" PRIi64 " value %" PRIi64 5323nrf51_gpio_update_output_irq(int64_t line, int64_t value) "line %" PRIi64 " value %" PRIi64 5324 5325# pl061.c 5326pl061_update(const char *id, uint32_t dir, uint32_t data, uint32_t pullups, uint32_t floating) "%s GPIODIR 0x%x GPIODATA 0x%x pullups 0x%x floating 0x%x" 5327pl061_set_output(const char *id, int gpio, int level) "%s setting output %d to %d" 5328pl061_input_change(const char *id, int gpio, int level) "%s input %d changed to %d" 5329pl061_update_istate(const char *id, uint32_t istate, uint32_t im, int level) "%s GPIORIS 0x%x GPIOIE 0x%x interrupt level %d" 5330pl061_read(const char *id, uint64_t offset, uint64_t r) "%s offset 0x%" PRIx64 " value 0x%" PRIx64 5331pl061_write(const char *id, uint64_t offset, uint64_t value) "%s offset 0x%" PRIx64 " value 0x%" PRIx64 5332pl061_reset(const char *id) "%s reset" 5333 5334# sifive_gpio.c 5335sifive_gpio_read(uint64_t offset, uint64_t r) "offset 0x%" PRIx64 " value 0x%" PRIx64 5336sifive_gpio_write(uint64_t offset, uint64_t value) "offset 0x%" PRIx64 " value 0x%" PRIx64 5337sifive_gpio_set(int64_t line, int64_t value) "line %" PRIi64 " value %" PRIi64 5338sifive_gpio_update_output_irq(int64_t line, int64_t value) "line %" PRIi64 " value %" PRIi64 5339 5340# aspeed_gpio.c 5341aspeed_gpio_read(uint64_t offset, uint64_t value) "offset: 0x%" PRIx64 " value 0x%" PRIx64 5342aspeed_gpio_write(uint64_t offset, uint64_t value) "offset: 0x%" PRIx64 " value 0x%" PRIx64 5343 5344# pca_i2c_gpio.c 5345pca_i2c_event(const char *id, const char *event) "%s: %s" 5346pca_i2c_recv(const char *id, uint8_t cmd, uint8_t data) "%s cmd: 0x%" PRIx8 " data 0x%" PRIx8 5347pca_i2c_send(const char *id, uint8_t cmd, uint8_t data) "%s cmd: 0x%" PRIx8 " data 0x%" PRIx8 5348# See docs/devel/tracing.rst for syntax documentation. 5349 5350# savevm.c 5351qemu_loadvm_state_section(unsigned int section_type) "%d" 5352qemu_loadvm_state_section_command(int ret) "%d" 5353qemu_loadvm_state_section_partend(uint32_t section_id) "%u" 5354qemu_loadvm_state_post_main(int ret) "%d" 5355qemu_loadvm_state_section_startfull(uint32_t section_id, const char *idstr, uint32_t instance_id, uint32_t version_id) "%u(%s) %u %u" 5356qemu_savevm_send_packaged(void) "" 5357loadvm_state_switchover_ack_needed(unsigned int switchover_ack_pending_num) "Switchover ack pending num=%u" 5358loadvm_state_setup(void) "" 5359loadvm_state_cleanup(void) "" 5360loadvm_handle_cmd_packaged(unsigned int length) "%u" 5361loadvm_handle_cmd_packaged_main(int ret) "%d" 5362loadvm_handle_cmd_packaged_received(int ret) "%d" 5363loadvm_handle_recv_bitmap(char *s) "%s" 5364loadvm_postcopy_handle_advise(void) "" 5365loadvm_postcopy_handle_listen(const char *str) "%s" 5366loadvm_postcopy_handle_run(void) "" 5367loadvm_postcopy_handle_resume(void) "" 5368loadvm_postcopy_ram_handle_discard(void) "" 5369loadvm_postcopy_ram_handle_discard_end(void) "" 5370loadvm_postcopy_ram_handle_discard_header(const char *ramid, uint16_t len) "%s: %ud" 5371loadvm_process_command(const char *s, uint16_t len) "com=%s len=%d" 5372loadvm_process_command_ping(uint32_t val) "0x%x" 5373loadvm_approve_switchover(unsigned int switchover_ack_pending_num) "Switchover ack pending num=%u" 5374postcopy_ram_listen_thread_exit(void) "" 5375postcopy_ram_listen_thread_start(void) "" 5376qemu_savevm_send_postcopy_advise(void) "" 5377qemu_savevm_send_postcopy_ram_discard(const char *id, uint16_t len) "%s: %ud" 5378savevm_command_send(uint16_t command, uint16_t len) "com=0x%x len=%d" 5379savevm_section_start(const char *id, unsigned int section_id) "%s, section_id %u" 5380savevm_section_end(const char *id, unsigned int section_id, int ret) "%s, section_id %u -> %d" 5381savevm_section_skip(const char *id, unsigned int section_id) "%s, section_id %u" 5382savevm_send_open_return_path(void) "" 5383savevm_send_ping(uint32_t val) "0x%x" 5384savevm_send_postcopy_listen(void) "" 5385savevm_send_postcopy_run(void) "" 5386savevm_send_postcopy_resume(void) "" 5387savevm_send_colo_enable(void) "" 5388savevm_send_recv_bitmap(char *name) "%s" 5389savevm_state_setup(void) "" 5390savevm_state_resume_prepare(void) "" 5391savevm_state_header(void) "" 5392savevm_state_iterate(void) "" 5393savevm_state_cleanup(void) "" 5394savevm_state_complete_precopy(void) "" 5395vmstate_save(const char *idstr, const char *vmsd_name) "%s, %s" 5396vmstate_load(const char *idstr, const char *vmsd_name) "%s, %s" 5397vmstate_downtime_save(const char *type, const char *idstr, uint32_t instance_id, int64_t downtime) "type=%s idstr=%s instance_id=%d downtime=%"PRIi64 5398vmstate_downtime_load(const char *type, const char *idstr, uint32_t instance_id, int64_t downtime) "type=%s idstr=%s instance_id=%d downtime=%"PRIi64 5399vmstate_downtime_checkpoint(const char *checkpoint) "%s" 5400postcopy_pause_incoming(void) "" 5401postcopy_pause_incoming_continued(void) "" 5402postcopy_page_req_sync(void *host_addr) "sync page req %p" 5403 5404# vmstate.c 5405vmstate_load_field_error(const char *field, int ret) "field \"%s\" load failed, ret = %d" 5406vmstate_load_state(const char *name, int version_id) "%s v%d" 5407vmstate_load_state_end(const char *name, const char *reason, int val) "%s %s/%d" 5408vmstate_load_state_field(const char *name, const char *field) "%s:%s" 5409vmstate_n_elems(const char *name, int n_elems) "%s: %d" 5410vmstate_subsection_load(const char *parent) "%s" 5411vmstate_subsection_load_bad(const char *parent, const char *sub, const char *sub2) "%s: %s/%s" 5412vmstate_subsection_load_good(const char *parent) "%s" 5413vmstate_save_state_pre_save_res(const char *name, int res) "%s/%d" 5414vmstate_save_state_loop(const char *name, const char *field, int n_elems) "%s/%s[%d]" 5415vmstate_save_state_top(const char *idstr) "%s" 5416vmstate_subsection_save_loop(const char *name, const char *sub) "%s/%s" 5417vmstate_subsection_save_top(const char *idstr) "%s" 5418vmstate_field_exists(const char *vmsd, const char *name, int field_version, int version, int result) "%s:%s field_version %d version %d result %d" 5419 5420# vmstate-types.c 5421get_qtailq(const char *name, int version_id) "%s v%d" 5422get_qtailq_end(const char *name, const char *reason, int val) "%s %s/%d" 5423put_qtailq(const char *name, int version_id) "%s v%d" 5424put_qtailq_end(const char *name, const char *reason) "%s %s" 5425 5426get_gtree(const char *field_name, const char *key_vmsd_name, const char *val_vmsd_name, uint32_t nnodes) "%s(%s/%s) nnodes=%d" 5427get_gtree_end(const char *field_name, const char *key_vmsd_name, const char *val_vmsd_name, int ret) "%s(%s/%s) %d" 5428put_gtree(const char *field_name, const char *key_vmsd_name, const char *val_vmsd_name, uint32_t nnodes) "%s(%s/%s) nnodes=%d" 5429put_gtree_end(const char *field_name, const char *key_vmsd_name, const char *val_vmsd_name, int ret) "%s(%s/%s) %d" 5430 5431get_qlist(const char *field_name, const char *vmsd_name, int version_id) "%s(%s v%d)" 5432get_qlist_end(const char *field_name, const char *vmsd_name) "%s(%s)" 5433put_qlist(const char *field_name, const char *vmsd_name, int version_id) "%s(%s v%d)" 5434put_qlist_end(const char *field_name, const char *vmsd_name) "%s(%s)" 5435 5436# qemu-file.c 5437qemu_file_fclose(void) "" 5438 5439# ram.c 5440get_queued_page(const char *block_name, uint64_t tmp_offset, unsigned long page_abs) "%s/0x%" PRIx64 " page_abs=0x%lx" 5441get_queued_page_not_dirty(const char *block_name, uint64_t tmp_offset, unsigned long page_abs) "%s/0x%" PRIx64 " page_abs=0x%lx" 5442migration_bitmap_sync_start(void) "" 5443migration_bitmap_sync_end(uint64_t dirty_pages) "dirty_pages %" PRIu64 5444migration_bitmap_clear_dirty(char *str, uint64_t start, uint64_t size, unsigned long page) "rb %s start 0x%"PRIx64" size 0x%"PRIx64" page 0x%lx" 5445migration_throttle(void) "" 5446migration_dirty_limit_guest(int64_t dirtyrate) "guest dirty page rate limit %" PRIi64 " MB/s" 5447ram_discard_range(const char *rbname, uint64_t start, size_t len) "%s: start: %" PRIx64 " %zx" 5448ram_load_loop(const char *rbname, uint64_t addr, int flags, void *host) "%s: addr: 0x%" PRIx64 " flags: 0x%x host: %p" 5449ram_load_postcopy_loop(int channel, uint64_t addr, int flags) "chan=%d addr=0x%" PRIx64 " flags=0x%x" 5450ram_postcopy_send_discard_bitmap(void) "" 5451ram_save_page(const char *rbname, uint64_t offset, void *host) "%s: offset: 0x%" PRIx64 " host: %p" 5452ram_save_queue_pages(const char *rbname, size_t start, size_t len) "%s: start: 0x%zx len: 0x%zx" 5453ram_dirty_bitmap_request(char *str) "%s" 5454ram_dirty_bitmap_reload_begin(char *str) "%s" 5455ram_dirty_bitmap_reload_complete(char *str) "%s" 5456ram_dirty_bitmap_sync_start(void) "" 5457ram_dirty_bitmap_sync_wait(void) "" 5458ram_dirty_bitmap_sync_complete(void) "" 5459ram_state_resume_prepare(uint64_t v) "%" PRId64 5460colo_flush_ram_cache_begin(uint64_t dirty_pages) "dirty_pages %" PRIu64 5461colo_flush_ram_cache_end(void) "" 5462save_xbzrle_page_skipping(void) "" 5463save_xbzrle_page_overflow(void) "" 5464ram_save_iterate_big_wait(uint64_t milliconds, int iterations) "big wait: %" PRIu64 " milliseconds, %d iterations" 5465ram_load_complete(int ret, uint64_t seq_iter) "exit_code %d seq iteration %" PRIu64 5466ram_write_tracking_ramblock_start(const char *block_id, size_t page_size, void *addr, size_t length) "%s: page_size: %zu addr: %p length: %zu" 5467ram_write_tracking_ramblock_stop(const char *block_id, size_t page_size, void *addr, size_t length) "%s: page_size: %zu addr: %p length: %zu" 5468postcopy_preempt_triggered(char *str, unsigned long page) "during sending ramblock %s offset 0x%lx" 5469postcopy_preempt_restored(char *str, unsigned long page) "ramblock %s offset 0x%lx" 5470postcopy_preempt_hit(char *str, uint64_t offset) "ramblock %s offset 0x%"PRIx64 5471postcopy_preempt_send_host_page(char *str, uint64_t offset) "ramblock %s offset 0x%"PRIx64 5472postcopy_preempt_switch_channel(int channel) "%d" 5473postcopy_preempt_reset_channel(void) "" 5474 5475# multifd.c 5476multifd_new_send_channel_async(uint8_t id) "channel %u" 5477multifd_new_send_channel_async_error(uint8_t id, void *err) "channel=%u err=%p" 5478multifd_recv(uint8_t id, uint64_t packet_num, uint32_t used, uint32_t flags, uint32_t next_packet_size) "channel %u packet_num %" PRIu64 " pages %u flags 0x%x next packet size %u" 5479multifd_recv_new_channel(uint8_t id) "channel %u" 5480multifd_recv_sync_main(long packet_num) "packet num %ld" 5481multifd_recv_sync_main_signal(uint8_t id) "channel %u" 5482multifd_recv_sync_main_wait(uint8_t id) "channel %u" 5483multifd_recv_terminate_threads(bool error) "error %d" 5484multifd_recv_thread_end(uint8_t id, uint64_t packets, uint64_t pages) "channel %u packets %" PRIu64 " pages %" PRIu64 5485multifd_recv_thread_start(uint8_t id) "%u" 5486multifd_send(uint8_t id, uint64_t packet_num, uint32_t normal, uint32_t flags, uint32_t next_packet_size) "channel %u packet_num %" PRIu64 " normal pages %u flags 0x%x next packet size %u" 5487multifd_send_error(uint8_t id) "channel %u" 5488multifd_send_sync_main(long packet_num) "packet num %ld" 5489multifd_send_sync_main_signal(uint8_t id) "channel %u" 5490multifd_send_sync_main_wait(uint8_t id) "channel %u" 5491multifd_send_terminate_threads(bool error) "error %d" 5492multifd_send_thread_end(uint8_t id, uint64_t packets, uint64_t normal_pages) "channel %u packets %" PRIu64 " normal pages %" PRIu64 5493multifd_send_thread_start(uint8_t id) "%u" 5494multifd_tls_outgoing_handshake_start(void *ioc, void *tioc, const char *hostname) "ioc=%p tioc=%p hostname=%s" 5495multifd_tls_outgoing_handshake_error(void *ioc, const char *err) "ioc=%p err=%s" 5496multifd_tls_outgoing_handshake_complete(void *ioc) "ioc=%p" 5497multifd_set_outgoing_channel(void *ioc, const char *ioctype, const char *hostname) "ioc=%p ioctype=%s hostname=%s" 5498 5499# migration.c 5500migrate_set_state(const char *new_state) "new state %s" 5501migrate_fd_cleanup(void) "" 5502migrate_fd_error(const char *error_desc) "error=%s" 5503migrate_fd_cancel(void) "" 5504migrate_handle_rp_req_pages(const char *rbname, size_t start, size_t len) "in %s at 0x%zx len 0x%zx" 5505migrate_pending_exact(uint64_t size, uint64_t pre, uint64_t post) "exact pending size %" PRIu64 " (pre = %" PRIu64 " post=%" PRIu64 ")" 5506migrate_pending_estimate(uint64_t size, uint64_t pre, uint64_t post) "estimate pending size %" PRIu64 " (pre = %" PRIu64 " post=%" PRIu64 ")" 5507migrate_send_rp_message(int msg_type, uint16_t len) "%d: len %d" 5508migrate_send_rp_recv_bitmap(char *name, int64_t size) "block '%s' size 0x%"PRIi64 5509migration_completion_file_err(void) "" 5510migration_completion_vm_stop(int ret) "ret %d" 5511migration_completion_postcopy_end(void) "" 5512migration_completion_postcopy_end_after_complete(void) "" 5513migration_rate_limit_pre(int ms) "%d ms" 5514migration_rate_limit_post(int urgent) "urgent: %d" 5515migration_return_path_end_before(void) "" 5516migration_return_path_end_after(void) "" 5517migration_thread_after_loop(void) "" 5518migration_thread_file_err(void) "" 5519migration_thread_setup_complete(void) "" 5520open_return_path_on_source(void) "" 5521open_return_path_on_source_continue(void) "" 5522postcopy_start(void) "" 5523postcopy_pause_return_path(void) "" 5524postcopy_pause_return_path_continued(void) "" 5525postcopy_pause_continued(void) "" 5526postcopy_start_set_run(void) "" 5527postcopy_page_req_add(void *addr, int count) "new page req %p total %d" 5528source_return_path_thread_bad_end(void) "" 5529source_return_path_thread_end(void) "" 5530source_return_path_thread_entry(void) "" 5531source_return_path_thread_loop_top(void) "" 5532source_return_path_thread_pong(uint32_t val) "0x%x" 5533source_return_path_thread_shut(uint32_t val) "0x%x" 5534source_return_path_thread_resume_ack(uint32_t v) "%"PRIu32 5535source_return_path_thread_switchover_acked(void) "" 5536migration_thread_low_pending(uint64_t pending) "%" PRIu64 5537migrate_transferred(uint64_t transferred, uint64_t time_spent, uint64_t bandwidth, uint64_t avail_bw, uint64_t size) "transferred %" PRIu64 " time_spent %" PRIu64 " bandwidth %" PRIu64 " switchover_bw %" PRIu64 " max_size %" PRId64 5538process_incoming_migration_co_end(int ret, int ps) "ret=%d postcopy-state=%d" 5539process_incoming_migration_co_postcopy_end_main(void) "" 5540postcopy_preempt_enabled(bool value) "%d" 5541 5542# migration-stats 5543migration_transferred_bytes(uint64_t qemu_file, uint64_t multifd, uint64_t rdma) "qemu_file %" PRIu64 " multifd %" PRIu64 " RDMA %" PRIu64 5544 5545# channel.c 5546migration_set_incoming_channel(void *ioc, const char *ioctype) "ioc=%p ioctype=%s" 5547migration_set_outgoing_channel(void *ioc, const char *ioctype, const char *hostname, void *err) "ioc=%p ioctype=%s hostname=%s err=%p" 5548 5549# global_state.c 5550migrate_state_too_big(void) "" 5551migrate_global_state_post_load(const char *state) "loaded state: %s" 5552migrate_global_state_pre_save(const char *state) "saved state: %s" 5553 5554# rdma.c 5555qemu_rdma_accept_incoming_migration(void) "" 5556qemu_rdma_accept_incoming_migration_accepted(void) "" 5557qemu_rdma_accept_pin_state(bool pin) "%d" 5558qemu_rdma_accept_pin_verbsc(void *verbs) "Verbs context after listen: %p" 5559qemu_rdma_block_for_wrid_miss(uint64_t wcomp, uint64_t req) "A Wanted wrid %" PRIu64 " but got %" PRIu64 5560qemu_rdma_cleanup_disconnect(void) "" 5561qemu_rdma_close(void) "" 5562qemu_rdma_connect_pin_all_requested(void) "" 5563qemu_rdma_connect_pin_all_outcome(bool pin) "%d" 5564qemu_rdma_dest_init_trying(const char *host, const char *ip) "%s => %s" 5565qemu_rdma_dump_id_failed(const char *who) "%s RDMA Device opened, but can't query port information" 5566qemu_rdma_dump_id(const char *who, const char *name, const char *dev_name, const char *dev_path, const char *ibdev_path, int transport, const char *transport_name) "%s RDMA Device opened: kernel name %s uverbs device name %s, infiniband_verbs class device path %s, infiniband class device path %s, transport: (%d) %s" 5567qemu_rdma_dump_gid(const char *who, const char *src, const char *dst) "%s Source GID: %s, Dest GID: %s" 5568qemu_rdma_exchange_get_response_start(const char *desc) "CONTROL: %s receiving..." 5569qemu_rdma_exchange_get_response_none(const char *desc, int type) "Surprise: got %s (%d)" 5570qemu_rdma_exchange_send_issue_callback(void) "" 5571qemu_rdma_exchange_send_waiting(const char *desc) "Waiting for response %s" 5572qemu_rdma_exchange_send_received(const char *desc) "Response %s received." 5573qemu_rdma_fill(size_t control_len, size_t size) "RDMA %zd of %zd bytes already in buffer" 5574qemu_rdma_init_ram_blocks(int blocks) "Allocated %d local ram block structures" 5575qemu_rdma_poll_recv(uint64_t comp, int64_t id, int sent) "completion %" PRIu64 " received (%" PRId64 ") left %d" 5576qemu_rdma_poll_write(uint64_t comp, int left, uint64_t block, uint64_t chunk, void *local, void *remote) "completions %" PRIu64 " left %d, block %" PRIu64 ", chunk: %" PRIu64 " %p %p" 5577qemu_rdma_poll_other(uint64_t comp, int left) "other completion %" PRIu64 " received left %d" 5578qemu_rdma_post_send_control(const char *desc) "CONTROL: sending %s.." 5579qemu_rdma_register_and_get_keys(uint64_t len, void *start) "Registering %" PRIu64 " bytes @ %p" 5580qemu_rdma_register_odp_mr(const char *name) "Try to register On-Demand Paging memory region: %s" 5581qemu_rdma_advise_mr(const char *name, uint32_t len, uint64_t addr, const char *res) "Try to advise block %s prefetch at %" PRIu32 "@0x%" PRIx64 ": %s" 5582qemu_rdma_resolve_host_trying(const char *host, const char *ip) "Trying %s => %s" 5583qemu_rdma_signal_unregister_append(uint64_t chunk, int pos) "Appending unregister chunk %" PRIu64 " at position %d" 5584qemu_rdma_signal_unregister_already(uint64_t chunk) "Unregister chunk %" PRIu64 " already in queue" 5585qemu_rdma_unregister_waiting_inflight(uint64_t chunk) "Cannot unregister inflight chunk: %" PRIu64 5586qemu_rdma_unregister_waiting_proc(uint64_t chunk, int pos) "Processing unregister for chunk: %" PRIu64 " at position %d" 5587qemu_rdma_unregister_waiting_send(uint64_t chunk) "Sending unregister for chunk: %" PRIu64 5588qemu_rdma_unregister_waiting_complete(uint64_t chunk) "Unregister for chunk: %" PRIu64 " complete." 5589qemu_rdma_write_flush(int sent) "sent total: %d" 5590qemu_rdma_write_one_block(int count, int block, uint64_t chunk, uint64_t current, uint64_t len, int nb_sent, int nb_chunks) "(%d) Not clobbering: block: %d chunk %" PRIu64 " current %" PRIu64 " len %" PRIu64 " %d %d" 5591qemu_rdma_write_one_post(uint64_t chunk, long addr, long remote, uint32_t len) "Posting chunk: %" PRIu64 ", addr: 0x%lx remote: 0x%lx, bytes %" PRIu32 5592qemu_rdma_write_one_queue_full(void) "" 5593qemu_rdma_write_one_recvregres(int mykey, int theirkey, uint64_t chunk) "Received registration result: my key: 0x%x their key 0x%x, chunk %" PRIu64 5594qemu_rdma_write_one_sendreg(uint64_t chunk, int len, int index, int64_t offset) "Sending registration request chunk %" PRIu64 " for %d bytes, index: %d, offset: %" PRId64 5595qemu_rdma_write_one_top(uint64_t chunks, uint64_t size) "Writing %" PRIu64 " chunks, (%" PRIu64 " MB)" 5596qemu_rdma_write_one_zero(uint64_t chunk, int len, int index, int64_t offset) "Entire chunk is zero, sending compress: %" PRIu64 " for %d bytes, index: %d, offset: %" PRId64 5597rdma_add_block(const char *block_name, int block, uint64_t addr, uint64_t offset, uint64_t len, uint64_t end, uint64_t bits, int chunks) "Added Block: '%s':%d, addr: %" PRIu64 ", offset: %" PRIu64 " length: %" PRIu64 " end: %" PRIu64 " bits %" PRIu64 " chunks %d" 5598rdma_block_notification_handle(const char *name, int index) "%s at %d" 5599rdma_delete_block(void *block, uint64_t addr, uint64_t offset, uint64_t len, uint64_t end, uint64_t bits, int chunks) "Deleted Block: %p, addr: %" PRIu64 ", offset: %" PRIu64 " length: %" PRIu64 " end: %" PRIu64 " bits %" PRIu64 " chunks %d" 5600rdma_registration_handle_compress(int64_t length, int index, int64_t offset) "Zapping zero chunk: %" PRId64 " bytes, index %d, offset %" PRId64 5601rdma_registration_handle_finished(void) "" 5602rdma_registration_handle_ram_blocks(void) "" 5603rdma_registration_handle_ram_blocks_loop(const char *name, uint64_t offset, uint64_t length, void *local_host_addr, unsigned int src_index) "%s: @0x%" PRIx64 "/%" PRIu64 " host:@%p src_index: %u" 5604rdma_registration_handle_register(int requests) "%d requests" 5605rdma_registration_handle_register_loop(int req, int index, uint64_t addr, uint64_t chunks) "Registration request (%d): index %d, current_addr %" PRIu64 " chunks: %" PRIu64 5606rdma_registration_handle_register_rkey(int rkey) "0x%x" 5607rdma_registration_handle_unregister(int requests) "%d requests" 5608rdma_registration_handle_unregister_loop(int count, int index, uint64_t chunk) "Unregistration request (%d): index %d, chunk %" PRIu64 5609rdma_registration_handle_unregister_success(uint64_t chunk) "%" PRIu64 5610rdma_registration_handle_wait(void) "" 5611rdma_registration_start(uint64_t flags) "%" PRIu64 5612rdma_registration_stop(uint64_t flags) "%" PRIu64 5613rdma_registration_stop_ram(void) "" 5614rdma_start_incoming_migration(void) "" 5615rdma_start_incoming_migration_after_dest_init(void) "" 5616rdma_start_incoming_migration_after_rdma_listen(void) "" 5617rdma_start_outgoing_migration_after_rdma_connect(void) "" 5618rdma_start_outgoing_migration_after_rdma_source_init(void) "" 5619 5620# postcopy-ram.c 5621postcopy_discard_send_finish(const char *ramblock, int nwords, int ncmds) "%s mask words sent=%d in %d commands" 5622postcopy_discard_send_range(const char *ramblock, unsigned long start, unsigned long length) "%s:%lx/%lx" 5623postcopy_cleanup_range(const char *ramblock, void *host_addr, size_t offset, size_t length) "%s: %p offset=0x%zx length=0x%zx" 5624postcopy_init_range(const char *ramblock, void *host_addr, size_t offset, size_t length) "%s: %p offset=0x%zx length=0x%zx" 5625postcopy_nhp_range(const char *ramblock, void *host_addr, size_t offset, size_t length) "%s: %p offset=0x%zx length=0x%zx" 5626postcopy_place_page(void *host_addr) "host=%p" 5627postcopy_place_page_zero(void *host_addr) "host=%p" 5628postcopy_ram_enable_notify(void) "" 5629mark_postcopy_blocktime_begin(uint64_t addr, void *dd, uint32_t time, int cpu, int received) "addr: 0x%" PRIx64 ", dd: %p, time: %u, cpu: %d, already_received: %d" 5630mark_postcopy_blocktime_end(uint64_t addr, void *dd, uint32_t time, int affected_cpu) "addr: 0x%" PRIx64 ", dd: %p, time: %u, affected_cpu: %d" 5631postcopy_pause_fault_thread(void) "" 5632postcopy_pause_fault_thread_continued(void) "" 5633postcopy_pause_fast_load(void) "" 5634postcopy_pause_fast_load_continued(void) "" 5635postcopy_ram_fault_thread_entry(void) "" 5636postcopy_ram_fault_thread_exit(void) "" 5637postcopy_ram_fault_thread_fds_core(int baseufd, int quitfd) "ufd: %d quitfd: %d" 5638postcopy_ram_fault_thread_fds_extra(size_t index, const char *name, int fd) "%zd/%s: %d" 5639postcopy_ram_fault_thread_quit(void) "" 5640postcopy_ram_fault_thread_request(uint64_t hostaddr, const char *ramblock, size_t offset, uint32_t pid) "Request for HVA=0x%" PRIx64 " rb=%s offset=0x%zx pid=%u" 5641postcopy_ram_incoming_cleanup_closeuf(void) "" 5642postcopy_ram_incoming_cleanup_entry(void) "" 5643postcopy_ram_incoming_cleanup_exit(void) "" 5644postcopy_ram_incoming_cleanup_join(void) "" 5645postcopy_ram_incoming_cleanup_blocktime(uint64_t total) "total blocktime %" PRIu64 5646postcopy_request_shared_page(const char *sharer, const char *rb, uint64_t rb_offset) "for %s in %s offset 0x%"PRIx64 5647postcopy_request_shared_page_present(const char *sharer, const char *rb, uint64_t rb_offset) "%s already %s offset 0x%"PRIx64 5648postcopy_wake_shared(uint64_t client_addr, const char *rb) "at 0x%"PRIx64" in %s" 5649postcopy_page_req_del(void *addr, int count) "resolved page req %p total %d" 5650postcopy_preempt_tls_handshake(void) "" 5651postcopy_preempt_new_channel(void) "" 5652postcopy_preempt_thread_entry(void) "" 5653postcopy_preempt_thread_exit(void) "" 5654 5655get_mem_fault_cpu_index(int cpu, uint32_t pid) "cpu: %d, pid: %u" 5656 5657# exec.c 5658migration_exec_outgoing(const char *cmd) "cmd=%s" 5659migration_exec_incoming(const char *cmd) "cmd=%s" 5660 5661# fd.c 5662migration_fd_outgoing(int fd) "fd=%d" 5663migration_fd_incoming(int fd) "fd=%d" 5664 5665# file.c 5666migration_file_outgoing(const char *filename) "filename=%s" 5667migration_file_incoming(const char *filename) "filename=%s" 5668 5669# socket.c 5670migration_socket_incoming_accepted(void) "" 5671migration_socket_outgoing_connected(const char *hostname) "hostname=%s" 5672migration_socket_outgoing_error(const char *err) "error=%s" 5673 5674# tls.c 5675migration_tls_outgoing_handshake_start(const char *hostname) "hostname=%s" 5676migration_tls_outgoing_handshake_error(const char *err) "err=%s" 5677migration_tls_outgoing_handshake_complete(void) "" 5678migration_tls_incoming_handshake_start(void) "" 5679migration_tls_incoming_handshake_error(const char *err) "err=%s" 5680migration_tls_incoming_handshake_complete(void) "" 5681 5682# colo.c 5683colo_vm_state_change(const char *old, const char *new) "Change '%s' => '%s'" 5684colo_send_message(const char *msg) "Send '%s' message" 5685colo_receive_message(const char *msg) "Receive '%s' message" 5686 5687# colo-failover.c 5688colo_failover_set_state(const char *new_state) "new state %s" 5689 5690# block-dirty-bitmap.c 5691send_bitmap_header_enter(void) "" 5692send_bitmap_bits(uint32_t flags, uint64_t start_sector, uint32_t nr_sectors, uint64_t data_size) "flags: 0x%x, start_sector: %" PRIu64 ", nr_sectors: %" PRIu32 ", data_size: %" PRIu64 5693dirty_bitmap_save_iterate(int in_postcopy) "in postcopy: %d" 5694dirty_bitmap_save_complete_enter(void) "" 5695dirty_bitmap_save_complete_finish(void) "" 5696dirty_bitmap_state_pending(uint64_t pending) "pending %" PRIu64 5697dirty_bitmap_load_complete(void) "" 5698dirty_bitmap_load_bits_enter(uint64_t first_sector, uint32_t nr_sectors) "chunk: %" PRIu64 " %" PRIu32 5699dirty_bitmap_load_bits_zeroes(void) "" 5700dirty_bitmap_load_header(uint32_t flags) "flags 0x%x" 5701dirty_bitmap_load_enter(void) "" 5702dirty_bitmap_load_success(void) "" 5703 5704# dirtyrate.c 5705dirtyrate_set_state(const char *new_state) "new state %s" 5706query_dirty_rate_info(const char *new_state) "current state %s" 5707get_ramblock_vfn_hash(const char *idstr, uint64_t vfn, uint32_t hash) "ramblock name: %s, vfn: %"PRIu64 ", hash: %" PRIu32 5708calc_page_dirty_rate(const char *idstr, uint32_t new_hash, uint32_t old_hash) "ramblock name: %s, new hash: %" PRIu32 ", old hash: %" PRIu32 5709skip_sample_ramblock(const char *idstr, uint64_t ramblock_size) "ramblock name: %s, ramblock size: %" PRIu64 5710find_page_matched(const char *idstr) "ramblock %s addr or size changed" 5711dirtyrate_calculate(int64_t dirtyrate) "dirty rate: %" PRIi64 " MB/s" 5712dirtyrate_do_calculate_vcpu(int idx, uint64_t rate) "vcpu[%d]: %"PRIu64 " MB/s" 5713 5714# block.c 5715migration_block_init_shared(const char *blk_device_name) "Start migration for %s with shared base image" 5716migration_block_init_full(const char *blk_device_name) "Start full migration for %s" 5717migration_block_save_device_dirty(int64_t sector) "Error reading sector %" PRId64 5718migration_block_flush_blks(const char *action, int submitted, int read_done, int transferred) "%s submitted %d read_done %d transferred %d" 5719migration_block_save(const char *mig_stage, int submitted, int transferred) "Enter save live %s submitted %d transferred %d" 5720migration_block_save_complete(void) "Block migration completed" 5721migration_block_state_pending(uint64_t pending) "Enter save live pending %" PRIu64 5722migration_block_progression(unsigned percent) "Completed %u%%" 5723 5724# page_cache.c 5725migration_pagecache_init(int64_t max_num_items) "Setting cache buckets to %" PRId64 5726migration_pagecache_insert(void) "Error allocating page" 5727# See docs/devel/tracing.rst for syntax documentation. 5728 5729# announce.c 5730qemu_announce_self_iter(const char *id, const char *name, const char *mac, int skip) "%s:%s:%s skip: %d" 5731qemu_announce_timer_del(bool free_named, bool free_timer, char *id) "free named: %d free timer: %d id: %s" 5732 5733# vhost-user.c 5734vhost_user_event(const char *chr, int event) "chr: %s got event: %d" 5735 5736# colo.c 5737colo_proxy_main(const char *chr) ": %s" 5738colo_proxy_main_vnet_info(const char *sta, uint32_t vnet_hdr, int size) ": %s pkt->vnet_hdr_len = %u, pkt->size = %d" 5739 5740# colo-compare.c 5741colo_compare_main(const char *chr) ": %s" 5742colo_compare_drop_packet(const char *queue, const char *chr) ": %s: %s" 5743colo_compare_udp_miscompare(const char *sta, int size) ": %s = %d" 5744colo_compare_icmp_miscompare(const char *sta, int size) ": %s = %d" 5745colo_compare_ip_info(int psize, const char *sta, const char *stb, int ssize, const char *stc, const char *std) "ppkt size = %d, ip_src = %s, ip_dst = %s, spkt size = %d, ip_src = %s, ip_dst = %s" 5746colo_old_packet_check_found(int64_t old_time) "%" PRId64 5747colo_compare_tcp_info(const char *pkt, uint32_t seq, uint32_t ack, int hdlen, int pdlen, int offset, int flags) "%s: seq/ack= %u/%u hdlen= %d pdlen= %d offset= %d flags=%d" 5748 5749# filter-rewriter.c 5750colo_filter_rewriter_pkt_info(const char *func, const char *src, const char *dst, uint32_t seq, uint32_t ack, uint32_t flag) "%s: src/dst: %s/%s p: seq/ack=%u/%u flags=0x%x" 5751colo_filter_rewriter_conn_offset(uint32_t offset) ": offset=%u" 5752# See docs/devel/tracing.rst for syntax documentation. 5753 5754# balloon.c 5755# Since requests are raised via monitor, not many tracepoints are needed. 5756balloon_event(void *opaque, unsigned long addr) "opaque %p addr %lu" 5757 5758# ioport.c 5759cpu_in(unsigned int addr, char size, unsigned int val) "addr 0x%x(%c) value %u" 5760cpu_out(unsigned int addr, char size, unsigned int val) "addr 0x%x(%c) value %u" 5761 5762# memory.c 5763memory_region_ops_read(int cpu_index, void *mr, uint64_t addr, uint64_t value, unsigned size, const char *name) "cpu %d mr %p addr 0x%"PRIx64" value 0x%"PRIx64" size %u name '%s'" 5764memory_region_ops_write(int cpu_index, void *mr, uint64_t addr, uint64_t value, unsigned size, const char *name) "cpu %d mr %p addr 0x%"PRIx64" value 0x%"PRIx64" size %u name '%s'" 5765memory_region_subpage_read(int cpu_index, void *mr, uint64_t offset, uint64_t value, unsigned size) "cpu %d mr %p offset 0x%"PRIx64" value 0x%"PRIx64" size %u" 5766memory_region_subpage_write(int cpu_index, void *mr, uint64_t offset, uint64_t value, unsigned size) "cpu %d mr %p offset 0x%"PRIx64" value 0x%"PRIx64" size %u" 5767memory_region_ram_device_read(int cpu_index, void *mr, uint64_t addr, uint64_t value, unsigned size) "cpu %d mr %p addr 0x%"PRIx64" value 0x%"PRIx64" size %u" 5768memory_region_ram_device_write(int cpu_index, void *mr, uint64_t addr, uint64_t value, unsigned size) "cpu %d mr %p addr 0x%"PRIx64" value 0x%"PRIx64" size %u" 5769memory_region_sync_dirty(const char *mr, const char *listener, int global) "mr '%s' listener '%s' synced (global=%d)" 5770flatview_new(void *view, void *root) "%p (root %p)" 5771flatview_destroy(void *view, void *root) "%p (root %p)" 5772flatview_destroy_rcu(void *view, void *root) "%p (root %p)" 5773global_dirty_changed(unsigned int bitmask) "bitmask 0x%"PRIx32 5774 5775# cpus.c 5776vm_stop_flush_all(int ret) "ret %d" 5777 5778# vl.c 5779vm_state_notify(int running, int reason, const char *reason_str) "running %d reason %d (%s)" 5780load_file(const char *name, const char *path) "name %s location %s" 5781runstate_set(int current_state, const char *current_state_str, int new_state, const char *new_state_str) "current_run_state %d (%s) new_state %d (%s)" 5782system_wakeup_request(int reason) "reason=%d" 5783qemu_system_shutdown_request(int reason) "reason=%d" 5784qemu_system_powerdown_request(void) "" 5785 5786#dirtylimit.c 5787dirtylimit_state_initialize(int max_cpus) "dirtylimit state initialize: max cpus %d" 5788dirtylimit_state_finalize(void) 5789dirtylimit_throttle_pct(int cpu_index, uint64_t pct, int64_t time_us) "CPU[%d] throttle percent: %" PRIu64 ", throttle adjust time %"PRIi64 " us" 5790dirtylimit_set_vcpu(int cpu_index, uint64_t quota) "CPU[%d] set dirty page rate limit %"PRIu64 5791dirtylimit_vcpu_execute(int cpu_index, int64_t sleep_time_us) "CPU[%d] sleep %"PRIi64 " us" 5792# See docs/devel/tracing.rst for syntax documentation. 5793 5794# console.c 5795console_gfx_new(void) "" 5796console_gfx_reuse(int index) "%d" 5797console_gfx_close(int index) "%d" 5798console_putchar_csi(int esc_param0, int esc_param1, int ch, int nb_esc_params) "escape sequence CSI%d;%d%c, %d parameters" 5799console_putchar_unhandled(int ch) "unhandled escape character '%c'" 5800console_txt_new(int w, int h) "%dx%d" 5801console_select(int nr) "%d" 5802console_refresh(int interval) "interval %d ms" 5803displaysurface_create(int w, int h) "%dx%d" 5804displaysurface_create_from(void *display_surface, int w, int h, uint32_t format) "surface=%p, %dx%d, format 0x%x" 5805displaysurface_create_pixman(void *display_surface) "surface=%p" 5806displaysurface_free(void *display_surface) "surface=%p" 5807displaychangelistener_register(void *dcl, const char *name) "%p [ %s ]" 5808displaychangelistener_unregister(void *dcl, const char *name) "%p [ %s ]" 5809ppm_save(int fd, void *image) "fd=%d image=%p" 5810 5811# gtk-egl.c 5812# gtk-gl-area.c 5813# gtk.c 5814gd_switch(const char *tab, int width, int height) "tab=%s, width=%d, height=%d" 5815gd_update(const char *tab, int x, int y, int w, int h) "tab=%s, x=%d, y=%d, w=%d, h=%d" 5816gd_key_event(const char *tab, int gdk_keycode, int qkeycode, const char *action) "tab=%s, translated GDK keycode %d to QKeyCode %d (%s)" 5817gd_grab(const char *tab, const char *device, const char *reason) "tab=%s, dev=%s, reason=%s" 5818gd_ungrab(const char *tab, const char *device) "tab=%s, dev=%s" 5819gd_keymap_windowing(const char *name) "backend=%s" 5820gd_gl_area_create_context(void *ctx, int major, int minor) "ctx=%p, major=%d, minor=%d" 5821gd_gl_area_destroy_context(void *ctx, void *current_ctx) "ctx=%p, current_ctx=%p" 5822 5823# vnc-auth-sasl.c 5824# vnc-auth-vencrypt.c 5825# vnc-ws.c 5826# vnc.c 5827vnc_key_guest_leds(bool caps, bool num, bool scroll) "caps %d, num %d, scroll %d" 5828vnc_key_map_init(const char *layout) "%s" 5829vnc_key_event_ext(bool down, int sym, int keycode, const char *name) "down %d, sym 0x%x, keycode 0x%x [%s]" 5830vnc_key_event_map(bool down, int sym, int keycode, const char *name) "down %d, sym 0x%x -> keycode 0x%x [%s]" 5831vnc_key_sync_numlock(bool on) "%d" 5832vnc_key_sync_capslock(bool on) "%d" 5833vnc_msg_server_audio_begin(void *state, void *ioc) "VNC server msg audio begin state=%p ioc=%p" 5834vnc_msg_server_audio_end(void *state, void *ioc) "VNC server msg audio end state=%p ioc=%p" 5835vnc_msg_server_audio_data(void *state, void *ioc, const void *buf, size_t len) "VNC server msg audio data state=%p ioc=%p buf=%p len=%zd" 5836vnc_msg_server_desktop_resize(void *state, void *ioc, int width, int height) "VNC server msg ext resize state=%p ioc=%p size=%dx%d" 5837vnc_msg_server_ext_desktop_resize(void *state, void *ioc, int width, int height, int reason) "VNC server msg ext resize state=%p ioc=%p size=%dx%d reason=%d" 5838vnc_msg_client_audio_enable(void *state, void *ioc) "VNC client msg audio enable state=%p ioc=%p" 5839vnc_msg_client_audio_disable(void *state, void *ioc) "VNC client msg audio disable state=%p ioc=%p" 5840vnc_msg_client_audio_format(void *state, void *ioc, int fmt, int channels, int freq) "VNC client msg audio format state=%p ioc=%p fmt=%d channels=%d freq=%d" 5841vnc_msg_client_set_desktop_size(void *state, void *ioc, int width, int height, int screens) "VNC client msg set desktop size state=%p ioc=%p size=%dx%d screens=%d" 5842vnc_client_eof(void *state, void *ioc) "VNC client EOF state=%p ioc=%p" 5843vnc_client_io_error(void *state, void *ioc, const char *msg) "VNC client I/O error state=%p ioc=%p errmsg=%s" 5844vnc_client_connect(void *state, void *ioc) "VNC client connect state=%p ioc=%p" 5845vnc_client_disconnect_start(void *state, void *ioc) "VNC client disconnect start state=%p ioc=%p" 5846vnc_client_disconnect_finish(void *state, void *ioc) "VNC client disconnect finish state=%p ioc=%p" 5847vnc_client_io_wrap(void *state, void *ioc, const char *type) "VNC client I/O wrap state=%p ioc=%p type=%s" 5848vnc_client_throttle_threshold(void *state, void *ioc, size_t oldoffset, size_t offset, int client_width, int client_height, int bytes_per_pixel, void *audio_cap) "VNC client throttle threshold state=%p ioc=%p oldoffset=%zu newoffset=%zu width=%d height=%d bpp=%d audio=%p" 5849vnc_client_throttle_incremental(void *state, void *ioc, int job_update, size_t offset) "VNC client throttle incremental state=%p ioc=%p job-update=%d offset=%zu" 5850vnc_client_throttle_forced(void *state, void *ioc, int job_update, size_t offset) "VNC client throttle forced state=%p ioc=%p job-update=%d offset=%zu" 5851vnc_client_throttle_audio(void *state, void *ioc, size_t offset) "VNC client throttle audio state=%p ioc=%p offset=%zu" 5852vnc_client_unthrottle_forced(void *state, void *ioc) "VNC client unthrottle forced offset state=%p ioc=%p" 5853vnc_client_unthrottle_incremental(void *state, void *ioc, size_t offset) "VNC client unthrottle incremental state=%p ioc=%p offset=%zu" 5854vnc_client_output_limit(void *state, void *ioc, size_t offset, size_t threshold) "VNC client output limit state=%p ioc=%p offset=%zu threshold=%zu" 5855vnc_server_dpy_pageflip(void *dpy, int w, int h, int fmt) "VNC server dpy pageflip dpy=%p size=%dx%d fmt=%d" 5856vnc_server_dpy_recreate(void *dpy, int w, int h, int fmt) "VNC server dpy recreate dpy=%p size=%dx%d fmt=%d" 5857vnc_job_add_rect(void *state, void *job, int x, int y, int w, int h) "VNC add rect state=%p job=%p offset=%d,%d size=%dx%d" 5858vnc_job_discard_rect(void *state, void *job, int x, int y, int w, int h) "VNC job discard rect state=%p job=%p offset=%d,%d size=%dx%d" 5859vnc_job_clamp_rect(void *state, void *job, int x, int y, int w, int h) "VNC job clamp rect state=%p job=%p offset=%d,%d size=%dx%d" 5860vnc_job_clamped_rect(void *state, void *job, int x, int y, int w, int h) "VNC job clamp rect state=%p job=%p offset=%d,%d size=%dx%d" 5861vnc_job_nrects(void *state, void *job, int nrects) "VNC job state=%p job=%p nrects=%d" 5862vnc_auth_init(void *display, int websock, int auth, int subauth) "VNC auth init state=%p websock=%d auth=%d subauth=%d" 5863vnc_auth_start(void *state, int method) "VNC client auth start state=%p method=%d" 5864vnc_auth_pass(void *state, int method) "VNC client auth passed state=%p method=%d" 5865vnc_auth_fail(void *state, int method, const char *message, const char *reason) "VNC client auth failed state=%p method=%d message=%s reason=%s" 5866vnc_auth_reject(void *state, int expect, int got) "VNC client auth rejected state=%p method expected=%d got=%d" 5867vnc_auth_vencrypt_version(void *state, int major, int minor) "VNC client auth vencrypt version state=%p major=%d minor=%d" 5868vnc_auth_vencrypt_subauth(void *state, int auth) "VNC client auth vencrypt subauth state=%p auth=%d" 5869vnc_auth_sasl_mech_list(void *state, const char *mechs) "VNC client auth SASL state=%p mechlist=%s" 5870vnc_auth_sasl_mech_choose(void *state, const char *mech) "VNC client auth SASL state=%p mech=%s" 5871vnc_auth_sasl_start(void *state, const void *clientdata, size_t clientlen, const void *serverdata, size_t severlen, int ret) "VNC client auth SASL start state=%p clientdata=%p clientlen=%zu serverdata=%p serverlen=%zu ret=%d" 5872vnc_auth_sasl_step(void *state, const void *clientdata, size_t clientlen, const void *serverdata, size_t severlen, int ret) "VNC client auth SASL step state=%p clientdata=%p clientlen=%zu serverdata=%p serverlen=%zu ret=%d" 5873vnc_auth_sasl_ssf(void *state, int ssf) "VNC client auth SASL SSF state=%p size=%d" 5874vnc_auth_sasl_username(void *state, const char *name) "VNC client auth SASL user state=%p name=%s" 5875vnc_auth_sasl_acl(void *state, int allow) "VNC client auth SASL ACL state=%p allow=%d" 5876 5877 5878# input.c 5879input_event_key_number(int conidx, int number, const char *qcode, bool down) "con %d, key number 0x%x [%s], down %d" 5880input_event_key_qcode(int conidx, const char *qcode, bool down) "con %d, key qcode %s, down %d" 5881input_event_btn(int conidx, const char *btn, bool down) "con %d, button %s, down %d" 5882input_event_rel(int conidx, const char *axis, int value) "con %d, axis %s, value %d" 5883input_event_abs(int conidx, const char *axis, int value) "con %d, axis %s, value 0x%x" 5884input_event_mtt(int conidx, const char *axis, int value) "con %d, axis %s, value 0x%x" 5885input_event_sync(void) "" 5886 5887# sdl2-input.c 5888sdl2_process_key(int sdl_scancode, int qcode, const char *action) "translated SDL scancode %d to QKeyCode %d (%s)" 5889 5890# spice-display.c 5891qemu_spice_add_memslot(int qid, uint32_t slot_id, unsigned long virt_start, unsigned long virt_end, int async) "%d %u: host virt 0x%lx - 0x%lx async=%d" 5892qemu_spice_del_memslot(int qid, uint32_t gid, uint32_t slot_id) "%d gid=%u sid=%u" 5893qemu_spice_create_primary_surface(int qid, uint32_t sid, void *surface, int async) "%d sid=%u surface=%p async=%d" 5894qemu_spice_destroy_primary_surface(int qid, uint32_t sid, int async) "%d sid=%u async=%d" 5895qemu_spice_wakeup(uint32_t qid) "%d" 5896qemu_spice_create_update(uint32_t left, uint32_t right, uint32_t top, uint32_t bottom) "lr %d -> %d, tb -> %d -> %d" 5897qemu_spice_display_update(int qid, uint32_t x, uint32_t y, uint32_t w, uint32_t h) "%d +%d+%d %dx%d" 5898qemu_spice_display_surface(int qid, uint32_t w, uint32_t h, int fast) "%d %dx%d, fast %d" 5899qemu_spice_display_refresh(int qid, int notify) "%d notify %d" 5900qemu_spice_ui_info(int qid, uint32_t width, uint32_t height) "%d %dx%d" 5901 5902qemu_spice_gl_surface(int qid, uint32_t w, uint32_t h, uint32_t fourcc) "%d %dx%d, fourcc 0x%x" 5903qemu_spice_gl_scanout_disable(int qid) "%d" 5904qemu_spice_gl_scanout_texture(int qid, uint32_t w, uint32_t h, uint32_t fourcc) "%d %dx%d, fourcc 0x%x" 5905qemu_spice_gl_cursor(int qid, bool enabled, bool hotspot) "%d enabled %d, hotspot %d" 5906qemu_spice_gl_forward_dmabuf(int qid, uint32_t width, uint32_t height) "%d %dx%d" 5907qemu_spice_gl_render_dmabuf(int qid, uint32_t width, uint32_t height) "%d %dx%d" 5908qemu_spice_gl_update(int qid, uint32_t x, uint32_t y, uint32_t w, uint32_t h) "%d +%d+%d %dx%d" 5909 5910# keymaps.c 5911keymap_parse(const char *file) "file %s" 5912keymap_add(int sym, int code, const char *line) "sym=0x%04x code=0x%04x (line: %s)" 5913keymap_unmapped(int sym) "sym=0x%04x" 5914 5915# x_keymap.c 5916xkeymap_extension(const char *name) "extension '%s'" 5917xkeymap_vendor(const char *name) "vendor '%s'" 5918xkeymap_keycodes(const char *name) "keycodes '%s'" 5919xkeymap_keymap(const char *name) "keymap '%s'" 5920 5921# clipboard.c 5922clipboard_check_serial(int cur, int recv, bool ok) "cur:%d recv:%d %d" 5923 5924# vdagent.c 5925vdagent_open(void) "" 5926vdagent_close(void) "" 5927vdagent_disconnect(void) "" 5928vdagent_send(const char *name) "msg %s" 5929vdagent_send_empty_clipboard(void) "" 5930vdagent_recv_chunk(uint32_t size) "size %d" 5931vdagent_recv_msg(const char *name, uint32_t size) "msg %s, size %d" 5932vdagent_peer_cap(const char *name) "cap %s" 5933vdagent_cb_grab_selection(const char *name) "selection %s" 5934vdagent_cb_grab_discard(const char *name, int cur, int recv) "selection %s, cur:%d recv:%d" 5935vdagent_cb_grab_type(const char *name) "type %s" 5936vdagent_cb_serial_discard(uint32_t current, uint32_t received) "current=%u, received=%u" 5937 5938# dbus.c 5939dbus_registered_listener(const char *bus_name) "peer %s" 5940dbus_listener_vanished(const char *bus_name) "peer %s" 5941dbus_kbd_press(unsigned int keycode) "keycode %u" 5942dbus_kbd_release(unsigned int keycode) "keycode %u" 5943dbus_mouse_press(unsigned int button) "button %u" 5944dbus_mouse_release(unsigned int button) "button %u" 5945dbus_mouse_set_pos(unsigned int x, unsigned int y) "x=%u, y=%u" 5946dbus_mouse_rel_motion(int dx, int dy) "dx=%d, dy=%d" 5947dbus_touch_send_event(unsigned int kind, uint32_t num_slot, uint32_t x, uint32_t y) "kind=%u, num_slot=%u, x=%d, y=%d" 5948dbus_update(int x, int y, int w, int h) "x=%d, y=%d, w=%d, h=%d" 5949dbus_update_gl(int x, int y, int w, int h) "x=%d, y=%d, w=%d, h=%d" 5950dbus_clipboard_grab_failed(void) "" 5951dbus_clipboard_register(const char *bus_name) "peer %s" 5952dbus_clipboard_unregister(const char *bus_name) "peer %s" 5953dbus_scanout_texture(uint32_t tex_id, bool backing_y_0_top, uint32_t backing_width, uint32_t backing_height, uint32_t x, uint32_t y, uint32_t w, uint32_t h) "tex_id:%u y0top:%d back:%ux%u %u+%u-%ux%u" 5954dbus_gl_gfx_switch(void *p) "surf: %p" 5955 5956# egl-helpers.c 5957egl_init_d3d11_device(void *p) "d3d device: %p" 5958# multi-process trace events 5959 5960mpqemu_send_io_error(int cmd, int size, int nfds) "send command %d size %d, %d file descriptors to remote process" 5961mpqemu_recv_io_error(int cmd, int size, int nfds) "failed to receive %d size %d, %d file descriptors to remote process" 5962 5963# vfio-user-obj.c 5964vfu_prop(const char *prop, const char *val) "vfu: setting %s as %s" 5965vfu_cfg_read(uint32_t offset, uint32_t val) "vfu: cfg: 0x%x -> 0x%x" 5966vfu_cfg_write(uint32_t offset, uint32_t val) "vfu: cfg: 0x%x <- 0x%x" 5967vfu_dma_register(uint64_t gpa, size_t len) "vfu: registering GPA 0x%"PRIx64", %zu bytes" 5968vfu_dma_unregister(uint64_t gpa) "vfu: unregistering GPA 0x%"PRIx64"" 5969vfu_bar_register(int i, uint64_t addr, uint64_t size) "vfu: BAR %d: addr 0x%"PRIx64" size 0x%"PRIx64"" 5970vfu_bar_rw_enter(const char *op, uint64_t addr) "vfu: %s request for BAR address 0x%"PRIx64"" 5971vfu_bar_rw_exit(const char *op, uint64_t addr) "vfu: Finished %s of BAR address 0x%"PRIx64"" 5972vfu_interrupt(int pirq) "vfu: sending interrupt to device - PIRQ %d" 5973# See docs/devel/tracing.rst for syntax documentation. 5974 5975# TCG related tracing 5976# cpu-exec.c 5977exec_tb(void *tb, uintptr_t pc) "tb:%p pc=0x%"PRIxPTR 5978exec_tb_nocache(void *tb, uintptr_t pc) "tb:%p pc=0x%"PRIxPTR 5979exec_tb_exit(void *last_tb, unsigned int flags) "tb:%p flags=0x%x" 5980 5981# cputlb.c 5982memory_notdirty_write_access(uint64_t vaddr, uint64_t ram_addr, unsigned size) "0x%" PRIx64 " ram_addr 0x%" PRIx64 " size %u" 5983memory_notdirty_set_dirty(uint64_t vaddr) "0x%" PRIx64 5984 5985# translate-all.c 5986translate_block(void *tb, uintptr_t pc, const void *tb_code) "tb:%p, pc:0x%"PRIxPTR", tb_code:%p" 5987# loader.c 5988loader_write_rom(const char *name, uint64_t gpa, uint64_t size, bool isrom) "%s: @0x%"PRIx64" size=0x%"PRIx64" ROM=%d" 5989 5990# qdev.c 5991qdev_update_parent_bus(void *obj, const char *objtype, void *oldp, const char *oldptype, void *newp, const char *newptype) "obj=%p(%s) old_parent=%p(%s) new_parent=%p(%s)" 5992 5993# resettable.c 5994resettable_reset(void *obj, int cold) "obj=%p cold=%d" 5995resettable_reset_assert_begin(void *obj, int cold) "obj=%p cold=%d" 5996resettable_reset_assert_end(void *obj) "obj=%p" 5997resettable_reset_release_begin(void *obj, int cold) "obj=%p cold=%d" 5998resettable_reset_release_end(void *obj) "obj=%p" 5999resettable_change_parent(void *obj, void *o, unsigned oc, void *n, unsigned nc) "obj=%p from=%p(%d) to=%p(%d)" 6000resettable_phase_enter_begin(void *obj, const char *objtype, unsigned count, int type) "obj=%p(%s) count=%d type=%d" 6001resettable_phase_enter_exec(void *obj, const char *objtype, int type, int has_method) "obj=%p(%s) type=%d method=%d" 6002resettable_phase_enter_end(void *obj, const char *objtype, unsigned count) "obj=%p(%s) count=%d" 6003resettable_phase_hold_begin(void *obj, const char *objtype, unsigned count, int type) "obj=%p(%s) count=%d type=%d" 6004resettable_phase_hold_exec(void *obj, const char *objtype, int has_method) "obj=%p(%s) method=%d" 6005resettable_phase_hold_end(void *obj, const char *objtype, unsigned count) "obj=%p(%s) count=%d" 6006resettable_phase_exit_begin(void *obj, const char *objtype, unsigned count, int type) "obj=%p(%s) count=%d type=%d" 6007resettable_phase_exit_exec(void *obj, const char *objtype, int has_method) "obj=%p(%s) method=%d" 6008resettable_phase_exit_end(void *obj, const char *objtype, unsigned count) "obj=%p(%s) count=%d" 6009resettable_transitional_function(void *obj, const char *objtype) "obj=%p(%s)" 6010 6011# clock.c 6012clock_set_source(const char *clk, const char *src) "'%s', src='%s'" 6013clock_disconnect(const char *clk) "'%s'" 6014clock_set(const char *clk, uint64_t old, uint64_t new) "'%s', %"PRIu64"Hz->%"PRIu64"Hz" 6015clock_propagate(const char *clk) "'%s'" 6016clock_update(const char *clk, const char *src, uint64_t hz, int cb) "'%s', src='%s', val=%"PRIu64"Hz cb=%d" 6017clock_set_mul_div(const char *clk, uint32_t oldmul, uint32_t mul, uint32_t olddiv, uint32_t div) "'%s', mul: %u -> %u, div: %u -> %u" 6018 6019# cpu-common.c 6020cpu_reset(int cpu_index) "%d" 6021# See docs/devel/tracing.rst for syntax documentation. 6022 6023# helper.c 6024arm_gt_recalc(int timer, uint64_t nexttick) "gt recalc: timer %d next tick 0x%" PRIx64 6025arm_gt_recalc_disabled(int timer) "gt recalc: timer %d timer disabled" 6026arm_gt_cval_write(int timer, uint64_t value) "gt_cval_write: timer %d value 0x%" PRIx64 6027arm_gt_tval_write(int timer, uint64_t value) "gt_tval_write: timer %d value 0x%" PRIx64 6028arm_gt_ctl_write(int timer, uint64_t value) "gt_ctl_write: timer %d value 0x%" PRIx64 6029arm_gt_imask_toggle(int timer) "gt_ctl_write: timer %d IMASK toggle" 6030arm_gt_cntvoff_write(uint64_t value) "gt_cntvoff_write: value 0x%" PRIx64 6031arm_gt_update_irq(int timer, int irqstate) "gt_update_irq: timer %d irqstate %d" 6032 6033# kvm.c 6034kvm_arm_fixup_msi_route(uint64_t iova, uint64_t gpa) "MSI iova = 0x%"PRIx64" is translated into 0x%"PRIx64 6035hvf_unhandled_sysreg_read(uint64_t pc, uint32_t reg, uint32_t op0, uint32_t op1, uint32_t crn, uint32_t crm, uint32_t op2) "unhandled sysreg read at pc=0x%"PRIx64": 0x%08x (op0=%d op1=%d crn=%d crm=%d op2=%d)" 6036hvf_unhandled_sysreg_write(uint64_t pc, uint32_t reg, uint32_t op0, uint32_t op1, uint32_t crn, uint32_t crm, uint32_t op2) "unhandled sysreg write at pc=0x%"PRIx64": 0x%08x (op0=%d op1=%d crn=%d crm=%d op2=%d)" 6037hvf_inject_fiq(void) "injecting FIQ" 6038hvf_inject_irq(void) "injecting IRQ" 6039hvf_data_abort(uint64_t pc, uint64_t va, uint64_t pa, bool isv, bool iswrite, bool s1ptw, uint32_t len, uint32_t srt) "data abort: [pc=0x%"PRIx64" va=0x%016"PRIx64" pa=0x%016"PRIx64" isv=%d iswrite=%d s1ptw=%d len=%d srt=%d]" 6040hvf_sysreg_read(uint32_t reg, uint32_t op0, uint32_t op1, uint32_t crn, uint32_t crm, uint32_t op2, uint64_t val) "sysreg read 0x%08x (op0=%d op1=%d crn=%d crm=%d op2=%d) = 0x%016"PRIx64 6041hvf_sysreg_write(uint32_t reg, uint32_t op0, uint32_t op1, uint32_t crn, uint32_t crm, uint32_t op2, uint64_t val) "sysreg write 0x%08x (op0=%d op1=%d crn=%d crm=%d op2=%d, val=0x%016"PRIx64")" 6042hvf_unknown_hvc(uint64_t x0) "unknown HVC! 0x%016"PRIx64 6043hvf_unknown_smc(uint64_t x0) "unknown SMC! 0x%016"PRIx64 6044hvf_exit(uint64_t syndrome, uint32_t ec, uint64_t pc) "exit: 0x%"PRIx64" [ec=0x%x pc=0x%"PRIx64"]" 6045hvf_psci_call(uint64_t x0, uint64_t x1, uint64_t x2, uint64_t x3, uint32_t cpuid) "PSCI Call x0=0x%016"PRIx64" x1=0x%016"PRIx64" x2=0x%016"PRIx64" x3=0x%016"PRIx64" cpu=0x%x" 6046hvf_vgic_write(const char *name, uint64_t val) "vgic write to %s [val=0x%016"PRIx64"]" 6047hvf_vgic_read(const char *name, uint64_t val) "vgic read from %s [val=0x%016"PRIx64"]" 6048# See docs/devel/tracing.rst for syntax documentation. 6049 6050# mem_helper.c 6051disable hppa_tlb_flush_ent(void *env, void *ent, uint64_t va_b, uint64_t va_e, uint64_t pa) "env=%p ent=%p va_b=0x%lx va_e=0x%lx pa=0x%lx" 6052disable hppa_tlb_find_entry(void *env, void *ent, int valid, uint64_t va_b, uint64_t va_e, uint64_t pa) "env=%p ent=%p valid=%d va_b=0x%lx va_e=0x%lx pa=0x%lx" 6053disable hppa_tlb_find_entry_not_found(void *env, uint64_t addr) "env=%p addr=%08lx" 6054disable hppa_tlb_get_physical_address(void *env, int ret, int prot, uint64_t addr, uint64_t phys) "env=%p ret=%d prot=%d addr=0x%lx phys=0x%lx" 6055disable hppa_tlb_fill_excp(void *env, uint64_t addr, int size, int type, int mmu_idx) "env=%p addr=0x%lx size=%d type=%d mmu_idx=%d" 6056disable hppa_tlb_fill_success(void *env, uint64_t addr, uint64_t phys, int size, int type, int mmu_idx) "env=%p addr=0x%lx phys=0x%lx size=%d type=%d mmu_idx=%d" 6057disable hppa_tlb_itlba(void *env, void *ent, uint64_t va_b, uint64_t va_e, uint64_t pa) "env=%p ent=%p va_b=0x%lx va_e=0x%lx pa=0x%lx" 6058disable hppa_tlb_itlbp(void *env, void *ent, int access_id, int u, int pl2, int pl1, int type, int b, int d, int t) "env=%p ent=%p access_id=%x u=%d pl2=%d pl1=%d type=%d b=%d d=%d t=%d" 6059disable hppa_tlb_ptlb(void *env) "env=%p" 6060disable hppa_tlb_ptlb_local(void *env) "env=%p" 6061disable hppa_tlb_ptlbe(void *env) "env=%p" 6062disable hppa_tlb_lpa_success(void *env, uint64_t addr, uint64_t phys) "env=%p addr=0x%lx phys=0x%lx" 6063disable hppa_tlb_lpa_failed(void *env, uint64_t addr) "env=%p addr=0x%lx" 6064 6065# op_helper.c 6066disable hppa_tlb_probe(uint64_t addr, int level, int want) "addr=0x%lx level=%d want=%d" 6067# See docs/devel/tracing.rst for syntax documentation. 6068 6069# sev.c 6070kvm_sev_init(void) "" 6071kvm_memcrypt_register_region(void *addr, size_t len) "addr %p len 0x%zx" 6072kvm_memcrypt_unregister_region(void *addr, size_t len) "addr %p len 0x%zx" 6073kvm_sev_change_state(const char *old, const char *new) "%s -> %s" 6074kvm_sev_launch_start(int policy, void *session, void *pdh) "policy 0x%x session %p pdh %p" 6075kvm_sev_launch_update_data(void *addr, uint64_t len) "addr %p len 0x%" PRIx64 6076kvm_sev_launch_measurement(const char *value) "data %s" 6077kvm_sev_launch_finish(void) "" 6078kvm_sev_launch_secret(uint64_t hpa, uint64_t hva, uint64_t secret, int len) "hpa 0x%" PRIx64 " hva 0x%" PRIx64 " data 0x%" PRIx64 " len %d" 6079kvm_sev_attestation_report(const char *mnonce, const char *data) "mnonce %s data %s" 6080# See docs/devel/tracing.rst for syntax documentation. 6081 6082# kvm.c 6083kvm_x86_fixup_msi_error(uint32_t gsi) "VT-d failed to remap interrupt for GSI %" PRIu32 6084kvm_x86_add_msi_route(int virq) "Adding route entry for virq %d" 6085kvm_x86_remove_msi_route(int virq) "Removing route entry for virq %d" 6086kvm_x86_update_msi_routes(int num) "Updated %d MSI routes" 6087 6088# xen-emu.c 6089kvm_xen_hypercall(int cpu, uint8_t cpl, uint64_t input, uint64_t a0, uint64_t a1, uint64_t a2, uint64_t ret) "xen_hypercall: cpu %d cpl %d input %" PRIu64 " a0 0x%" PRIx64 " a1 0x%" PRIx64 " a2 0x%" PRIx64" ret 0x%" PRIx64 6090kvm_xen_soft_reset(void) "" 6091kvm_xen_set_shared_info(uint64_t gfn) "shared info at gfn 0x%" PRIx64 6092kvm_xen_set_vcpu_attr(int cpu, int type, uint64_t gpa) "vcpu attr cpu %d type %d gpa 0x%" PRIx64 6093kvm_xen_set_vcpu_callback(int cpu, int vector) "callback vcpu %d vector %d" 6094# See docs/devel/tracing.rst for syntax documentation. 6095 6096# translate.c 6097mips_translate_c0(const char *instr, const char *rn, int reg, int sel) "%s %s (reg %d sel %d)" 6098mips_translate_tr(const char *instr, int rt, int u, int sel, int h) "%s (reg %d u %d sel %d h %d)" 6099# mmu.c 6100nios2_mmu_translate_miss(uint32_t vaddr, uint32_t pid, uint32_t index, uint32_t tag) "mmu_translate: MISS vaddr=0x%08x pid=%u TLB[%u] tag=0x%08x" 6101nios2_mmu_translate_hit(uint32_t vaddr, uint32_t pid, uint32_t index, uint32_t paddr, uint32_t prot) "mmu_translate: HIT vaddr=0x%08x pid=%u TLB[%u] paddr=0x%08x prot=0x%x" 6102 6103nios2_mmu_flush_pid_miss(uint32_t pid, uint32_t index, uint32_t vaddr) "mmu_flush: MISS pid=%u TLB[%u] tag=0x%08x" 6104nios2_mmu_flush_pid_hit(uint32_t pid, uint32_t index, uint32_t vaddr) "mmu_flush: HIT pid=%u TLB[%u] vaddr=0x%08x" 6105 6106nios2_mmu_write_tlbacc(uint32_t ig, char c, char r, char w, char x, char g, uint32_t pfn) "mmu_write_tlbacc: ig=0x%02x flags=%c%c%c%c%c pfn=0x%08x" 6107nios2_mmu_write_tlbmisc(uint32_t way, char r, char w, char t, char b, char p, char d, uint32_t pid) "mmu_write_tlbmisc: way=0x%x flags=%c%c%c%c%c%c pid=%u" 6108nios2_mmu_write_pteaddr(uint32_t ptb, uint32_t vpn) "mmu_write_pteaddr: ptbase=0x%03x vpn=0x%05x" 6109# See docs/devel/tracing.rst for syntax documentation. 6110 6111# kvm.c 6112kvm_failed_spr_set(int spr, const char *msg) "Warning: Unable to set SPR %d to KVM: %s" 6113kvm_failed_spr_get(int spr, const char *msg) "Warning: Unable to retrieve SPR %d from KVM: %s" 6114kvm_failed_fpscr_set(const char *msg) "Unable to set FPSCR to KVM: %s" 6115kvm_failed_fp_set(const char *fpname, int fpnum, const char *msg) "Unable to set %s%d to KVM: %s" 6116kvm_failed_vscr_set(const char *msg) "Unable to set VSCR to KVM: %s" 6117kvm_failed_vr_set(int vr, const char *msg) "Unable to set VR%d to KVM: %s" 6118kvm_failed_fpscr_get(const char *msg) "Unable to get FPSCR from KVM: %s" 6119kvm_failed_fp_get(const char *fpname, int fpnum, const char *msg) "Unable to get %s%d from KVM: %s" 6120kvm_failed_vscr_get(const char *msg) "Unable to get VSCR from KVM: %s" 6121kvm_failed_vr_get(int vr, const char *msg) "Unable to get VR%d from KVM: %s" 6122kvm_failed_vpa_addr_get(const char *msg) "Unable to get VPA address from KVM: %s" 6123kvm_failed_slb_get(const char *msg) "Unable to get SLB shadow state from KVM: %s" 6124kvm_failed_dtl_get(const char *msg) "Unable to get dispatch trace log state from KVM: %s" 6125kvm_failed_vpa_addr_set(const char *msg) "Unable to set VPA address to KVM: %s" 6126kvm_failed_slb_set(const char *msg) "Unable to set SLB shadow state to KVM: %s" 6127kvm_failed_dtl_set(const char *msg) "Unable to set dispatch trace log state to KVM: %s" 6128kvm_failed_null_vpa_addr_set(const char *msg) "Unable to set VPA address to KVM: %s" 6129kvm_failed_put_vpa(void) "Warning: Unable to set VPA information to KVM" 6130kvm_failed_get_vpa(void) "Warning: Unable to get VPA information from KVM" 6131kvm_handle_dcr_write(void) "handle dcr write" 6132kvm_handle_dcr_read(void) "handle dcr read" 6133kvm_handle_halt(void) "handle halt" 6134kvm_handle_papr_hcall(uint64_t hcall) "0x%" PRIx64 6135kvm_handle_epr(void) "handle epr" 6136kvm_handle_watchdog_expiry(void) "handle watchdog expiry" 6137kvm_handle_debug_exception(void) "handle debug exception" 6138kvm_handle_nmi_exception(void) "handle NMI exception" 6139 6140# excp_helper.c 6141ppc_excp_rfi(uint64_t nip, uint64_t msr) "Return from exception at 0x%" PRIx64 " with flags 0x%016" PRIx64 6142ppc_excp_dsi(uint64_t dsisr, uint64_t dar) "DSI exception: DSISR=0x%" PRIx64 " DAR=0x%" PRIx64 6143ppc_excp_isi(uint64_t msr, uint64_t nip) "ISI exception: msr=0x%016" PRIx64 " nip=0x%" PRIx64 6144ppc_excp_fp_ignore(void) "Ignore floating point exception" 6145ppc_excp_inval(uint64_t nip) "Invalid instruction at 0x%" PRIx64 6146ppc_excp_print(const char *excp) "%s exception" 6147# cpu_helper.c 6148riscv_trap(uint64_t hartid, bool async, uint64_t cause, uint64_t epc, uint64_t tval, const char *desc) "hart:%"PRId64", async:%d, cause:%"PRId64", epc:0x%"PRIx64", tval:0x%"PRIx64", desc=%s" 6149 6150# pmp.c 6151pmpcfg_csr_read(uint64_t mhartid, uint32_t reg_index, uint64_t val) "hart %" PRIu64 ": read reg%" PRIu32", val: 0x%" PRIx64 6152pmpcfg_csr_write(uint64_t mhartid, uint32_t reg_index, uint64_t val) "hart %" PRIu64 ": write reg%" PRIu32", val: 0x%" PRIx64 6153pmpaddr_csr_read(uint64_t mhartid, uint32_t addr_index, uint64_t val) "hart %" PRIu64 ": read addr%" PRIu32", val: 0x%" PRIx64 6154pmpaddr_csr_write(uint64_t mhartid, uint32_t addr_index, uint64_t val) "hart %" PRIu64 ": write addr%" PRIu32", val: 0x%" PRIx64 6155 6156mseccfg_csr_read(uint64_t mhartid, uint64_t val) "hart %" PRIu64 ": read mseccfg, val: 0x%" PRIx64 6157mseccfg_csr_write(uint64_t mhartid, uint64_t val) "hart %" PRIu64 ": write mseccfg, val: 0x%" PRIx64 6158# See docs/devel/tracing.rst for syntax documentation. 6159 6160# mmu_helper.c 6161get_skeys_nonzero(int rc) "SKEY: Call to get_skeys unexpectedly returned %d" 6162set_skeys_nonzero(int rc) "SKEY: Call to set_skeys unexpectedly returned %d" 6163 6164# ioinst.c 6165ioinst(const char *insn) "IOINST: %s" 6166ioinst_sch_id(const char *insn, int cssid, int ssid, int schid) "IOINST: %s (%x.%x.%04x)" 6167ioinst_chp_id(const char *insn, int cssid, int chpid) "IOINST: %s (%x.%02x)" 6168ioinst_chsc_cmd(uint16_t cmd, uint16_t len) "IOINST: chsc command 0x%04x, len 0x%04x" 6169 6170# cpu-sysemu.c 6171cpu_set_state(int cpu_index, uint8_t state) "setting cpu %d state to %" PRIu8 6172cpu_halt(int cpu_index) "halting cpu %d" 6173cpu_unhalt(int cpu_index) "unhalting cpu %d" 6174 6175# sigp.c 6176sigp_finished(uint8_t order, int cpu_index, int dst_index, int cc) "SIGP: Finished order %u on cpu %d -> cpu %d with cc=%d" 6177# See docs/devel/tracing.rst for syntax documentation. 6178 6179# kvm.c 6180kvm_enable_cmma(int rc) "CMMA: enabling with result code %d" 6181kvm_clear_cmma(int rc) "CMMA: clearing with result code %d" 6182kvm_failed_cpu_state_set(int cpu_index, uint8_t state, const char *msg) "Warning: Unable to set cpu %d state %" PRIu8 " to KVM: %s" 6183kvm_assign_subch_ioeventfd(int fd, uint32_t addr, bool assign, int datamatch) "fd: %d sch: @0x%x assign: %d vq: %d" 6184 6185kvm_sw_breakpoint(uint32_t n) "KVM: will use %d-byte sw breakpoints" 6186kvm_insn_unhandled_priv(uint32_t x) "KVM: unhandled PRIV: 0x%x" 6187kvm_insn_diag(uint32_t x) "KVM: unknown DIAG: 0x%x" 6188kvm_insn(uint32_t ipa, uint32_t ipb) "handle_instruction 0x%x 0x%x" 6189kvm_intercept(uint32_t icpt_code, uint64_t psw_addr) "intercept: 0x%x (at 0x%"PRIx64"lx)" 6190kvm_msi_route_fixup(const char* msg) "%s" 6191# See docs/devel/tracing.rst for syntax documentation. 6192 6193# mmu_helper.c 6194mmu_helper_dfault(uint64_t address, uint64_t context, int mmu_idx, uint32_t tl) "DFAULT at 0x%"PRIx64" context 0x%"PRIx64" mmu_idx=%d tl=%d" 6195mmu_helper_dprot(uint64_t address, uint64_t context, int mmu_idx, uint32_t tl) "DPROT at 0x%"PRIx64" context 0x%"PRIx64" mmu_idx=%d tl=%d" 6196mmu_helper_dmiss(uint64_t address, uint64_t context) "DMISS at 0x%"PRIx64" context 0x%"PRIx64 6197mmu_helper_tfault(uint64_t address, uint64_t context) "TFAULT at 0x%"PRIx64" context 0x%"PRIx64 6198mmu_helper_tmiss(uint64_t address, uint64_t context) "TMISS at 0x%"PRIx64" context 0x%"PRIx64 6199mmu_helper_get_phys_addr_code(uint32_t tl, int mmu_idx, uint64_t prim_context, uint64_t sec_context, uint64_t address) "tl=%d mmu_idx=%d primary context=0x%"PRIx64" secondary context=0x%"PRIx64" address=0x%"PRIx64 6200mmu_helper_get_phys_addr_data(uint32_t tl, int mmu_idx, uint64_t prim_context, uint64_t sec_context, uint64_t address) "tl=%d mmu_idx=%d primary context=0x%"PRIx64" secondary context=0x%"PRIx64" address=0x%"PRIx64 6201mmu_helper_mmu_fault(uint64_t address, uint64_t paddr, int mmu_idx, uint32_t tl, uint64_t prim_context, uint64_t sec_context) "Translate at 0x%"PRIx64" -> 0x%"PRIx64", mmu_idx=%d tl=%d primary context=0x%"PRIx64" secondary context=0x%"PRIx64 6202 6203# int32_helper.c 6204sun4m_cpu_interrupt(unsigned int level) "Set CPU IRQ %d" 6205sun4m_cpu_reset_interrupt(unsigned int level) "Reset CPU IRQ %d" 6206 6207# int64_helper.c 6208int_helper_set_softint(uint32_t softint) "new 0x%08x" 6209int_helper_clear_softint(uint32_t softint) "new 0x%08x" 6210int_helper_write_softint(uint32_t softint) "new 0x%08x" 6211sparc64_cpu_check_irqs_reset_irq(int intno) "Reset CPU IRQ (current interrupt 0x%x)" 6212sparc64_cpu_check_irqs_noset_irq(uint32_t tl, uint32_t tt, int intno) "Not setting CPU IRQ: TL=%d current 0x%x >= pending 0x%x" 6213sparc64_cpu_check_irqs_set_irq(unsigned int i, int old, int new) "Set CPU IRQ %d old=0x%x new=0x%x" 6214sparc64_cpu_check_irqs_disabled(uint32_t pil, uint32_t pil_in, uint32_t softint, int intno) "Interrupts disabled, pil=0x%08x pil_in=0x%08x softint=0x%08x current interrupt 0x%x" 6215 6216# win_helper.c 6217win_helper_gregset_error(uint32_t pstate) "ERROR in get_gregset: active pstate bits=0x%x" 6218win_helper_switch_pstate(uint32_t pstate_regs, uint32_t new_pstate_regs) "change_pstate: switching regs old=0x%x new=0x%x" 6219win_helper_no_switch_pstate(uint32_t new_pstate_regs) "change_pstate: regs new=0x%x (unchanged)" 6220win_helper_wrpil(uint32_t psrpil, uint32_t new_pil) "old=0x%x new=0x%x" 6221win_helper_done(uint32_t tl) "tl=%d" 6222win_helper_retry(uint32_t tl) "tl=%d" 6223# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY 6224 6225# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY 6226 6227qmp_enter_query_pr_managers(const char *json) "%s" 6228qmp_exit_query_pr_managers(const char *result, bool succeeded) "%s %d" 6229qmp_enter_eject(const char *json) "%s" 6230qmp_exit_eject(const char *result, bool succeeded) "%s %d" 6231qmp_enter_blockdev_open_tray(const char *json) "%s" 6232qmp_exit_blockdev_open_tray(const char *result, bool succeeded) "%s %d" 6233qmp_enter_blockdev_close_tray(const char *json) "%s" 6234qmp_exit_blockdev_close_tray(const char *result, bool succeeded) "%s %d" 6235qmp_enter_blockdev_remove_medium(const char *json) "%s" 6236qmp_exit_blockdev_remove_medium(const char *result, bool succeeded) "%s %d" 6237qmp_enter_blockdev_insert_medium(const char *json) "%s" 6238qmp_exit_blockdev_insert_medium(const char *result, bool succeeded) "%s %d" 6239qmp_enter_blockdev_change_medium(const char *json) "%s" 6240qmp_exit_blockdev_change_medium(const char *result, bool succeeded) "%s %d" 6241qmp_enter_block_set_io_throttle(const char *json) "%s" 6242qmp_exit_block_set_io_throttle(const char *result, bool succeeded) "%s %d" 6243qmp_enter_block_latency_histogram_set(const char *json) "%s" 6244qmp_exit_block_latency_histogram_set(const char *result, bool succeeded) "%s %d" 6245# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY 6246 6247qmp_enter_query_block(const char *json) "%s" 6248qmp_exit_query_block(const char *result, bool succeeded) "%s %d" 6249qmp_enter_query_blockstats(const char *json) "%s" 6250qmp_exit_query_blockstats(const char *result, bool succeeded) "%s %d" 6251qmp_enter_query_block_jobs(const char *json) "%s" 6252qmp_exit_query_block_jobs(const char *result, bool succeeded) "%s %d" 6253qmp_enter_block_resize(const char *json) "%s" 6254qmp_exit_block_resize(const char *result, bool succeeded) "%s %d" 6255qmp_enter_blockdev_snapshot_sync(const char *json) "%s" 6256qmp_exit_blockdev_snapshot_sync(const char *result, bool succeeded) "%s %d" 6257qmp_enter_blockdev_snapshot(const char *json) "%s" 6258qmp_exit_blockdev_snapshot(const char *result, bool succeeded) "%s %d" 6259qmp_enter_change_backing_file(const char *json) "%s" 6260qmp_exit_change_backing_file(const char *result, bool succeeded) "%s %d" 6261qmp_enter_block_commit(const char *json) "%s" 6262qmp_exit_block_commit(const char *result, bool succeeded) "%s %d" 6263qmp_enter_drive_backup(const char *json) "%s" 6264qmp_exit_drive_backup(const char *result, bool succeeded) "%s %d" 6265qmp_enter_blockdev_backup(const char *json) "%s" 6266qmp_exit_blockdev_backup(const char *result, bool succeeded) "%s %d" 6267qmp_enter_query_named_block_nodes(const char *json) "%s" 6268qmp_exit_query_named_block_nodes(const char *result, bool succeeded) "%s %d" 6269qmp_enter_x_debug_query_block_graph(const char *json) "%s" 6270qmp_exit_x_debug_query_block_graph(const char *result, bool succeeded) "%s %d" 6271qmp_enter_drive_mirror(const char *json) "%s" 6272qmp_exit_drive_mirror(const char *result, bool succeeded) "%s %d" 6273qmp_enter_block_dirty_bitmap_add(const char *json) "%s" 6274qmp_exit_block_dirty_bitmap_add(const char *result, bool succeeded) "%s %d" 6275qmp_enter_block_dirty_bitmap_remove(const char *json) "%s" 6276qmp_exit_block_dirty_bitmap_remove(const char *result, bool succeeded) "%s %d" 6277qmp_enter_block_dirty_bitmap_clear(const char *json) "%s" 6278qmp_exit_block_dirty_bitmap_clear(const char *result, bool succeeded) "%s %d" 6279qmp_enter_block_dirty_bitmap_enable(const char *json) "%s" 6280qmp_exit_block_dirty_bitmap_enable(const char *result, bool succeeded) "%s %d" 6281qmp_enter_block_dirty_bitmap_disable(const char *json) "%s" 6282qmp_exit_block_dirty_bitmap_disable(const char *result, bool succeeded) "%s %d" 6283qmp_enter_block_dirty_bitmap_merge(const char *json) "%s" 6284qmp_exit_block_dirty_bitmap_merge(const char *result, bool succeeded) "%s %d" 6285qmp_enter_x_debug_block_dirty_bitmap_sha256(const char *json) "%s" 6286qmp_exit_x_debug_block_dirty_bitmap_sha256(const char *result, bool succeeded) "%s %d" 6287qmp_enter_blockdev_mirror(const char *json) "%s" 6288qmp_exit_blockdev_mirror(const char *result, bool succeeded) "%s %d" 6289qmp_enter_block_stream(const char *json) "%s" 6290qmp_exit_block_stream(const char *result, bool succeeded) "%s %d" 6291qmp_enter_block_job_set_speed(const char *json) "%s" 6292qmp_exit_block_job_set_speed(const char *result, bool succeeded) "%s %d" 6293qmp_enter_block_job_cancel(const char *json) "%s" 6294qmp_exit_block_job_cancel(const char *result, bool succeeded) "%s %d" 6295qmp_enter_block_job_pause(const char *json) "%s" 6296qmp_exit_block_job_pause(const char *result, bool succeeded) "%s %d" 6297qmp_enter_block_job_resume(const char *json) "%s" 6298qmp_exit_block_job_resume(const char *result, bool succeeded) "%s %d" 6299qmp_enter_block_job_complete(const char *json) "%s" 6300qmp_exit_block_job_complete(const char *result, bool succeeded) "%s %d" 6301qmp_enter_block_job_dismiss(const char *json) "%s" 6302qmp_exit_block_job_dismiss(const char *result, bool succeeded) "%s %d" 6303qmp_enter_block_job_finalize(const char *json) "%s" 6304qmp_exit_block_job_finalize(const char *result, bool succeeded) "%s %d" 6305qmp_enter_block_job_change(const char *json) "%s" 6306qmp_exit_block_job_change(const char *result, bool succeeded) "%s %d" 6307qmp_enter_blockdev_add(const char *json) "%s" 6308qmp_exit_blockdev_add(const char *result, bool succeeded) "%s %d" 6309qmp_enter_blockdev_reopen(const char *json) "%s" 6310qmp_exit_blockdev_reopen(const char *result, bool succeeded) "%s %d" 6311qmp_enter_blockdev_del(const char *json) "%s" 6312qmp_exit_blockdev_del(const char *result, bool succeeded) "%s %d" 6313qmp_enter_blockdev_create(const char *json) "%s" 6314qmp_exit_blockdev_create(const char *result, bool succeeded) "%s %d" 6315qmp_enter_x_blockdev_amend(const char *json) "%s" 6316qmp_exit_x_blockdev_amend(const char *result, bool succeeded) "%s %d" 6317qmp_enter_block_set_write_threshold(const char *json) "%s" 6318qmp_exit_block_set_write_threshold(const char *result, bool succeeded) "%s %d" 6319qmp_enter_x_blockdev_change(const char *json) "%s" 6320qmp_exit_x_blockdev_change(const char *result, bool succeeded) "%s %d" 6321qmp_enter_x_blockdev_set_iothread(const char *json) "%s" 6322qmp_exit_x_blockdev_set_iothread(const char *result, bool succeeded) "%s %d" 6323qmp_enter_blockdev_snapshot_internal_sync(const char *json) "%s" 6324qmp_exit_blockdev_snapshot_internal_sync(const char *result, bool succeeded) "%s %d" 6325qmp_enter_blockdev_snapshot_delete_internal_sync(const char *json) "%s" 6326qmp_exit_blockdev_snapshot_delete_internal_sync(const char *result, bool succeeded) "%s %d" 6327# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY 6328 6329qmp_enter_nbd_server_start(const char *json) "%s" 6330qmp_exit_nbd_server_start(const char *result, bool succeeded) "%s %d" 6331qmp_enter_nbd_server_add(const char *json) "%s" 6332qmp_exit_nbd_server_add(const char *result, bool succeeded) "%s %d" 6333qmp_enter_nbd_server_remove(const char *json) "%s" 6334qmp_exit_nbd_server_remove(const char *result, bool succeeded) "%s %d" 6335qmp_enter_nbd_server_stop(const char *json) "%s" 6336qmp_exit_nbd_server_stop(const char *result, bool succeeded) "%s %d" 6337qmp_enter_block_export_add(const char *json) "%s" 6338qmp_exit_block_export_add(const char *result, bool succeeded) "%s %d" 6339qmp_enter_block_export_del(const char *json) "%s" 6340qmp_exit_block_export_del(const char *result, bool succeeded) "%s %d" 6341qmp_enter_query_block_exports(const char *json) "%s" 6342qmp_exit_query_block_exports(const char *result, bool succeeded) "%s %d" 6343# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY 6344 6345qmp_enter_query_chardev(const char *json) "%s" 6346qmp_exit_query_chardev(const char *result, bool succeeded) "%s %d" 6347qmp_enter_query_chardev_backends(const char *json) "%s" 6348qmp_exit_query_chardev_backends(const char *result, bool succeeded) "%s %d" 6349qmp_enter_ringbuf_write(const char *json) "%s" 6350qmp_exit_ringbuf_write(const char *result, bool succeeded) "%s %d" 6351qmp_enter_ringbuf_read(const char *json) "%s" 6352qmp_exit_ringbuf_read(const char *result, bool succeeded) "%s %d" 6353qmp_enter_chardev_add(const char *json) "%s" 6354qmp_exit_chardev_add(const char *result, bool succeeded) "%s %d" 6355qmp_enter_chardev_change(const char *json) "%s" 6356qmp_exit_chardev_change(const char *result, bool succeeded) "%s %d" 6357qmp_enter_chardev_remove(const char *json) "%s" 6358qmp_exit_chardev_remove(const char *result, bool succeeded) "%s %d" 6359qmp_enter_chardev_send_break(const char *json) "%s" 6360qmp_exit_chardev_send_break(const char *result, bool succeeded) "%s %d" 6361# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY 6362 6363# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY 6364 6365# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY 6366 6367qmp_enter_qmp_capabilities(const char *json) "%s" 6368qmp_exit_qmp_capabilities(const char *result, bool succeeded) "%s %d" 6369qmp_enter_query_version(const char *json) "%s" 6370qmp_exit_query_version(const char *result, bool succeeded) "%s %d" 6371qmp_enter_query_commands(const char *json) "%s" 6372qmp_exit_query_commands(const char *result, bool succeeded) "%s %d" 6373qmp_enter_quit(const char *json) "%s" 6374qmp_exit_quit(const char *result, bool succeeded) "%s %d" 6375# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY 6376 6377# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY 6378 6379qmp_enter_cxl_inject_general_media_event(const char *json) "%s" 6380qmp_exit_cxl_inject_general_media_event(const char *result, bool succeeded) "%s %d" 6381qmp_enter_cxl_inject_dram_event(const char *json) "%s" 6382qmp_exit_cxl_inject_dram_event(const char *result, bool succeeded) "%s %d" 6383qmp_enter_cxl_inject_memory_module_event(const char *json) "%s" 6384qmp_exit_cxl_inject_memory_module_event(const char *result, bool succeeded) "%s %d" 6385qmp_enter_cxl_inject_poison(const char *json) "%s" 6386qmp_exit_cxl_inject_poison(const char *result, bool succeeded) "%s %d" 6387qmp_enter_cxl_inject_uncorrectable_errors(const char *json) "%s" 6388qmp_exit_cxl_inject_uncorrectable_errors(const char *result, bool succeeded) "%s %d" 6389qmp_enter_cxl_inject_correctable_error(const char *json) "%s" 6390qmp_exit_cxl_inject_correctable_error(const char *result, bool succeeded) "%s %d" 6391# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY 6392 6393qmp_enter_dump_guest_memory(const char *json) "%s" 6394qmp_exit_dump_guest_memory(const char *result, bool succeeded) "%s %d" 6395qmp_enter_query_dump(const char *json) "%s" 6396qmp_exit_query_dump(const char *result, bool succeeded) "%s %d" 6397qmp_enter_query_dump_guest_memory_capability(const char *json) "%s" 6398qmp_exit_query_dump_guest_memory_capability(const char *result, bool succeeded) "%s %d" 6399# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY 6400 6401# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY 6402 6403qmp_enter_query_qmp_schema(const char *json) "%s" 6404qmp_exit_query_qmp_schema(const char *result, bool succeeded) "%s %d" 6405# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY 6406 6407qmp_enter_job_pause(const char *json) "%s" 6408qmp_exit_job_pause(const char *result, bool succeeded) "%s %d" 6409qmp_enter_job_resume(const char *json) "%s" 6410qmp_exit_job_resume(const char *result, bool succeeded) "%s %d" 6411qmp_enter_job_cancel(const char *json) "%s" 6412qmp_exit_job_cancel(const char *result, bool succeeded) "%s %d" 6413qmp_enter_job_complete(const char *json) "%s" 6414qmp_exit_job_complete(const char *result, bool succeeded) "%s %d" 6415qmp_enter_job_dismiss(const char *json) "%s" 6416qmp_exit_job_dismiss(const char *result, bool succeeded) "%s %d" 6417qmp_enter_job_finalize(const char *json) "%s" 6418qmp_exit_job_finalize(const char *result, bool succeeded) "%s %d" 6419qmp_enter_query_jobs(const char *json) "%s" 6420qmp_exit_query_jobs(const char *result, bool succeeded) "%s %d" 6421# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY 6422 6423# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY 6424 6425qmp_enter_query_cpus_fast(const char *json) "%s" 6426qmp_exit_query_cpus_fast(const char *result, bool succeeded) "%s %d" 6427qmp_enter_query_machines(const char *json) "%s" 6428qmp_exit_query_machines(const char *result, bool succeeded) "%s %d" 6429qmp_enter_query_current_machine(const char *json) "%s" 6430qmp_exit_query_current_machine(const char *result, bool succeeded) "%s %d" 6431qmp_enter_query_target(const char *json) "%s" 6432qmp_exit_query_target(const char *result, bool succeeded) "%s %d" 6433qmp_enter_query_uuid(const char *json) "%s" 6434qmp_exit_query_uuid(const char *result, bool succeeded) "%s %d" 6435qmp_enter_query_vm_generation_id(const char *json) "%s" 6436qmp_exit_query_vm_generation_id(const char *result, bool succeeded) "%s %d" 6437qmp_enter_system_reset(const char *json) "%s" 6438qmp_exit_system_reset(const char *result, bool succeeded) "%s %d" 6439qmp_enter_system_powerdown(const char *json) "%s" 6440qmp_exit_system_powerdown(const char *result, bool succeeded) "%s %d" 6441qmp_enter_system_wakeup(const char *json) "%s" 6442qmp_exit_system_wakeup(const char *result, bool succeeded) "%s %d" 6443qmp_enter_inject_nmi(const char *json) "%s" 6444qmp_exit_inject_nmi(const char *result, bool succeeded) "%s %d" 6445qmp_enter_query_kvm(const char *json) "%s" 6446qmp_exit_query_kvm(const char *result, bool succeeded) "%s %d" 6447qmp_enter_memsave(const char *json) "%s" 6448qmp_exit_memsave(const char *result, bool succeeded) "%s %d" 6449qmp_enter_pmemsave(const char *json) "%s" 6450qmp_exit_pmemsave(const char *result, bool succeeded) "%s %d" 6451qmp_enter_query_memdev(const char *json) "%s" 6452qmp_exit_query_memdev(const char *result, bool succeeded) "%s %d" 6453qmp_enter_query_hotpluggable_cpus(const char *json) "%s" 6454qmp_exit_query_hotpluggable_cpus(const char *result, bool succeeded) "%s %d" 6455qmp_enter_set_numa_node(const char *json) "%s" 6456qmp_exit_set_numa_node(const char *result, bool succeeded) "%s %d" 6457qmp_enter_balloon(const char *json) "%s" 6458qmp_exit_balloon(const char *result, bool succeeded) "%s %d" 6459qmp_enter_query_balloon(const char *json) "%s" 6460qmp_exit_query_balloon(const char *result, bool succeeded) "%s %d" 6461qmp_enter_query_hv_balloon_status_report(const char *json) "%s" 6462qmp_exit_query_hv_balloon_status_report(const char *result, bool succeeded) "%s %d" 6463qmp_enter_query_memory_size_summary(const char *json) "%s" 6464qmp_exit_query_memory_size_summary(const char *result, bool succeeded) "%s %d" 6465qmp_enter_query_memory_devices(const char *json) "%s" 6466qmp_exit_query_memory_devices(const char *result, bool succeeded) "%s %d" 6467qmp_enter_x_query_irq(const char *json) "%s" 6468qmp_exit_x_query_irq(const char *result, bool succeeded) "%s %d" 6469qmp_enter_x_query_jit(const char *json) "%s" 6470qmp_exit_x_query_jit(const char *result, bool succeeded) "%s %d" 6471qmp_enter_x_query_numa(const char *json) "%s" 6472qmp_exit_x_query_numa(const char *result, bool succeeded) "%s %d" 6473qmp_enter_x_query_opcount(const char *json) "%s" 6474qmp_exit_x_query_opcount(const char *result, bool succeeded) "%s %d" 6475qmp_enter_x_query_ramblock(const char *json) "%s" 6476qmp_exit_x_query_ramblock(const char *result, bool succeeded) "%s %d" 6477qmp_enter_x_query_rdma(const char *json) "%s" 6478qmp_exit_x_query_rdma(const char *result, bool succeeded) "%s %d" 6479qmp_enter_x_query_roms(const char *json) "%s" 6480qmp_exit_x_query_roms(const char *result, bool succeeded) "%s %d" 6481qmp_enter_x_query_usb(const char *json) "%s" 6482qmp_exit_x_query_usb(const char *result, bool succeeded) "%s %d" 6483qmp_enter_dumpdtb(const char *json) "%s" 6484qmp_exit_dumpdtb(const char *result, bool succeeded) "%s %d" 6485# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY 6486 6487qmp_enter_query_migrate(const char *json) "%s" 6488qmp_exit_query_migrate(const char *result, bool succeeded) "%s %d" 6489qmp_enter_migrate_set_capabilities(const char *json) "%s" 6490qmp_exit_migrate_set_capabilities(const char *result, bool succeeded) "%s %d" 6491qmp_enter_query_migrate_capabilities(const char *json) "%s" 6492qmp_exit_query_migrate_capabilities(const char *result, bool succeeded) "%s %d" 6493qmp_enter_migrate_set_parameters(const char *json) "%s" 6494qmp_exit_migrate_set_parameters(const char *result, bool succeeded) "%s %d" 6495qmp_enter_query_migrate_parameters(const char *json) "%s" 6496qmp_exit_query_migrate_parameters(const char *result, bool succeeded) "%s %d" 6497qmp_enter_migrate_start_postcopy(const char *json) "%s" 6498qmp_exit_migrate_start_postcopy(const char *result, bool succeeded) "%s %d" 6499qmp_enter_x_colo_lost_heartbeat(const char *json) "%s" 6500qmp_exit_x_colo_lost_heartbeat(const char *result, bool succeeded) "%s %d" 6501qmp_enter_migrate_cancel(const char *json) "%s" 6502qmp_exit_migrate_cancel(const char *result, bool succeeded) "%s %d" 6503qmp_enter_migrate_continue(const char *json) "%s" 6504qmp_exit_migrate_continue(const char *result, bool succeeded) "%s %d" 6505qmp_enter_migrate(const char *json) "%s" 6506qmp_exit_migrate(const char *result, bool succeeded) "%s %d" 6507qmp_enter_migrate_incoming(const char *json) "%s" 6508qmp_exit_migrate_incoming(const char *result, bool succeeded) "%s %d" 6509qmp_enter_xen_save_devices_state(const char *json) "%s" 6510qmp_exit_xen_save_devices_state(const char *result, bool succeeded) "%s %d" 6511qmp_enter_xen_set_global_dirty_log(const char *json) "%s" 6512qmp_exit_xen_set_global_dirty_log(const char *result, bool succeeded) "%s %d" 6513qmp_enter_xen_load_devices_state(const char *json) "%s" 6514qmp_exit_xen_load_devices_state(const char *result, bool succeeded) "%s %d" 6515qmp_enter_xen_set_replication(const char *json) "%s" 6516qmp_exit_xen_set_replication(const char *result, bool succeeded) "%s %d" 6517qmp_enter_query_xen_replication_status(const char *json) "%s" 6518qmp_exit_query_xen_replication_status(const char *result, bool succeeded) "%s %d" 6519qmp_enter_xen_colo_do_checkpoint(const char *json) "%s" 6520qmp_exit_xen_colo_do_checkpoint(const char *result, bool succeeded) "%s %d" 6521qmp_enter_query_colo_status(const char *json) "%s" 6522qmp_exit_query_colo_status(const char *result, bool succeeded) "%s %d" 6523qmp_enter_migrate_recover(const char *json) "%s" 6524qmp_exit_migrate_recover(const char *result, bool succeeded) "%s %d" 6525qmp_enter_migrate_pause(const char *json) "%s" 6526qmp_exit_migrate_pause(const char *result, bool succeeded) "%s %d" 6527qmp_enter_calc_dirty_rate(const char *json) "%s" 6528qmp_exit_calc_dirty_rate(const char *result, bool succeeded) "%s %d" 6529qmp_enter_query_dirty_rate(const char *json) "%s" 6530qmp_exit_query_dirty_rate(const char *result, bool succeeded) "%s %d" 6531qmp_enter_set_vcpu_dirty_limit(const char *json) "%s" 6532qmp_exit_set_vcpu_dirty_limit(const char *result, bool succeeded) "%s %d" 6533qmp_enter_cancel_vcpu_dirty_limit(const char *json) "%s" 6534qmp_exit_cancel_vcpu_dirty_limit(const char *result, bool succeeded) "%s %d" 6535qmp_enter_query_vcpu_dirty_limit(const char *json) "%s" 6536qmp_exit_query_vcpu_dirty_limit(const char *result, bool succeeded) "%s %d" 6537qmp_enter_query_migrationthreads(const char *json) "%s" 6538qmp_exit_query_migrationthreads(const char *result, bool succeeded) "%s %d" 6539qmp_enter_snapshot_save(const char *json) "%s" 6540qmp_exit_snapshot_save(const char *result, bool succeeded) "%s %d" 6541qmp_enter_snapshot_load(const char *json) "%s" 6542qmp_exit_snapshot_load(const char *result, bool succeeded) "%s %d" 6543qmp_enter_snapshot_delete(const char *json) "%s" 6544qmp_exit_snapshot_delete(const char *result, bool succeeded) "%s %d" 6545# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY 6546 6547qmp_enter_add_client(const char *json) "%s" 6548qmp_exit_add_client(const char *result, bool succeeded) "%s %d" 6549qmp_enter_query_name(const char *json) "%s" 6550qmp_exit_query_name(const char *result, bool succeeded) "%s %d" 6551qmp_enter_query_iothreads(const char *json) "%s" 6552qmp_exit_query_iothreads(const char *result, bool succeeded) "%s %d" 6553qmp_enter_stop(const char *json) "%s" 6554qmp_exit_stop(const char *result, bool succeeded) "%s %d" 6555qmp_enter_cont(const char *json) "%s" 6556qmp_exit_cont(const char *result, bool succeeded) "%s %d" 6557qmp_enter_x_exit_preconfig(const char *json) "%s" 6558qmp_exit_x_exit_preconfig(const char *result, bool succeeded) "%s %d" 6559qmp_enter_human_monitor_command(const char *json) "%s" 6560qmp_exit_human_monitor_command(const char *result, bool succeeded) "%s %d" 6561qmp_enter_getfd(const char *json) "%s" 6562qmp_exit_getfd(const char *result, bool succeeded) "%s %d" 6563qmp_enter_get_win32_socket(const char *json) "%s" 6564qmp_exit_get_win32_socket(const char *result, bool succeeded) "%s %d" 6565qmp_enter_closefd(const char *json) "%s" 6566qmp_exit_closefd(const char *result, bool succeeded) "%s %d" 6567qmp_enter_add_fd(const char *json) "%s" 6568qmp_exit_add_fd(const char *result, bool succeeded) "%s %d" 6569qmp_enter_remove_fd(const char *json) "%s" 6570qmp_exit_remove_fd(const char *result, bool succeeded) "%s %d" 6571qmp_enter_query_fdsets(const char *json) "%s" 6572qmp_exit_query_fdsets(const char *result, bool succeeded) "%s %d" 6573qmp_enter_query_command_line_options(const char *json) "%s" 6574qmp_exit_query_command_line_options(const char *result, bool succeeded) "%s %d" 6575# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY 6576 6577qmp_enter_set_link(const char *json) "%s" 6578qmp_exit_set_link(const char *result, bool succeeded) "%s %d" 6579qmp_enter_netdev_add(const char *json) "%s" 6580qmp_exit_netdev_add(const char *result, bool succeeded) "%s %d" 6581qmp_enter_netdev_del(const char *json) "%s" 6582qmp_exit_netdev_del(const char *result, bool succeeded) "%s %d" 6583qmp_enter_query_rx_filter(const char *json) "%s" 6584qmp_exit_query_rx_filter(const char *result, bool succeeded) "%s %d" 6585qmp_enter_announce_self(const char *json) "%s" 6586qmp_exit_announce_self(const char *result, bool succeeded) "%s %d" 6587# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY 6588 6589# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY 6590 6591qmp_enter_qom_list(const char *json) "%s" 6592qmp_exit_qom_list(const char *result, bool succeeded) "%s %d" 6593qmp_enter_qom_get(const char *json) "%s" 6594qmp_exit_qom_get(const char *result, bool succeeded) "%s %d" 6595qmp_enter_qom_set(const char *json) "%s" 6596qmp_exit_qom_set(const char *result, bool succeeded) "%s %d" 6597qmp_enter_qom_list_types(const char *json) "%s" 6598qmp_exit_qom_list_types(const char *result, bool succeeded) "%s %d" 6599qmp_enter_qom_list_properties(const char *json) "%s" 6600qmp_exit_qom_list_properties(const char *result, bool succeeded) "%s %d" 6601qmp_enter_object_add(const char *json) "%s" 6602qmp_exit_object_add(const char *result, bool succeeded) "%s %d" 6603qmp_enter_object_del(const char *json) "%s" 6604qmp_exit_object_del(const char *result, bool succeeded) "%s %d" 6605# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY 6606 6607qmp_enter_query_replay(const char *json) "%s" 6608qmp_exit_query_replay(const char *result, bool succeeded) "%s %d" 6609qmp_enter_replay_break(const char *json) "%s" 6610qmp_exit_replay_break(const char *result, bool succeeded) "%s %d" 6611qmp_enter_replay_delete_break(const char *json) "%s" 6612qmp_exit_replay_delete_break(const char *result, bool succeeded) "%s %d" 6613qmp_enter_replay_seek(const char *json) "%s" 6614qmp_exit_replay_seek(const char *result, bool succeeded) "%s %d" 6615# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY 6616 6617qmp_enter_query_status(const char *json) "%s" 6618qmp_exit_query_status(const char *result, bool succeeded) "%s %d" 6619qmp_enter_watchdog_set_action(const char *json) "%s" 6620qmp_exit_watchdog_set_action(const char *result, bool succeeded) "%s %d" 6621qmp_enter_set_action(const char *json) "%s" 6622qmp_exit_set_action(const char *result, bool succeeded) "%s %d" 6623# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY 6624 6625# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY 6626 6627qmp_enter_query_stats(const char *json) "%s" 6628qmp_exit_query_stats(const char *result, bool succeeded) "%s %d" 6629qmp_enter_query_stats_schemas(const char *json) "%s" 6630qmp_exit_query_stats_schemas(const char *result, bool succeeded) "%s %d" 6631# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY 6632 6633qmp_enter_trace_event_get_state(const char *json) "%s" 6634qmp_exit_trace_event_get_state(const char *result, bool succeeded) "%s %d" 6635qmp_enter_trace_event_set_state(const char *json) "%s" 6636qmp_exit_trace_event_set_state(const char *result, bool succeeded) "%s %d" 6637# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY 6638 6639qmp_enter_transaction(const char *json) "%s" 6640qmp_exit_transaction(const char *result, bool succeeded) "%s %d" 6641# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY 6642 6643qmp_enter_x_query_virtio(const char *json) "%s" 6644qmp_exit_x_query_virtio(const char *result, bool succeeded) "%s %d" 6645qmp_enter_x_query_virtio_status(const char *json) "%s" 6646qmp_exit_x_query_virtio_status(const char *result, bool succeeded) "%s %d" 6647qmp_enter_x_query_virtio_queue_status(const char *json) "%s" 6648qmp_exit_x_query_virtio_queue_status(const char *result, bool succeeded) "%s %d" 6649qmp_enter_x_query_virtio_vhost_queue_status(const char *json) "%s" 6650qmp_exit_x_query_virtio_vhost_queue_status(const char *result, bool succeeded) "%s %d" 6651qmp_enter_x_query_virtio_queue_element(const char *json) "%s" 6652qmp_exit_x_query_virtio_queue_element(const char *result, bool succeeded) "%s %d" 6653# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY 6654 6655qmp_enter_yank(const char *json) "%s" 6656qmp_exit_yank(const char *result, bool succeeded) "%s %d" 6657qmp_enter_query_yank(const char *json) "%s" 6658qmp_exit_query_yank(const char *result, bool succeeded) "%s %d" 6659# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY 6660 6661qmp_enter_query_acpi_ospm_status(const char *json) "%s" 6662qmp_exit_query_acpi_ospm_status(const char *result, bool succeeded) "%s %d" 6663# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY 6664 6665qmp_enter_query_audiodevs(const char *json) "%s" 6666qmp_exit_query_audiodevs(const char *result, bool succeeded) "%s %d" 6667# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY 6668 6669qmp_enter_query_cryptodev(const char *json) "%s" 6670qmp_exit_query_cryptodev(const char *result, bool succeeded) "%s %d" 6671# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY 6672 6673qmp_enter_device_list_properties(const char *json) "%s" 6674qmp_exit_device_list_properties(const char *result, bool succeeded) "%s %d" 6675qmp_enter_device_del(const char *json) "%s" 6676qmp_exit_device_del(const char *result, bool succeeded) "%s %d" 6677# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY 6678 6679qmp_enter_query_pci(const char *json) "%s" 6680qmp_exit_query_pci(const char *result, bool succeeded) "%s %d" 6681# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY 6682 6683# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY 6684 6685qmp_enter_query_rocker(const char *json) "%s" 6686qmp_exit_query_rocker(const char *result, bool succeeded) "%s %d" 6687qmp_enter_query_rocker_ports(const char *json) "%s" 6688qmp_exit_query_rocker_ports(const char *result, bool succeeded) "%s %d" 6689qmp_enter_query_rocker_of_dpa_flows(const char *json) "%s" 6690qmp_exit_query_rocker_of_dpa_flows(const char *result, bool succeeded) "%s %d" 6691qmp_enter_query_rocker_of_dpa_groups(const char *json) "%s" 6692qmp_exit_query_rocker_of_dpa_groups(const char *result, bool succeeded) "%s %d" 6693# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY 6694 6695qmp_enter_query_tpm_models(const char *json) "%s" 6696qmp_exit_query_tpm_models(const char *result, bool succeeded) "%s %d" 6697qmp_enter_query_tpm_types(const char *json) "%s" 6698qmp_exit_query_tpm_types(const char *result, bool succeeded) "%s %d" 6699qmp_enter_query_tpm(const char *json) "%s" 6700qmp_exit_query_tpm(const char *result, bool succeeded) "%s %d" 6701# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY 6702 6703qmp_enter_set_password(const char *json) "%s" 6704qmp_exit_set_password(const char *result, bool succeeded) "%s %d" 6705qmp_enter_expire_password(const char *json) "%s" 6706qmp_exit_expire_password(const char *result, bool succeeded) "%s %d" 6707qmp_enter_screendump(const char *json) "%s" 6708qmp_exit_screendump(const char *result, bool succeeded) "%s %d" 6709qmp_enter_query_spice(const char *json) "%s" 6710qmp_exit_query_spice(const char *result, bool succeeded) "%s %d" 6711qmp_enter_query_vnc(const char *json) "%s" 6712qmp_exit_query_vnc(const char *result, bool succeeded) "%s %d" 6713qmp_enter_query_vnc_servers(const char *json) "%s" 6714qmp_exit_query_vnc_servers(const char *result, bool succeeded) "%s %d" 6715qmp_enter_change_vnc_password(const char *json) "%s" 6716qmp_exit_change_vnc_password(const char *result, bool succeeded) "%s %d" 6717qmp_enter_query_mice(const char *json) "%s" 6718qmp_exit_query_mice(const char *result, bool succeeded) "%s %d" 6719qmp_enter_send_key(const char *json) "%s" 6720qmp_exit_send_key(const char *result, bool succeeded) "%s %d" 6721qmp_enter_input_send_event(const char *json) "%s" 6722qmp_exit_input_send_event(const char *result, bool succeeded) "%s %d" 6723qmp_enter_query_display_options(const char *json) "%s" 6724qmp_exit_query_display_options(const char *result, bool succeeded) "%s %d" 6725qmp_enter_display_reload(const char *json) "%s" 6726qmp_exit_display_reload(const char *result, bool succeeded) "%s %d" 6727qmp_enter_display_update(const char *json) "%s" 6728qmp_exit_display_update(const char *result, bool succeeded) "%s %d" 6729qmp_enter_client_migrate_info(const char *json) "%s" 6730qmp_exit_client_migrate_info(const char *result, bool succeeded) "%s %d" 6731# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY 6732 6733qmp_enter_query_cpu_model_comparison(const char *json) "%s" 6734qmp_exit_query_cpu_model_comparison(const char *result, bool succeeded) "%s %d" 6735qmp_enter_query_cpu_model_baseline(const char *json) "%s" 6736qmp_exit_query_cpu_model_baseline(const char *result, bool succeeded) "%s %d" 6737qmp_enter_query_cpu_model_expansion(const char *json) "%s" 6738qmp_exit_query_cpu_model_expansion(const char *result, bool succeeded) "%s %d" 6739qmp_enter_query_cpu_definitions(const char *json) "%s" 6740qmp_exit_query_cpu_definitions(const char *result, bool succeeded) "%s %d" 6741qmp_enter_set_cpu_topology(const char *json) "%s" 6742qmp_exit_set_cpu_topology(const char *result, bool succeeded) "%s %d" 6743qmp_enter_query_s390x_cpu_polarization(const char *json) "%s" 6744qmp_exit_query_s390x_cpu_polarization(const char *result, bool succeeded) "%s %d" 6745# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY 6746 6747qmp_enter_rtc_reset_reinjection(const char *json) "%s" 6748qmp_exit_rtc_reset_reinjection(const char *result, bool succeeded) "%s %d" 6749qmp_enter_query_sev(const char *json) "%s" 6750qmp_exit_query_sev(const char *result, bool succeeded) "%s %d" 6751qmp_enter_query_sev_launch_measure(const char *json) "%s" 6752qmp_exit_query_sev_launch_measure(const char *result, bool succeeded) "%s %d" 6753qmp_enter_query_sev_capabilities(const char *json) "%s" 6754qmp_exit_query_sev_capabilities(const char *result, bool succeeded) "%s %d" 6755qmp_enter_sev_inject_launch_secret(const char *json) "%s" 6756qmp_exit_sev_inject_launch_secret(const char *result, bool succeeded) "%s %d" 6757qmp_enter_query_sev_attestation_report(const char *json) "%s" 6758qmp_exit_query_sev_attestation_report(const char *result, bool succeeded) "%s %d" 6759qmp_enter_dump_skeys(const char *json) "%s" 6760qmp_exit_dump_skeys(const char *result, bool succeeded) "%s %d" 6761qmp_enter_query_gic_capabilities(const char *json) "%s" 6762qmp_exit_query_gic_capabilities(const char *result, bool succeeded) "%s %d" 6763qmp_enter_query_sgx(const char *json) "%s" 6764qmp_exit_query_sgx(const char *result, bool succeeded) "%s %d" 6765qmp_enter_query_sgx_capabilities(const char *json) "%s" 6766qmp_exit_query_sgx_capabilities(const char *result, bool succeeded) "%s %d" 6767qmp_enter_xen_event_list(const char *json) "%s" 6768qmp_exit_xen_event_list(const char *result, bool succeeded) "%s %d" 6769qmp_enter_xen_event_inject(const char *json) "%s" 6770qmp_exit_xen_event_inject(const char *result, bool succeeded) "%s %d" 6771