1 /* 2 * This file is auto-generated. Modifications will be lost. 3 * 4 * See https://android.googlesource.com/platform/bionic/+/master/libc/kernel/ 5 * for more information. 6 */ 7 #ifndef _UAPI_ACRN_H 8 #define _UAPI_ACRN_H 9 #include <linux/types.h> 10 #define ACRN_IO_REQUEST_MAX 16 11 #define ACRN_IOREQ_STATE_PENDING 0 12 #define ACRN_IOREQ_STATE_COMPLETE 1 13 #define ACRN_IOREQ_STATE_PROCESSING 2 14 #define ACRN_IOREQ_STATE_FREE 3 15 #define ACRN_IOREQ_TYPE_PORTIO 0 16 #define ACRN_IOREQ_TYPE_MMIO 1 17 #define ACRN_IOREQ_TYPE_PCICFG 2 18 #define ACRN_IOREQ_DIR_READ 0 19 #define ACRN_IOREQ_DIR_WRITE 1 20 struct acrn_mmio_request { 21 __u32 direction; 22 __u32 reserved; 23 __u64 address; 24 __u64 size; 25 __u64 value; 26 }; 27 struct acrn_pio_request { 28 __u32 direction; 29 __u32 reserved; 30 __u64 address; 31 __u64 size; 32 __u32 value; 33 }; 34 struct acrn_pci_request { 35 __u32 direction; 36 __u32 reserved[3]; 37 __u64 size; 38 __u32 value; 39 __u32 bus; 40 __u32 dev; 41 __u32 func; 42 __u32 reg; 43 }; 44 struct acrn_io_request { 45 __u32 type; 46 __u32 completion_polling; 47 __u32 reserved0[14]; 48 union { 49 struct acrn_pio_request pio_request; 50 struct acrn_pci_request pci_request; 51 struct acrn_mmio_request mmio_request; 52 __u64 data[8]; 53 } reqs; 54 __u32 reserved1; 55 __u32 kernel_handled; 56 __u32 processed; 57 } __attribute__((aligned(256))); 58 struct acrn_io_request_buffer { 59 union { 60 struct acrn_io_request req_slot[ACRN_IO_REQUEST_MAX]; 61 __u8 reserved[4096]; 62 }; 63 }; 64 struct acrn_ioreq_notify { 65 __u16 vmid; 66 __u16 reserved; 67 __u32 vcpu; 68 }; 69 struct acrn_vm_creation { 70 __u16 vmid; 71 __u16 reserved0; 72 __u16 vcpu_num; 73 __u16 reserved1; 74 __u8 uuid[16]; 75 __u64 vm_flag; 76 __u64 ioreq_buf; 77 __u64 cpu_affinity; 78 }; 79 struct acrn_gp_regs { 80 __le64 rax; 81 __le64 rcx; 82 __le64 rdx; 83 __le64 rbx; 84 __le64 rsp; 85 __le64 rbp; 86 __le64 rsi; 87 __le64 rdi; 88 __le64 r8; 89 __le64 r9; 90 __le64 r10; 91 __le64 r11; 92 __le64 r12; 93 __le64 r13; 94 __le64 r14; 95 __le64 r15; 96 }; 97 struct acrn_descriptor_ptr { 98 __le16 limit; 99 __le64 base; 100 __le16 reserved[3]; 101 } __attribute__((__packed__)); 102 struct acrn_regs { 103 struct acrn_gp_regs gprs; 104 struct acrn_descriptor_ptr gdt; 105 struct acrn_descriptor_ptr idt; 106 __le64 rip; 107 __le64 cs_base; 108 __le64 cr0; 109 __le64 cr4; 110 __le64 cr3; 111 __le64 ia32_efer; 112 __le64 rflags; 113 __le64 reserved_64[4]; 114 __le32 cs_ar; 115 __le32 cs_limit; 116 __le32 reserved_32[3]; 117 __le16 cs_sel; 118 __le16 ss_sel; 119 __le16 ds_sel; 120 __le16 es_sel; 121 __le16 fs_sel; 122 __le16 gs_sel; 123 __le16 ldt_sel; 124 __le16 tr_sel; 125 }; 126 struct acrn_vcpu_regs { 127 __u16 vcpu_id; 128 __u16 reserved[3]; 129 struct acrn_regs vcpu_regs; 130 }; 131 #define ACRN_MEM_ACCESS_RIGHT_MASK 0x00000007U 132 #define ACRN_MEM_ACCESS_READ 0x00000001U 133 #define ACRN_MEM_ACCESS_WRITE 0x00000002U 134 #define ACRN_MEM_ACCESS_EXEC 0x00000004U 135 #define ACRN_MEM_ACCESS_RWX (ACRN_MEM_ACCESS_READ | ACRN_MEM_ACCESS_WRITE | ACRN_MEM_ACCESS_EXEC) 136 #define ACRN_MEM_TYPE_MASK 0x000007C0U 137 #define ACRN_MEM_TYPE_WB 0x00000040U 138 #define ACRN_MEM_TYPE_WT 0x00000080U 139 #define ACRN_MEM_TYPE_UC 0x00000100U 140 #define ACRN_MEM_TYPE_WC 0x00000200U 141 #define ACRN_MEM_TYPE_WP 0x00000400U 142 #define ACRN_MEMMAP_RAM 0 143 #define ACRN_MEMMAP_MMIO 1 144 struct acrn_vm_memmap { 145 __u32 type; 146 __u32 attr; 147 __u64 user_vm_pa; 148 union { 149 __u64 service_vm_pa; 150 __u64 vma_base; 151 }; 152 __u64 len; 153 }; 154 #define ACRN_PTDEV_IRQ_INTX 0 155 #define ACRN_PTDEV_IRQ_MSI 1 156 #define ACRN_PTDEV_IRQ_MSIX 2 157 struct acrn_ptdev_irq { 158 __u32 type; 159 __u16 virt_bdf; 160 __u16 phys_bdf; 161 struct { 162 __u32 virt_pin; 163 __u32 phys_pin; 164 __u32 is_pic_pin; 165 } intx; 166 }; 167 #define ACRN_PTDEV_QUIRK_ASSIGN (1U << 0) 168 #define ACRN_MMIODEV_RES_NUM 3 169 #define ACRN_PCI_NUM_BARS 6 170 struct acrn_pcidev { 171 __u32 type; 172 __u16 virt_bdf; 173 __u16 phys_bdf; 174 __u8 intr_line; 175 __u8 intr_pin; 176 __u32 bar[ACRN_PCI_NUM_BARS]; 177 }; 178 struct acrn_mmiodev { 179 __u8 name[8]; 180 struct { 181 __u64 user_vm_pa; 182 __u64 service_vm_pa; 183 __u64 size; 184 __u64 mem_type; 185 } res[ACRN_MMIODEV_RES_NUM]; 186 }; 187 struct acrn_vdev { 188 union { 189 __u64 value; 190 struct { 191 __le16 vendor; 192 __le16 device; 193 __le32 legacy_id; 194 } fields; 195 } id; 196 __u64 slot; 197 __u32 io_addr[ACRN_PCI_NUM_BARS]; 198 __u32 io_size[ACRN_PCI_NUM_BARS]; 199 __u8 args[128]; 200 }; 201 struct acrn_msi_entry { 202 __u64 msi_addr; 203 __u64 msi_data; 204 }; 205 struct acrn_acpi_generic_address { 206 __u8 space_id; 207 __u8 bit_width; 208 __u8 bit_offset; 209 __u8 access_size; 210 __u64 address; 211 } __attribute__((__packed__)); 212 struct acrn_cstate_data { 213 struct acrn_acpi_generic_address cx_reg; 214 __u8 type; 215 __u32 latency; 216 __u64 power; 217 }; 218 struct acrn_pstate_data { 219 __u64 core_frequency; 220 __u64 power; 221 __u64 transition_latency; 222 __u64 bus_master_latency; 223 __u64 control; 224 __u64 status; 225 }; 226 #define PMCMD_TYPE_MASK 0x000000ff 227 enum acrn_pm_cmd_type { 228 ACRN_PMCMD_GET_PX_CNT, 229 ACRN_PMCMD_GET_PX_DATA, 230 ACRN_PMCMD_GET_CX_CNT, 231 ACRN_PMCMD_GET_CX_DATA, 232 }; 233 #define ACRN_IOEVENTFD_FLAG_PIO 0x01 234 #define ACRN_IOEVENTFD_FLAG_DATAMATCH 0x02 235 #define ACRN_IOEVENTFD_FLAG_DEASSIGN 0x04 236 struct acrn_ioeventfd { 237 __u32 fd; 238 __u32 flags; 239 __u64 addr; 240 __u32 len; 241 __u32 reserved; 242 __u64 data; 243 }; 244 #define ACRN_IRQFD_FLAG_DEASSIGN 0x01 245 struct acrn_irqfd { 246 __s32 fd; 247 __u32 flags; 248 struct acrn_msi_entry msi; 249 }; 250 #define ACRN_IOCTL_TYPE 0xA2 251 #define ACRN_IOCTL_CREATE_VM _IOWR(ACRN_IOCTL_TYPE, 0x10, struct acrn_vm_creation) 252 #define ACRN_IOCTL_DESTROY_VM _IO(ACRN_IOCTL_TYPE, 0x11) 253 #define ACRN_IOCTL_START_VM _IO(ACRN_IOCTL_TYPE, 0x12) 254 #define ACRN_IOCTL_PAUSE_VM _IO(ACRN_IOCTL_TYPE, 0x13) 255 #define ACRN_IOCTL_RESET_VM _IO(ACRN_IOCTL_TYPE, 0x15) 256 #define ACRN_IOCTL_SET_VCPU_REGS _IOW(ACRN_IOCTL_TYPE, 0x16, struct acrn_vcpu_regs) 257 #define ACRN_IOCTL_INJECT_MSI _IOW(ACRN_IOCTL_TYPE, 0x23, struct acrn_msi_entry) 258 #define ACRN_IOCTL_VM_INTR_MONITOR _IOW(ACRN_IOCTL_TYPE, 0x24, unsigned long) 259 #define ACRN_IOCTL_SET_IRQLINE _IOW(ACRN_IOCTL_TYPE, 0x25, __u64) 260 #define ACRN_IOCTL_NOTIFY_REQUEST_FINISH _IOW(ACRN_IOCTL_TYPE, 0x31, struct acrn_ioreq_notify) 261 #define ACRN_IOCTL_CREATE_IOREQ_CLIENT _IO(ACRN_IOCTL_TYPE, 0x32) 262 #define ACRN_IOCTL_ATTACH_IOREQ_CLIENT _IO(ACRN_IOCTL_TYPE, 0x33) 263 #define ACRN_IOCTL_DESTROY_IOREQ_CLIENT _IO(ACRN_IOCTL_TYPE, 0x34) 264 #define ACRN_IOCTL_CLEAR_VM_IOREQ _IO(ACRN_IOCTL_TYPE, 0x35) 265 #define ACRN_IOCTL_SET_MEMSEG _IOW(ACRN_IOCTL_TYPE, 0x41, struct acrn_vm_memmap) 266 #define ACRN_IOCTL_UNSET_MEMSEG _IOW(ACRN_IOCTL_TYPE, 0x42, struct acrn_vm_memmap) 267 #define ACRN_IOCTL_SET_PTDEV_INTR _IOW(ACRN_IOCTL_TYPE, 0x53, struct acrn_ptdev_irq) 268 #define ACRN_IOCTL_RESET_PTDEV_INTR _IOW(ACRN_IOCTL_TYPE, 0x54, struct acrn_ptdev_irq) 269 #define ACRN_IOCTL_ASSIGN_PCIDEV _IOW(ACRN_IOCTL_TYPE, 0x55, struct acrn_pcidev) 270 #define ACRN_IOCTL_DEASSIGN_PCIDEV _IOW(ACRN_IOCTL_TYPE, 0x56, struct acrn_pcidev) 271 #define ACRN_IOCTL_ASSIGN_MMIODEV _IOW(ACRN_IOCTL_TYPE, 0x57, struct acrn_mmiodev) 272 #define ACRN_IOCTL_DEASSIGN_MMIODEV _IOW(ACRN_IOCTL_TYPE, 0x58, struct acrn_mmiodev) 273 #define ACRN_IOCTL_CREATE_VDEV _IOW(ACRN_IOCTL_TYPE, 0x59, struct acrn_vdev) 274 #define ACRN_IOCTL_DESTROY_VDEV _IOW(ACRN_IOCTL_TYPE, 0x5A, struct acrn_vdev) 275 #define ACRN_IOCTL_PM_GET_CPU_STATE _IOWR(ACRN_IOCTL_TYPE, 0x60, __u64) 276 #define ACRN_IOCTL_IOEVENTFD _IOW(ACRN_IOCTL_TYPE, 0x70, struct acrn_ioeventfd) 277 #define ACRN_IOCTL_IRQFD _IOW(ACRN_IOCTL_TYPE, 0x71, struct acrn_irqfd) 278 #endif 279