1 /************************************************************************** 2 * 3 * Copyright (C) 2022 Kylin Software Co., Ltd. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included 13 * in all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 16 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 * 23 **************************************************************************/ 24 25 /** 26 * @file 27 * Data structure definition of video hardware layer. 28 * 29 * These structures are used for communication between host and guest, and 30 * they are 4-byte aligned. 31 * 32 * 'virgl_picture_desc' and other related structures mainly describe sequence 33 * parameters, picture parameters, slice parameters, etc., as well as some 34 * context information for encoding and decoding. The video backend needs them 35 * to reconstruct VA-API calls. 36 * 37 * @author Feng Jiang <[email protected]> 38 */ 39 40 #ifndef VIRGL_VIDEO_HW_H 41 #define VIRGL_VIDEO_HW_H 42 43 #include <stdint.h> 44 45 struct virgl_base_picture_desc { 46 uint16_t profile; /* enum pipe_video_profile */ 47 uint8_t entry_point; /* enum pipe_video_entrypoint */ 48 uint8_t protected_playback; 49 uint8_t decrypt_key[256]; 50 uint32_t key_size; 51 52 }; 53 54 struct virgl_enc_quality_modes { 55 uint32_t level; 56 uint32_t preset_mode; 57 uint32_t pre_encode_mode; 58 uint32_t vbaq_mode; 59 }; 60 61 /* H.264 sequence parameter set */ 62 struct virgl_h264_sps { 63 uint8_t level_idc; 64 uint8_t chroma_format_idc; 65 uint8_t separate_colour_plane_flag; 66 uint8_t bit_depth_luma_minus8; 67 68 uint8_t bit_depth_chroma_minus8; 69 uint8_t seq_scaling_matrix_present_flag; 70 uint8_t ScalingList4x4[6][16]; 71 uint8_t ScalingList8x8[6][64]; 72 73 uint8_t log2_max_frame_num_minus4; 74 uint8_t pic_order_cnt_type; 75 uint8_t log2_max_pic_order_cnt_lsb_minus4; 76 uint8_t delta_pic_order_always_zero_flag; 77 78 int32_t offset_for_non_ref_pic; 79 int32_t offset_for_top_to_bottom_field; 80 int32_t offset_for_ref_frame[256]; 81 82 uint8_t num_ref_frames_in_pic_order_cnt_cycle; 83 uint8_t max_num_ref_frames; 84 uint8_t frame_mbs_only_flag; 85 uint8_t mb_adaptive_frame_field_flag; 86 87 uint8_t direct_8x8_inference_flag; 88 uint8_t MinLumaBiPredSize8x8; 89 uint8_t reserved[2]; 90 }; 91 92 /* H.264 picture parameter set */ 93 struct virgl_h264_pps { 94 struct virgl_h264_sps sps; /* Seq Param Set */ 95 96 uint8_t entropy_coding_mode_flag; 97 uint8_t bottom_field_pic_order_in_frame_present_flag; 98 uint8_t num_slice_groups_minus1; 99 uint8_t slice_group_map_type; 100 101 uint8_t slice_group_change_rate_minus1; 102 uint8_t num_ref_idx_l0_default_active_minus1; 103 uint8_t num_ref_idx_l1_default_active_minus1; 104 uint8_t weighted_pred_flag; 105 106 uint8_t weighted_bipred_idc; 107 int8_t pic_init_qp_minus26; 108 int8_t pic_init_qs_minus26; 109 int8_t chroma_qp_index_offset; 110 111 uint8_t deblocking_filter_control_present_flag; 112 uint8_t constrained_intra_pred_flag; 113 uint8_t redundant_pic_cnt_present_flag; 114 uint8_t transform_8x8_mode_flag; 115 116 uint8_t ScalingList4x4[6][16]; 117 uint8_t ScalingList8x8[6][64]; 118 119 int8_t second_chroma_qp_index_offset; 120 uint8_t reserved[3]; 121 }; 122 123 struct virgl_h264_picture_desc { 124 struct virgl_base_picture_desc base; 125 126 struct virgl_h264_pps pps; /* Picture Param Set */ 127 128 uint32_t frame_num; 129 130 uint8_t field_pic_flag; 131 uint8_t bottom_field_flag; 132 uint8_t num_ref_idx_l0_active_minus1; 133 uint8_t num_ref_idx_l1_active_minus1; 134 135 uint32_t slice_count; 136 int32_t field_order_cnt[2]; 137 138 uint8_t is_long_term[16]; 139 uint8_t top_is_reference[16]; 140 uint8_t bottom_is_reference[16]; 141 uint32_t field_order_cnt_list[16][2]; 142 uint32_t frame_num_list[16]; 143 uint32_t buffer_id[16]; 144 145 uint8_t is_reference; 146 uint8_t num_ref_frames; 147 uint8_t reserved[2]; 148 }; 149 150 struct virgl_h264_enc_seq_param 151 { 152 uint32_t enc_constraint_set_flags; 153 uint32_t enc_frame_cropping_flag; 154 uint32_t enc_frame_crop_left_offset; 155 uint32_t enc_frame_crop_right_offset; 156 uint32_t enc_frame_crop_top_offset; 157 uint32_t enc_frame_crop_bottom_offset; 158 uint32_t pic_order_cnt_type; 159 uint32_t num_temporal_layers; 160 uint32_t vui_parameters_present_flag; 161 struct { 162 uint32_t aspect_ratio_info_present_flag: 1; 163 uint32_t timing_info_present_flag: 1; 164 uint32_t reserved:30; 165 } vui_flags; 166 uint32_t aspect_ratio_idc; 167 uint32_t sar_width; 168 uint32_t sar_height; 169 uint32_t num_units_in_tick; 170 uint32_t time_scale; 171 }; 172 173 struct virgl_h264_enc_rate_control 174 { 175 uint32_t target_bitrate; 176 uint32_t peak_bitrate; 177 uint32_t frame_rate_num; 178 uint32_t frame_rate_den; 179 uint32_t vbv_buffer_size; 180 uint32_t vbv_buf_lv; 181 uint32_t target_bits_picture; 182 uint32_t peak_bits_picture_integer; 183 uint32_t peak_bits_picture_fraction; 184 uint32_t fill_data_enable; 185 uint32_t skip_frame_enable; 186 uint32_t enforce_hrd; 187 uint32_t max_au_size; 188 uint32_t max_qp; 189 uint32_t min_qp; 190 191 uint8_t rate_ctrl_method; /* see enum pipe_h2645_enc_rate_control_method */ 192 uint8_t reserved[3]; 193 }; 194 195 struct virgl_h264_enc_motion_estimation 196 { 197 uint32_t motion_est_quarter_pixel; 198 uint32_t enc_disable_sub_mode; 199 uint32_t lsmvert; 200 uint32_t enc_en_ime_overw_dis_subm; 201 uint32_t enc_ime_overw_dis_subm_no; 202 uint32_t enc_ime2_search_range_x; 203 uint32_t enc_ime2_search_range_y; 204 }; 205 206 struct virgl_h264_enc_pic_control 207 { 208 uint32_t enc_cabac_enable; 209 uint32_t enc_cabac_init_idc; 210 }; 211 212 struct virgl_h264_slice_descriptor 213 { 214 uint32_t macroblock_address; 215 uint32_t num_macroblocks; 216 217 uint8_t slice_type; /* see enum pipe_h264_slice_type */ 218 uint8_t reserved[3]; 219 }; 220 221 struct virgl_h264_enc_picture_desc 222 { 223 struct virgl_base_picture_desc base; 224 225 struct virgl_h264_enc_seq_param seq; 226 struct virgl_h264_enc_rate_control rate_ctrl[4]; 227 struct virgl_h264_enc_motion_estimation motion_est; 228 struct virgl_h264_enc_pic_control pic_ctrl; 229 230 uint32_t intra_idr_period; 231 232 uint32_t quant_i_frames; 233 uint32_t quant_p_frames; 234 uint32_t quant_b_frames; 235 236 uint32_t frame_num; 237 uint32_t frame_num_cnt; 238 uint32_t p_remain; 239 uint32_t i_remain; 240 uint32_t idr_pic_id; 241 uint32_t gop_cnt; 242 uint32_t pic_order_cnt; 243 uint32_t num_ref_idx_l0_active_minus1; 244 uint32_t num_ref_idx_l1_active_minus1; 245 uint32_t ref_idx_l0_list[32]; 246 uint8_t l0_is_long_term[32]; 247 uint32_t ref_idx_l1_list[32]; 248 uint8_t l1_is_long_term[32]; 249 uint32_t gop_size; 250 struct virgl_enc_quality_modes quality_modes; 251 252 uint32_t num_slice_descriptors; 253 struct virgl_h264_slice_descriptor slices_descriptors[128]; 254 255 uint8_t picture_type; /* see enum pipe_h2645_enc_picture_type */ 256 uint8_t not_referenced; 257 uint8_t is_ltr; 258 uint8_t enable_vui; 259 260 uint32_t ltr_index; 261 }; 262 263 264 struct virgl_h265_sps 265 { 266 uint32_t pic_width_in_luma_samples; 267 uint32_t pic_height_in_luma_samples; 268 269 uint8_t chroma_format_idc; 270 uint8_t separate_colour_plane_flag; 271 uint8_t bit_depth_luma_minus8; 272 uint8_t bit_depth_chroma_minus8; 273 274 uint8_t log2_max_pic_order_cnt_lsb_minus4; 275 uint8_t sps_max_dec_pic_buffering_minus1; 276 uint8_t log2_min_luma_coding_block_size_minus3; 277 uint8_t log2_diff_max_min_luma_coding_block_size; 278 279 uint8_t log2_min_transform_block_size_minus2; 280 uint8_t log2_diff_max_min_transform_block_size; 281 uint8_t max_transform_hierarchy_depth_inter; 282 uint8_t max_transform_hierarchy_depth_intra; 283 284 uint8_t ScalingList4x4[6][16]; 285 uint8_t ScalingList8x8[6][64]; 286 uint8_t ScalingList16x16[6][64]; 287 uint8_t ScalingList32x32[2][64]; 288 289 uint8_t ScalingListDCCoeff16x16[6]; 290 uint8_t ScalingListDCCoeff32x32[2]; 291 292 uint8_t scaling_list_enabled_flag; 293 uint8_t amp_enabled_flag; 294 uint8_t sample_adaptive_offset_enabled_flag; 295 uint8_t pcm_enabled_flag; 296 297 uint8_t pcm_sample_bit_depth_luma_minus1; 298 uint8_t pcm_sample_bit_depth_chroma_minus1; 299 uint8_t log2_min_pcm_luma_coding_block_size_minus3; 300 uint8_t log2_diff_max_min_pcm_luma_coding_block_size; 301 302 uint8_t pcm_loop_filter_disabled_flag; 303 uint8_t num_short_term_ref_pic_sets; 304 uint8_t long_term_ref_pics_present_flag; 305 uint8_t num_long_term_ref_pics_sps; 306 307 uint8_t sps_temporal_mvp_enabled_flag; 308 uint8_t strong_intra_smoothing_enabled_flag; 309 uint8_t reserved[2]; 310 }; 311 312 struct virgl_h265_pps 313 { 314 struct virgl_h265_sps sps; 315 316 uint8_t dependent_slice_segments_enabled_flag; 317 uint8_t output_flag_present_flag; 318 uint8_t num_extra_slice_header_bits; 319 uint8_t sign_data_hiding_enabled_flag; 320 321 uint8_t cabac_init_present_flag; 322 uint8_t num_ref_idx_l0_default_active_minus1; 323 uint8_t num_ref_idx_l1_default_active_minus1; 324 int8_t init_qp_minus26; 325 326 uint8_t constrained_intra_pred_flag; 327 uint8_t transform_skip_enabled_flag; 328 uint8_t cu_qp_delta_enabled_flag; 329 uint8_t diff_cu_qp_delta_depth; 330 331 int8_t pps_cb_qp_offset; 332 int8_t pps_cr_qp_offset; 333 uint8_t pps_slice_chroma_qp_offsets_present_flag; 334 uint8_t weighted_pred_flag; 335 336 uint8_t weighted_bipred_flag; 337 uint8_t transquant_bypass_enabled_flag; 338 uint8_t tiles_enabled_flag; 339 uint8_t entropy_coding_sync_enabled_flag; 340 341 uint16_t column_width_minus1[20]; 342 uint16_t row_height_minus1[22]; 343 344 uint8_t num_tile_columns_minus1; 345 uint8_t num_tile_rows_minus1; 346 uint8_t uniform_spacing_flag; 347 uint8_t loop_filter_across_tiles_enabled_flag; 348 349 uint8_t pps_loop_filter_across_slices_enabled_flag; 350 uint8_t deblocking_filter_control_present_flag; 351 uint8_t deblocking_filter_override_enabled_flag; 352 uint8_t pps_deblocking_filter_disabled_flag; 353 354 int8_t pps_beta_offset_div2; 355 int8_t pps_tc_offset_div2; 356 uint8_t lists_modification_present_flag; 357 uint8_t log2_parallel_merge_level_minus2; 358 359 uint16_t st_rps_bits; 360 uint8_t slice_segment_header_extension_present_flag; 361 uint8_t reserved; 362 }; 363 364 struct virgl_h265_picture_desc 365 { 366 struct virgl_base_picture_desc base; 367 368 struct virgl_h265_pps pps; 369 370 int32_t CurrPicOrderCntVal; 371 uint32_t ref[16]; 372 int32_t PicOrderCntVal[16]; 373 374 uint32_t NumPocTotalCurr; 375 uint32_t NumDeltaPocsOfRefRpsIdx; 376 uint32_t NumShortTermPictureSliceHeaderBits; 377 uint32_t NumLongTermPictureSliceHeaderBits; 378 379 uint8_t IsLongTerm[16]; 380 381 uint8_t IDRPicFlag; 382 uint8_t RAPPicFlag; 383 uint8_t CurrRpsIdx; 384 uint8_t NumPocStCurrBefore; 385 386 uint8_t NumPocStCurrAfter; 387 uint8_t NumPocLtCurr; 388 uint8_t UseRefPicList; 389 uint8_t UseStRpsBits; 390 391 uint8_t RefPicSetStCurrBefore[8]; 392 uint8_t RefPicSetStCurrAfter[8]; 393 uint8_t RefPicSetLtCurr[8]; 394 395 uint8_t RefPicList[2][15]; 396 uint8_t reserved[2]; 397 }; 398 399 struct virgl_h265_enc_seq_param 400 { 401 uint8_t general_profile_idc; 402 uint8_t general_level_idc; 403 uint8_t general_tier_flag; 404 uint8_t strong_intra_smoothing_enabled_flag; 405 406 uint32_t intra_period; 407 uint32_t ip_period; 408 409 uint16_t pic_width_in_luma_samples; 410 uint16_t pic_height_in_luma_samples; 411 412 uint32_t chroma_format_idc; 413 uint32_t bit_depth_luma_minus8; 414 uint32_t bit_depth_chroma_minus8; 415 416 uint8_t amp_enabled_flag; 417 uint8_t sample_adaptive_offset_enabled_flag; 418 uint8_t pcm_enabled_flag; 419 uint8_t sps_temporal_mvp_enabled_flag; 420 421 uint8_t log2_min_luma_coding_block_size_minus3; 422 uint8_t log2_diff_max_min_luma_coding_block_size; 423 uint8_t log2_min_transform_block_size_minus2; 424 uint8_t log2_diff_max_min_transform_block_size; 425 426 uint16_t conf_win_left_offset; 427 uint16_t conf_win_right_offset; 428 uint16_t conf_win_top_offset; 429 uint16_t conf_win_bottom_offset; 430 431 uint32_t vui_parameters_present_flag; 432 struct { 433 uint32_t aspect_ratio_info_present_flag: 1; 434 uint32_t timing_info_present_flag: 1; 435 uint32_t reserved:30; 436 } vui_flags; 437 uint32_t aspect_ratio_idc; 438 uint32_t sar_width; 439 uint32_t sar_height; 440 uint32_t num_units_in_tick; 441 uint32_t time_scale; 442 443 uint8_t max_transform_hierarchy_depth_inter; 444 uint8_t max_transform_hierarchy_depth_intra; 445 uint8_t conformance_window_flag; 446 uint8_t reserved; 447 }; 448 449 struct virgl_h265_enc_pic_param 450 { 451 uint8_t log2_parallel_merge_level_minus2; 452 uint8_t nal_unit_type; 453 uint8_t constrained_intra_pred_flag; 454 uint8_t pps_loop_filter_across_slices_enabled_flag; 455 456 uint8_t transform_skip_enabled_flag; 457 uint8_t reserved[3]; 458 }; 459 460 struct virgl_h265_enc_slice_param 461 { 462 uint8_t max_num_merge_cand; 463 int8_t slice_cb_qp_offset; 464 int8_t slice_cr_qp_offset; 465 int8_t slice_beta_offset_div2; 466 467 uint32_t slice_deblocking_filter_disabled_flag; 468 469 int8_t slice_tc_offset_div2; 470 uint8_t cabac_init_flag; 471 uint8_t slice_loop_filter_across_slices_enabled_flag; 472 uint8_t reserved; 473 }; 474 475 struct virgl_h265_enc_rate_control 476 { 477 uint32_t target_bitrate; 478 uint32_t peak_bitrate; 479 uint32_t frame_rate_num; 480 uint32_t frame_rate_den; 481 uint32_t quant_i_frames; 482 uint32_t quant_p_frames; 483 uint32_t quant_b_frames; 484 uint32_t vbv_buffer_size; 485 uint32_t vbv_buf_lv; 486 uint32_t target_bits_picture; 487 uint32_t peak_bits_picture_integer; 488 uint32_t peak_bits_picture_fraction; 489 uint32_t fill_data_enable; 490 uint32_t skip_frame_enable; 491 uint32_t enforce_hrd; 492 uint32_t max_au_size; 493 uint32_t max_qp; 494 uint32_t min_qp; 495 496 uint8_t rate_ctrl_method; /* see enum pipe_h2645_enc_rate_control_method */ 497 uint8_t reserved[3]; 498 }; 499 500 struct virgl_h265_slice_descriptor 501 { 502 uint32_t slice_segment_address; 503 uint32_t num_ctu_in_slice; 504 505 uint8_t slice_type; /* see enum pipe_h265_slice_type */ 506 uint8_t reserved[3]; 507 }; 508 509 struct virgl_h265_enc_picture_desc 510 { 511 struct virgl_base_picture_desc base; 512 513 struct virgl_h265_enc_seq_param seq; 514 struct virgl_h265_enc_pic_param pic; 515 struct virgl_h265_enc_slice_param slice; 516 struct virgl_h265_enc_rate_control rc; 517 518 uint32_t decoded_curr_pic; 519 uint32_t reference_frames[16]; 520 uint32_t frame_num; 521 uint32_t pic_order_cnt; 522 uint32_t pic_order_cnt_type; 523 uint32_t num_ref_idx_l0_active_minus1; 524 uint32_t num_ref_idx_l1_active_minus1; 525 uint32_t ref_idx_l0_list[15]; 526 uint32_t ref_idx_l1_list[15]; 527 uint32_t num_slice_descriptors; 528 struct virgl_h265_slice_descriptor slices_descriptors[128]; 529 struct virgl_enc_quality_modes quality_modes; 530 531 uint8_t picture_type; /* see enum pipe_h2645_enc_picture_type */ 532 uint8_t not_referenced; 533 uint8_t reserved[2]; 534 }; 535 536 struct virgl_mpeg4_picture_desc 537 { 538 struct virgl_base_picture_desc base; 539 540 int32_t trd[2]; 541 int32_t trb[2]; 542 uint16_t vop_time_increment_resolution; 543 uint8_t vop_coding_type; 544 uint8_t vop_fcode_forward; 545 uint8_t vop_fcode_backward; 546 uint8_t resync_marker_disable; 547 uint8_t interlaced; 548 uint8_t quant_type; 549 uint8_t quarter_sample; 550 uint8_t short_video_header; 551 uint8_t rounding_control; 552 uint8_t alternate_vertical_scan_flag; 553 uint8_t top_field_first; 554 555 uint8_t intra_matrix[64]; 556 uint8_t non_intra_matrix[64]; 557 558 uint32_t ref[2]; 559 }; 560 561 union virgl_picture_desc { 562 struct virgl_base_picture_desc base; 563 struct virgl_h264_picture_desc h264; 564 struct virgl_h265_picture_desc h265; 565 struct virgl_mpeg4_picture_desc mpeg4; 566 struct virgl_h264_enc_picture_desc h264_enc; 567 struct virgl_h265_enc_picture_desc h265_enc; 568 }; 569 570 enum virgl_video_encode_stat { 571 VIRGL_VIDEO_ENCODE_STAT_NOT_STARTED = 0, 572 VIRGL_VIDEO_ENCODE_STAT_IN_PROGRESS, 573 VIRGL_VIDEO_ENCODE_STAT_SUCCESS, 574 VIRGL_VIDEO_ENCODE_STAT_FAILURE, 575 }; 576 577 struct virgl_video_encode_feedback { 578 uint8_t stat; /* see enum virgl_video_encode_stat */ 579 uint8_t reserved[3]; 580 581 uint32_t coded_size; /* size of encoded data in bytes */ 582 }; 583 584 #endif /* VIRGL_VIDEO_HW_H */ 585 586