1 /*
2  * Virtio GPU Device
3  *
4  * Copyright Red Hat, Inc. 2013-2014
5  *
6  * Authors:
7  *     Dave Airlie <[email protected]>
8  *     Gerd Hoffmann <[email protected]>
9  *
10  * This header is BSD licensed so anyone can use the definitions
11  * to implement compatible drivers/servers:
12  *
13  * Redistribution and use in source and binary forms, with or without
14  * modification, are permitted provided that the following conditions
15  * are met:
16  * 1. Redistributions of source code must retain the above copyright
17  *    notice, this list of conditions and the following disclaimer.
18  * 2. Redistributions in binary form must reproduce the above copyright
19  *    notice, this list of conditions and the following disclaimer in the
20  *    documentation and/or other materials provided with the distribution.
21  * 3. Neither the name of IBM nor the names of its contributors
22  *    may be used to endorse or promote products derived from this software
23  *    without specific prior written permission.
24  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
25  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
26  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
27  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL IBM OR
28  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
29  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
30  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
31  * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
32  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
33  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
34  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35  * SUCH DAMAGE.
36  */
37 
38 /* taken from qemu sources */
39 
40 #ifndef VIRTIO_GPU_HW_H
41 #define VIRTIO_GPU_HW_H
42 
43 #include <stdint.h>
44 
45 enum virtio_gpu_ctrl_type {
46     VIRTIO_GPU_UNDEFINED = 0,
47 
48     /* 2d commands */
49     VIRTIO_GPU_CMD_GET_DISPLAY_INFO = 0x0100,
50     VIRTIO_GPU_CMD_RESOURCE_CREATE_2D,
51     VIRTIO_GPU_CMD_RESOURCE_UNREF,
52     VIRTIO_GPU_CMD_SET_SCANOUT,
53     VIRTIO_GPU_CMD_RESOURCE_FLUSH,
54     VIRTIO_GPU_CMD_TRANSFER_TO_HOST_2D,
55     VIRTIO_GPU_CMD_RESOURCE_ATTACH_BACKING,
56     VIRTIO_GPU_CMD_RESOURCE_DETACH_BACKING,
57 
58     /* cursor commands */
59     VIRTIO_GPU_CMD_UPDATE_CURSOR = 0x0300,
60     VIRTIO_GPU_CMD_MOVE_CURSOR,
61 
62     /* success responses */
63     VIRTIO_GPU_RESP_OK_NODATA = 0x1100,
64     VIRTIO_GPU_RESP_OK_DISPLAY_INFO,
65 
66     /* error responses */
67     VIRTIO_GPU_RESP_ERR_UNSPEC = 0x1200,
68     VIRTIO_GPU_RESP_ERR_OUT_OF_MEMORY,
69     VIRTIO_GPU_RESP_ERR_INVALID_SCANOUT_ID,
70     VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID,
71     VIRTIO_GPU_RESP_ERR_INVALID_CONTEXT_ID,
72     VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER,
73 };
74 
75 #define VIRTIO_GPU_FLAG_FENCE (1 << 0)
76 
77 struct virtio_gpu_ctrl_hdr {
78     uint32_t type;
79     uint32_t flags;
80     uint64_t fence_id;
81     uint32_t ctx_id;
82     uint32_t padding;
83 };
84 
85 /* data passed in the cursor vq */
86 
87 struct virtio_gpu_cursor_pos {
88     uint32_t scanout_id;
89     uint32_t x;
90     uint32_t y;
91     uint32_t padding;
92 };
93 
94 /* VIRTIO_GPU_CMD_UPDATE_CURSOR, VIRTIO_GPU_CMD_MOVE_CURSOR */
95 struct virtio_gpu_update_cursor {
96     struct virtio_gpu_ctrl_hdr hdr;
97     struct virtio_gpu_cursor_pos pos;  /* update & move */
98     uint32_t resource_id;           /* update only */
99     uint32_t hot_x;                 /* update only */
100     uint32_t hot_y;                 /* update only */
101     uint32_t padding;
102 };
103 
104 /* data passed in the control vq, 2d related */
105 
106 struct virtio_gpu_rect {
107     uint32_t x;
108     uint32_t y;
109     uint32_t width;
110     uint32_t height;
111 };
112 
113 /* VIRTIO_GPU_CMD_RESOURCE_UNREF */
114 struct virtio_gpu_resource_unref {
115     struct virtio_gpu_ctrl_hdr hdr;
116     uint32_t resource_id;
117     uint32_t padding;
118 };
119 
120 /* VIRTIO_GPU_CMD_RESOURCE_CREATE_2D: create a 2d resource with a format */
121 struct virtio_gpu_resource_create_2d {
122     struct virtio_gpu_ctrl_hdr hdr;
123     uint32_t resource_id;
124     uint32_t format;
125     uint32_t width;
126     uint32_t height;
127 };
128 
129 /* VIRTIO_GPU_CMD_SET_SCANOUT */
130 struct virtio_gpu_set_scanout {
131     struct virtio_gpu_ctrl_hdr hdr;
132     struct virtio_gpu_rect r;
133     uint32_t scanout_id;
134     uint32_t resource_id;
135 };
136 
137 /* VIRTIO_GPU_CMD_RESOURCE_FLUSH */
138 struct virtio_gpu_resource_flush {
139     struct virtio_gpu_ctrl_hdr hdr;
140     struct virtio_gpu_rect r;
141     uint32_t resource_id;
142     uint32_t padding;
143 };
144 
145 /* VIRTIO_GPU_CMD_TRANSFER_TO_HOST_2D: simple transfer to_host */
146 struct virtio_gpu_transfer_to_host_2d {
147     struct virtio_gpu_ctrl_hdr hdr;
148     struct virtio_gpu_rect r;
149     uint64_t offset;
150     uint32_t resource_id;
151     uint32_t padding;
152 };
153 
154 struct virtio_gpu_mem_entry {
155     uint64_t addr;
156     uint32_t length;
157     uint32_t padding;
158 };
159 
160 /* VIRTIO_GPU_CMD_RESOURCE_ATTACH_BACKING */
161 struct virtio_gpu_resource_attach_backing {
162     struct virtio_gpu_ctrl_hdr hdr;
163     uint32_t resource_id;
164     uint32_t nr_entries;
165 };
166 
167 /* VIRTIO_GPU_CMD_RESOURCE_DETACH_BACKING */
168 struct virtio_gpu_resource_detach_backing {
169     struct virtio_gpu_ctrl_hdr hdr;
170     uint32_t resource_id;
171     uint32_t padding;
172 };
173 
174 /* VIRTIO_GPU_RESP_OK_DISPLAY_INFO */
175 #define VIRTIO_GPU_MAX_SCANOUTS 16
176 struct virtio_gpu_resp_display_info {
177     struct virtio_gpu_ctrl_hdr hdr;
178     struct virtio_gpu_display_one {
179         struct virtio_gpu_rect r;
180         uint32_t enabled;
181         uint32_t flags;
182     } pmodes[VIRTIO_GPU_MAX_SCANOUTS];
183 };
184 
185 #define VIRTIO_GPU_EVENT_DISPLAY (1 << 0)
186 
187 struct virtio_gpu_config {
188     uint32_t events_read;
189     uint32_t events_clear;
190     uint32_t num_scanouts;
191     uint32_t reserved;
192 };
193 
194 /* simple formats for fbcon/X use */
195 enum virtio_gpu_formats {
196     VIRTIO_GPU_FORMAT_B8G8R8A8_UNORM  = 1,
197     VIRTIO_GPU_FORMAT_B8G8R8X8_UNORM  = 2,
198     VIRTIO_GPU_FORMAT_A8R8G8B8_UNORM  = 3,
199     VIRTIO_GPU_FORMAT_X8R8G8B8_UNORM  = 4,
200 
201     VIRTIO_GPU_FORMAT_R8G8B8A8_UNORM  = 67,
202     VIRTIO_GPU_FORMAT_X8B8G8R8_UNORM  = 68,
203 
204     VIRTIO_GPU_FORMAT_A8B8G8R8_UNORM  = 121,
205     VIRTIO_GPU_FORMAT_R8G8B8X8_UNORM  = 134,
206 };
207 
208 #endif
209