1#
2# Copyright (c) 2013-2021, Arm Limited and Contributors. All rights reserved.
3# Portions copyright (c) 2021-2022, ProvenRun S.A.S. All rights reserved.
4# Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved.
5# Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved.
6#
7# SPDX-License-Identifier: BSD-3-Clause
8
9override ERRATA_A53_855873 := 1
10ERRATA_A53_1530924 := 1
11override PROGRAMMABLE_RESET_ADDRESS := 1
12PSCI_EXTENDED_STATE_ID := 1
13A53_DISABLE_NON_TEMPORAL_HINT := 0
14SEPARATE_CODE_AND_RODATA := 1
15ZYNQMP_WDT_RESTART := 0
16IPI_CRC_CHECK := 0
17override RESET_TO_BL31 := 1
18override WARMBOOT_ENABLE_DCACHE_EARLY := 1
19
20EL3_EXCEPTION_HANDLING := $(SDEI_SUPPORT)
21
22# pncd SPD requires secure SGI to be handled at EL1
23ifeq (${SPD}, $(filter ${SPD},pncd tspd))
24ifeq (${ZYNQMP_WDT_RESTART},1)
25$(error "Error: ZYNQMP_WDT_RESTART and SPD=pncd are incompatible")
26endif
27override GICV2_G0_FOR_EL3 := 0
28else
29override GICV2_G0_FOR_EL3 := 1
30endif
31
32# Do not enable SVE
33ENABLE_SVE_FOR_NS	:= 0
34
35WORKAROUND_CVE_2017_5715	:=	0
36
37ARM_XLAT_TABLES_LIB_V1		:=	1
38$(eval $(call assert_boolean,ARM_XLAT_TABLES_LIB_V1))
39$(eval $(call add_define,ARM_XLAT_TABLES_LIB_V1))
40
41ifdef ZYNQMP_ATF_MEM_BASE
42    $(eval $(call add_define,ZYNQMP_ATF_MEM_BASE))
43
44    ifndef ZYNQMP_ATF_MEM_SIZE
45        $(error "ZYNQMP_ATF_BASE defined without ZYNQMP_ATF_SIZE")
46    endif
47    $(eval $(call add_define,ZYNQMP_ATF_MEM_SIZE))
48
49    ifdef ZYNQMP_ATF_MEM_PROGBITS_SIZE
50        $(eval $(call add_define,ZYNQMP_ATF_MEM_PROGBITS_SIZE))
51    endif
52
53    # enable assert() when TF-A runs from DDR memory.
54    ENABLE_ASSERTIONS := 1
55
56endif
57
58ifdef ZYNQMP_BL32_MEM_BASE
59    $(eval $(call add_define,ZYNQMP_BL32_MEM_BASE))
60
61    ifndef ZYNQMP_BL32_MEM_SIZE
62        $(error "ZYNQMP_BL32_BASE defined without ZYNQMP_BL32_SIZE")
63    endif
64    $(eval $(call add_define,ZYNQMP_BL32_MEM_SIZE))
65endif
66
67
68ifdef ZYNQMP_WDT_RESTART
69    $(eval $(call add_define,ZYNQMP_WDT_RESTART))
70endif
71
72ifdef ZYNQMP_IPI_CRC_CHECK
73    $(warning "ZYNQMP_IPI_CRC_CHECK macro is deprecated...instead please use IPI_CRC_CHECK.")
74endif
75
76ifdef IPI_CRC_CHECK
77    $(eval $(call add_define,IPI_CRC_CHECK))
78endif
79
80ifdef ZYNQMP_SECURE_EFUSES
81    $(eval $(call add_define,ZYNQMP_SECURE_EFUSES))
82endif
83
84ifdef XILINX_OF_BOARD_DTB_ADDR
85$(eval $(call add_define,XILINX_OF_BOARD_DTB_ADDR))
86endif
87
88PLAT_INCLUDES		:=	-Iinclude/plat/arm/common/			\
89				-Iinclude/plat/arm/common/aarch64/		\
90				-Iplat/xilinx/common/include/			\
91				-Iplat/xilinx/common/ipi_mailbox_service/	\
92				-Iplat/xilinx/zynqmp/include/			\
93				-Iplat/xilinx/zynqmp/pm_service/		\
94
95include lib/libfdt/libfdt.mk
96# Include GICv2 driver files
97include drivers/arm/gic/v2/gicv2.mk
98
99PLAT_BL_COMMON_SOURCES	:=	lib/xlat_tables/xlat_tables_common.c		\
100				lib/xlat_tables/aarch64/xlat_tables.c		\
101				drivers/arm/dcc/dcc_console.c			\
102				drivers/delay_timer/delay_timer.c		\
103				drivers/delay_timer/generic_delay_timer.c	\
104				${GICV2_SOURCES}				\
105				drivers/cadence/uart/aarch64/cdns_console.S	\
106				plat/arm/common/arm_cci.c			\
107				plat/arm/common/arm_common.c			\
108				plat/arm/common/arm_gicv2.c			\
109				plat/common/plat_gicv2.c			\
110				plat/xilinx/common/ipi.c			\
111				plat/xilinx/zynqmp/zynqmp_ipi.c			\
112				plat/common/aarch64/crash_console_helpers.S	\
113				plat/xilinx/zynqmp/aarch64/zynqmp_helpers.S	\
114				plat/xilinx/zynqmp/aarch64/zynqmp_common.c
115
116ZYNQMP_CONSOLE	?=	cadence
117ifeq (${ZYNQMP_CONSOLE}, $(filter ${ZYNQMP_CONSOLE},cadence cadence0 cadence1 dcc))
118else
119  $(error "Please define ZYNQMP_CONSOLE")
120endif
121$(eval $(call add_define_val,ZYNQMP_CONSOLE,ZYNQMP_CONSOLE_ID_${ZYNQMP_CONSOLE}))
122
123# Build PM code as a Library
124include plat/xilinx/zynqmp/libpm.mk
125
126BL31_SOURCES		+=	drivers/arm/cci/cci.c				\
127				lib/cpus/aarch64/aem_generic.S			\
128				lib/cpus/aarch64/cortex_a53.S			\
129				plat/common/plat_psci_common.c			\
130				common/fdt_fixup.c				\
131				common/fdt_wrappers.c				\
132				${LIBFDT_SRCS}					\
133				plat/xilinx/common/ipi_mailbox_service/ipi_mailbox_svc.c \
134				plat/xilinx/common/plat_startup.c		\
135				plat/xilinx/common/plat_console.c		\
136				plat/xilinx/common/plat_fdt.c			\
137				plat/xilinx/zynqmp/bl31_zynqmp_setup.c		\
138				plat/xilinx/zynqmp/plat_psci.c			\
139				plat/xilinx/zynqmp/plat_zynqmp.c		\
140				plat/xilinx/zynqmp/plat_topology.c		\
141				plat/xilinx/zynqmp/sip_svc_setup.c
142
143ifeq (${SDEI_SUPPORT},1)
144BL31_SOURCES		+=	plat/xilinx/zynqmp/zynqmp_ehf.c			\
145				plat/xilinx/zynqmp/zynqmp_sdei.c
146endif
147
148BL31_CPPFLAGS		+=	-fno-jump-tables
149TF_CFLAGS_aarch64	+=	-mbranch-protection=none
150
151ifdef CUSTOM_PKG_PATH
152include $(CUSTOM_PKG_PATH)/custom_pkg.mk
153else
154BL31_SOURCES		+=	plat/xilinx/zynqmp/custom_sip_svc.c
155endif
156
157ifneq (${RESET_TO_BL31},1)
158  $(error "Using BL31 as the reset vector is only one option supported on ZynqMP. Please set RESET_TO_BL31 to 1.")
159endif
160