1# Copyright (c) 2018-2021, Arm Limited and Contributors. All rights reserved.
2# Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved.
3#
4# SPDX-License-Identifier: BSD-3-Clause
5
6override PROGRAMMABLE_RESET_ADDRESS := 1
7PSCI_EXTENDED_STATE_ID := 1
8A53_DISABLE_NON_TEMPORAL_HINT := 0
9SEPARATE_CODE_AND_RODATA := 1
10override RESET_TO_BL31 := 1
11PL011_GENERIC_UART := 1
12IPI_CRC_CHECK := 0
13HARDEN_SLS_ALL := 0
14CPU_PWRDWN_SGI ?= 6
15$(eval $(call add_define_val,CPU_PWR_DOWN_REQ_INTR,ARM_IRQ_SEC_SGI_${CPU_PWRDWN_SGI}))
16
17# A72 Erratum for SoC
18ERRATA_A72_859971 := 1
19ERRATA_A72_1319367 := 1
20
21ifdef VERSAL_ATF_MEM_BASE
22    $(eval $(call add_define,VERSAL_ATF_MEM_BASE))
23
24    ifndef VERSAL_ATF_MEM_SIZE
25        $(error "VERSAL_ATF_BASE defined without VERSAL_ATF_SIZE")
26    endif
27    $(eval $(call add_define,VERSAL_ATF_MEM_SIZE))
28
29    ifdef VERSAL_ATF_MEM_PROGBITS_SIZE
30        $(eval $(call add_define,VERSAL_ATF_MEM_PROGBITS_SIZE))
31    endif
32endif
33
34ifdef VERSAL_BL32_MEM_BASE
35    $(eval $(call add_define,VERSAL_BL32_MEM_BASE))
36
37    ifndef VERSAL_BL32_MEM_SIZE
38        $(error "VERSAL_BL32_BASE defined without VERSAL_BL32_SIZE")
39    endif
40    $(eval $(call add_define,VERSAL_BL32_MEM_SIZE))
41endif
42
43ifdef IPI_CRC_CHECK
44    $(eval $(call add_define,IPI_CRC_CHECK))
45endif
46
47VERSAL_PLATFORM ?= silicon
48$(eval $(call add_define_val,VERSAL_PLATFORM,VERSAL_PLATFORM_ID_${VERSAL_PLATFORM}))
49
50ifdef XILINX_OF_BOARD_DTB_ADDR
51$(eval $(call add_define,XILINX_OF_BOARD_DTB_ADDR))
52endif
53
54PLAT_XLAT_TABLES_DYNAMIC := 0
55ifeq (${PLAT_XLAT_TABLES_DYNAMIC},1)
56$(eval $(call add_define,PLAT_XLAT_TABLES_DYNAMIC))
57endif
58
59# enable assert() for release/debug builds
60ENABLE_ASSERTIONS := 1
61
62PLAT_INCLUDES		:=	-Iinclude/plat/arm/common/			\
63				-Iplat/xilinx/common/include/			\
64				-Iplat/xilinx/common/ipi_mailbox_service/	\
65				-Iplat/xilinx/versal/include/			\
66				-Iplat/xilinx/versal/pm_service/
67
68include lib/libfdt/libfdt.mk
69# Include GICv3 driver files
70include drivers/arm/gic/v3/gicv3.mk
71include lib/xlat_tables_v2/xlat_tables.mk
72
73PLAT_BL_COMMON_SOURCES	:= 	drivers/arm/dcc/dcc_console.c			\
74				drivers/delay_timer/delay_timer.c		\
75				drivers/delay_timer/generic_delay_timer.c	\
76				${GICV3_SOURCES}				\
77				drivers/arm/pl011/aarch64/pl011_console.S	\
78				plat/common/aarch64/crash_console_helpers.S	\
79				plat/arm/common/arm_cci.c			\
80				plat/arm/common/arm_common.c			\
81				plat/common/plat_gicv3.c			\
82				plat/xilinx/versal/aarch64/versal_helpers.S	\
83				plat/xilinx/versal/aarch64/versal_common.c	\
84				${XLAT_TABLES_LIB_SRCS}
85
86VERSAL_CONSOLE	?=	pl011
87ifeq (${VERSAL_CONSOLE}, $(filter ${VERSAL_CONSOLE},pl011 pl011_0 pl011_1 dcc))
88else
89  $(error "Please define VERSAL_CONSOLE")
90endif
91
92$(eval $(call add_define_val,VERSAL_CONSOLE,VERSAL_CONSOLE_ID_${VERSAL_CONSOLE}))
93
94BL31_SOURCES		+=	drivers/arm/cci/cci.c				\
95				lib/cpus/aarch64/cortex_a72.S			\
96				common/fdt_wrappers.c                           \
97				plat/common/plat_psci_common.c			\
98				plat/xilinx/common/ipi.c			\
99				plat/xilinx/common/plat_fdt.c			\
100				plat/xilinx/common/plat_console.c               \
101				plat/xilinx/common/plat_clkfunc.c               \
102				plat/xilinx/common/plat_startup.c		\
103				plat/xilinx/common/ipi_mailbox_service/ipi_mailbox_svc.c \
104				plat/xilinx/common/pm_service/pm_ipi.c		\
105				plat/xilinx/common/pm_service/pm_api_sys.c	\
106				plat/xilinx/common/pm_service/pm_svc_main.c	\
107				plat/xilinx/common/versal.c			\
108				plat/xilinx/versal/bl31_versal_setup.c		\
109				plat/xilinx/versal/plat_psci.c			\
110				plat/xilinx/versal/plat_versal.c		\
111				plat/xilinx/versal/plat_topology.c		\
112				plat/xilinx/versal/sip_svc_setup.c		\
113				plat/xilinx/versal/versal_gicv3.c		\
114				plat/xilinx/versal/versal_ipi.c			\
115				plat/xilinx/versal/pm_service/pm_client.c	\
116				common/fdt_fixup.c				\
117				${LIBFDT_SRCS}
118
119ifeq ($(HARDEN_SLS_ALL), 1)
120TF_CFLAGS_aarch64      +=      -mharden-sls=all
121endif
122
123ifeq (${ERRATA_ABI_SUPPORT}, 1)
124# enable the cpu macros for errata abi interface
125CORTEX_A72_H_INC	:= 1
126$(eval $(call add_define, CORTEX_A72_H_INC))
127endif
128