1#
2# Copyright (c) 2015-2023, Arm Limited and Contributors. All rights reserved.
3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7include plat/st/common/common.mk
8
9ARM_CORTEX_A7		:=	yes
10ARM_WITH_NEON		:=	yes
11USE_COHERENT_MEM	:=	0
12
13# Default Device tree
14DTB_FILE_NAME		?=	stm32mp157c-ev1.dtb
15
16STM32MP13		?=	0
17STM32MP15		?=	0
18
19ifeq ($(STM32MP13),1)
20ifeq ($(STM32MP15),1)
21$(error Cannot enable both flags STM32MP13 and STM32MP15)
22endif
23STM32MP13		:=	1
24STM32MP15		:=	0
25else ifeq ($(STM32MP15),1)
26STM32MP13		:=	0
27STM32MP15		:=	1
28else ifneq ($(findstring stm32mp13,$(DTB_FILE_NAME)),)
29STM32MP13		:=	1
30STM32MP15		:=	0
31else ifneq ($(findstring stm32mp15,$(DTB_FILE_NAME)),)
32STM32MP13		:=	0
33STM32MP15		:=	1
34endif
35
36ifeq ($(STM32MP13),1)
37# Will use SRAM2 as mbedtls heap
38STM32MP_USE_EXTERNAL_HEAP :=	1
39
40# DDR controller with single AXI port and 16-bit interface
41STM32MP_DDR_DUAL_AXI_PORT:=	0
42STM32MP_DDR_32BIT_INTERFACE:=	0
43
44ifeq (${TRUSTED_BOARD_BOOT},1)
45# PKA algo to include
46PKA_USE_NIST_P256	:=	1
47PKA_USE_BRAINPOOL_P256T1:=	1
48endif
49
50# STM32 image header version v2.0
51STM32_HEADER_VERSION_MAJOR:=	2
52STM32_HEADER_VERSION_MINOR:=	0
53endif
54
55ifeq ($(STM32MP15),1)
56# DDR controller with dual AXI port and 32-bit interface
57STM32MP_DDR_DUAL_AXI_PORT:=	1
58STM32MP_DDR_32BIT_INTERFACE:=	1
59
60# STM32 image header version v1.0
61STM32_HEADER_VERSION_MAJOR:=	1
62STM32_HEADER_VERSION_MINOR:=	0
63
64# Add OP-TEE reserved shared memory area in mapping
65STM32MP15_OPTEE_RSV_SHM	:=	0
66$(eval $(call add_defines,STM32MP15_OPTEE_RSV_SHM))
67
68STM32MP_CRYPTO_ROM_LIB :=	1
69
70# Decryption support
71ifneq ($(DECRYPTION_SUPPORT),none)
72$(error "DECRYPTION_SUPPORT not supported on STM32MP15")
73endif
74endif
75
76PKA_USE_NIST_P256	?=	0
77PKA_USE_BRAINPOOL_P256T1 ?=	0
78
79ifeq ($(AARCH32_SP),sp_min)
80# Disable Neon support: sp_min runtime may conflict with non-secure world
81TF_CFLAGS		+=	-mfloat-abi=soft
82endif
83
84# Not needed for Cortex-A7
85WORKAROUND_CVE_2017_5715:=	0
86WORKAROUND_CVE_2022_23960:=	0
87
88# Number of TF-A copies in the device
89STM32_TF_A_COPIES		:=	2
90
91# PLAT_PARTITION_MAX_ENTRIES must take care of STM32_TF-A_COPIES and other partitions
92# such as metadata (2) to find all the FIP partitions (default is 2).
93PLAT_PARTITION_MAX_ENTRIES	:=	$(shell echo $$(($(STM32_TF_A_COPIES) + 4)))
94
95ifeq (${PSA_FWU_SUPPORT},1)
96# Number of banks of updatable firmware
97NR_OF_FW_BANKS			:=	2
98NR_OF_IMAGES_IN_FW_BANK		:=	1
99
100FWU_MAX_PART = $(shell echo $$(($(STM32_TF_A_COPIES) + 2 + $(NR_OF_FW_BANKS))))
101ifeq ($(shell test $(FWU_MAX_PART) -gt $(PLAT_PARTITION_MAX_ENTRIES); echo $$?),0)
102$(error "Required partition number is $(FWU_MAX_PART) where PLAT_PARTITION_MAX_ENTRIES is only \
103$(PLAT_PARTITION_MAX_ENTRIES)")
104endif
105endif
106
107ifeq ($(STM32MP13),1)
108STM32_HASH_VER		:=	4
109STM32_RNG_VER		:=	4
110else # Assuming STM32MP15
111STM32_HASH_VER		:=	2
112STM32_RNG_VER		:=	2
113endif
114
115# Download load address for serial boot devices
116DWL_BUFFER_BASE 	?=	0xC7000000
117
118# Device tree
119ifeq ($(STM32MP13),1)
120BL2_DTSI		:=	stm32mp13-bl2.dtsi
121FDT_SOURCES		:=	$(addprefix ${BUILD_PLAT}/fdts/, $(patsubst %.dtb,%-bl2.dts,$(DTB_FILE_NAME)))
122else
123BL2_DTSI		:=	stm32mp15-bl2.dtsi
124FDT_SOURCES		:=	$(addprefix ${BUILD_PLAT}/fdts/, $(patsubst %.dtb,%-bl2.dts,$(DTB_FILE_NAME)))
125ifeq ($(AARCH32_SP),sp_min)
126BL32_DTSI		:=	stm32mp15-bl32.dtsi
127FDT_SOURCES		+=	$(addprefix ${BUILD_PLAT}/fdts/, $(patsubst %.dtb,%-bl32.dts,$(DTB_FILE_NAME)))
128endif
129endif
130
131# Macros and rules to build TF binary
132STM32_TF_STM32		:=	$(addprefix ${BUILD_PLAT}/tf-a-, $(patsubst %.dtb,%.stm32,$(DTB_FILE_NAME)))
133STM32_LD_FILE		:=	plat/st/stm32mp1/stm32mp1.ld.S
134STM32_BINARY_MAPPING	:=	plat/st/stm32mp1/stm32mp1.S
135
136ifeq ($(AARCH32_SP),sp_min)
137# BL32 is built only if using SP_MIN
138BL32_DEP		:= bl32
139ASFLAGS			+= -DBL32_BIN_PATH=\"${BUILD_PLAT}/bl32.bin\"
140endif
141
142STM32MP_FW_CONFIG_NAME	:=	$(patsubst %.dtb,%-fw-config.dtb,$(DTB_FILE_NAME))
143STM32MP_FW_CONFIG	:=	${BUILD_PLAT}/fdts/$(STM32MP_FW_CONFIG_NAME)
144ifneq (${AARCH32_SP},none)
145FDT_SOURCES		+=	$(addprefix fdts/, $(patsubst %.dtb,%.dts,$(STM32MP_FW_CONFIG_NAME)))
146endif
147# Add the FW_CONFIG to FIP and specify the same to certtool
148$(eval $(call TOOL_ADD_PAYLOAD,${STM32MP_FW_CONFIG},--fw-config))
149ifeq ($(GENERATE_COT),1)
150STM32MP_CFG_CERT	:=	$(BUILD_PLAT)/stm32mp_cfg_cert.crt
151# Add the STM32MP_CFG_CERT to FIP and specify the same to certtool
152$(eval $(call TOOL_ADD_PAYLOAD,${STM32MP_CFG_CERT},--stm32mp-cfg-cert))
153endif
154ifeq ($(AARCH32_SP),sp_min)
155STM32MP_TOS_FW_CONFIG	:= $(addprefix ${BUILD_PLAT}/fdts/, $(patsubst %.dtb,%-bl32.dtb,$(DTB_FILE_NAME)))
156$(eval $(call TOOL_ADD_PAYLOAD,${STM32MP_TOS_FW_CONFIG},--tos-fw-config))
157endif
158
159# Enable flags for C files
160$(eval $(call assert_booleans,\
161	$(sort \
162		PKA_USE_BRAINPOOL_P256T1 \
163		PKA_USE_NIST_P256 \
164		STM32MP_CRYPTO_ROM_LIB \
165		STM32MP_DDR_32BIT_INTERFACE \
166		STM32MP_DDR_DUAL_AXI_PORT \
167		STM32MP_USE_EXTERNAL_HEAP \
168		STM32MP13 \
169		STM32MP15 \
170)))
171
172$(eval $(call assert_numerics,\
173	$(sort \
174		PLAT_PARTITION_MAX_ENTRIES \
175		STM32_HASH_VER \
176		STM32_HEADER_VERSION_MAJOR \
177		STM32_RNG_VER \
178		STM32_TF_A_COPIES \
179)))
180
181$(eval $(call add_defines,\
182	$(sort \
183		DWL_BUFFER_BASE \
184		PKA_USE_BRAINPOOL_P256T1 \
185		PKA_USE_NIST_P256 \
186		PLAT_PARTITION_MAX_ENTRIES \
187		PLAT_TBBR_IMG_DEF \
188		STM32_HASH_VER \
189		STM32_HEADER_VERSION_MAJOR \
190		STM32_RNG_VER \
191		STM32_TF_A_COPIES \
192		STM32MP_CRYPTO_ROM_LIB \
193		STM32MP_DDR_32BIT_INTERFACE \
194		STM32MP_DDR_DUAL_AXI_PORT \
195		STM32MP_USE_EXTERNAL_HEAP \
196		STM32MP13 \
197		STM32MP15 \
198)))
199
200# Include paths and source files
201PLAT_INCLUDES		+=	-Iplat/st/stm32mp1/include/
202
203PLAT_BL_COMMON_SOURCES	+=	plat/st/stm32mp1/stm32mp1_private.c
204
205PLAT_BL_COMMON_SOURCES	+=	drivers/st/uart/aarch32/stm32_console.S
206
207ifneq (${ENABLE_STACK_PROTECTOR},0)
208PLAT_BL_COMMON_SOURCES	+=	plat/st/stm32mp1/stm32mp1_stack_protector.c
209endif
210
211PLAT_BL_COMMON_SOURCES	+=	lib/cpus/aarch32/cortex_a7.S
212
213PLAT_BL_COMMON_SOURCES	+=	drivers/arm/tzc/tzc400.c				\
214				drivers/st/bsec/bsec2.c					\
215				drivers/st/ddr/stm32mp1_ddr_helpers.c			\
216				drivers/st/i2c/stm32_i2c.c				\
217				drivers/st/iwdg/stm32_iwdg.c				\
218				drivers/st/pmic/stm32mp_pmic.c				\
219				drivers/st/pmic/stpmic1.c				\
220				drivers/st/reset/stm32mp1_reset.c			\
221				plat/st/stm32mp1/stm32mp1_dbgmcu.c			\
222				plat/st/stm32mp1/stm32mp1_helper.S			\
223				plat/st/stm32mp1/stm32mp1_syscfg.c
224
225ifeq ($(STM32MP13),1)
226PLAT_BL_COMMON_SOURCES	+=	drivers/st/clk/clk-stm32-core.c				\
227				drivers/st/clk/clk-stm32mp13.c				\
228				drivers/st/crypto/stm32_rng.c
229else
230PLAT_BL_COMMON_SOURCES	+=	drivers/st/clk/stm32mp1_clk.c
231endif
232
233BL2_SOURCES		+=	plat/st/stm32mp1/plat_bl2_mem_params_desc.c		\
234				plat/st/stm32mp1/stm32mp1_fconf_firewall.c
235
236ifeq (${PSA_FWU_SUPPORT},1)
237include drivers/fwu/fwu.mk
238endif
239
240BL2_SOURCES		+=	drivers/st/crypto/stm32_hash.c				\
241				plat/st/stm32mp1/bl2_plat_setup.c
242
243ifeq (${TRUSTED_BOARD_BOOT},1)
244ifeq ($(STM32MP13),1)
245BL2_SOURCES		+=	drivers/st/crypto/stm32_pka.c
246BL2_SOURCES		+=	drivers/st/crypto/stm32_saes.c
247endif
248endif
249
250ifneq ($(filter 1,${STM32MP_EMMC} ${STM32MP_SDMMC}),)
251BL2_SOURCES		+=	drivers/st/mmc/stm32_sdmmc2.c
252endif
253
254ifeq (${STM32MP_RAW_NAND},1)
255BL2_SOURCES		+=	drivers/st/fmc/stm32_fmc2_nand.c
256endif
257
258ifneq ($(filter 1,${STM32MP_SPI_NAND} ${STM32MP_SPI_NOR}),)
259BL2_SOURCES		+=	drivers/st/spi/stm32_qspi.c
260endif
261
262ifneq ($(filter 1,${STM32MP_RAW_NAND} ${STM32MP_SPI_NAND} ${STM32MP_SPI_NOR}),)
263BL2_SOURCES		+=	plat/st/stm32mp1/stm32mp1_boot_device.c
264endif
265
266ifeq (${STM32MP_UART_PROGRAMMER},1)
267BL2_SOURCES		+=	drivers/st/uart/stm32_uart.c
268endif
269
270ifeq (${STM32MP_USB_PROGRAMMER},1)
271#The DFU stack uses only one end point, reduce the USB stack footprint
272$(eval $(call add_define_val,CONFIG_USBD_EP_NB,1U))
273BL2_SOURCES		+=	drivers/st/usb/stm32mp1_usb.c				\
274				plat/st/stm32mp1/stm32mp1_usb_dfu.c
275endif
276
277BL2_SOURCES		+=	drivers/st/ddr/stm32mp1_ddr.c				\
278				drivers/st/ddr/stm32mp1_ram.c
279
280ifeq ($(AARCH32_SP),sp_min)
281# Create DTB file for BL32
282${BUILD_PLAT}/fdts/%-bl32.dts: fdts/%.dts fdts/${BL32_DTSI} | ${BUILD_PLAT} fdt_dirs
283	@echo '#include "$(patsubst fdts/%,%,$<)"' > $@
284	@echo '#include "${BL32_DTSI}"' >> $@
285
286${BUILD_PLAT}/fdts/%-bl32.dtb: ${BUILD_PLAT}/fdts/%-bl32.dts
287endif
288
289include plat/st/common/common_rules.mk
290