1 /* 2 * Copyright (c) 2016-2024, Arm Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef RPI_HW_H 8 #define RPI_HW_H 9 10 #include <lib/utils_def.h> 11 12 /* 13 * Peripherals 14 */ 15 16 #define RPI_IO_BASE ULL(0xFC000000) 17 #define RPI_IO_SIZE ULL(0x04000000) 18 19 #define RPI_LEGACY_BASE (ULL(0x02000000) + RPI_IO_BASE) 20 21 /* 22 * ARM <-> VideoCore mailboxes 23 */ 24 #define RPI3_MBOX_OFFSET ULL(0x0000B880) 25 #define RPI3_MBOX_BASE (RPI_LEGACY_BASE + RPI3_MBOX_OFFSET) 26 27 /* 28 * Power management, reset controller, watchdog. 29 */ 30 #define RPI3_IO_PM_OFFSET ULL(0x00100000) 31 #define RPI3_PM_BASE (RPI_LEGACY_BASE + RPI3_IO_PM_OFFSET) 32 33 /* 34 * Hardware random number generator. 35 */ 36 #define RPI3_IO_RNG_OFFSET ULL(0x00104000) 37 #define RPI3_RNG_BASE (RPI_LEGACY_BASE + RPI3_IO_RNG_OFFSET) 38 39 /* 40 * Serial ports: 41 * 'Mini UART' in the BCM docucmentation is the 8250 compatible UART. 42 * There is also a PL011 UART, multiplexed to the same pins. 43 */ 44 #define RPI4_IO_MINI_UART_OFFSET ULL(0x00215040) 45 #define RPI4_MINI_UART_BASE (RPI_LEGACY_BASE + RPI4_IO_MINI_UART_OFFSET) 46 #define RPI4_IO_PL011_UART_OFFSET ULL(0x00201000) 47 #define RPI4_PL011_UART_BASE (RPI_LEGACY_BASE + RPI4_IO_PL011_UART_OFFSET) 48 #define RPI4_PL011_UART_CLOCK ULL(48000000) 49 50 /* 51 * GPIO controller 52 */ 53 #define RPI3_IO_GPIO_OFFSET ULL(0x00200000) 54 #define RPI3_GPIO_BASE (RPI_LEGACY_BASE + RPI3_IO_GPIO_OFFSET) 55 56 /* 57 * SDHost controller 58 */ 59 #define RPI3_IO_SDHOST_OFFSET ULL(0x00202000) 60 #define RPI3_SDHOST_BASE (RPI_LEGACY_BASE + RPI3_IO_SDHOST_OFFSET) 61 62 /* 63 * GIC interrupt controller 64 */ 65 #define RPI_HAVE_GIC 66 #define RPI4_GIC_GICD_BASE ULL(0xff841000) 67 #define RPI4_GIC_GICC_BASE ULL(0xff842000) 68 69 #define RPI4_LOCAL_CONTROL_BASE_ADDRESS ULL(0xff800000) 70 #define RPI4_LOCAL_CONTROL_PRESCALER ULL(0xff800008) 71 72 #endif /* RPI_HW_H */ 73