1#
2# Copyright (c) 2021-2023, Stephan Gerhold <[email protected]>
3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7include drivers/arm/gic/v2/gicv2.mk
8include lib/xlat_tables_v2/xlat_tables.mk
9
10PLAT_BL_COMMON_SOURCES	:=	${GICV2_SOURCES}				\
11				${XLAT_TABLES_LIB_SRCS}				\
12				drivers/delay_timer/delay_timer.c		\
13				drivers/delay_timer/generic_delay_timer.c	\
14				plat/common/plat_gicv2.c			\
15				plat/qti/msm8916/msm8916_gicv2.c		\
16				plat/qti/msm8916/msm8916_setup.c		\
17				plat/qti/msm8916/${ARCH}/msm8916_helpers.S	\
18				plat/qti/msm8916/${ARCH}/uartdm_console.S
19
20MSM8916_CPU		:=	$(if ${ARM_CORTEX_A7},cortex_a7,cortex_a53)
21MSM8916_PM_SOURCES	:=	drivers/arm/cci/cci.c				\
22				lib/cpus/${ARCH}/${MSM8916_CPU}.S		\
23				plat/common/plat_psci_common.c			\
24				plat/qti/msm8916/msm8916_config.c		\
25				plat/qti/msm8916/msm8916_cpu_boot.c		\
26				plat/qti/msm8916/msm8916_pm.c			\
27				plat/qti/msm8916/msm8916_topology.c
28
29BL31_SOURCES		+=	${MSM8916_PM_SOURCES}				\
30				plat/qti/msm8916/msm8916_bl31_setup.c
31
32PLAT_INCLUDES		:=	-Iplat/qti/msm8916/include
33
34ifeq (${ARCH},aarch64)
35# arm_macros.S exists only on aarch64 currently
36PLAT_INCLUDES		+=	-Iinclude/plat/arm/common/${ARCH}
37endif
38
39# Only BL31 is supported at the moment and is entered on a single CPU
40RESET_TO_BL31			:= 1
41COLD_BOOT_SINGLE_CPU		:= 1
42
43# Have different sections for code and rodata
44SEPARATE_CODE_AND_RODATA	:= 1
45
46# Single cluster
47WARMBOOT_ENABLE_DCACHE_EARLY	:= 1
48
49# Disable features unsupported in ARMv8.0
50ENABLE_SPE_FOR_NS		:= 0
51ENABLE_SVE_FOR_NS		:= 0
52
53# Disable workarounds unnecessary for Cortex-A7/A53
54WORKAROUND_CVE_2017_5715	:= 0
55WORKAROUND_CVE_2022_23960	:= 0
56
57ifeq (${MSM8916_CPU},cortex_a53)
58# The Cortex-A53 revision varies depending on the SoC revision.
59# msm8916 uses r0p0, msm8939 uses r0p1 or r0p4. Enable all errata
60# and rely on the runtime detection to apply them only if needed.
61ERRATA_A53_819472		:= 1
62ERRATA_A53_824069		:= 1
63ERRATA_A53_826319		:= 1
64ERRATA_A53_827319		:= 1
65ERRATA_A53_835769		:= 1
66ERRATA_A53_836870		:= 1
67ERRATA_A53_843419		:= 1
68ERRATA_A53_855873		:= 1
69ERRATA_A53_1530924		:= 1
70endif
71
72# Build config flags
73# ------------------
74BL31_BASE			?= 0x86500000
75PRELOADED_BL33_BASE		?= 0x8f600000
76
77ifeq (${ARCH},aarch64)
78    BL32_BASE			?= BL31_LIMIT
79    $(eval $(call add_define,BL31_BASE))
80else
81    ifeq (${AARCH32_SP},none)
82	$(error Variable AARCH32_SP has to be set for AArch32)
83    endif
84    # There is no BL31 on aarch32, so reuse its location for BL32
85    BL32_BASE			?= $(BL31_BASE)
86endif
87$(eval $(call add_define,BL32_BASE))
88
89# UART number to use for TF-A output during early boot
90QTI_UART_NUM			?= 2
91$(eval $(call assert_numeric,QTI_UART_NUM))
92$(eval $(call add_define,QTI_UART_NUM))
93
94# Set to 1 on the command line to keep using UART after early boot.
95# Requires reserving the UART and related clocks inside the normal world.
96QTI_RUNTIME_UART		?= 0
97$(eval $(call assert_boolean,QTI_RUNTIME_UART))
98$(eval $(call add_define,QTI_RUNTIME_UART))
99