1 /*
2 * Copyright (c) 2015-2024, Arm Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #include <assert.h>
8
9 #include <common/bl_common.h>
10 #include <drivers/arm/pl061_gpio.h>
11 #include <lib/gpt_rme/gpt_rme.h>
12 #include <lib/transfer_list.h>
13 #include <plat/common/platform.h>
14
15 #include "qemu_private.h"
16
17 #define MAP_BL31_TOTAL MAP_REGION_FLAT( \
18 BL31_BASE, \
19 BL31_END - BL31_BASE, \
20 MT_MEMORY | MT_RW | EL3_PAS)
21 #define MAP_BL31_RO MAP_REGION_FLAT( \
22 BL_CODE_BASE, \
23 BL_CODE_END - BL_CODE_BASE, \
24 MT_CODE | EL3_PAS), \
25 MAP_REGION_FLAT( \
26 BL_RO_DATA_BASE, \
27 BL_RO_DATA_END \
28 - BL_RO_DATA_BASE, \
29 MT_RO_DATA | EL3_PAS)
30
31 #if USE_COHERENT_MEM
32 #define MAP_BL_COHERENT_RAM MAP_REGION_FLAT( \
33 BL_COHERENT_RAM_BASE, \
34 BL_COHERENT_RAM_END \
35 - BL_COHERENT_RAM_BASE, \
36 MT_DEVICE | MT_RW | EL3_PAS)
37 #endif
38
39 /*
40 * Placeholder variables for copying the arguments that have been passed to
41 * BL3-1 from BL2.
42 */
43 static entry_point_info_t bl32_image_ep_info;
44 static entry_point_info_t bl33_image_ep_info;
45 #if ENABLE_RME
46 static entry_point_info_t rmm_image_ep_info;
47 #endif
48 static struct transfer_list_header *bl31_tl;
49
50 /*******************************************************************************
51 * Perform any BL3-1 early platform setup. Here is an opportunity to copy
52 * parameters passed by the calling EL (S-EL1 in BL2 & EL3 in BL1) before
53 * they are lost (potentially). This needs to be done before the MMU is
54 * initialized so that the memory layout can be used while creating page
55 * tables. BL2 has flushed this information to memory, so we are guaranteed
56 * to pick up good data.
57 ******************************************************************************/
bl31_early_platform_setup2(u_register_t arg0,u_register_t arg1,u_register_t arg2,u_register_t arg3)58 void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
59 u_register_t arg2, u_register_t arg3)
60 {
61 /* Initialize the console to provide early debug support */
62 qemu_console_init();
63
64 /* Platform names have to be lowercase. */
65 #ifdef PLAT_qemu_sbsa
66 sip_svc_init();
67 #endif
68
69 /*
70 * Check params passed from BL2
71 */
72 bl_params_t *params_from_bl2 = (bl_params_t *)arg0;
73
74 assert(params_from_bl2);
75 assert(params_from_bl2->h.type == PARAM_BL_PARAMS);
76 assert(params_from_bl2->h.version >= VERSION_2);
77
78 bl_params_node_t *bl_params = params_from_bl2->head;
79
80 /*
81 * Copy BL33, BL32 and RMM (if present), entry point information.
82 * They are stored in Secure RAM, in BL2's address space.
83 */
84 while (bl_params) {
85 if (bl_params->image_id == BL32_IMAGE_ID)
86 bl32_image_ep_info = *bl_params->ep_info;
87
88 #if ENABLE_RME
89 if (bl_params->image_id == RMM_IMAGE_ID)
90 rmm_image_ep_info = *bl_params->ep_info;
91 #endif
92
93 if (bl_params->image_id == BL33_IMAGE_ID)
94 bl33_image_ep_info = *bl_params->ep_info;
95
96 bl_params = bl_params->next_params_info;
97 }
98
99 if (!bl33_image_ep_info.pc)
100 panic();
101 #if ENABLE_RME
102 if (!rmm_image_ep_info.pc)
103 panic();
104 #endif
105
106 if (TRANSFER_LIST && arg1 == (TRANSFER_LIST_SIGNATURE |
107 REGISTER_CONVENTION_VERSION_MASK) &&
108 transfer_list_check_header((void *)arg3) != TL_OPS_NON) {
109 bl31_tl = (void *)arg3; /* saved TL address from BL2 */
110 }
111 }
112
bl31_plat_arch_setup(void)113 void bl31_plat_arch_setup(void)
114 {
115 const mmap_region_t bl_regions[] = {
116 MAP_BL31_TOTAL,
117 MAP_BL31_RO,
118 #if USE_COHERENT_MEM
119 MAP_BL_COHERENT_RAM,
120 #endif
121 #if ENABLE_RME
122 MAP_GPT_L0_REGION,
123 MAP_GPT_L1_REGION,
124 MAP_RMM_SHARED_MEM,
125 #endif
126 {0}
127 };
128
129 setup_page_tables(bl_regions, plat_qemu_get_mmap());
130
131 enable_mmu_el3(0);
132
133 #if ENABLE_RME
134 /*
135 * Initialise Granule Protection library and enable GPC for the primary
136 * processor. The tables have already been initialized by a previous BL
137 * stage, so there is no need to provide any PAS here. This function
138 * sets up pointers to those tables.
139 */
140 if (gpt_runtime_init() < 0) {
141 ERROR("gpt_runtime_init() failed!\n");
142 panic();
143 }
144 #endif /* ENABLE_RME */
145
146 }
147
qemu_gpio_init(void)148 static void qemu_gpio_init(void)
149 {
150 #ifdef SECURE_GPIO_BASE
151 pl061_gpio_init();
152 pl061_gpio_register(SECURE_GPIO_BASE, 0);
153 #endif
154 }
155
bl31_platform_setup(void)156 void bl31_platform_setup(void)
157 {
158 plat_qemu_gic_init();
159 qemu_gpio_init();
160 }
161
plat_get_syscnt_freq2(void)162 unsigned int plat_get_syscnt_freq2(void)
163 {
164 return read_cntfrq_el0();
165 }
166
167 /*******************************************************************************
168 * Return a pointer to the 'entry_point_info' structure of the next image
169 * for the security state specified. BL3-3 corresponds to the non-secure
170 * image type while BL3-2 corresponds to the secure image type. A NULL
171 * pointer is returned if the image does not exist.
172 ******************************************************************************/
bl31_plat_get_next_image_ep_info(uint32_t type)173 entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
174 {
175 entry_point_info_t *next_image_info;
176
177 assert(sec_state_is_valid(type));
178 if (type == NON_SECURE) {
179 next_image_info = &bl33_image_ep_info;
180 }
181 #if ENABLE_RME
182 else if (type == REALM) {
183 next_image_info = &rmm_image_ep_info;
184 }
185 #endif
186 else {
187 next_image_info = &bl32_image_ep_info;
188 }
189
190 /*
191 * None of the images on the ARM development platforms can have 0x0
192 * as the entrypoint
193 */
194 if (next_image_info->pc)
195 return next_image_info;
196 else
197 return NULL;
198 }
199
bl31_plat_runtime_setup(void)200 void bl31_plat_runtime_setup(void)
201 {
202 #if TRANSFER_LIST
203 if (bl31_tl) {
204 /*
205 * update the TL from S to NS memory before jump to BL33
206 * to reflect all changes in TL done by BL32
207 */
208 memcpy((void *)FW_NS_HANDOFF_BASE, bl31_tl, bl31_tl->max_size);
209 }
210 #endif
211
212 console_flush();
213 console_switch_state(CONSOLE_FLAG_RUNTIME);
214 }
215