1#
2# Copyright 2022 NXP
3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6#
7#------------------------------------------------------------------------------
8#
9# This file contains the basic architecture definitions that drive the build
10#
11# -----------------------------------------------------------------------------
12
13CORE_TYPE		:=	a53
14
15CACHE_LINE		:=	6
16
17# Set to GIC400 or GIC500
18GIC			:=	GIC500
19
20# Set to CCI400 or CCN504 or CCN508
21INTERCONNECT		:=	CCI400
22
23# Select the DDR PHY generation to be used
24PLAT_DDR_PHY		:=	PHY_GEN1
25
26PHYS_SYS		:=	64
27
28# Indicate layerscape chassis level - set to 3=LSCH3 or 2=LSCH2
29CHASSIS			:=	3
30
31# TZC IP Details TZC used is TZC380 or TZC400
32TZC_ID			:=	TZC400
33
34# CONSOLE Details available is NS16550 or PL011
35CONSOLE			:=	NS16550
36
37NXP_SFP_VER		:=	3_4
38
39# In IMAGE_BL2, compile time flag for handling Cache coherency
40# with CAAM for BL2 running from OCRAM
41SEC_MEM_NON_COHERENT	:=	yes
42
43
44# OCRAM MAP for BL2
45# Before BL2
46# 0x18000000 - 0x18009fff -> Used by ROM code, (TBD - can it be used for xlat tables)
47# 0x1800a000 - 0x1801Cfff -> Reserved for BL2 binary (76 KB)
48# 0x1801D000 - 0x1801ffff -> CSF header for BL2 (12 KB)
49OCRAM_START_ADDR	:=	0x18000000
50OCRAM_SIZE		:=	0x20000
51
52CSF_HDR_SZ		:=	0x3000
53
54# Area of OCRAM reserved by ROM code
55NXP_ROM_RSVD		:=	0xa000
56
57# Input to CST create_hdr_isbc tool
58BL2_HDR_LOC		:=	0x1801D000
59
60# Location of BL2 on OCRAM
61# BL2_BASE=OCRAM_START_ADDR+NXP_ROM_RSVD
62BL2_BASE		:=	0x1800a000
63
64# SoC ERRATUM to be enabled
65
66# ARM Erratum
67ERRATA_A53_855873	:=	1
68
69# DDR Erratum
70ERRATA_DDR_A008511	:=	1
71ERRATA_DDR_A009803	:=	1
72ERRATA_DDR_A009942	:=	1
73ERRATA_DDR_A010165	:=	1
74
75# Define Endianness of each module
76NXP_ESDHC_ENDIANNESS	:=	LE
77NXP_SFP_ENDIANNESS	:=	LE
78NXP_GPIO_ENDIANNESS	:=	LE
79NXP_SNVS_ENDIANNESS	:=	LE
80NXP_GUR_ENDIANNESS	:=	LE
81NXP_SEC_ENDIANNESS	:=	LE
82NXP_DDR_ENDIANNESS	:=	LE
83NXP_QSPI_ENDIANNESS	:=	LE
84
85# OCRAM ECC Enabled
86OCRAM_ECC_EN		:=	yes
87