1/*
2 * Copyright 2022 NXP
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <arch.h>
8#include <asm_macros.S>
9#include <platform_def.h>
10
11	.globl	plat_secondary_cold_boot_setup
12	.globl	plat_is_my_cpu_primary
13	.globl	plat_reset_handler
14	.globl  platform_mem_init
15
16func platform_mem1_init
17	ret
18endfunc platform_mem1_init
19
20func platform_mem_init
21	ret
22endfunc	platform_mem_init
23
24func apply_platform_errata
25	ret
26endfunc apply_platform_errata
27
28func plat_reset_handler
29	mov	x29, x30
30	bl	apply_platform_errata
31
32#if defined(IMAGE_BL31)
33	ldr	x0, =POLICY_SMMU_PAGESZ_64K
34	cbz	x0, 1f
35	/* Set the SMMU page size in the sACR register */
36	bl	_set_smmu_pagesz_64
37#endif
381:
39	mov	x30, x29
40	ret
41endfunc plat_reset_handler
42
43	/*
44	 * void plat_secondary_cold_boot_setup (void);
45	 *
46	 * This function performs any platform specific actions
47	 * needed for a secondary cpu after a cold reset e.g
48	 * mark the cpu's presence, mechanism to place it in a
49	 * holding pen etc.
50	 */
51func plat_secondary_cold_boot_setup
52	/* ls1088a does not do cold boot for secondary CPU */
53cb_panic:
54	b	cb_panic
55endfunc plat_secondary_cold_boot_setup
56
57	/*
58	 * unsigned int plat_is_my_cpu_primary (void);
59	 *
60	 * Find out whether the current cpu is the primary
61	 * cpu.
62	 */
63func plat_is_my_cpu_primary
64	mrs	x0, mpidr_el1
65	and	x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
66	cmp	x0, 0x0
67	cset	w0, eq
68	ret
69endfunc plat_is_my_cpu_primary
70