1# 2# Copyright (c) 2015-2023, Arm Limited and Contributors. All rights reserved. 3# 4# Copyright (c) 2017-2023 Nuvoton Ltd. 5# 6# SPDX-License-Identifier: BSD-3-Clause 7# 8 9# This is a debug flag for bring-up. It allows reducing CPU numbers 10# SECONDARY_BRINGUP := 1 11RESET_TO_BL31 := 1 12SPMD_SPM_AT_SEL2 := 0 13#temporary until the RAM size is reduced 14USE_COHERENT_MEM := 1 15INIT_UNUSED_NS_EL2 := 1 16 17 18$(eval $(call add_define,RESET_TO_BL31)) 19 20ifeq (${ARCH}, aarch64) 21# On ARM standard platorms, the TSP can execute from Trusted SRAM, 22# Trusted DRAM (if available) or the TZC secured area of DRAM. 23# TZC secured DRAM is the default. 24 25ARM_TSP_RAM_LOCATION ?= dram 26 27ifeq (${ARM_TSP_RAM_LOCATION}, tsram) 28ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID 29else ifeq (${ARM_TSP_RAM_LOCATION}, tdram) 30ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_DRAM_ID 31else ifeq (${ARM_TSP_RAM_LOCATION}, dram) 32ARM_TSP_RAM_LOCATION_ID = ARM_DRAM_ID 33else 34$(error "Unsupported ARM_TSP_RAM_LOCATION value") 35endif 36 37# Process flags 38# Process ARM_BL31_IN_DRAM flag 39ARM_BL31_IN_DRAM := 0 40$(eval $(call assert_boolean,ARM_BL31_IN_DRAM)) 41$(eval $(call add_define,ARM_BL31_IN_DRAM)) 42else 43ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID 44endif 45 46$(eval $(call add_define,ARM_TSP_RAM_LOCATION_ID)) 47 48# For the original power-state parameter format, the State-ID can be encoded 49# according to the recommended encoding or zero. This flag determines which 50# State-ID encoding to be parsed. 51ARM_RECOM_STATE_ID_ENC := 0 52 53# If the PSCI_EXTENDED_STATE_ID is set, then ARM_RECOM_STATE_ID_ENC 54# need to be set. Else throw a build error. 55ifeq (${PSCI_EXTENDED_STATE_ID}, 1) 56ifeq (${ARM_RECOM_STATE_ID_ENC}, 0) 57$(error Build option ARM_RECOM_STATE_ID_ENC needs to be set if \ 58 PSCI_EXTENDED_STATE_ID is set for ARM platforms) 59endif 60endif 61 62# Process ARM_RECOM_STATE_ID_ENC flag 63$(eval $(call assert_boolean,ARM_RECOM_STATE_ID_ENC)) 64$(eval $(call add_define,ARM_RECOM_STATE_ID_ENC)) 65 66# Process ARM_DISABLE_TRUSTED_WDOG flag 67# By default, Trusted Watchdog is always enabled unless SPIN_ON_BL1_EXIT is set 68ARM_DISABLE_TRUSTED_WDOG := 0 69ifeq (${SPIN_ON_BL1_EXIT}, 1) 70ARM_DISABLE_TRUSTED_WDOG := 1 71endif 72$(eval $(call assert_boolean,ARM_DISABLE_TRUSTED_WDOG)) 73$(eval $(call add_define,ARM_DISABLE_TRUSTED_WDOG)) 74 75# Process ARM_CONFIG_CNTACR 76ARM_CONFIG_CNTACR := 1 77$(eval $(call assert_boolean,ARM_CONFIG_CNTACR)) 78$(eval $(call add_define,ARM_CONFIG_CNTACR)) 79 80# Process ARM_BL31_IN_DRAM flag 81ARM_BL31_IN_DRAM := 0 82$(eval $(call assert_boolean,ARM_BL31_IN_DRAM)) 83$(eval $(call add_define,ARM_BL31_IN_DRAM)) 84 85# Process ARM_PLAT_MT flag 86ARM_PLAT_MT := 0 87$(eval $(call assert_boolean,ARM_PLAT_MT)) 88$(eval $(call add_define,ARM_PLAT_MT)) 89 90# Use translation tables library v2 by default 91ARM_XLAT_TABLES_LIB_V1 := 0 92$(eval $(call assert_boolean,ARM_XLAT_TABLES_LIB_V1)) 93$(eval $(call add_define,ARM_XLAT_TABLES_LIB_V1)) 94 95# Don't have the Linux kernel as a BL33 image by default 96ARM_LINUX_KERNEL_AS_BL33 := 0 97$(eval $(call assert_boolean,ARM_LINUX_KERNEL_AS_BL33)) 98$(eval $(call add_define,ARM_LINUX_KERNEL_AS_BL33)) 99 100ifeq (${ARM_LINUX_KERNEL_AS_BL33},1) 101ifeq (${ARCH},aarch64) 102ifneq (${RESET_TO_BL31},1) 103$(error "ARM_LINUX_KERNEL_AS_BL33 is only available if RESET_TO_BL31=1.") 104endif 105else 106ifneq (${RESET_TO_SP_MIN},1) 107$(error "ARM_LINUX_KERNEL_AS_BL33 is only available if RESET_TO_SP_MIN=1.") 108endif 109endif 110 111ifndef PRELOADED_BL33_BASE 112$(error "PRELOADED_BL33_BASE must be set if ARM_LINUX_KERNEL_AS_BL33 is used.") 113endif 114 115ifndef ARM_PRELOADED_DTB_BASE 116$(error "ARM_PRELOADED_DTB_BASE must be set if ARM_LINUX_KERNEL_AS_BL33 is used.") 117endif 118 119$(eval $(call add_define,ARM_PRELOADED_DTB_BASE)) 120endif 121 122# Use an implementation of SHA-256 with a smaller memory footprint 123# but reduced speed. 124$(eval $(call add_define,MBEDTLS_SHA256_SMALLER)) 125 126# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images 127# in the FIP if the platform requires. 128ifneq ($(BL32_EXTRA1),) 129$(eval $(call TOOL_ADD_IMG,bl32_extra1,--tos-fw-extra1)) 130endif 131ifneq ($(BL32_EXTRA2),) 132$(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2)) 133endif 134 135# Enable PSCI_STAT_COUNT/RESIDENCY APIs on ARM platforms 136ENABLE_PSCI_STAT := 1 137ENABLE_PMF := 1 138 139# On ARM platforms, separate the code and read-only data sections to allow 140# mapping the former as executable and the latter as execute-never. 141SEPARATE_CODE_AND_RODATA := 1 142 143# On ARM platforms, disable SEPARATE_NOBITS_REGION by default. Both PROGBITS 144# and NOBITS sections of BL31 image are adjacent to each other and loaded 145# into Trusted SRAM. 146SEPARATE_NOBITS_REGION := 0 147 148# In order to support SEPARATE_NOBITS_REGION for Arm platforms, we need to load 149# BL31 PROGBITS into secure DRAM space and BL31 NOBITS into SRAM. Hence mandate 150# the build to require that ARM_BL31_IN_DRAM is enabled as well. 151ifeq ($(SEPARATE_NOBITS_REGION),1) 152ifneq ($(ARM_BL31_IN_DRAM),1) 153$(error For SEPARATE_NOBITS_REGION, ARM_BL31_IN_DRAM must be enabled) 154endif 155 156ifneq ($(RECLAIM_INIT_CODE),0) 157$(error For SEPARATE_NOBITS_REGION, RECLAIM_INIT_CODE cannot be supported) 158endif 159endif 160 161# Disable ARM Cryptocell by default 162ARM_CRYPTOCELL_INTEG := 0 163$(eval $(call assert_boolean,ARM_CRYPTOCELL_INTEG)) 164$(eval $(call add_define,ARM_CRYPTOCELL_INTEG)) 165 166# Enable PIE support for RESET_TO_BL31 case 167ifeq (${RESET_TO_BL31},1) 168ENABLE_PIE := 1 169endif 170 171# CryptoCell integration relies on coherent buffers for passing data from 172# the AP CPU to the CryptoCell 173 174ifeq (${ARM_CRYPTOCELL_INTEG},1) 175ifeq (${USE_COHERENT_MEM},0) 176$(error "ARM_CRYPTOCELL_INTEG needs USE_COHERENT_MEM to be set.") 177endif 178endif 179 180PLAT_INCLUDES := -Iinclude/plat/nuvoton/npcm845x \ 181 -Iinclude/plat/nuvoton/common \ 182 -Iinclude/drivers/nuvoton/npcm845x \ 183 184ifeq (${ARCH}, aarch64) 185PLAT_INCLUDES += -Iinclude/plat/arm/common/aarch64 186endif 187 188# Include GICv3 driver files 189include drivers/arm/gic/v2/gicv2.mk 190 191NPCM850_GIC_SOURCES := ${GICV2_SOURCES} 192 193BL31_SOURCES +=lib/cpus/aarch64/cortex_a35.S \ 194 plat/common/plat_psci_common.c \ 195 drivers/ti/uart/aarch64/16550_console.S \ 196 plat/nuvoton/npcm845x/npcm845x_psci.c \ 197 plat/nuvoton/npcm845x/npcm845x_serial_port.c \ 198 plat/nuvoton/common/nuvoton_topology.c \ 199 plat/nuvoton/npcm845x/npcm845x_bl31_setup.c 200 201PLAT_BL_COMMON_SOURCES := drivers/delay_timer/delay_timer.c \ 202 drivers/delay_timer/generic_delay_timer.c \ 203 plat/common/plat_gicv2.c \ 204 plat/arm/common/arm_gicv2.c \ 205 plat/nuvoton/common/plat_nuvoton_gic.c \ 206 ${NPCM850_GIC_SOURCES} \ 207 plat/nuvoton/npcm845x/npcm845x_common.c \ 208 plat/nuvoton/common/nuvoton_helpers.S \ 209 lib/semihosting/semihosting.c \ 210 lib/semihosting/${ARCH}/semihosting_call.S \ 211 plat/arm/common/arm_common.c \ 212 plat/arm/common/arm_console.c 213 214ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1) 215PLAT_BL_COMMON_SOURCES += lib/xlat_tables/xlat_tables_common.c \ 216 lib/xlat_tables/${ARCH}/xlat_tables.c 217else 218include lib/xlat_tables_v2/xlat_tables.mk 219 220PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS} 221endif 222 223ARM_IO_SOURCES += plat/arm/common/arm_io_storage.c \ 224 plat/arm/common/fconf/arm_fconf_io.c 225 226ifeq (${SPD},spmd) 227ifeq (${SPMD_SPM_AT_SEL2},1) 228ARM_IO_SOURCES += plat/arm/common/fconf/arm_fconf_sp.c 229endif 230endif 231 232BL1_SOURCES += drivers/io/io_fip.c \ 233 drivers/io/io_memmap.c \ 234 drivers/io/io_storage.c \ 235 plat/arm/common/arm_bl1_setup.c \ 236 plat/arm/common/arm_err.c \ 237 ${ARM_IO_SOURCES} 238 239ifdef EL3_PAYLOAD_BASE 240# Need the plat_arm_program_trusted_mailbox() function to release secondary CPUs 241# from their holding pen 242BL1_SOURCES += plat/arm/common/arm_pm.c 243endif 244 245BL2_SOURCES += drivers/delay_timer/delay_timer.c \ 246 drivers/delay_timer/generic_delay_timer.c \ 247 drivers/io/io_fip.c \ 248 drivers/io/io_memmap.c \ 249 drivers/io/io_storage.c \ 250 plat/arm/common/arm_bl2_setup.c \ 251 plat/arm/common/arm_err.c \ 252 ${ARM_IO_SOURCES} 253 254# Firmware Configuration Framework sources 255include lib/fconf/fconf.mk 256 257# Add `libfdt` and Arm common helpers required for Dynamic Config 258include lib/libfdt/libfdt.mk 259 260DYN_CFG_SOURCES += plat/arm/common/arm_dyn_cfg.c \ 261 plat/arm/common/arm_dyn_cfg_helpers.c \ 262 common/fdt_wrappers.c 263 264BL1_SOURCES += ${DYN_CFG_SOURCES} 265BL2_SOURCES += ${DYN_CFG_SOURCES} 266 267ifeq (${BL2_AT_EL3},1) 268BL2_SOURCES += plat/arm/common/arm_bl2_el3_setup.c 269endif 270 271# Because BL1/BL2 execute in AArch64 mode but BL32 in AArch32 we need to use 272# the AArch32 descriptors. 273BL2_SOURCES += plat/arm/common/${ARCH}/arm_bl2_mem_params_desc.c 274BL2_SOURCES += plat/arm/common/arm_image_load.c \ 275 common/desc_image_load.c 276 277ifeq (${SPD},opteed) 278BL2_SOURCES += lib/optee/optee_utils.c 279endif 280 281BL2U_SOURCES += drivers/delay_timer/delay_timer.c \ 282 drivers/delay_timer/generic_delay_timer.c \ 283 plat/arm/common/arm_bl2u_setup.c 284 285BL31_SOURCES += plat/arm/common/arm_bl31_setup.c \ 286 plat/nuvoton/common/nuvoton_pm.c \ 287 plat/nuvoton/common/nuvoton_topology.c \ 288 plat/common/plat_psci_common.c 289 290ifeq (${ENABLE_PMF}, 1) 291ifeq (${ARCH}, aarch64) 292BL31_SOURCES += plat/arm/common/aarch64/execution_state_switch.c \ 293 plat/arm/common/arm_sip_svc.c \ 294 plat/arm/common/plat_arm_sip_svc.c \ 295 lib/pmf/pmf_smc.c 296else 297BL32_SOURCES += plat/arm/common/arm_sip_svc.c \ 298 plat/arm/common/plat_arm_sip_svc.c \ 299 lib/pmf/pmf_smc.c 300endif 301endif 302 303ifeq (${EL3_EXCEPTION_HANDLING},1) 304BL31_SOURCES += plat/arm/common/aarch64/arm_ehf.c 305endif 306 307ifeq (${SDEI_SUPPORT},1) 308BL31_SOURCES += plat/arm/common/aarch64/arm_sdei.c 309ifeq (${SDEI_IN_FCONF},1) 310BL31_SOURCES += plat/arm/common/fconf/fconf_sdei_getter.c 311endif 312endif 313 314# RAS sources 315ifeq (${RAS_EXTENSION},1) 316BL31_SOURCES += lib/extensions/ras/std_err_record.c \ 317 lib/extensions/ras/ras_common.c 318endif 319 320# Pointer Authentication sources 321ifeq (${ENABLE_PAUTH}, 1) 322PLAT_BL_COMMON_SOURCES += plat/arm/common/aarch64/arm_pauth.c \ 323 lib/extensions/pauth/pauth_helpers.S 324endif 325 326ifeq (${SPD},spmd) 327BL31_SOURCES += plat/common/plat_spmd_manifest.c \ 328 common/fdt_wrappers.c \ 329 ${LIBFDT_SRCS} 330endif 331 332ifneq (${TRUSTED_BOARD_BOOT},0) 333# Include common TBB sources 334AUTH_SOURCES := drivers/auth/auth_mod.c \ 335 drivers/auth/crypto_mod.c \ 336 drivers/auth/img_parser_mod.c \ 337 lib/fconf/fconf_tbbr_getter.c 338 339# Include the selected chain of trust sources. 340ifeq (${COT},tbbr) 341AUTH_SOURCES += drivers/auth/tbbr/tbbr_cot_common.c 342BL1_SOURCES += drivers/auth/tbbr/tbbr_cot_bl1.c 343BL2_SOURCES += drivers/auth/tbbr/tbbr_cot_bl2.c 344else ifeq (${COT},dualroot) 345AUTH_SOURCES += drivers/auth/dualroot/cot.c 346else 347$(error Unknown chain of trust ${COT}) 348endif 349 350BL1_SOURCES += ${AUTH_SOURCES} \ 351 bl1/tbbr/tbbr_img_desc.c \ 352 plat/arm/common/arm_bl1_fwu.c \ 353 plat/common/tbbr/plat_tbbr.c 354 355BL2_SOURCES += ${AUTH_SOURCES} \ 356 plat/common/tbbr/plat_tbbr.c 357 358$(eval $(call TOOL_ADD_IMG,ns_bl2u,--fwu,FWU_)) 359 360# We expect to locate the *.mk files under the directories specified below 361ifeq (${ARM_CRYPTOCELL_INTEG},0) 362CRYPTO_LIB_MK := drivers/auth/mbedtls/mbedtls_crypto.mk 363else 364CRYPTO_LIB_MK := drivers/auth/cryptocell/cryptocell_crypto.mk 365endif 366 367IMG_PARSER_LIB_MK := drivers/auth/mbedtls/mbedtls_x509.mk 368 369$(info Including ${CRYPTO_LIB_MK}) 370include ${CRYPTO_LIB_MK} 371 372$(info Including ${IMG_PARSER_LIB_MK}) 373include ${IMG_PARSER_LIB_MK} 374endif 375 376ifeq (${RECLAIM_INIT_CODE}, 1) 377ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1) 378$(error "To reclaim init code xlat tables v2 must be used") 379endif 380endif 381 382ifeq (${MEASURED_BOOT},1) 383MEASURED_BOOT_MK := drivers/measured_boot/measured_boot.mk 384$(info Including ${MEASURED_BOOT_MK}) 385include ${MEASURED_BOOT_MK} 386endif 387 388ifeq (${EL3_EXCEPTION_HANDLING},1) 389BL31_SOURCES += plat/arm/common/aarch64/arm_ehf.c 390endif 391 392BL1_SOURCES := 393BL2_SOURCES := 394BL2U_SOURCES := 395 396DEBUG_CONSOLE ?= 0 397$(eval $(call add_define,DEBUG_CONSOLE)) 398 399$(eval $(call add_define,ARM_TSP_RAM_LOCATION_ID)) 400 401