1 /*
2 * Copyright (c) 2020-2023, MediaTek Inc. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #include <common/debug.h>
8 #include <common/runtime_svc.h>
9 #include <emi_mpu.h>
10 #include <mt_dp.h>
11 #include <mt_spm.h>
12 #include <mt_spm_vcorefs.h>
13 #include <mtk_apusys.h>
14 #include <mtk_sip_svc.h>
15 #include <plat_dfd.h>
16 #include "plat_sip_calls.h"
17
mediatek_plat_sip_handler(uint32_t smc_fid,u_register_t x1,u_register_t x2,u_register_t x3,u_register_t x4,void * cookie,void * handle,u_register_t flags)18 uintptr_t mediatek_plat_sip_handler(uint32_t smc_fid,
19 u_register_t x1,
20 u_register_t x2,
21 u_register_t x3,
22 u_register_t x4,
23 void *cookie,
24 void *handle,
25 u_register_t flags)
26 {
27 int32_t ret;
28 uint32_t ret_val;
29
30 switch (smc_fid) {
31 case MTK_SIP_TEE_MPU_PERM_SET_AARCH64:
32 case MTK_SIP_TEE_MPU_PERM_SET_AARCH32:
33 ret = emi_mpu_sip_handler(x1, x2, x3);
34 SMC_RET2(handle, ret, ret_val);
35 break;
36 case MTK_SIP_DP_CONTROL_AARCH32:
37 case MTK_SIP_DP_CONTROL_AARCH64:
38 ret = dp_secure_handler(x1, x2, &ret_val);
39 SMC_RET2(handle, ret, ret_val);
40 break;
41 case MTK_SIP_VCORE_CONTROL_AARCH32:
42 case MTK_SIP_VCORE_CONTROL_AARCH64:
43 ret = spm_vcorefs_v2_args(x1, x2, x3, &x4);
44 SMC_RET2(handle, ret, x4);
45 break;
46 case MTK_SIP_KERNEL_DFD_AARCH32:
47 case MTK_SIP_KERNEL_DFD_AARCH64:
48 ret = dfd_smc_dispatcher(x1, x2, x3, x4);
49 SMC_RET1(handle, ret);
50 break;
51 case MTK_SIP_APUSYS_CONTROL_AARCH32:
52 case MTK_SIP_APUSYS_CONTROL_AARCH64:
53 ret = apusys_kernel_ctrl(x1, x2, x3, x4, &ret_val);
54 SMC_RET2(handle, ret, ret_val);
55 break;
56 default:
57 ERROR("%s: unhandled SMC (0x%x)\n", __func__, smc_fid);
58 break;
59 }
60
61 SMC_RET1(handle, SMC_UNK);
62 }
63