1 /* 2 * Copyright (c) 2021, MediaTek Inc. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef PLAT_PM_H 8 #define PLAT_PM_H 9 10 #include <lib/utils_def.h> 11 12 #ifndef __ASSEMBLY__ 13 extern uintptr_t mtk_suspend_footprint_addr; 14 extern uintptr_t mtk_suspend_timestamp_addr; 15 16 #define MT_PLAT_PWR_STATE_CPU U(1) 17 #define MT_PLAT_PWR_STATE_CLUSTER U(2) 18 #define MT_PLAT_PWR_STATE_MCUSYS U(3) 19 #define MT_PLAT_PWR_STATE_SUSPEND2IDLE U(8) 20 #define MT_PLAT_PWR_STATE_SYSTEM_SUSPEND U(9) 21 22 #define MTK_LOCAL_STATE_RUN U(0) 23 #define MTK_LOCAL_STATE_RET U(1) 24 #define MTK_LOCAL_STATE_OFF U(2) 25 26 #define MTK_AFFLVL_CPU U(0) 27 #define MTK_AFFLVL_CLUSTER U(1) 28 #define MTK_AFFLVL_MCUSYS U(2) 29 #define MTK_AFFLVL_SYSTEM U(3) 30 31 void mtk_suspend_footprint_log(int idx); 32 void mtk_suspend_timestamp_log(int idx); 33 34 int mt_cluster_ops(int cputop_mpx, int mode, int state); 35 int mt_core_ops(int cpux, int state); 36 37 #define IS_CLUSTER_OFF_STATE(s) \ 38 is_local_state_off(s->pwr_domain_state[MTK_AFFLVL_CLUSTER]) 39 #define IS_MCUSYS_OFF_STATE(s) \ 40 is_local_state_off(s->pwr_domain_state[MTK_AFFLVL_MCUSYS]) 41 #define IS_SYSTEM_SUSPEND_STATE(s) \ 42 is_local_state_off(s->pwr_domain_state[MTK_AFFLVL_SYSTEM]) 43 44 /* SMC secure magic number */ 45 #define SPM_LP_SMC_MAGIC (0xDAF10000) 46 47 #define IS_SPM_LP_SMC(_type, _id) (_id == (SPM_LP_SMC_MAGIC | _type)) 48 49 enum mtk_suspend_mode { 50 MTK_MCDI_MODE = 1U, 51 MTK_IDLEDRAM_MODE = 2U, 52 MTK_IDLESYSPLL_MODE = 3U, 53 MTK_IDLEBUS26M_MODE = 4U, 54 MTK_SUSPEND_MODE = 5U, 55 }; 56 #endif 57 58 enum mt8169_idle_model { 59 IDLE_MODEL_START = 0U, 60 IDLE_MODEL_RESOURCE_HEAD = IDLE_MODEL_START, 61 IDLE_MODEL_BUS26M = IDLE_MODEL_RESOURCE_HEAD, 62 IDLE_MODEL_SYSPLL = 1U, 63 IDLE_MODEL_DRAM = 2U, 64 IDLE_MODEL_NUM = 3U, 65 }; 66 67 #define footprint_addr(cpu) (mtk_suspend_footprint_addr + (cpu << 2)) 68 #define timestamp_addr(cpu, idx) (mtk_suspend_timestamp_addr + \ 69 ((cpu * MTK_SUSPEND_TIMESTAMP_MAX + idx) << 3)) 70 71 #define MTK_SUSPEND_FOOTPRINT_ENTER_CPUIDLE (0U) 72 #define MTK_SUSPEND_FOOTPRINT_BEFORE_ATF (1U) 73 #define MTK_SUSPEND_FOOTPRINT_ENTER_ATF (2U) 74 #define MTK_SUSPEND_FOOTPRINT_RESERVE_P1 (3U) 75 #define MTK_SUSPEND_FOOTPRINT_RESERVE_P2 (4U) 76 #define MTK_SUSPEND_FOOTPRINT_ENTER_SPM_SUSPEND (5U) 77 #define MTK_SUSPEND_FOOTPRINT_LEAVE_SPM_SUSPEND (6U) 78 #define MTK_SUSPEND_FOOTPRINT_BEFORE_WFI (7U) 79 #define MTK_SUSPEND_FOOTPRINT_AFTER_WFI (8U) 80 #define MTK_SUSPEND_FOOTPRINT_BEFORE_MMU (9U) 81 #define MTK_SUSPEND_FOOTPRINT_AFTER_MMU (10U) 82 #define MTK_SUSPEND_FOOTPRINT_ENTER_SPM_SUSPEND_FINISH (11U) 83 #define MTK_SUSPEND_FOOTPRINT_LEAVE_SPM_SUSPEND_FINISH (12U) 84 #define MTK_SUSPEND_FOOTPRINT_LEAVE_ATF (13U) 85 #define MTK_SUSPEND_FOOTPRINT_AFTER_ATF (14U) 86 #define MTK_SUSPEND_FOOTPRINT_LEAVE_CPUIDLE (15U) 87 88 #define MTK_SUSPEND_TIMESTAMP_ENTER_CPUIDLE (0U) 89 #define MTK_SUSPEND_TIMESTAMP_BEFORE_ATF (1U) 90 #define MTK_SUSPEND_TIMESTAMP_ENTER_ATF (2U) 91 #define MTK_SUSPEND_TIMESTAMP_BEFORE_L2_FLUSH (3U) 92 #define MTK_SUSPEND_TIMESTAMP_AFTER_L2_FLUSH (4U) 93 #define MTK_SUSPEND_TIMESTAMP_ENTER_SPM_SUSPEND (5U) 94 #define MTK_SUSPEND_TIMESTAMP_LEAVE_SPM_SUSPEND (6U) 95 #define MTK_SUSPEND_TIMESTAMP_GIC_P1 (7U) 96 #define MTK_SUSPEND_TIMESTAMP_GIC_P2 (8U) 97 #define MTK_SUSPEND_TIMESTAMP_BEFORE_WFI (9U) 98 #define MTK_SUSPEND_TIMESTAMP_AFTER_WFI (10U) 99 #define MTK_SUSPEND_TIMESTAMP_RESERVE_P1 (11U) 100 #define MTK_SUSPEND_TIMESTAMP_RESERVE_P2 (12U) 101 #define MTK_SUSPEND_TIMESTAMP_GIC_P3 (13U) 102 #define MTK_SUSPEND_TIMESTAMP_GIC_P4 (14U) 103 #define MTK_SUSPEND_TIMESTAMP_ENTER_SPM_SUSPEND_FINISH (15U) 104 #define MTK_SUSPEND_TIMESTAMP_LEAVE_SPM_SUSPEND_FINISH (16U) 105 #define MTK_SUSPEND_TIMESTAMP_LEAVE_ATF (17U) 106 #define MTK_SUSPEND_TIMESTAMP_AFTER_ATF (18U) 107 #define MTK_SUSPEND_TIMESTAMP_LEAVE_CPUIDLE (19U) 108 #define MTK_SUSPEND_TIMESTAMP_MAX (20U) 109 110 /* 111 * definition platform power state menas. 112 * PLAT_MT_SYSTEM_SUSPEND - system suspend pwr level 113 * PLAT_MT_CPU_SUSPEND_CLUSTER - cluster off pwr level 114 */ 115 #define PLAT_MT_SYSTEM_SUSPEND PLAT_MAX_OFF_STATE 116 #define PLAT_MT_CPU_SUSPEND_CLUSTER PLAT_MAX_RET_STATE 117 118 #define IS_PLAT_SYSTEM_SUSPEND(aff) (aff == PLAT_MT_SYSTEM_SUSPEND) 119 #define IS_PLAT_SYSTEM_RETENTION(aff) (aff >= PLAT_MAX_RET_STATE) 120 121 #define IS_PLAT_SUSPEND2IDLE_ID(stateid)\ 122 (stateid == MT_PLAT_PWR_STATE_SUSPEND2IDLE) 123 124 #define IS_PLAT_SUSPEND_ID(stateid) \ 125 ((stateid == MT_PLAT_PWR_STATE_SUSPEND2IDLE) \ 126 || (stateid == MT_PLAT_PWR_STATE_SYSTEM_SUSPEND)) 127 128 #endif /* PLAT_PM_H */ 129