1# 2# Copyright 2022-2023 NXP 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7PLAT_INCLUDES := -Iplat/imx/common/include \ 8 -Iplat/imx/imx93/include \ 9# Translation tables library 10include lib/xlat_tables_v2/xlat_tables.mk 11 12GICV3_SUPPORT_GIC600 := 1 13 14# Include GICv3 driver files 15include drivers/arm/gic/v3/gicv3.mk 16 17IMX_GIC_SOURCES := ${GICV3_SOURCES} \ 18 plat/common/plat_gicv3.c \ 19 plat/common/plat_psci_common.c \ 20 plat/imx/common/plat_imx8_gic.c 21 22BL31_SOURCES += plat/common/aarch64/crash_console_helpers.S \ 23 plat/imx/imx93/aarch64/plat_helpers.S \ 24 plat/imx/imx93/plat_topology.c \ 25 plat/imx/common/lpuart_console.S \ 26 plat/imx/imx93/trdc.c \ 27 plat/imx/imx93/pwr_ctrl.c \ 28 plat/imx/imx93/imx93_bl31_setup.c \ 29 plat/imx/imx93/imx93_psci.c \ 30 lib/cpus/aarch64/cortex_a55.S \ 31 drivers/delay_timer/delay_timer.c \ 32 drivers/delay_timer/generic_delay_timer.c \ 33 drivers/nxp/trdc/imx_trdc.c \ 34 ${IMX_GIC_SOURCES} \ 35 ${XLAT_TABLES_LIB_SRCS} 36 37RESET_TO_BL31 := 1 38HW_ASSISTED_COHERENCY := 1 39USE_COHERENT_MEM := 0 40PROGRAMMABLE_RESET_ADDRESS := 1 41COLD_BOOT_SINGLE_CPU := 1 42 43BL32_BASE ?= 0x96000000 44BL32_SIZE ?= 0x02000000 45$(eval $(call add_define,BL32_BASE)) 46$(eval $(call add_define,BL32_SIZE)) 47