1#
2# Copyright (c) 2019-2023, ARM Limited and Contributors. All rights reserved.
3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6#
7# Translation tables library
8include lib/xlat_tables_v2/xlat_tables.mk
9
10PLAT_INCLUDES		:=	-Iplat/imx/common/include		\
11				-Iplat/imx/imx8m/include		\
12				-Iplat/imx/imx8m/imx8mm/include		\
13				-Idrivers/imx/usdhc			\
14				-Iinclude/common/tbbr			\
15				-Iinclude/lib/libfdt
16
17# Include GICv3 driver files
18include drivers/arm/gic/v3/gicv3.mk
19
20include lib/libfdt/libfdt.mk
21
22IMX_DRAM_SOURCES	:=	plat/imx/imx8m/ddr/dram.c		\
23				plat/imx/imx8m/ddr/clock.c		\
24				plat/imx/imx8m/ddr/dram_retention.c	\
25				plat/imx/imx8m/ddr/ddr4_dvfs.c		\
26				plat/imx/imx8m/ddr/lpddr4_dvfs.c
27
28IMX_GIC_SOURCES		:=	${GICV3_SOURCES}			\
29				plat/common/plat_gicv3.c		\
30				plat/common/plat_psci_common.c		\
31				plat/imx/common/plat_imx8_gic.c
32
33BL31_SOURCES		+=	plat/imx/common/imx8_helpers.S			\
34				plat/imx/imx8m/gpc_common.c			\
35				plat/imx/imx8m/imx_hab.c			\
36				plat/imx/imx8m/imx_aipstz.c			\
37				plat/imx/imx8m/imx_rdc.c			\
38				plat/imx/imx8m/imx8m_csu.c			\
39				plat/imx/imx8m/imx8m_caam.c			\
40				plat/imx/imx8m/imx8m_ccm.c			\
41				plat/imx/imx8m/imx8m_psci_common.c		\
42				plat/imx/imx8m/imx8m_snvs.c			\
43				plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c	\
44				plat/imx/imx8m/imx8mm/imx8mm_psci.c		\
45				plat/imx/imx8m/imx8mm/gpc.c			\
46				plat/imx/common/imx8_topology.c			\
47				plat/imx/common/imx_sip_handler.c		\
48				plat/imx/common/imx_sip_svc.c			\
49				plat/imx/common/imx_uart_console.S		\
50				lib/cpus/aarch64/cortex_a53.S			\
51				drivers/arm/tzc/tzc380.c			\
52				drivers/delay_timer/delay_timer.c		\
53				drivers/delay_timer/generic_delay_timer.c	\
54				${XLAT_TABLES_LIB_SRCS}				\
55				${IMX_DRAM_SOURCES}				\
56				${IMX_GIC_SOURCES}
57
58ifeq (${NEED_BL2},yes)
59BL2_SOURCES		+=	common/desc_image_load.c			\
60				common/fdt_wrappers.c				\
61				plat/imx/common/imx8_helpers.S			\
62				plat/imx/common/imx_uart_console.S		\
63				plat/imx/imx8m/imx8mm/imx8mm_bl2_el3_setup.c	\
64				plat/imx/imx8m/imx8mm/gpc.c			\
65				plat/imx/imx8m/imx_aipstz.c			\
66				plat/common/plat_psci_common.c			\
67				lib/xlat_tables/aarch64/xlat_tables.c		\
68				lib/xlat_tables/xlat_tables_common.c		\
69				lib/cpus/aarch64/cortex_a53.S			\
70				drivers/delay_timer/delay_timer.c		\
71				drivers/delay_timer/generic_delay_timer.c	\
72				${PLAT_GIC_SOURCES}				\
73				${PLAT_DRAM_SOURCES}				\
74				drivers/mmc/mmc.c				\
75				drivers/io/io_block.c				\
76				drivers/io/io_fip.c				\
77				drivers/io/io_memmap.c				\
78				drivers/io/io_storage.c				\
79				drivers/imx/usdhc/imx_usdhc.c			\
80				plat/imx/imx8m/imx8mm/imx8mm_bl2_mem_params_desc.c	\
81				plat/imx/common/imx_io_storage.c		\
82				plat/imx/imx8m/imx8m_image_load.c		\
83				lib/optee/optee_utils.c
84endif
85
86# Add the build options to pack BLx images and kernel device tree
87# in the FIP if the platform requires.
88ifneq ($(BL2),)
89RESET_TO_BL31		:=	0
90$(eval $(call TOOL_ADD_PAYLOAD,${BUILD_PLAT}/tb_fw.crt,--tb-fw-cert))
91endif
92ifneq ($(BL32_EXTRA1),)
93$(eval $(call TOOL_ADD_IMG,BL32_EXTRA1,--tos-fw-extra1))
94endif
95ifneq ($(BL32_EXTRA2),)
96$(eval $(call TOOL_ADD_IMG,BL32_EXTRA2,--tos-fw-extra2))
97endif
98ifneq ($(HW_CONFIG),)
99$(eval $(call TOOL_ADD_IMG,HW_CONFIG,--hw-config))
100endif
101
102ifeq (${NEED_BL2},yes)
103$(eval $(call add_define,NEED_BL2))
104LOAD_IMAGE_V2		:=	1
105# Non-TF Boot ROM
106RESET_TO_BL2	:=	1
107endif
108
109ifneq (${TRUSTED_BOARD_BOOT},0)
110
111include drivers/auth/mbedtls/mbedtls_crypto.mk
112include drivers/auth/mbedtls/mbedtls_x509.mk
113
114AUTH_SOURCES	:=	drivers/auth/auth_mod.c			\
115			drivers/auth/crypto_mod.c		\
116			drivers/auth/img_parser_mod.c		\
117			drivers/auth/tbbr/tbbr_cot_common.c     \
118			drivers/auth/tbbr/tbbr_cot_bl2.c
119
120BL2_SOURCES	+=	${AUTH_SOURCES}					\
121			plat/common/tbbr/plat_tbbr.c			\
122			plat/imx/imx8m/imx8mm/imx8mm_trusted_boot.c	\
123			plat/imx/imx8m/imx8mm/imx8mm_rotpk.S
124
125ROT_KEY             = $(BUILD_PLAT)/rot_key.pem
126ROTPK_HASH          = $(BUILD_PLAT)/rotpk_sha256.bin
127
128$(eval $(call add_define_val,ROTPK_HASH,'"$(ROTPK_HASH)"'))
129$(eval $(call MAKE_LIB_DIRS))
130
131$(BUILD_PLAT)/bl2/imx8mm_rotpk.o: $(ROTPK_HASH)
132
133certificates: $(ROT_KEY)
134
135$(ROT_KEY): | $(BUILD_PLAT)
136	@echo "  OPENSSL $@"
137	@if [ ! -f $(ROT_KEY) ]; then \
138		${OPENSSL_BIN_PATH}/openssl genrsa 2048 > $@ 2>/dev/null; \
139	fi
140
141$(ROTPK_HASH): $(ROT_KEY)
142	@echo "  OPENSSL $@"
143	$(Q)${OPENSSL_BIN_PATH}/openssl rsa -in $< -pubout -outform DER 2>/dev/null |\
144	${OPENSSL_BIN_PATH}/openssl dgst -sha256 -binary > $@ 2>/dev/null
145endif
146
147ENABLE_PIE		:=	1
148USE_COHERENT_MEM	:=	1
149RESET_TO_BL31		:=	1
150A53_DISABLE_NON_TEMPORAL_HINT := 0
151
152ERRATA_A53_835769	:=	1
153ERRATA_A53_843419	:=	1
154ERRATA_A53_855873	:=	1
155
156ifneq (${PRELOADED_BL33_BASE},)
157$(eval $(call add_define_val,PLAT_NS_IMAGE_OFFSET,${PRELOADED_BL33_BASE}))
158endif
159
160BL32_BASE		?=	0xbe000000
161$(eval $(call add_define,BL32_BASE))
162
163BL32_SIZE		?=	0x2000000
164$(eval $(call add_define,BL32_SIZE))
165
166IMX_BOOT_UART_BASE	?=	0x30890000
167ifeq (${IMX_BOOT_UART_BASE},auto)
168    override IMX_BOOT_UART_BASE	:=	0
169endif
170$(eval $(call add_define,IMX_BOOT_UART_BASE))
171
172EL3_EXCEPTION_HANDLING := $(SDEI_SUPPORT)
173ifeq (${SDEI_SUPPORT}, 1)
174BL31_SOURCES 		+= 	plat/imx/common/imx_ehf.c	\
175				plat/imx/common/imx_sdei.c
176endif
177
178ifeq (${MEASURED_BOOT},1)
179    MEASURED_BOOT_MK := drivers/measured_boot/event_log/event_log.mk
180    $(info Including ${MEASURED_BOOT_MK})
181    include ${MEASURED_BOOT_MK}
182
183ifneq (${MBOOT_EL_HASH_ALG}, sha256)
184    $(eval $(call add_define,TF_MBEDTLS_MBOOT_USE_SHA512))
185endif
186
187BL2_SOURCES		+=	plat/imx/imx8m/imx8m_measured_boot.c	\
188				plat/imx/imx8m/imx8m_dyn_cfg_helpers.c	\
189				${EVENT_LOG_SOURCES}
190endif
191
192ifeq (${SPD},trusty)
193	BL31_CFLAGS    +=      -DPLAT_XLAT_TABLES_DYNAMIC=1
194endif
195