1#
2# Copyright (c) 2015-2024, Arm Limited and Contributors. All rights reserved.
3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7include common/fdt_wrappers.mk
8
9ifeq (${ARCH},aarch32)
10    ifeq (${AARCH32_SP},none)
11        $(error Variable AARCH32_SP has to be set for AArch32)
12    endif
13endif
14
15ifeq (${ARCH}, aarch64)
16  # On ARM standard platorms, the TSP can execute from Trusted SRAM, Trusted
17  # DRAM (if available) or the TZC secured area of DRAM.
18  # TZC secured DRAM is the default.
19
20  ARM_TSP_RAM_LOCATION	?=	dram
21
22  ifeq (${ARM_TSP_RAM_LOCATION}, tsram)
23    ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID
24  else ifeq (${ARM_TSP_RAM_LOCATION}, tdram)
25    ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_DRAM_ID
26  else ifeq (${ARM_TSP_RAM_LOCATION}, dram)
27    ARM_TSP_RAM_LOCATION_ID = ARM_DRAM_ID
28  else
29    $(error "Unsupported ARM_TSP_RAM_LOCATION value")
30  endif
31
32  # Process flags
33  # Process ARM_BL31_IN_DRAM flag
34  ARM_BL31_IN_DRAM		:=	0
35  $(eval $(call assert_boolean,ARM_BL31_IN_DRAM))
36  $(eval $(call add_define,ARM_BL31_IN_DRAM))
37else
38  ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID
39endif
40
41$(eval $(call add_define,ARM_TSP_RAM_LOCATION_ID))
42
43
44# For the original power-state parameter format, the State-ID can be encoded
45# according to the recommended encoding or zero. This flag determines which
46# State-ID encoding to be parsed.
47ARM_RECOM_STATE_ID_ENC := 0
48
49# If the PSCI_EXTENDED_STATE_ID is set, then ARM_RECOM_STATE_ID_ENC need to
50# be set. Else throw a build error.
51ifeq (${PSCI_EXTENDED_STATE_ID}, 1)
52  ifeq (${ARM_RECOM_STATE_ID_ENC}, 0)
53    $(error Build option ARM_RECOM_STATE_ID_ENC needs to be set if \
54            PSCI_EXTENDED_STATE_ID is set for ARM platforms)
55  endif
56endif
57
58# Process ARM_RECOM_STATE_ID_ENC flag
59$(eval $(call assert_boolean,ARM_RECOM_STATE_ID_ENC))
60$(eval $(call add_define,ARM_RECOM_STATE_ID_ENC))
61
62# Process ARM_DISABLE_TRUSTED_WDOG flag
63# By default, Trusted Watchdog is always enabled unless
64# SPIN_ON_BL1_EXIT or ENABLE_RME is set
65ARM_DISABLE_TRUSTED_WDOG	:=	0
66ifneq ($(filter 1,${SPIN_ON_BL1_EXIT} ${ENABLE_RME}),)
67ARM_DISABLE_TRUSTED_WDOG	:=	1
68endif
69$(eval $(call assert_boolean,ARM_DISABLE_TRUSTED_WDOG))
70$(eval $(call add_define,ARM_DISABLE_TRUSTED_WDOG))
71
72# Process ARM_CONFIG_CNTACR
73ARM_CONFIG_CNTACR		:=	1
74$(eval $(call assert_boolean,ARM_CONFIG_CNTACR))
75$(eval $(call add_define,ARM_CONFIG_CNTACR))
76
77# Process ARM_BL31_IN_DRAM flag
78ARM_BL31_IN_DRAM		:=	0
79$(eval $(call assert_boolean,ARM_BL31_IN_DRAM))
80$(eval $(call add_define,ARM_BL31_IN_DRAM))
81
82# As per CCA security model, all root firmware must execute from on-chip secure
83# memory. This means we must not run BL31 from TZC-protected DRAM.
84ifeq (${ARM_BL31_IN_DRAM},1)
85  ifeq (${ENABLE_RME},1)
86    $(error "BL31 must not run from DRAM on RME-systems. Please set ARM_BL31_IN_DRAM to 0")
87  endif
88endif
89
90# Process ARM_PLAT_MT flag
91ARM_PLAT_MT			:=	0
92$(eval $(call assert_boolean,ARM_PLAT_MT))
93$(eval $(call add_define,ARM_PLAT_MT))
94
95# Use translation tables library v2 by default
96ARM_XLAT_TABLES_LIB_V1		:=	0
97$(eval $(call assert_boolean,ARM_XLAT_TABLES_LIB_V1))
98$(eval $(call add_define,ARM_XLAT_TABLES_LIB_V1))
99
100# Don't have the Linux kernel as a BL33 image by default
101ARM_LINUX_KERNEL_AS_BL33	:=	0
102$(eval $(call assert_boolean,ARM_LINUX_KERNEL_AS_BL33))
103$(eval $(call add_define,ARM_LINUX_KERNEL_AS_BL33))
104
105ifeq (${ARM_LINUX_KERNEL_AS_BL33},1)
106  ifneq (${ARCH},aarch64)
107    ifneq (${RESET_TO_SP_MIN},1)
108      $(error "ARM_LINUX_KERNEL_AS_BL33 is only available if RESET_TO_SP_MIN=1.")
109    endif
110  endif
111  ifndef PRELOADED_BL33_BASE
112    $(error "PRELOADED_BL33_BASE must be set if ARM_LINUX_KERNEL_AS_BL33 is used.")
113  endif
114  ifeq (${RESET_TO_BL31},1)
115    ifndef ARM_PRELOADED_DTB_BASE
116      $(error "ARM_PRELOADED_DTB_BASE must be set if ARM_LINUX_KERNEL_AS_BL33 is
117       used with RESET_TO_BL31.")
118    endif
119    $(eval $(call add_define,ARM_PRELOADED_DTB_BASE))
120  endif
121endif
122
123# Use an implementation of SHA-256 with a smaller memory footprint but reduced
124# speed.
125$(eval $(call add_define,MBEDTLS_SHA256_SMALLER))
126
127# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images
128# in the FIP if the platform requires.
129ifneq ($(BL32_EXTRA1),)
130$(eval $(call TOOL_ADD_IMG,bl32_extra1,--tos-fw-extra1))
131endif
132ifneq ($(BL32_EXTRA2),)
133$(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2))
134endif
135
136# Enable PSCI_STAT_COUNT/RESIDENCY APIs on ARM platforms
137ENABLE_PSCI_STAT		:=	1
138ENABLE_PMF			:=	1
139
140# Override the standard libc with optimised libc_asm
141OVERRIDE_LIBC			:=	1
142ifeq (${OVERRIDE_LIBC},1)
143    include lib/libc/libc_asm.mk
144endif
145
146# On ARM platforms, separate the code and read-only data sections to allow
147# mapping the former as executable and the latter as execute-never.
148SEPARATE_CODE_AND_RODATA	:=	1
149
150# On ARM platforms, disable SEPARATE_NOBITS_REGION by default. Both PROGBITS
151# and NOBITS sections of BL31 image are adjacent to each other and loaded
152# into Trusted SRAM.
153SEPARATE_NOBITS_REGION		:=	0
154
155# In order to support SEPARATE_NOBITS_REGION for Arm platforms, we need to load
156# BL31 PROGBITS into secure DRAM space and BL31 NOBITS into SRAM. Hence mandate
157# the build to require that ARM_BL31_IN_DRAM is enabled as well.
158ifeq ($(SEPARATE_NOBITS_REGION),1)
159    ifneq ($(ARM_BL31_IN_DRAM),1)
160         $(error For SEPARATE_NOBITS_REGION, ARM_BL31_IN_DRAM must be enabled)
161    endif
162    ifneq ($(RECLAIM_INIT_CODE),0)
163          $(error For SEPARATE_NOBITS_REGION, RECLAIM_INIT_CODE cannot be supported)
164    endif
165endif
166
167# Enable PIE support for RESET_TO_BL31/RESET_TO_SP_MIN case
168ifneq ($(filter 1,${RESET_TO_BL31} ${RESET_TO_SP_MIN}),)
169	ENABLE_PIE			:=	1
170endif
171
172# Disable GPT parser support, use FIP image by default
173ARM_GPT_SUPPORT			:=	0
174$(eval $(call assert_boolean,ARM_GPT_SUPPORT))
175$(eval $(call add_define,ARM_GPT_SUPPORT))
176
177# Include necessary sources to parse GPT image
178ifeq (${ARM_GPT_SUPPORT}, 1)
179  BL2_SOURCES	+=	drivers/partition/gpt.c		\
180			drivers/partition/partition.c
181endif
182
183# Enable CRC instructions via extension for ARMv8-A CPUs.
184# For ARMv8.1-A, and onwards CRC instructions are default enabled.
185# Enable HW computed CRC support unconditionally in BL2 component.
186ifeq (${ARM_ARCH_MAJOR},8)
187    ifeq (${ARM_ARCH_MINOR},0)
188        BL2_CPPFLAGS += -march=armv8-a+crc
189    endif
190endif
191
192ifeq ($(PSA_FWU_SUPPORT),1)
193    # GPT support is recommended as per PSA FWU specification hence
194    # PSA FWU implementation is tightly coupled with GPT support,
195    # and it does not support other formats.
196    ifneq ($(ARM_GPT_SUPPORT),1)
197      $(error For PSA_FWU_SUPPORT, ARM_GPT_SUPPORT must be enabled)
198    endif
199    FWU_MK := drivers/fwu/fwu.mk
200    $(info Including ${FWU_MK})
201    include ${FWU_MK}
202endif
203
204ifeq (${ARCH}, aarch64)
205PLAT_INCLUDES		+=	-Iinclude/plat/arm/common/aarch64
206endif
207
208PLAT_BL_COMMON_SOURCES	+=	plat/arm/common/${ARCH}/arm_helpers.S		\
209				plat/arm/common/arm_common.c			\
210				plat/arm/common/arm_console.c
211
212ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1)
213PLAT_BL_COMMON_SOURCES 	+=	lib/xlat_tables/xlat_tables_common.c	      \
214				lib/xlat_tables/${ARCH}/xlat_tables.c
215else
216ifeq (${XLAT_MPU_LIB_V1}, 1)
217include lib/xlat_mpu/xlat_mpu.mk
218PLAT_BL_COMMON_SOURCES	+=	${XLAT_MPU_LIB_V1_SRCS}
219else
220include lib/xlat_tables_v2/xlat_tables.mk
221PLAT_BL_COMMON_SOURCES	+=      ${XLAT_TABLES_LIB_SRCS}
222endif
223endif
224
225ARM_IO_SOURCES		+=	plat/arm/common/arm_io_storage.c		\
226				plat/arm/common/fconf/arm_fconf_io.c
227ifeq (${SPD},spmd)
228    ifeq (${BL2_ENABLE_SP_LOAD},1)
229         ARM_IO_SOURCES		+=	plat/arm/common/fconf/arm_fconf_sp.c
230    endif
231endif
232
233BL1_SOURCES		+=	drivers/io/io_fip.c				\
234				drivers/io/io_memmap.c				\
235				drivers/io/io_storage.c				\
236				plat/arm/common/arm_bl1_setup.c			\
237				plat/arm/common/arm_err.c			\
238				${ARM_IO_SOURCES}
239
240ifdef EL3_PAYLOAD_BASE
241# Need the plat_arm_program_trusted_mailbox() function to release secondary CPUs from
242# their holding pen
243BL1_SOURCES		+=	plat/arm/common/arm_pm.c
244endif
245
246BL2_SOURCES		+=	drivers/delay_timer/delay_timer.c		\
247				drivers/delay_timer/generic_delay_timer.c	\
248				drivers/io/io_fip.c				\
249				drivers/io/io_memmap.c				\
250				drivers/io/io_storage.c				\
251				plat/arm/common/arm_bl2_setup.c			\
252				plat/arm/common/arm_err.c			\
253				common/tf_crc32.c				\
254				${ARM_IO_SOURCES}
255
256# Firmware Configuration Framework sources
257include lib/fconf/fconf.mk
258
259BL1_SOURCES		+=	${FCONF_SOURCES} ${FCONF_DYN_SOURCES}
260BL2_SOURCES		+=	${FCONF_SOURCES} ${FCONF_DYN_SOURCES}
261
262# Add `libfdt` and Arm common helpers required for Dynamic Config
263include lib/libfdt/libfdt.mk
264
265DYN_CFG_SOURCES		+=	plat/arm/common/arm_dyn_cfg.c		\
266				plat/arm/common/arm_dyn_cfg_helpers.c	\
267				common/uuid.c
268
269DYN_CFG_SOURCES		+=	${FDT_WRAPPERS_SOURCES}
270
271BL1_SOURCES		+=	${DYN_CFG_SOURCES}
272BL2_SOURCES		+=	${DYN_CFG_SOURCES}
273
274ifeq (${RESET_TO_BL2},1)
275BL2_SOURCES		+=	plat/arm/common/arm_bl2_el3_setup.c
276endif
277
278# Because BL1/BL2 execute in AArch64 mode but BL32 in AArch32 we need to use
279# the AArch32 descriptors.
280ifeq (${JUNO_AARCH32_EL3_RUNTIME},1)
281BL2_SOURCES		+=	plat/arm/common/aarch32/arm_bl2_mem_params_desc.c
282else
283ifneq (${PLAT}, corstone1000)
284BL2_SOURCES		+=	plat/arm/common/${ARCH}/arm_bl2_mem_params_desc.c
285endif
286endif
287BL2_SOURCES		+=	plat/arm/common/arm_image_load.c		\
288				common/desc_image_load.c
289ifeq (${SPD},opteed)
290BL2_SOURCES		+=	lib/optee/optee_utils.c
291endif
292
293BL2U_SOURCES		+=	drivers/delay_timer/delay_timer.c		\
294				drivers/delay_timer/generic_delay_timer.c	\
295				plat/arm/common/arm_bl2u_setup.c
296
297BL31_SOURCES		+=	plat/arm/common/arm_bl31_setup.c		\
298				plat/arm/common/arm_pm.c			\
299				plat/arm/common/arm_topology.c			\
300				plat/common/plat_psci_common.c
301
302ifeq (${TRANSFER_LIST}, 1)
303	TRANSFER_LIST_SOURCES += plat/arm/common/arm_transfer_list.c
304endif
305
306ifneq ($(filter 1,${ENABLE_PMF} ${ETHOSN_NPU_DRIVER}),)
307ARM_SVC_HANDLER_SRCS :=
308
309ifeq (${ENABLE_PMF},1)
310ARM_SVC_HANDLER_SRCS	+=	lib/pmf/pmf_smc.c
311endif
312
313ifeq (${ETHOSN_NPU_DRIVER},1)
314ARM_SVC_HANDLER_SRCS	+=	plat/arm/common/fconf/fconf_ethosn_getter.c	\
315				drivers/delay_timer/delay_timer.c		\
316				drivers/arm/ethosn/ethosn_smc.c
317ifeq (${ETHOSN_NPU_TZMP1},1)
318ARM_SVC_HANDLER_SRCS	+=	drivers/arm/ethosn/ethosn_big_fw.c
319endif
320endif
321
322ifeq (${ARCH}, aarch64)
323BL31_SOURCES		+=	plat/arm/common/aarch64/execution_state_switch.c\
324				plat/arm/common/arm_sip_svc.c			\
325				plat/arm/common/plat_arm_sip_svc.c		\
326				${ARM_SVC_HANDLER_SRCS}
327else
328BL32_SOURCES		+=	plat/arm/common/arm_sip_svc.c			\
329				plat/arm/common/plat_arm_sip_svc.c		\
330				${ARM_SVC_HANDLER_SRCS}
331endif
332endif
333
334ifeq (${EL3_EXCEPTION_HANDLING},1)
335BL31_SOURCES		+=	plat/common/aarch64/plat_ehf.c
336endif
337
338ifeq (${SDEI_SUPPORT},1)
339BL31_SOURCES		+=	plat/arm/common/aarch64/arm_sdei.c
340ifeq (${SDEI_IN_FCONF},1)
341BL31_SOURCES		+=	plat/arm/common/fconf/fconf_sdei_getter.c
342endif
343endif
344
345# RAS sources
346ifeq (${ENABLE_FEAT_RAS}-${HANDLE_EA_EL3_FIRST_NS},1-1)
347BL31_SOURCES		+=	lib/extensions/ras/std_err_record.c		\
348				lib/extensions/ras/ras_common.c
349endif
350
351# Pointer Authentication sources
352ifeq (${ENABLE_PAUTH}, 1)
353PLAT_BL_COMMON_SOURCES	+=	plat/arm/common/aarch64/arm_pauth.c
354endif
355
356ifeq (${SPD},spmd)
357BL31_SOURCES		+=	plat/common/plat_spmd_manifest.c	\
358				common/uuid.c				\
359				${LIBFDT_SRCS}
360
361BL31_SOURCES		+=	${FDT_WRAPPERS_SOURCES}
362endif
363
364ifeq (${DRTM_SUPPORT},1)
365BL31_SOURCES            +=	plat/arm/common/arm_err.c
366endif
367
368ifneq (${TRUSTED_BOARD_BOOT},0)
369
370    # Include common TBB sources
371    AUTH_SOURCES 	:= 	drivers/auth/auth_mod.c	\
372				drivers/auth/img_parser_mod.c
373
374    # Include the selected chain of trust sources.
375    ifeq (${COT},tbbr)
376            BL1_SOURCES	+=	drivers/auth/tbbr/tbbr_cot_common.c		\
377				drivers/auth/tbbr/tbbr_cot_bl1.c
378        ifneq (${COT_DESC_IN_DTB},0)
379            BL2_SOURCES	+=	lib/fconf/fconf_cot_getter.c
380        else
381            BL2_SOURCES	+=	drivers/auth/tbbr/tbbr_cot_common.c
382	    # Juno has its own TBBR CoT file for BL2
383            ifneq (${PLAT},juno)
384                BL2_SOURCES	+=	drivers/auth/tbbr/tbbr_cot_bl2.c
385            endif
386        endif
387    else ifeq (${COT},dualroot)
388        AUTH_SOURCES	+=	drivers/auth/dualroot/cot.c
389    else ifeq (${COT},cca)
390        BL1_SOURCES	+=	drivers/auth/cca/cot.c
391        ifneq (${COT_DESC_IN_DTB},0)
392            BL2_SOURCES	+=	lib/fconf/fconf_cot_getter.c
393        else
394            BL2_SOURCES	+=	drivers/auth/cca/cot.c
395        endif
396    else
397        $(error Unknown chain of trust ${COT})
398    endif
399
400    BL1_SOURCES		+=	${AUTH_SOURCES}					\
401				bl1/tbbr/tbbr_img_desc.c			\
402				plat/arm/common/arm_bl1_fwu.c			\
403				plat/common/tbbr/plat_tbbr.c
404
405    BL2_SOURCES		+=	${AUTH_SOURCES}					\
406				plat/common/tbbr/plat_tbbr.c
407
408    $(eval $(call TOOL_ADD_IMG,ns_bl2u,--fwu,FWU_))
409
410    IMG_PARSER_LIB_MK := drivers/auth/mbedtls/mbedtls_x509.mk
411
412    $(info Including ${IMG_PARSER_LIB_MK})
413    include ${IMG_PARSER_LIB_MK}
414endif
415
416# Include Measured Boot makefile before any Crypto library makefile.
417# Crypto library makefile may need default definitions of Measured Boot build
418# flags present in Measured Boot makefile.
419ifneq ($(filter 1,${MEASURED_BOOT} ${DRTM_SUPPORT}),)
420    MEASURED_BOOT_MK := drivers/measured_boot/event_log/event_log.mk
421    $(info Including ${MEASURED_BOOT_MK})
422    include ${MEASURED_BOOT_MK}
423
424    ifneq (${MBOOT_EL_HASH_ALG}, sha256)
425        $(eval $(call add_define,TF_MBEDTLS_MBOOT_USE_SHA512))
426    endif
427
428    ifeq (${MEASURED_BOOT},1)
429         BL1_SOURCES		+= 	${EVENT_LOG_SOURCES}
430         BL2_SOURCES		+= 	${EVENT_LOG_SOURCES}
431    endif
432
433    ifeq (${DRTM_SUPPORT},1)
434         BL31_SOURCES	        += 	${EVENT_LOG_SOURCES}
435    endif
436endif
437
438ifneq ($(filter 1,${MEASURED_BOOT} ${TRUSTED_BOARD_BOOT} ${DRTM_SUPPORT}),)
439    CRYPTO_SOURCES	:=	drivers/auth/crypto_mod.c 	\
440				lib/fconf/fconf_tbbr_getter.c
441    BL1_SOURCES		+=	${CRYPTO_SOURCES}
442    BL2_SOURCES		+=	${CRYPTO_SOURCES}
443    BL31_SOURCES	+=	drivers/auth/crypto_mod.c
444
445    # We expect to locate the *.mk files under the directories specified below
446    CRYPTO_LIB_MK := drivers/auth/mbedtls/mbedtls_crypto.mk
447
448    $(info Including ${CRYPTO_LIB_MK})
449    include ${CRYPTO_LIB_MK}
450endif
451
452ifeq (${RECLAIM_INIT_CODE}, 1)
453    ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1)
454        $(error "To reclaim init code xlat tables v2 must be used")
455    endif
456endif
457