1#
2# Copyright (c) 2013-2022, Arm Limited and Contributors. All rights reserved.
3# Copyright (c) 2021, NVIDIA Corporation. All rights reserved.
4#
5# SPDX-License-Identifier: BSD-3-Clause
6#
7
8# Default configuration values
9GICV3_SUPPORT_GIC600		?=	0
10GICV3_SUPPORT_GIC600AE_FMU	?=	0
11GICV3_IMPL_GIC600_MULTICHIP	?=	0
12GICV3_OVERRIDE_DISTIF_PWR_OPS	?=	0
13GIC_ENABLE_V4_EXTN		?=	0
14GIC_EXT_INTID			?=	0
15GIC600_ERRATA_WA_2384374	?=	${GICV3_SUPPORT_GIC600}
16
17GICV3_SOURCES	+=	drivers/arm/gic/v3/gicv3_main.c		\
18			drivers/arm/gic/v3/gicv3_helpers.c	\
19			drivers/arm/gic/v3/gicdv3_helpers.c	\
20			drivers/arm/gic/v3/gicrv3_helpers.c
21
22ifeq (${GICV3_SUPPORT_GIC600AE_FMU}, 1)
23GICV3_SOURCES	+=	drivers/arm/gic/v3/gic600ae_fmu.c	\
24			drivers/arm/gic/v3/gic600ae_fmu_helpers.c
25endif
26
27ifeq (${GICV3_OVERRIDE_DISTIF_PWR_OPS}, 0)
28GICV3_SOURCES	+=	drivers/arm/gic/v3/arm_gicv3_common.c
29endif
30
31GICV3_SOURCES	+=	drivers/arm/gic/v3/gic-x00.c
32ifeq (${GICV3_IMPL_GIC600_MULTICHIP}, 1)
33GICV3_SOURCES	+=	drivers/arm/gic/v3/gic600_multichip.c
34endif
35
36# Set GIC-600 support
37$(eval $(call assert_boolean,GICV3_SUPPORT_GIC600))
38$(eval $(call add_define,GICV3_SUPPORT_GIC600))
39
40# Set GIC-600AE FMU support
41$(eval $(call assert_boolean,GICV3_SUPPORT_GIC600AE_FMU))
42$(eval $(call add_define,GICV3_SUPPORT_GIC600AE_FMU))
43
44# Set GIC-600 multichip support
45$(eval $(call assert_boolean,GICV3_IMPL_GIC600_MULTICHIP))
46$(eval $(call add_define,GICV3_IMPL_GIC600_MULTICHIP))
47
48# Set GICv4 extension
49$(eval $(call assert_boolean,GIC_ENABLE_V4_EXTN))
50$(eval $(call add_define,GIC_ENABLE_V4_EXTN))
51
52# Set support for extended PPI and SPI range
53$(eval $(call assert_boolean,GIC_EXT_INTID))
54$(eval $(call add_define,GIC_EXT_INTID))
55
56# Set errata workaround for GIC600/GIC600AE
57$(eval $(call assert_boolean,GIC600_ERRATA_WA_2384374))
58$(eval $(call add_define,GIC600_ERRATA_WA_2384374))
59