1STM32MP1
2========
3
4STM32MP1 is a microprocessor designed by STMicroelectronics
5based on Arm Cortex-A7.
6It is an Armv7-A platform, using dedicated code from TF-A.
7More information can be found on `STM32MP1 Series`_ page.
8
9For TF-A common configuration of STM32 MPUs, please check
10:ref:`STM32 MPUs` page.
11
12STM32MP1 Versions
13-----------------
14
15There are 2 variants for STM32MP1: STM32MP13 and STM32MP15
16
17STM32MP13 Versions
18~~~~~~~~~~~~~~~~~~
19The STM32MP13 series is available in 3 different lines which are pin-to-pin compatible:
20
21- STM32MP131: Single Cortex-A7 core
22- STM32MP133: STM32MP131 + 2*CAN, ETH2(GMAC), ADC1
23- STM32MP135: STM32MP133 + DCMIPP, LTDC
24
25Each line comes with a security option (cryptography & secure boot) and a Cortex-A frequency option:
26
27- A      Cortex-A7 @ 650 MHz
28- C      Secure Boot + HW Crypto + Cortex-A7 @ 650 MHz
29- D      Cortex-A7 @ 900 MHz
30- F      Secure Boot + HW Crypto + Cortex-A7 @ 900 MHz
31
32STM32MP15 Versions
33~~~~~~~~~~~~~~~~~~
34The STM32MP15 series is available in 3 different lines which are pin-to-pin compatible:
35
36- STM32MP157: Dual Cortex-A7 cores, Cortex-M4 core @ 209 MHz, 3D GPU, DSI display interface and CAN FD
37- STM32MP153: Dual Cortex-A7 cores, Cortex-M4 core @ 209 MHz and CAN FD
38- STM32MP151: Single Cortex-A7 core, Cortex-M4 core @ 209 MHz
39
40Each line comes with a security option (cryptography & secure boot) and a Cortex-A frequency option:
41
42- A      Basic + Cortex-A7 @ 650 MHz
43- C      Secure Boot + HW Crypto + Cortex-A7 @ 650 MHz
44- D      Basic + Cortex-A7 @ 800 MHz
45- F      Secure Boot + HW Crypto + Cortex-A7 @ 800 MHz
46
47The `STM32MP1 part number codification`_ page gives more information about part numbers.
48
49Memory mapping
50--------------
51
52::
53
54    0x00000000 +-----------------+
55               |                 |   ROM
56    0x00020000 +-----------------+
57               |                 |
58               |       ...       |
59               |                 |
60    0x2FFC0000 +-----------------+ \
61               |     BL32 DTB    | |
62    0x2FFC5000 +-----------------+ |
63               |       BL32      | |
64    0x2FFDF000 +-----------------+ |
65               |       ...       | |
66    0x2FFE3000 +-----------------+ |
67               |     BL2 DTB     | | Embedded SRAM
68    0x2FFEA000 +-----------------+ |
69               |       BL2       | |
70    0x2FFFF000 +-----------------+ |
71               |  SCMI mailbox   | |
72    0x30000000 +-----------------+ /
73               |                 |
74               |       ...       |
75               |                 |
76    0x40000000 +-----------------+
77               |                 |
78               |                 |   Devices
79               |                 |
80    0xC0000000 +-----------------+ \
81               |                 | |
82    0xC0100000 +-----------------+ |
83               |       BL33      | | Non-secure RAM (DDR)
84               |       ...       | |
85               |                 | |
86    0xFFFFFFFF +-----------------+ /
87
88
89Build Instructions
90------------------
91
92STM32MP1x specific flags
93~~~~~~~~~~~~~~~~~~~~~~~~
94
95Dedicated STM32MP1 flags:
96
97- | ``STM32_TF_VERSION``: to manage BL2 monotonic counter.
98  | Default: 0
99- | ``STM32MP13``: to select STM32MP13 variant configuration.
100  | Default: 0
101- | ``STM32MP15``: to select STM32MP15 variant configuration.
102  | Default: 1
103
104
105Boot with FIP
106~~~~~~~~~~~~~
107You need to build BL2, BL32 (SP_min or OP-TEE) and BL33 (U-Boot) before building FIP binary.
108
109U-Boot
110______
111
112.. code:: bash
113
114    cd <u-boot_directory>
115    make stm32mp15_trusted_defconfig
116    make DEVICE_TREE=stm32mp157c-ev1 all
117
118OP-TEE (recommended)
119____________________
120OP-TEE is the default BL32 supported for STMicroelectronics platforms.
121
122.. code:: bash
123
124    cd <optee_directory>
125    make CROSS_COMPILE=arm-linux-gnueabihf- ARCH=arm PLATFORM=stm32mp1 \
126        CFG_EMBED_DTB_SOURCE_FILE=stm32mp157c-ev1.dts
127
128
129TF-A BL32 (SP_min) (not recommended)
130____________________________________
131If you choose not to use OP-TEE, you can use TF-A SP_min.
132This is not the recommended BL32 to use, and will have very limited support.
133To build TF-A BL32, and its device tree file:
134
135.. code:: bash
136
137    make CROSS_COMPILE=arm-none-eabi- PLAT=stm32mp1 ARCH=aarch32 ARM_ARCH_MAJOR=7 \
138        AARCH32_SP=sp_min DTB_FILE_NAME=stm32mp157c-ev1.dtb bl32 dtbs
139
140TF-A BL2
141________
142To build TF-A BL2 with its STM32 header for SD-card boot:
143
144.. code:: bash
145
146    make CROSS_COMPILE=arm-none-eabi- PLAT=stm32mp1 ARCH=aarch32 ARM_ARCH_MAJOR=7 \
147        DTB_FILE_NAME=stm32mp157c-ev1.dtb STM32MP_SDMMC=1
148
149For other boot devices, you have to replace STM32MP_SDMMC in the previous command
150with the desired device flag.
151
152This BL2 is independent of the BL32 used (SP_min or OP-TEE)
153
154
155FIP
156___
157With BL32 SP_min:
158
159.. code:: bash
160
161    make CROSS_COMPILE=arm-none-eabi- PLAT=stm32mp1 ARCH=aarch32 ARM_ARCH_MAJOR=7 \
162        AARCH32_SP=sp_min \
163        DTB_FILE_NAME=stm32mp157c-ev1.dtb \
164        BL33=<u-boot_directory>/u-boot-nodtb.bin \
165        BL33_CFG=<u-boot_directory>/u-boot.dtb \
166        fip
167
168With OP-TEE:
169
170.. code:: bash
171
172    make CROSS_COMPILE=arm-none-eabi- PLAT=stm32mp1 ARCH=aarch32 ARM_ARCH_MAJOR=7 \
173        AARCH32_SP=optee \
174        DTB_FILE_NAME=stm32mp157c-ev1.dtb \
175        BL33=<u-boot_directory>/u-boot-nodtb.bin \
176        BL33_CFG=<u-boot_directory>/u-boot.dtb \
177        BL32=<optee_directory>/tee-header_v2.bin \
178        BL32_EXTRA1=<optee_directory>/tee-pager_v2.bin
179        BL32_EXTRA2=<optee_directory>/tee-pageable_v2.bin
180        fip
181
182Trusted Boot Board
183__________________
184
185.. code:: shell
186
187    tools/cert_create/cert_create -n --rot-key build/stm32mp1/release/rot_key.pem \
188        --tfw-nvctr 0 \
189        --ntfw-nvctr 0 \
190        --key-alg ecdsa --hash-alg sha256 \
191        --trusted-key-cert build/stm32mp1/release/trusted_key.crt \
192        --tos-fw <optee_directory>/tee-header_v2.bin \
193        --tos-fw-extra1 <optee_directory>/tee-pager_v2.bin \
194        --tos-fw-extra2 <optee_directory>/tee-pageable_v2.bin \
195        --tos-fw-cert build/stm32mp1/release/tos_fw_content.crt \
196        --tos-fw-key-cert build/stm32mp1/release/tos_fw_key.crt \
197        --nt-fw <u-boot_directory>/u-boot-nodtb.bin \
198        --nt-fw-cert build/stm32mp1/release/nt_fw_content.crt \
199        --nt-fw-key-cert build/stm32mp1/release/nt_fw_key.crt \
200        --hw-config <u-boot_directory>/u-boot.dtb \
201        --fw-config build/stm32mp1/release/fdts/fw-config.dtb \
202        --stm32mp-cfg-cert build/stm32mp1/release/stm32mp_cfg_cert.crt
203
204    tools/fiptool/fiptool create --tos-fw <optee_directory>/tee-header_v2.bin \
205        --tos-fw-extra1 <optee_directory>/tee-pager_v2.bin \
206        --tos-fw-extra2 <optee_directory>/tee-pageable_v2.bin \
207        --nt-fw <u-boot_directory>/u-boot-nodtb.bin \
208        --hw-config <u-boot_directory>/u-boot.dtb \
209        --fw-config build/stm32mp1/release/fdts/fw-config.dtb \
210        --trusted-key-cert build/stm32mp1/release/trusted_key.crt \
211        --tos-fw-cert build/stm32mp1/release/tos_fw_content.crt \
212        --tos-fw-key-cert build/stm32mp1/release/tos_fw_key.crt \
213        --nt-fw-cert build/stm32mp1/release/nt_fw_content.crt \
214        --nt-fw-key-cert build/stm32mp1/release/nt_fw_key.crt \
215        --stm32mp-cfg-cert build/stm32mp1/release/stm32mp_cfg_cert.crt \
216        build/stm32mp1/release/stm32mp1.fip
217
218
219.. _STM32MP1 Series: https://www.st.com/en/microcontrollers-microprocessors/stm32mp1-series.html
220.. _STM32MP1 part number codification: https://wiki.st.com/stm32mpu/wiki/STM32MP15_microprocessor#Part_number_codification
221
222*Copyright (c) 2023-2024, STMicroelectronics - All Rights Reserved*
223