1Glossary
2========
3
4This glossary provides definitions for terms and abbreviations used in the TF-A
5documentation.
6
7You can find additional definitions in the `Arm Glossary`_.
8
9.. glossary::
10   :sorted:
11
12   AArch32
13      32-bit execution state of the ARMv8 ISA
14
15   AArch64
16      64-bit execution state of the ARMv8 ISA
17
18   AMU
19      Activity Monitor Unit, a hardware monitoring unit introduced by FEAT_AMUv1
20      that exposes CPU core runtime metrics as a set of counter registers.
21
22   API
23      Application Programming Interface
24
25   AT
26      Address Translation
27
28   BTI
29      Branch Target Identification. An Armv8.5 extension providing additional
30      control flow integrity around indirect branches and their targets.
31
32   CoT
33   COT
34      Chain of Trust
35
36   CSS
37      Compute Sub-System
38
39   CVE
40      Common Vulnerabilities and Exposures. A CVE document is commonly used to
41      describe a publicly-known security vulnerability.
42
43   DICE
44      Device Identifier Composition Engine
45
46   DCE
47      DRTM Configuration Environment
48
49   D-CRTM
50      Dynamic Code Root of Trust for Measurement
51
52   DLME
53      Dynamically Launched Measured Environment
54
55   DRTM
56      Dynamic Root of Trust for Measurement
57
58   DPE
59      DICE Protection Environment
60
61   DS-5
62      Arm Development Studio 5
63
64   DSU
65      DynamIQ Shared Unit
66
67   DT
68      Device Tree
69
70   DTB
71      Device Tree Blob
72
73   EL
74      Exception Level
75
76   EHF
77      Exception Handling Framework
78
79   ERRATA_ABI
80      Errata management firmware interface
81
82   FCONF
83      Firmware Configuration Framework
84
85   FDT
86      Flattened Device Tree
87
88   FF-A
89      Firmware Framework for Arm A-profile
90
91   FIP
92      Firmware Image Package
93
94   FVP
95      Fixed Virtual Platform
96
97   FWU
98      FirmWare Update
99
100   GIC
101      Generic Interrupt Controller
102
103   ISA
104      Instruction Set Architecture
105
106   Linaro
107      A collaborative engineering organization consolidating
108      and optimizing open source software and tools for the Arm architecture.
109
110   LSP
111      A logical secure partition managed by SPM
112
113   MMU
114      Memory Management Unit
115
116   MPAM
117      Memory Partitioning And Monitoring. An optional Armv8.4 extension.
118
119   MPMM
120     Maximum Power Mitigation Mechanism, an optional power management mechanism
121     supported by some Arm Armv9-A cores.
122
123   MPIDR
124      Multiprocessor Affinity Register
125
126   MTE
127      Memory Tagging Extension. An optional Armv8.5 extension that enables
128      hardware-assisted memory tagging.
129
130   OEN
131      Owning Entity Number
132
133   OP-TEE
134      Open Portable Trusted Execution Environment. An example of a :term:`TEE`
135
136   OTE
137      Open-source Trusted Execution Environment
138
139   PDD
140      Platform Design Document
141
142   PAUTH
143      Pointer Authentication. An optional extension introduced in Armv8.3.
144
145   PMF
146      Performance Measurement Framework
147
148   PSA
149      Platform Security Architecture
150
151   PSR
152     Platform Security Requirements
153
154   PSCI
155      Power State Coordination Interface
156
157   RAS
158      Reliability, Availability, and Serviceability extensions. A mandatory
159      extension for the Armv8.2 architecture and later. An optional extension to
160      the base Armv8 architecture.
161
162   ROT
163      Root of Trust
164
165   SCMI
166      System Control and Management Interface
167
168   SCP
169      System Control Processor
170
171   SDEI
172      Software Delegated Exception Interface
173
174   SDS
175      Shared Data Storage
176
177   SEA
178      Synchronous External Abort
179
180   SiP
181   SIP
182      Silicon Provider
183
184   SMC
185      Secure Monitor Call
186
187   SMCCC
188      :term:`SMC` Calling Convention
189
190   SoC
191      System on Chip
192
193   SP
194      Secure Partition
195
196   SPD
197      Secure Payload Dispatcher
198
199   SPM
200      Secure Partition Manager
201
202   SRTM
203      Static Root of Trust for Measurement
204
205   SSBS
206      Speculative Store Bypass Safe. Introduced in Armv8.5, this configuration
207      bit can be set by software to allow or prevent the hardware from
208      performing speculative operations.
209
210   SVE
211      Scalable Vector Extension
212
213   TBB
214      Trusted Board Boot
215
216   TBBR
217      Trusted Board Boot Requirements
218
219   TCB
220      Trusted Compute Base
221
222   TCG
223      Trusted Computing Group
224
225   TEE
226      Trusted Execution Environment
227
228   TF-A
229      Trusted Firmware-A
230
231   TF-M
232      Trusted Firmware-M
233
234   TLB
235      Translation Lookaside Buffer
236
237   TLK
238      Trusted Little Kernel. A Trusted OS from NVIDIA.
239
240   TPM
241      Trusted Platform Module
242
243   TRNG
244      True Random Number Generator (hardware based)
245
246   TSP
247      Test Secure Payload
248
249   TZC
250      TrustZone Controller
251
252   UBSAN
253      Undefined Behavior Sanitizer
254
255   UEFI
256      Unified Extensible Firmware Interface
257
258   WDOG
259      Watchdog
260
261   XLAT
262      Translation (abbr.). For example, "XLAT table".
263
264.. _`Arm Glossary`: https://developer.arm.com/support/arm-glossary
265